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300 Commits

Author SHA1 Message Date
Dunajski, Bartosz
bb80d327c7 Move HardwareInfo ownership to ExecutionEnvironment [1/n] 
Change-Id: I5e5b4cc45947a8841282c7d431fb69d9c397a2d4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-08 16:11:01 +02:00
Mrozek, Michal
bc35cd250a Do not use max power saving mode in VA sharing scenarios. 
-This can be achieved by passing CL_QUEUE_THROTTLE_LOW_KHR as throttle hint
to command queue.
- This gives much better control about the granularity of this feature
instead of triggering this for the whole context user may still have
power saving mode queues.

Change-Id: I066729f963119ddc1f62ad2785c342af2fea588e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-05-07 15:23:13 +02:00
Mateusz Hoppe
068a8d7189 Call submitBatchBuffer on HardwareContext 
Related-To: NEO-3052

Change-Id: I51cae4d953260c0b6a49c40b8a8771630c721731
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-04-26 15:22:42 +02:00
Mateusz Hoppe
4733e51770 Extended format support in VA sharing 
- enabled with Debug Variable
- allow P010 surface sharing

Related-To: NEO-3049

Change-Id: I837d9f2e31a4ea2a9cf763430021929222cf3001
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-04-26 12:28:33 +02:00
Mrozek, Michal
c269bc062f Limit overestimation in multi kernel scenarios. 
- There was overestimation that resulted in each kernel getting
page aligned estimation size.
- After this change every kernel aligns only to cache line and final
size is aligned to page size.

Change-Id: Iee06bdd0083724ea7e9415f3d0fe70198acca407
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-23 17:46:53 +02:00
Mateusz Hoppe
6c74446a1e AubStream headers update 
Change-Id: Ie96e827013f4a956154bcbfe50a42ab6ef0cbae3
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-04-23 14:56:15 +02:00
Jobczyk, Lukasz
3051f43470 Do not compress small buffers 
Related-To: NEO-3112

Change-Id: I4f18f1ee9edb4e6938d7fe98c52e9778ce867fd1
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-04-20 22:26:15 +02:00
Piotr Fusik
086ef7c461 Simplify code by introducing TimestampPacketStorage::Packet. 
Related-To: NEO-2872

Change-Id: Ifce455f1a48f2db2bf16af2dd32208ee4542204d
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-04-18 16:14:04 +02:00
Katarzyna Cencelewska
c5274c5087 Set FeatureTable and WorkaroundTable in setupHardwareInfo 
Related-To: NEO-2755

Change-Id: I61ba85909574780464690c70b194b3d3597af43e
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2019-04-17 13:52:19 +02:00
Maciej Dziuban
b51b4a173b Pass hwInfo to getExtraDeviceInfo 
Resolves: NEO-3106
Change-Id: I8d74ac536f4325b35536f3895015a571eecafc3a
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-04-17 11:48:20 +02:00
Mateusz Jablonski
74ae06b131 Add new allocation type for internal allocations in system memory 
Related-To: NEO-2733

Change-Id: I256d414c1e92647469dd2a80f83bdbfc8721cf43
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-04-17 11:20:50 +02:00
Piotr Fusik
745c20c78a Rename TimestampPacket to TimestampPacketStorage. 
Related-To: NEO-2872

Change-Id: Id1f78491912c44890ae7ead2cac12ec8eb073628
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-04-16 15:34:28 +02:00
Dunajski, Bartosz
8e273cfe1e Add blitterOperationsSupported flag to RuntimeCapabilityTable 
Change-Id: If82f6c740d42734a260e22d58562338ea2e11630
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-04-16 11:34:55 +02:00
Piotr Fusik
543b3d39d0 Use CPU pointers for TimestampPacket where appropriate. 
Related-To: NEO-2872

Change-Id: Ic91a1dd6252d2970e20bb32c3d867449041cbb8a
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-04-15 10:55:12 +02:00
Dunajski, Bartosz
653986aea1 Add method to append blit command 
Change-Id: I8aa968cb9480dfef6fcb51bcc123d6087f9a804b
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-04-11 14:50:42 +02:00
Dunajski, Bartosz
ccd93e1ea8 Add method to dispatch blit operation from hostPtr to Buffer 
Related-To: NEO-3020

Change-Id: If76f2c659c3ee343693a6d3ced86a47d7ed0bf61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-04-10 15:17:44 +02:00
Zbigniew Zdanowicz
e201725dd5 Add dedicated map allocation 
Related-To: NEO-2917

Change-Id: Ieeca40f5faf29433a5c464d2c3ca3b8910695a9b
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2019-04-09 16:16:31 +02:00
Milczarek, Slawomir
381ccfc0aa AUB capture with AubStream to support image dumps 
Related-To: NEO-2717

Change-Id: I448627cc40776eadacaefaa321500a3cf5ff3593
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-04-08 17:28:14 +02:00
Mrozek, Michal
9ff61b6e04 Setup preemption registers now return input value. 
Change-Id: Ib58e2dffb5ebca15bfca24d03e8077ac71c9c499
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-04-08 12:05:35 +02:00
Jacek Danecki
4b2bb188b7 Add support for Gen11 platform 
Related-To: NEO-2388

Change-Id: I4da92efe7f875f409cd62519a31ed4509b55bda7
Signed-off-by: Jacek Danecki <jacek.danecki@intel.com>
 2019-04-05 14:28:55 +02:00
Maciej Plewka
4eb48e3d06 Add function to flush caches 
Related-To: NEO-2536

Change-Id: Ifbf7e7a42514dd66eb0914f9d13407287481e123
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-04-05 09:48:50 +02:00
Kamil Diedrich
cefa3e3119 Add alignment check to CL_DEVICE_MEM_BASE_ADDR_ALIGN for compressed buffers 
Change-Id: I44fa231411a754fb24398a4a9727ca16f257220e
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2019-04-02 12:20:12 +02:00
Milczarek, Slawomir
17493426c1 AUB CSR with a capability to add AUB comment 
Change-Id: Ia7e85468c3f1e937d34b67b0e279c013e8e3c190
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-04-01 14:14:58 +02:00
Mateusz Jablonski
f3d17008ee TransferProperties: lock resource only when transfer on CPU is requested 
Change-Id: Ic93b4fd438e75f5d54cbae9bec332c4b18c6b1ee
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-04-01 14:02:49 +02:00
Mateusz Hoppe
e82d6e63cb Refactor GMM creation 
- extract createResourceParams method from queryImageParams
- add tilingMode to ImageInfo

Change-Id: I32cc2a7d32892147545017e592e2796f85057b46
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-04-01 13:56:02 +02:00
Maciej Dziuban
68311588e6 Delete CommandQueue argument from dispatchScheduler 
Change-Id: Icbda4d6887d7f0001e3081aef1fa69edc1169782
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-04-01 11:13:37 +02:00
Kamil Diedrich
0ff6358c17 Add method checkResourceCompatibility 
Change-Id: I858f54cbeac86121882ca0dec1a5f35eca034dbd
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2019-04-01 11:12:32 +02:00
Maciej Dziuban
377aebce06 Move PIPE_CONTROL related functions to PipeControlHelper 
Change-Id: Ie8220b06d2aa35a9fd0083b7db6925b577564d36
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-04-01 09:20:28 +02:00
Piotr Fusik
8cf7cea1e9 Simplify bit operations. 
Change-Id: If1401f32df5ebcb3abf614832152abf029a9c5e6
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-27 17:11:29 +01:00
Milczarek, Slawomir
96db96fcb4 Add support for buffer dumps in BIN and TRE format 
Change-Id: Ib7e59fd6812ca6adcb2dfc1defa74008fee17ec9
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-03-27 13:04:30 +01:00
Piotr Fusik
d4a0c4852b Move EngineType to aub_stream. 
Change-Id: Ieaa75aaf4aca4487833754eb38ff709adcbf0f11
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-27 10:06:29 +01:00
Maciej Plewka
9e52684f5b Change namespace from OCLRT to NEO 
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-26 15:48:19 +01:00
Filip Hazubski
cdd46679c8 Add getIntelQueueInfo helper function 
Change-Id: I5daed24c36db8f5da143db8665b4353582dbc94b
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-03-26 11:31:35 +01:00
Zdunowski, Piotr
14824f1dff Add support for device specific extensions. 
Change-Id: I3ffd125875067b00bc225556c09fbe2d02f11022
Signed-off-by: Zdunowski, Piotr <piotr.zdunowski@intel.com>
 2019-03-25 16:02:11 +01:00
Piotr Fusik
cc13045ddd Move definitions out of engine_node.h. 
Change-Id: I18692a444663c11103f8991415b38000c633f24a
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-25 13:22:55 +01:00
Maciej Dziuban
33c07c875f Do not insert PipeControl WA or DC Flush when not needed 
Change-Id: I71030273708f243324a566232528bce00a0361df
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-22 12:37:27 +01:00
Piotr Fusik
db9afd06cd Remove EngineInstanceT. 
Change-Id: I08543b5f4ef5e91e6beb8390d448e53702cd9dac
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-20 10:56:22 +01:00
Piotr Fusik
8c95b45e2f Remove engineIndex. 
Change-Id: I58f7cf2c394686409dc45e315d1b5af33db2a28e
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-19 15:26:49 +01:00
Kamil Diedrich
d27b5b59aa Add obtainRenderBufferCompressionPreference function 
Change-Id: I0413a1d754c5ffccb28c8c5432d0149f0757e98e
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2019-03-19 15:10:59 +01:00
Dunajski, Bartosz
a25cca2099 Move Device helpers to namespace 
Change-Id: Id7aa7b7e490c5ae87a517b3e0be16292a7de9a93
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-19 15:01:34 +01:00
Filip Hazubski
01ff1accfa Refactor queue extra properties validation 
Change-Id: If95190159b3885653507c0ffc243d8b45aaa6cc7
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-03-19 12:27:52 +01:00
Venevtsev, Igor
3c1bb4a3f8 ptrOffset and ptrDiff do not truncate uint64_t to uintptr_t 
Change-Id: I0dcaf058ae3244ca0168580d972a19f9e4692e05
Signed-off-by: Venevtsev, Igor <igor.venevtsev@intel.com>
 2019-03-18 16:01:06 +01:00
Piotr Fusik
25e6494443 Use std::bitset for deviceBitfield. 
Change-Id: I9078ffbb38967b753980cb1c5ebcab00f5292598
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-14 08:36:01 +01:00
Mateusz Jablonski
395e79fee8 Add support for many GMMs in Graphics Allocation 
Change-Id: I955b8dd50b502f91700c5529d0a0a291632aa157
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-03-13 15:44:45 +01:00
Pawel Wilma
a1bfbcf293 Fix typo for DeviceBitfield 
Change-Id: I21718950f3d1b17ad507af76762153aefb090615
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2019-03-12 08:21:14 +01:00
Dunajski, Bartosz
f24b428cf7 Improve HardwareContextController creation 
Change-Id: Iba929a2b4fcd993b38dd674be578aad0a481e8de
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-06 12:31:20 +01:00
Maciej Plewka
e53a8e8709 Add postSyncAddress to flush after walker 
Change-Id: I7fdfaf8e0acc365998cc74306ab715ea3d9c7d72
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-04 14:47:53 +01:00
Mateusz Jablonski
6fb28dd828 Refactor GraphicsAllocation class 
move most of members to protected section
merge related members into structs

Change-Id: Ief2e092aa5e61ca6f13308f9d9b1937ea6c913b4
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-28 14:09:11 +01:00
Piotr Fusik
33a9d3160b Simplify code. 
Change-Id: If730d02312da01515ae53b5faaeb5d33419ec4ba
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-02-28 13:09:52 +01:00
Mrozek, Michal
6cb4732abe Move isl3Capable outside of Graphics Allocation. 
Change-Id: If9949f0d6d3405dcdeb221cbee1ce30307166c21
 2019-02-28 10:48:27 +01:00