Commit Graph

17949 Commits

Author SHA1 Message Date
Szymon Morek
fa2ff678fa performance: enable direct submission on BMG linux
Related-To: NEO-13454

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-12-11 11:45:20 +01:00
Lukasz Jobczyk
c2093990d4 fix: Flush monitor fence only to context where needed
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-12-11 10:06:43 +01:00
Jack Myers
51c0e80299 feature: extend TBX page fault manager from CPU implementation
In TBX mode, the host could not write to host buffers after access from device
code due to the lack of a migration mechanism post-initial TBX upload.
Migration is unnecessary with real hardware, but required for TBX.

This patch introduces a new page fault manager type that extends the original
CPU fault manager, enabling automatic migration of host buffers in TBX mode.

Refactoring was necessary to avoid diamond inheritance, achieved by using a
template parameter as the base class for OS-specific fault managers.

Related-To: NEO-12268
Signed-off-by: Jack Myers <jack.myers@intel.com>
2024-12-11 09:09:50 +01:00
Compute-Runtime-Validation
924ad580bd Revert "fix: enable scratch pages on xekmd"
This reverts commit 74824f659a.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-12-11 07:10:27 +01:00
ocldev
31ac5df877 build: dependencies update
Signed-off-by: ocldev <ocldev@intel.com>
2024-12-11 05:45:37 +01:00
ocldev
18b3189f23 build: igsc revision update
Signed-off-by: ocldev <ocldev@intel.com>
2024-12-11 02:53:16 +01:00
Artur Harasimiuk
9e0f6852a5 ci: infra revision update
Related-To: NEO-12679
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2024-12-10 16:50:09 +01:00
Filip Hazubski
3315db7d92 fix: Correct mutex logic in SVMAllocsManager::freeSVMAllocImpl
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2024-12-10 16:16:53 +01:00
ocldev
031a5c7637 build: metrics-library revision update
Signed-off-by: ocldev <ocldev@intel.com>
2024-12-10 16:06:02 +01:00
ocldev
be80ea05c9 build: metrics-discovery revision update
Signed-off-by: ocldev <ocldev@intel.com>
2024-12-10 15:42:33 +01:00
Szymon Morek
c3ed6e062a performance: enable timestamp reuse on linux
Related-To: NEO-13456

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-12-10 11:57:45 +01:00
Naklicki, Mateusz
74824f659a fix: enable scratch pages on xekmd
Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com>
2024-12-10 11:48:09 +01:00
Maciej Bielski
1fafd44af5 refactor: use level-specific name for CacheInfo instances
Related-To: NEO-12837

Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2024-12-10 11:45:11 +01:00
Fabian Zwoliński
5f8e761541 fix: HeapAllocator - ensure getBaseAddress returns initial base address
getBaseAddress was incorrectly returning pLeftBound which changes after
memory allocation.
Added baseAddress field to store and return initial address value.

Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
2024-12-10 10:52:36 +01:00
Filip Hazubski
7f412c77a2 fix: Explicitly delete unused functions
Explicitly delete unused functions of CheckIfExitCalled
and VfManagementHandleContext. Comply with the rule of five.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2024-12-10 10:10:28 +01:00
Filip Hazubski
43c199185a fix: Add explicit nullptr checks
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2024-12-10 10:06:56 +01:00
Artur Harasimiuk
2c37db194e build: kernels_bin update
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2024-12-09 22:44:51 +01:00
Brandon Yates
50986243f6 build: Update xe drm-uapi-helper headers
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
2024-12-09 20:28:57 +01:00
Mateusz Jablonski
d78ca38d9b refactor: remove dead code
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-12-09 19:26:00 +01:00
Maciej Bielski
c9726dbb10 refactor: simplify tracking CacheRegion reservations
Leverage features of the mechanism to simplify implementation:
- The maximum number of possible cache-region reservations is a small
value known at compile-time
- Each reservation is unique (described by `CacheRegion`) so can have
a dedicated entry with either zero (free) or non-zero (reserved) value

So, there is no need for a dynamic collection (unordered_map here) to
keep track of reservations. A simple array is enough for that purpose.

Also, add some helper-code to enable array-indexing with the values of
`CacheRegion` enum.

Related-To: NEO-12837
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2024-12-09 16:50:28 +01:00
Pawel Cieslak
9c109dc0c6 ci: infra revision update
Signed-off-by: Pawel Cieslak <pawel.cieslak@intel.com>
2024-12-09 16:12:38 +01:00
Dominik Dabek
894c74b62d fix: disable indirects detection on non-PVC
Also add ULTs for getting indirect detection version product helper
methods.

Related-To: GSD-10453

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2024-12-09 15:11:30 +01:00
Maciej Bielski
4467b1e8de feature: specify cache level when reserving a region
Related-To: NEO-12837
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2024-12-09 12:54:48 +01:00
Dunajski, Bartosz
37e81d2a11 feature: new heuristic to enable relaxed ordering 2
Related-To: NEO-13431

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2024-12-09 11:58:42 +01:00
Lukasz Jobczyk
8f671cb6a8 fix: Disable dc flush mitigation
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-12-09 11:48:11 +01:00
Michal Mrozek
080488e243 performance: add prefetch capabilities to L0.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2024-12-09 11:11:29 +01:00
Vysochyn, Illia
0b7367ed5f refactor: Update STATE_BASE_ADDRESS
Refactors the STATE_BASE_ADDRESS to align with the latest specification.

Removes redundant functionality for multiple GPU partial writes and
atomics.

Related-To: NEO-13147

Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
2024-12-09 08:50:59 +01:00
ocldev
43201d21cc build: dependencies update
Signed-off-by: ocldev <ocldev@intel.com>
2024-12-09 05:49:16 +01:00
Compute-Runtime-Validation
af8ad3aa7a Revert "feature: new heuristic to enable relaxed ordering"
This reverts commit 526f9c5e81.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-12-08 16:01:32 +01:00
Compute-Runtime-Validation
58e45afd39 Revert "fix: HeapAllocator - ensure getBaseAddress returns initial base address"
This reverts commit ffec97acc5.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-12-08 14:35:22 +01:00
Compute-Runtime-Validation
ff1c5837fa Revert "fix: Disable dc flush mitigation"
This reverts commit 60a6d3875b.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-12-07 06:21:41 +01:00
ocldev
0f02c5fe83 build: gmmlib revision update
Signed-off-by: ocldev <ocldev@intel.com>
2024-12-07 05:54:56 +01:00
Bartosz Dunajski
526f9c5e81 feature: new heuristic to enable relaxed ordering
Related-To: GSD-10308

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-12-06 17:04:39 +01:00
Zbigniew Zdanowicz
75139d2322 fix: zero sync and region barrier buffers before use on regular command lists
Related-To: NEO-13350

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2024-12-06 15:54:50 +01:00
Pawel Cieslak
93fba587d0 ci: infra revision update
Signed-off-by: Pawel Cieslak <pawel.cieslak@intel.com>
2024-12-06 13:36:38 +01:00
Lukasz Jobczyk
60a6d3875b fix: Disable dc flush mitigation
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-12-06 10:49:53 +01:00
Compute-Runtime-Validation
484210d656 Revert "fix: limit usm device reuse based on used memory"
This reverts commit 1252b10ba9.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-12-05 23:17:51 +01:00
Fabian Zwoliński
ffec97acc5 fix: HeapAllocator - ensure getBaseAddress returns initial base address
getBaseAddress was incorrectly returning pLeftBound which changes after
memory allocation.
Added baseAddress field to store and return initial address value.

Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
2024-12-05 20:42:16 +01:00
B, Vishnu Khanth
2859bc83b5 fix: Add PMT counter offset values for BMG
Related-To: NEO-13286

Signed-off-by: B, Vishnu Khanth <vishnu.khanth.b@intel.com>
2024-12-05 19:10:26 +01:00
Bartosz Dunajski
b9beb9becc fix: clear TS data before dispatching relaxed ordering split operation
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-12-05 17:32:14 +01:00
Pawel Cieslak
d1c3692046 ci: infra revision update
Signed-off-by: Pawel Cieslak <pawel.cieslak@intel.com>
2024-12-05 14:53:04 +01:00
Fabian Zwoliński
d2ce3badfc fix: bindlessHeapsHelper handle unavailable external heap
This PR handles the situation in which a component
has reserved a front window space for itself in the external heap,
so that the Compute Runtime cannot access this area.

In such a situation, we perform the following steps:
1. reserve 4GB chunk in heapStandard
2. split our chunk into 2 parts: heapFrontWindow, heapRegular
3. from this point on, map all linearStream allocations in reserved 4GB
chunk

Patch applies to Windows and WSL.
Patch only applies when the bindless global allocator is enabled.

Related-To: HSD-16025889919
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
2024-12-05 14:18:01 +01:00
Bartosz Dunajski
e575bc52c2 fix: disable non-walker signaling skip for implicit non-timestamp CB Events
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-12-05 12:45:04 +01:00
Vysochyn, Illia
e3bb555f1d refactor: Modify thread group batch size naming
Modifies thread group batch size enumerator naming to follow
the specification.

Related-To: NEO-13147

Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
2024-12-05 08:48:58 +01:00
Chandio, Bibrak Qamar
ab2e831a4a fix: zeDeviceGetGlobalTimestamp to use submisison
Related-To: GSD-10253, GSD-9467, GSD-9381, NEO-11908

When EnableGlobalTimestampViaSubmission is set then
zeDeviceGetGlobalTimestamp uses immediate cmd submission
method to get GPU time.

Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com>
2024-12-04 19:10:07 +01:00
Pratik Bari
ad881e3f2e feature(sysman): feature: Add VF Engine Utilization API implementation
Related-To: NEO-11202

Signed-off-by: Pratik Bari <pratik.bari@intel.com>
2024-12-04 18:13:41 +01:00
Dominik Dabek
819ffea90f fix: reenable indirect detection for non-VC, PVC
Issue is limited to detection in VC, can reenable for other kernels.

Related-To: NEO-13372

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2024-12-04 14:59:02 +01:00
Lukasz Jobczyk
d40a804bca performance: Allocate by KMD on BMG
Related-To: NEO-10526

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-12-04 14:41:25 +01:00
Dominik Dabek
1252b10ba9 fix: limit usm device reuse based on used memory
Calculate available memory for usm device reuse based as (total device
memory - used memory) * fraction for reuse.

Use sys mem allocs for devices without local memory.

Related-To: NEO-12902

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2024-12-04 08:11:23 +01:00
Compute-Runtime-Validation
d4bfa0f758 Revert "performance: Allocate by KMD on BMG"
This reverts commit 331fffaeea.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-12-04 07:03:32 +01:00