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Reorder some members in MCRegisterClass to remove padding on 64-bit builds.

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llvm-svn: 151043
This commit is contained in:
Craig Topper
2012-02-21 07:36:39 +00:00
parent 2d2f1711b7
commit 028a6721c9
2 changed files with 4 additions and 4 deletions
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4
llvm/include/llvm/MC/MCRegisterInfo.h
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@@ -28,14 +28,14 @@ public:
typedef const unsigned* iterator;
typedef const unsigned* const_iterator;
unsigned ID;
const unsigned ID;
const char *Name;
const unsigned RegSize, Alignment; // Size & Alignment of register in bytes
const int CopyCost;
const bool Allocatable;
const iterator RegsBegin;
unsigned RegsSize;
const unsigned char *const RegSet;
const unsigned RegsSize;
const unsigned RegSetSize;
/// getID() - Return the register class ID number.

4
llvm/utils/TableGen/RegisterInfoEmitter.cpp
View File

@@ -391,8 +391,8 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
<< RC.SpillAlignment/8 << ", "
<< RC.CopyCost << ", "
<< RC.Allocatable << ", "
<< RC.getName() << ", " << RC.getOrder().size() << ", "
<< RC.getName() << "Bits, sizeof(" << RC.getName() << "Bits) },\n";
<< RC.getName() << ", " << RC.getName() << "Bits, "
<< RC.getOrder().size() << ", sizeof(" << RC.getName() << "Bits) },\n";
}
OS << "};\n\n";