intel/llvm
1
0
Fork 0
mirror of https://github.com/intel/llvm.git synced 2026-01-22 23:49:22 +08:00
Code Issues Packages Projects Releases Wiki Activity

[clang][x86] Ensure we use the shifted value bit width to check for out of bounds per-element shift amounts (#156019)

Browse Source 
This should allow us to reuse these cases for the shift-by-immediate builtins in #155542
This commit is contained in:
Simon Pilgrim
2025-08-29 14:21:25 +01:00
committed by GitHub
parent 49f39b349d
commit 0d9c0ced14
1 changed files with 6 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
clang/lib/AST/ByteCode/InterpBuiltin.cpp
View File

@@ -3256,8 +3256,8 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
case clang::X86::BI__builtin_ia32_psllv8si:
return interp__builtin_elementwise_int_binop(
S, OpPC, Call, BuiltinID, [](const APSInt &LHS, const APSInt &RHS) {
if (RHS.uge(RHS.getBitWidth())) {
return APInt::getZero(RHS.getBitWidth());
if (RHS.uge(LHS.getBitWidth())) {
return APInt::getZero(LHS.getBitWidth());
}
return LHS.shl(RHS.getZExtValue());
});
@@ -3266,8 +3266,8 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
case clang::X86::BI__builtin_ia32_psrav8si:
return interp__builtin_elementwise_int_binop(
S, OpPC, Call, BuiltinID, [](const APSInt &LHS, const APSInt &RHS) {
if (RHS.uge(RHS.getBitWidth())) {
return LHS.ashr(RHS.getBitWidth() - 1);
if (RHS.uge(LHS.getBitWidth())) {
return LHS.ashr(LHS.getBitWidth() - 1);
}
return LHS.ashr(RHS.getZExtValue());
});
@@ -3278,8 +3278,8 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
case clang::X86::BI__builtin_ia32_psrlv8si:
return interp__builtin_elementwise_int_binop(
S, OpPC, Call, BuiltinID, [](const APSInt &LHS, const APSInt &RHS) {
if (RHS.uge(RHS.getBitWidth())) {
return APInt::getZero(RHS.getBitWidth());
if (RHS.uge(LHS.getBitWidth())) {
return APInt::getZero(LHS.getBitWidth());
}
return LHS.lshr(RHS.getZExtValue());
});