mirror of
https://github.com/intel/llvm.git
synced 2026-01-17 06:40:01 +08:00
[PowerPC] Truncate exponent parameter for vec_cts,vec_ctf
On PowerPC, the vec_ct* builtin function take the form of eg. d=vec_cts(a,b) LLVM (llc) will crash when a user specifies a number out of the allowed range (0-31) for b.This patch truncates b so that we avoid the backend crash in some cases. Further documentation for the builtins can be found here: https://www.ibm.com/docs/en/xl-c-and-cpp-linux/16.1.0?topic=functions-vec-ctf https://www.ibm.com/docs/en/xl-c-and-cpp-linux/16.1.0?topic=functions-vec-cts Reviewed By: nemanjai, #powerpc Differential Revision: https://reviews.llvm.org/D106409
This commit is contained in:
Zarko Todorovski
@@ -3202,71 +3202,79 @@ static __inline__ vector double __ATTRS_o_ai vec_cpsgn(vector double __a,
|
||||
// the XL-compatible signatures are used for those functions.
|
||||
#ifdef __XL_COMPAT_ALTIVEC__
|
||||
#define vec_ctf(__a, __b) \
|
||||
_Generic( \
|
||||
(__a), vector int \
|
||||
: (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)), \
|
||||
vector unsigned int \
|
||||
: (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \
|
||||
(__b)), \
|
||||
vector unsigned long long \
|
||||
: (vector float)(__builtin_vsx_xvcvuxdsp( \
|
||||
(vector unsigned long long)(__a)) * \
|
||||
(vector float)(vector unsigned)((0x7f - (__b)) << 23)), \
|
||||
vector signed long long \
|
||||
: (vector float)(__builtin_vsx_xvcvsxdsp( \
|
||||
(vector signed long long)(__a)) * \
|
||||
(vector float)(vector unsigned)((0x7f - (__b)) << 23)))
|
||||
_Generic((__a), \
|
||||
vector int: (vector float)__builtin_altivec_vcfsx((vector int)(__a), \
|
||||
((__b)&0x1F)), \
|
||||
vector unsigned int: (vector float)__builtin_altivec_vcfux( \
|
||||
(vector unsigned int)(__a), ((__b)&0x1F)), \
|
||||
vector unsigned long long: ( \
|
||||
vector float)(__builtin_vsx_xvcvuxdsp( \
|
||||
(vector unsigned long long)(__a)) * \
|
||||
(vector float)(vector unsigned)((0x7f - \
|
||||
((__b)&0x1F)) \
|
||||
<< 23)), \
|
||||
vector signed long long: ( \
|
||||
vector float)(__builtin_vsx_xvcvsxdsp( \
|
||||
(vector signed long long)(__a)) * \
|
||||
(vector float)(vector unsigned)((0x7f - \
|
||||
((__b)&0x1F)) \
|
||||
<< 23)))
|
||||
#else // __XL_COMPAT_ALTIVEC__
|
||||
#define vec_ctf(__a, __b) \
|
||||
_Generic( \
|
||||
(__a), vector int \
|
||||
: (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)), \
|
||||
vector unsigned int \
|
||||
: (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \
|
||||
(__b)), \
|
||||
vector unsigned long long \
|
||||
: (vector float)(__builtin_convertvector( \
|
||||
(vector unsigned long long)(__a), vector double) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - \
|
||||
(__b)) \
|
||||
<< 52)), \
|
||||
vector signed long long \
|
||||
: (vector float)(__builtin_convertvector((vector signed long long)(__a), \
|
||||
vector double) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - \
|
||||
(__b)) \
|
||||
<< 52)))
|
||||
#define vec_ctf(__a, __b) \
|
||||
_Generic( \
|
||||
(__a), \
|
||||
vector int: (vector float)__builtin_altivec_vcfsx((vector int)(__a), \
|
||||
((__b)&0x1F)), \
|
||||
vector unsigned int: (vector float)__builtin_altivec_vcfux( \
|
||||
(vector unsigned int)(__a), ((__b)&0x1F)), \
|
||||
vector unsigned long long: ( \
|
||||
vector float)(__builtin_convertvector( \
|
||||
(vector unsigned long long)(__a), vector double) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - \
|
||||
((__b)&0x1F)) \
|
||||
<< 52)), \
|
||||
vector signed long long: ( \
|
||||
vector float)(__builtin_convertvector( \
|
||||
(vector signed long long)(__a), vector double) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - \
|
||||
((__b)&0x1F)) \
|
||||
<< 52)))
|
||||
#endif // __XL_COMPAT_ALTIVEC__
|
||||
#else
|
||||
#define vec_ctf(__a, __b) \
|
||||
_Generic((__a), vector int \
|
||||
: (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)), \
|
||||
vector unsigned int \
|
||||
: (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \
|
||||
(__b)))
|
||||
_Generic((__a), \
|
||||
vector int: (vector float)__builtin_altivec_vcfsx((vector int)(__a), \
|
||||
((__b)&0x1F)), \
|
||||
vector unsigned int: (vector float)__builtin_altivec_vcfux( \
|
||||
(vector unsigned int)(__a), ((__b)&0x1F)))
|
||||
#endif
|
||||
|
||||
/* vec_ctd */
|
||||
#ifdef __VSX__
|
||||
#define vec_ctd(__a, __b) \
|
||||
_Generic((__a), vector signed int \
|
||||
: (vec_doublee((vector signed int)(__a)) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - (__b)) \
|
||||
<< 52)), \
|
||||
vector unsigned int \
|
||||
: (vec_doublee((vector unsigned int)(__a)) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - (__b)) \
|
||||
<< 52)), \
|
||||
vector unsigned long long \
|
||||
: (__builtin_convertvector((vector unsigned long long)(__a), \
|
||||
vector double) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - (__b)) \
|
||||
<< 52)), \
|
||||
vector signed long long \
|
||||
: (__builtin_convertvector((vector signed long long)(__a), \
|
||||
vector double) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - (__b)) \
|
||||
<< 52)))
|
||||
_Generic((__a), \
|
||||
vector signed int: ( \
|
||||
vec_doublee((vector signed int)(__a)) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - \
|
||||
((__b)&0x1F)) \
|
||||
<< 52)), \
|
||||
vector unsigned int: ( \
|
||||
vec_doublee((vector unsigned int)(__a)) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - \
|
||||
((__b)&0x1F)) \
|
||||
<< 52)), \
|
||||
vector unsigned long long: ( \
|
||||
__builtin_convertvector((vector unsigned long long)(__a), \
|
||||
vector double) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - \
|
||||
((__b)&0x1F)) \
|
||||
<< 52)), \
|
||||
vector signed long long: ( \
|
||||
__builtin_convertvector((vector signed long long)(__a), \
|
||||
vector double) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL - \
|
||||
((__b)&0x1F)) \
|
||||
<< 52)))
|
||||
#endif // __VSX__
|
||||
|
||||
/* vec_vcfsx */
|
||||
@@ -3281,27 +3289,27 @@ static __inline__ vector double __ATTRS_o_ai vec_cpsgn(vector double __a,
|
||||
#ifdef __VSX__
|
||||
#ifdef __XL_COMPAT_ALTIVEC__
|
||||
#define vec_cts(__a, __b) \
|
||||
_Generic((__a), vector float \
|
||||
: (vector signed int)__builtin_altivec_vctsxs((vector float)(__a), \
|
||||
(__b)), \
|
||||
vector double \
|
||||
: __extension__({ \
|
||||
_Generic((__a), \
|
||||
vector float: (vector signed int)__builtin_altivec_vctsxs( \
|
||||
(vector float)(__a), ((__b)&0x1F)), \
|
||||
vector double: __extension__({ \
|
||||
vector double __ret = \
|
||||
(vector double)(__a) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + (__b)) \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + \
|
||||
((__b)&0x1F)) \
|
||||
<< 52); \
|
||||
(vector signed long long)__builtin_vsx_xvcvdpsxws(__ret); \
|
||||
}))
|
||||
#else // __XL_COMPAT_ALTIVEC__
|
||||
#define vec_cts(__a, __b) \
|
||||
_Generic((__a), vector float \
|
||||
: (vector signed int)__builtin_altivec_vctsxs((vector float)(__a), \
|
||||
(__b)), \
|
||||
vector double \
|
||||
: __extension__({ \
|
||||
_Generic((__a), \
|
||||
vector float: (vector signed int)__builtin_altivec_vctsxs( \
|
||||
(vector float)(__a), ((__b)&0x1F)), \
|
||||
vector double: __extension__({ \
|
||||
vector double __ret = \
|
||||
(vector double)(__a) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + (__b)) \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + \
|
||||
((__b)&0x1F)) \
|
||||
<< 52); \
|
||||
(vector signed long long)__builtin_convertvector( \
|
||||
__ret, vector signed long long); \
|
||||
@@ -3320,27 +3328,27 @@ static __inline__ vector double __ATTRS_o_ai vec_cpsgn(vector double __a,
|
||||
#ifdef __VSX__
|
||||
#ifdef __XL_COMPAT_ALTIVEC__
|
||||
#define vec_ctu(__a, __b) \
|
||||
_Generic((__a), vector float \
|
||||
: (vector unsigned int)__builtin_altivec_vctuxs( \
|
||||
(vector float)(__a), (__b)), \
|
||||
vector double \
|
||||
: __extension__({ \
|
||||
_Generic((__a), \
|
||||
vector float: (vector unsigned int)__builtin_altivec_vctuxs( \
|
||||
(vector float)(__a), ((__b)&0x1F)), \
|
||||
vector double: __extension__({ \
|
||||
vector double __ret = \
|
||||
(vector double)(__a) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + __b) \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + \
|
||||
((__b)&0x1F)) \
|
||||
<< 52); \
|
||||
(vector unsigned long long)__builtin_vsx_xvcvdpuxws(__ret); \
|
||||
}))
|
||||
#else // __XL_COMPAT_ALTIVEC__
|
||||
#define vec_ctu(__a, __b) \
|
||||
_Generic((__a), vector float \
|
||||
: (vector unsigned int)__builtin_altivec_vctuxs( \
|
||||
(vector float)(__a), (__b)), \
|
||||
vector double \
|
||||
: __extension__({ \
|
||||
_Generic((__a), \
|
||||
vector float: (vector unsigned int)__builtin_altivec_vctuxs( \
|
||||
(vector float)(__a), ((__b)&0x1F)), \
|
||||
vector double: __extension__({ \
|
||||
vector double __ret = \
|
||||
(vector double)(__a) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + __b) \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + \
|
||||
((__b)&0x1F)) \
|
||||
<< 52); \
|
||||
(vector unsigned long long)__builtin_convertvector( \
|
||||
__ret, vector unsigned long long); \
|
||||
@@ -3355,60 +3363,62 @@ static __inline__ vector double __ATTRS_o_ai vec_cpsgn(vector double __a,
|
||||
|
||||
#ifdef __VSX__
|
||||
#define vec_ctsl(__a, __b) \
|
||||
_Generic((__a), vector float \
|
||||
: __extension__({ \
|
||||
vector float __ret = \
|
||||
(vector float)(__a) * \
|
||||
(vector float)(vector unsigned)((0x7f + (__b)) << 23); \
|
||||
__builtin_vsx_xvcvspsxds( \
|
||||
__builtin_vsx_xxsldwi(__ret, __ret, 1)); \
|
||||
}), \
|
||||
vector double \
|
||||
: __extension__({ \
|
||||
vector double __ret = \
|
||||
(vector double)(__a) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + __b) \
|
||||
<< 52); \
|
||||
__builtin_convertvector(__ret, vector signed long long); \
|
||||
}))
|
||||
_Generic( \
|
||||
(__a), vector float \
|
||||
: __extension__({ \
|
||||
vector float __ret = \
|
||||
(vector float)(__a) * \
|
||||
(vector float)(vector unsigned)((0x7f + ((__b)&0x1F)) << 23); \
|
||||
__builtin_vsx_xvcvspsxds(__builtin_vsx_xxsldwi(__ret, __ret, 1)); \
|
||||
}), \
|
||||
vector double \
|
||||
: __extension__({ \
|
||||
vector double __ret = \
|
||||
(vector double)(__a) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + \
|
||||
((__b)&0x1F)) \
|
||||
<< 52); \
|
||||
__builtin_convertvector(__ret, vector signed long long); \
|
||||
}))
|
||||
|
||||
/* vec_ctul */
|
||||
|
||||
#define vec_ctul(__a, __b) \
|
||||
_Generic((__a), vector float \
|
||||
: __extension__({ \
|
||||
vector float __ret = \
|
||||
(vector float)(__a) * \
|
||||
(vector float)(vector unsigned)((0x7f + (__b)) << 23); \
|
||||
__builtin_vsx_xvcvspuxds( \
|
||||
__builtin_vsx_xxsldwi(__ret, __ret, 1)); \
|
||||
}), \
|
||||
vector double \
|
||||
: __extension__({ \
|
||||
vector double __ret = \
|
||||
(vector double)(__a) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + __b) \
|
||||
<< 52); \
|
||||
__builtin_convertvector(__ret, vector unsigned long long); \
|
||||
}))
|
||||
_Generic( \
|
||||
(__a), vector float \
|
||||
: __extension__({ \
|
||||
vector float __ret = \
|
||||
(vector float)(__a) * \
|
||||
(vector float)(vector unsigned)((0x7f + ((__b)&0x1F)) << 23); \
|
||||
__builtin_vsx_xvcvspuxds(__builtin_vsx_xxsldwi(__ret, __ret, 1)); \
|
||||
}), \
|
||||
vector double \
|
||||
: __extension__({ \
|
||||
vector double __ret = \
|
||||
(vector double)(__a) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + \
|
||||
((__b)&0x1F)) \
|
||||
<< 52); \
|
||||
__builtin_convertvector(__ret, vector unsigned long long); \
|
||||
}))
|
||||
#endif
|
||||
#else // __LITTLE_ENDIAN__
|
||||
/* vec_ctsl */
|
||||
|
||||
#ifdef __VSX__
|
||||
#define vec_ctsl(__a, __b) \
|
||||
_Generic((__a), vector float \
|
||||
: __extension__({ \
|
||||
vector float __ret = \
|
||||
(vector float)(__a) * \
|
||||
(vector float)(vector unsigned)((0x7f + (__b)) << 23); \
|
||||
__builtin_vsx_xvcvspsxds(__ret); \
|
||||
}), \
|
||||
vector double \
|
||||
: __extension__({ \
|
||||
_Generic((__a), \
|
||||
vector float: __extension__({ \
|
||||
vector float __ret = \
|
||||
(vector float)(__a) * \
|
||||
(vector float)(vector unsigned)((0x7f + ((__b)&0x1F)) << 23); \
|
||||
__builtin_vsx_xvcvspsxds(__ret); \
|
||||
}), \
|
||||
vector double: __extension__({ \
|
||||
vector double __ret = \
|
||||
(vector double)(__a) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + __b) \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + \
|
||||
((__b)&0x1F)) \
|
||||
<< 52); \
|
||||
__builtin_convertvector(__ret, vector signed long long); \
|
||||
}))
|
||||
@@ -3420,14 +3430,16 @@ static __inline__ vector double __ATTRS_o_ai vec_cpsgn(vector double __a,
|
||||
: __extension__({ \
|
||||
vector float __ret = \
|
||||
(vector float)(__a) * \
|
||||
(vector float)(vector unsigned)((0x7f + (__b)) << 23); \
|
||||
(vector float)(vector unsigned)((0x7f + ((__b)&0x1F)) \
|
||||
<< 23); \
|
||||
__builtin_vsx_xvcvspuxds(__ret); \
|
||||
}), \
|
||||
vector double \
|
||||
: __extension__({ \
|
||||
vector double __ret = \
|
||||
(vector double)(__a) * \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + __b) \
|
||||
(vector double)(vector unsigned long long)((0x3ffULL + \
|
||||
((__b)&0x1F)) \
|
||||
<< 52); \
|
||||
__builtin_convertvector(__ret, vector unsigned long long); \
|
||||
}))
|
||||
|
||||
80
clang/test/CodeGen/ppc-vec_ct-truncate.c
Normal file
80
clang/test/CodeGen/ppc-vec_ct-truncate.c
Normal file
@@ -0,0 +1,80 @@
|
||||
// REQUIRES: powerpc-registered-target
|
||||
// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
|
||||
// RUN: -flax-vector-conversions=all -triple powerpc64-ibm-aix-xcoff -emit-llvm %s -o - \
|
||||
// RUN: -target-cpu pwr7 | FileCheck %s
|
||||
// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
|
||||
// RUN: -flax-vector-conversions=all -triple powerpc64-unknown-linux-gnu -emit-llvm %s -o - \
|
||||
// RUN: -target-cpu pwr8 | FileCheck %s
|
||||
// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
|
||||
// RUN: -flax-vector-conversions=all -triple powerpc64le-unknown-linux-gnu -emit-llvm %s -o - \
|
||||
// RUN: -target-cpu pwr8 | FileCheck %s
|
||||
// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
|
||||
// RUN: -flax-vector-conversions=all -triple powerpc64-ibm-aix-xcoff -emit-llvm %s -o - \
|
||||
// RUN: -D__XL_COMPAT_ALTIVEC__ -target-cpu pwr7 | FileCheck %s
|
||||
// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
|
||||
// RUN: -flax-vector-conversions=all -triple powerpc64le-unknown-linux-gnu -emit-llvm %s -o - \
|
||||
// RUN: -D__XL_COMPAT_ALTIVEC__ -target-cpu pwr8 | FileCheck %s
|
||||
|
||||
#include <altivec.h>
|
||||
vector double a1 = {-1.234e-5, 1.2345};
|
||||
vector signed int res_vsi;
|
||||
vector float vf1 = {0.234, 1.234, 2.345, 3.456};
|
||||
vector signed int vsi1 = {1, 2, 3, 4};
|
||||
vector double res_vd;
|
||||
vector float res_vf;
|
||||
vector signed long long res_vsll;
|
||||
vector unsigned long long res_vull;
|
||||
void test(void) {
|
||||
// CHECK-LABEL: @test(
|
||||
// CHECK-NEXT: entry:
|
||||
|
||||
res_vsi = vec_cts(a1, 31);
|
||||
// CHECK: [[TMP0:%.*]] = load <2 x double>, ptr @a1, align 16
|
||||
// CHECK-NEXT: fmul <2 x double> [[TMP0]], <double 0x41E0000000000000, double 0x41E0000000000000>
|
||||
|
||||
res_vsi = vec_cts(a1, 500);
|
||||
// CHECK: [[TMP4:%.*]] = load <2 x double>, ptr @a1, align 16
|
||||
// CHECK-NEXT: fmul <2 x double> [[TMP4]], <double 0x4130000000000000, double 0x4130000000000000>
|
||||
|
||||
res_vsi = vec_ctu(vf1, 31);
|
||||
// CHECK: [[TMP8:%.*]] = load <4 x float>, ptr @vf1, align 16
|
||||
// CHECK-NEXT: call <4 x i32> @llvm.ppc.altivec.vctuxs(<4 x float> [[TMP8]], i32 31)
|
||||
|
||||
res_vsi = vec_ctu(vf1, 500);
|
||||
// CHECK: [[TMP10:%.*]] = load <4 x float>, ptr @vf1, align 16
|
||||
// CHECK-NEXT: call <4 x i32> @llvm.ppc.altivec.vctuxs(<4 x float> [[TMP10]], i32 20)
|
||||
|
||||
res_vull = vec_ctul(vf1, 31);
|
||||
// CHECK: [[TMP12:%.*]] = load <4 x float>, ptr @vf1, align 16
|
||||
// CHECK-NEXT: fmul <4 x float> [[TMP12]], <float 0x41E0000000000000, float 0x41E0000000000000, float 0x41E0000000000000, float 0x41E0000000000000>
|
||||
|
||||
res_vull = vec_ctul(vf1, 500);
|
||||
// CHECK: [[TMP21:%.*]] = load <4 x float>, ptr @vf1, align 16
|
||||
// CHECK-NEXT: fmul <4 x float> [[TMP21]], <float 0x4130000000000000, float 0x4130000000000000, float 0x4130000000000000, float 0x4130000000000000>
|
||||
|
||||
res_vsll = vec_ctsl(vf1, 31);
|
||||
// CHECK: [[TMP30:%.*]] = load <4 x float>, ptr @vf1, align 16
|
||||
// CHECK-NEXT: fmul <4 x float> [[TMP30]], <float 0x41E0000000000000, float 0x41E0000000000000, float 0x41E0000000000000, float 0x41E0000000000000>
|
||||
|
||||
res_vsll = vec_ctsl(vf1, 500);
|
||||
// CHECK: [[TMP39:%.*]] = load <4 x float>, ptr @vf1, align 16
|
||||
// CHECK-NEXT: fmul <4 x float> [[TMP39]], <float 0x4130000000000000, float 0x4130000000000000, float 0x4130000000000000, float 0x4130000000000000>
|
||||
|
||||
res_vf = vec_ctf(vsi1, 31);
|
||||
// CHECK: [[TMP48:%.*]] = load <4 x i32>, ptr @vsi1, align 16
|
||||
// CHECK-NEXT: call <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32> [[TMP48]], i32 31)
|
||||
|
||||
res_vf = vec_ctf(vsi1, 500);
|
||||
// CHECK: [[TMP50:%.*]] = load <4 x i32>, ptr @vsi1, align 16
|
||||
// CHECK-NEXT: call <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32> [[TMP50]], i32 20)
|
||||
|
||||
res_vd = vec_ctd(vsi1, 31);
|
||||
// CHECK: [[TMP53:%.*]] = load <4 x i32>, ptr @vsi1, align 16
|
||||
// CHECK: [[TMP83:%.*]] = call <2 x double> @llvm.ppc.vsx.xvcvsxwdp(<4 x i32> [[TMP82:%.*]])
|
||||
// CHECK-NEXT: fmul <2 x double> [[TMP83]], <double 0x3E00000000000000, double 0x3E00000000000000>
|
||||
|
||||
res_vd = vec_ctd(vsi1, 500);
|
||||
// CHECK: [[TMP84:%.*]] = load <4 x i32>, ptr @vsi1, align 16
|
||||
// CHECK: [[TMP115:%.*]] = call <2 x double> @llvm.ppc.vsx.xvcvsxwdp(<4 x i32> [[TMP114:%.*]])
|
||||
// CHECK-NEXT: fmul <2 x double> [[TMP115]], <double 0x3EB0000000000000, double 0x3EB0000000000000>
|
||||
}
|
||||
Reference in New Issue
Block a user