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Skip some relocations in scanRelocs.

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When a tls access is optimized, a group of relocations is converted at a
time.

We were already skipping relocations that were optimized out in
relocate, but not in scanRelocs.

This is a small optimization. I got here while working on a patch that
will always keep scanRelocs and relocate in sync.

llvm-svn: 264048
This commit is contained in:
Rafael Espindola
2016-03-22 13:24:29 +00:00
parent 9f8f4e3944
commit 26d239c293
2 changed files with 30 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
lld/ELF/Writer.cpp
View File

@@ -258,21 +258,22 @@ template <bool Is64Bits> struct DenseMapInfo<SectionKey<Is64Bits>> {
};
}
// Returns the number of relocations processed.
template <class ELFT, class RelT>
static bool handleTlsRelocation(uint32_t Type, SymbolBody &Body,
InputSectionBase<ELFT> &C, RelT &RI) {
static unsigned handleTlsRelocation(uint32_t Type, SymbolBody &Body,
InputSectionBase<ELFT> &C, RelT &RI) {
if (Target->pointsToLocalDynamicGotEntry(Type)) {
if (Target->canRelaxTls(Type, nullptr))
return true;
return 1;
if (Out<ELFT>::Got->addTlsIndex())
Out<ELFT>::RelaDyn->addReloc({Target->TlsModuleIndexRel,
DynamicReloc<ELFT>::Off_LTlsIndex,
nullptr});
return true;
return 1;
}
if (!Body.IsTls)
return false;
return 0;
if (Target->isTlsGlobalDynamicRel(Type)) {
if (!Target->canRelaxTls(Type, &Body)) {
@@ -283,12 +284,16 @@ static bool handleTlsRelocation(uint32_t Type, SymbolBody &Body,
Out<ELFT>::RelaDyn->addReloc(
{Target->TlsOffsetRel, DynamicReloc<ELFT>::Off_GTlsOffset, &Body});
}
return true;
return 1;
}
if (!Body.isPreemptible())
return true;
return 1;
Out<ELFT>::Got->addEntry(Body);
Out<ELFT>::RelaDyn->addReloc(
{Target->TlsGotRel, DynamicReloc<ELFT>::Off_Got, false, &Body});
return 2;
}
return false;
return 0;
}
// The reason we have to do this early scan is as follows
@@ -309,7 +314,8 @@ template <class RelTy>
void Writer<ELFT>::scanRelocs(InputSectionBase<ELFT> &C,
iterator_range<const RelTy *> Rels) {
const elf::ObjectFile<ELFT> &File = *C.getFile();
for (const RelTy &RI : Rels) {
for (auto I = Rels.begin(), E = Rels.end(); I != E; ++I) {
const RelTy &RI = *I;
uint32_t SymIndex = RI.getSymbol(Config->Mips64EL);
SymbolBody &OrigBody = File.getSymbolBody(SymIndex);
SymbolBody &Body = OrigBody.repl();
@@ -328,8 +334,10 @@ void Writer<ELFT>::scanRelocs(InputSectionBase<ELFT> &C,
S->File->IsUsed = true;
bool Preemptible = Body.isPreemptible();
if (handleTlsRelocation<ELFT>(Type, Body, C, RI))
if (unsigned Processed = handleTlsRelocation<ELFT>(Type, Body, C, RI)) {
I += (Processed - 1);
continue;
}
if (Target->needsDynRelative(Type))
Out<ELFT>::RelaDyn->addReloc({Target->RelativeRel, &C, RI.r_offset, true,

27
lld/test/ELF/tls-opt-gdie.s
View File

@@ -6,15 +6,15 @@
// RUN: llvm-objdump -d %t1 | FileCheck --check-prefix=DISASM %s
//RELOC: Section {
//RELOC: Index: 9
//RELOC-NEXT: Name: .got
//RELOC: Index:
//RELOC: Name: .got
//RELOC-NEXT: Type: SHT_PROGBITS
//RELOC-NEXT: Flags [
//RELOC-NEXT: SHF_ALLOC
//RELOC-NEXT: SHF_WRITE
//RELOC-NEXT: ]
//RELOC-NEXT: Address: 0x120F0
//RELOC-NEXT: Offset: 0x20F0
//RELOC-NEXT: Address: 0x120B0
//RELOC-NEXT: Offset: 0x20B0
//RELOC-NEXT: Size: 16
//RELOC-NEXT: Link: 0
//RELOC-NEXT: Info: 0
@@ -23,22 +23,19 @@
//RELOC-NEXT: }
//RELOC: Relocations [
//RELOC-NEXT: Section (4) .rela.dyn {
//RELOC-NEXT: 0x120F0 R_X86_64_TPOFF64 tlsshared0 0x0
//RELOC-NEXT: 0x120F8 R_X86_64_TPOFF64 tlsshared1 0x0
//RELOC-NEXT: }
//RELOC-NEXT: Section (5) .rela.plt {
//RELOC-NEXT: 0x13018 R_X86_64_JUMP_SLOT __tls_get_addr 0x0
//RELOC-NEXT: 0x120B0 R_X86_64_TPOFF64 tlsshared0 0x0
//RELOC-NEXT: 0x120B8 R_X86_64_TPOFF64 tlsshared1 0x0
//RELOC-NEXT: }
//RELOC-NEXT: ]
//0x11009 + (4304 + 7) = 0x120F0
//0x11019 + (4296 + 7) = 0x120F8
//0x11009 + (4256 + 7) = 0x120B0
//0x11019 + (4248 + 7) = 0x120B8
// DISASM: Disassembly of section .text:
// DISASM-NEXT: _start:
// DISASM-NEXT: 11000: 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
// DISASM-NEXT: 11009: 48 03 05 e0 10 00 00 addq 4320(%rip), %rax
// DISASM-NEXT: 11010: 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
// DISASM-NEXT: 11019: 48 03 05 d8 10 00 00 addq 4312(%rip), %rax
// DISASM-NEXT: 11000: {{.*}} movq %fs:0, %rax
// DISASM-NEXT: 11009: {{.*}} addq 4256(%rip), %rax
// DISASM-NEXT: 11010: {{.*}} movq %fs:0, %rax
// DISASM-NEXT: 11019: {{.*}} addq 4248(%rip), %rax
.section .text
.globl _start