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[AMDGPU] Do not emit isa info as code object metadata

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- It was decided to expose this information through other means (rocr)

Differential Revision: https://reviews.llvm.org/D30970

llvm-svn: 298560
This commit is contained in:
Konstantin Zhuravlyov
2017-03-22 23:27:09 +00:00
parent ee66d6e18e
commit 4cbb68959b
15 changed files with 23 additions and 347 deletions
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5
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
View File

@@ -116,15 +116,14 @@ void AMDGPUAsmPrinter::EmitStartOfAsmFile(Module &M) {
getTargetStreamer().EmitDirectiveHSACodeObjectVersion(2, 1);
getTargetStreamer().EmitDirectiveHSACodeObjectISA(
ISA.Major, ISA.Minor, ISA.Stepping, "AMD", "AMDGPU");
getTargetStreamer().EmitStartOfCodeObjectMetadata(
getSTI()->getFeatureBits(), M);
getTargetStreamer().EmitStartOfCodeObjectMetadata(M);
}
void AMDGPUAsmPrinter::EmitEndOfAsmFile(Module &M) {
if (TM.getTargetTriple().getOS() != Triple::AMDHSA)
return;
getTargetStreamer().EmitEndOfCodeObjectMetadata(getSTI()->getFeatureBits());
getTargetStreamer().EmitEndOfCodeObjectMetadata();
}
bool AMDGPUAsmPrinter::isBlockOnlyReachableByFallthrough(

2
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
View File

@@ -2296,7 +2296,7 @@ bool AMDGPUAsmParser::ParseDirectiveCodeObjectMetadata() {
YamlStream.flush();
if (!getTargetStreamer().EmitCodeObjectMetadata(getFeatureBits(), YamlString))
if (!getTargetStreamer().EmitCodeObjectMetadata(YamlString))
return Error(getParser().getTok().getLoc(), "invalid code object metadata");
return false;

65
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUCodeObjectMetadata.h
View File

@@ -98,67 +98,6 @@ enum class ValueType : uint8_t {
Unknown = 0xff
};
//===----------------------------------------------------------------------===//
// Instruction Set Architecture Metadata (ISA).
//===----------------------------------------------------------------------===//
namespace Isa {
namespace Key {
/// \brief Key for Isa::Metadata::mWavefrontSize.
constexpr char WavefrontSize[] = "WavefrontSize";
/// \brief Key for Isa::Metadata::mLocalMemorySize.
constexpr char LocalMemorySize[] = "LocalMemorySize";
/// \brief Key for Isa::Metadata::mEUsPerCU.
constexpr char EUsPerCU[] = "EUsPerCU";
/// \brief Key for Isa::Metadata::mMaxWavesPerEU.
constexpr char MaxWavesPerEU[] = "MaxWavesPerEU";
/// \brief Key for Isa::Metadata::mMaxFlatWorkGroupSize.
constexpr char MaxFlatWorkGroupSize[] = "MaxFlatWorkGroupSize";
/// \brief Key for Isa::Metadata::mSGPRAllocGranule.
constexpr char SGPRAllocGranule[] = "SGPRAllocGranule";
/// \brief Key for Isa::Metadata::mTotalNumSGPRs.
constexpr char TotalNumSGPRs[] = "TotalNumSGPRs";
/// \brief Key for Isa::Metadata::mAddressableNumSGPRs.
constexpr char AddressableNumSGPRs[] = "AddressableNumSGPRs";
/// \brief Key for Isa::Metadata::mVGPRAllocGranule.
constexpr char VGPRAllocGranule[] = "VGPRAllocGranule";
/// \brief Key for Isa::Metadata::mTotalNumVGPRs.
constexpr char TotalNumVGPRs[] = "TotalNumVGPRs";
/// \brief Key for Isa::Metadata::mAddressableNumVGPRs.
constexpr char AddressableNumVGPRs[] = "AddressableNumVGPRs";
} // end namespace Key
/// \brief In-memory representation of instruction set architecture metadata.
struct Metadata final {
/// \brief Wavefront size. Required.
uint32_t mWavefrontSize = 0;
/// \brief Local memory size in bytes. Required.
uint32_t mLocalMemorySize = 0;
/// \brief Number of execution units per compute unit. Required.
uint32_t mEUsPerCU = 0;
/// \brief Maximum number of waves per execution unit. Required.
uint32_t mMaxWavesPerEU = 0;
/// \brief Maximum flat work group size. Required.
uint32_t mMaxFlatWorkGroupSize = 0;
/// \brief SGPR allocation granularity. Required.
uint32_t mSGPRAllocGranule = 0;
/// \brief Total number of SGPRs. Required.
uint32_t mTotalNumSGPRs = 0;
/// \brief Addressable number of SGPRs. Required.
uint32_t mAddressableNumSGPRs = 0;
/// \brief VGPR allocation granularity. Required.
uint32_t mVGPRAllocGranule = 0;
/// \brief Total number of VGPRs. Required.
uint32_t mTotalNumVGPRs = 0;
/// \brief Addressable number of VGPRs. Required.
uint32_t mAddressableNumVGPRs = 0;
/// \brief Default constructor.
Metadata() = default;
};
} // end namespace Isa
//===----------------------------------------------------------------------===//
// Kernel Metadata.
//===----------------------------------------------------------------------===//
@@ -449,8 +388,6 @@ struct Metadata final {
namespace Key {
/// \brief Key for CodeObject::Metadata::mVersion.
constexpr char Version[] = "Version";
/// \brief Key for CodeObject::Metadata::mIsa.
constexpr char Isa[] = "Isa";
/// \brief Key for CodeObject::Metadata::mPrintf.
constexpr char Printf[] = "Printf";
/// \brief Key for CodeObject::Metadata::mKernels.
@@ -461,8 +398,6 @@ constexpr char Kernels[] = "Kernels";
struct Metadata final {
/// \brief Code object metadata version. Required.
std::vector<uint32_t> mVersion = std::vector<uint32_t>();
/// \brief Instruction set architecture metadata. Optional.
Isa::Metadata mIsa = Isa::Metadata();
/// \brief Printf metadata. Optional.
std::vector<std::string> mPrintf = std::vector<std::string>();
/// \brief Kernels metadata. Optional.

43
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUCodeObjectMetadataStreamer.cpp
View File

@@ -15,7 +15,6 @@
#include "AMDGPU.h"
#include "AMDGPUCodeObjectMetadataStreamer.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/Module.h"
@@ -23,7 +22,6 @@
using namespace llvm::AMDGPU;
using namespace llvm::AMDGPU::CodeObject;
using namespace llvm::AMDGPU::IsaInfo;
LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR(uint32_t)
LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR(std::string)
@@ -102,23 +100,6 @@ struct ScalarEnumerationTraits<ValueType> {
}
};
template <>
struct MappingTraits<Isa::Metadata> {
static void mapping(IO &YIO, Isa::Metadata &MD) {
YIO.mapRequired(Isa::Key::WavefrontSize, MD.mWavefrontSize);
YIO.mapRequired(Isa::Key::LocalMemorySize, MD.mLocalMemorySize);
YIO.mapRequired(Isa::Key::EUsPerCU, MD.mEUsPerCU);
YIO.mapRequired(Isa::Key::MaxWavesPerEU, MD.mMaxWavesPerEU);
YIO.mapRequired(Isa::Key::MaxFlatWorkGroupSize, MD.mMaxFlatWorkGroupSize);
YIO.mapRequired(Isa::Key::SGPRAllocGranule, MD.mSGPRAllocGranule);
YIO.mapRequired(Isa::Key::TotalNumSGPRs, MD.mTotalNumSGPRs);
YIO.mapRequired(Isa::Key::AddressableNumSGPRs, MD.mAddressableNumSGPRs);
YIO.mapRequired(Isa::Key::VGPRAllocGranule, MD.mVGPRAllocGranule);
YIO.mapRequired(Isa::Key::TotalNumVGPRs, MD.mTotalNumVGPRs);
YIO.mapRequired(Isa::Key::AddressableNumVGPRs, MD.mAddressableNumVGPRs);
}
};
template <>
struct MappingTraits<Kernel::Attrs::Metadata> {
static void mapping(IO &YIO, Kernel::Attrs::Metadata &MD) {
@@ -215,7 +196,6 @@ template <>
struct MappingTraits<CodeObject::Metadata> {
static void mapping(IO &YIO, CodeObject::Metadata &MD) {
YIO.mapRequired(Key::Version, MD.mVersion);
YIO.mapOptional(Key::Isa, MD.mIsa);
YIO.mapOptional(Key::Printf, MD.mPrintf, std::vector<std::string>());
if (!MD.mKernels.empty() || !YIO.outputting())
YIO.mapOptional(Key::Kernels, MD.mKernels);
@@ -417,22 +397,6 @@ void MetadataStreamer::emitVersion() {
Version.push_back(MetadataVersionMinor);
}
void MetadataStreamer::emitIsa(const FeatureBitset &Features) {
auto &Isa = CodeObjectMetadata.mIsa;
Isa.mWavefrontSize = getWavefrontSize(Features);
Isa.mLocalMemorySize = getLocalMemorySize(Features);
Isa.mEUsPerCU = getEUsPerCU(Features);
Isa.mMaxWavesPerEU = getMaxWavesPerEU(Features);
Isa.mMaxFlatWorkGroupSize = getMaxFlatWorkGroupSize(Features);
Isa.mSGPRAllocGranule = getSGPRAllocGranule(Features);
Isa.mTotalNumSGPRs = getTotalNumSGPRs(Features);
Isa.mAddressableNumSGPRs = getAddressableNumSGPRs(Features);
Isa.mVGPRAllocGranule = getVGPRAllocGranule(Features);
Isa.mTotalNumVGPRs = getTotalNumVGPRs(Features);
Isa.mAddressableNumVGPRs = getAddressableNumVGPRs(Features);
}
void MetadataStreamer::emitPrintf(const Module &Mod) {
auto &Printf = CodeObjectMetadata.mPrintf;
@@ -611,9 +575,8 @@ void MetadataStreamer::emitKernelDebugProps(
KernelCode.debug_wavefront_private_segment_offset_sgpr;
}
void MetadataStreamer::begin(const FeatureBitset &Features, const Module &Mod) {
void MetadataStreamer::begin(const Module &Mod) {
emitVersion();
emitIsa(Features);
emitPrintf(Mod);
}
@@ -646,12 +609,10 @@ ErrorOr<std::string> MetadataStreamer::toYamlString() {
return YamlString;
}
ErrorOr<std::string> MetadataStreamer::toYamlString(
const FeatureBitset &Features, StringRef YamlString) {
ErrorOr<std::string> MetadataStreamer::toYamlString(StringRef YamlString) {
if (auto Error = Metadata::fromYamlString(YamlString, CodeObjectMetadata))
return Error;
emitIsa(Features);
return toYamlString();
}

8
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUCodeObjectMetadataStreamer.h
View File

@@ -25,7 +25,6 @@ namespace llvm {
class Argument;
class DataLayout;
class FeatureBitset;
class Function;
class MDNode;
class Module;
@@ -57,8 +56,6 @@ private:
void emitVersion();
void emitIsa(const FeatureBitset &Features);
void emitPrintf(const Module &Mod);
void emitKernelLanguage(const Function &Func);
@@ -82,7 +79,7 @@ public:
MetadataStreamer() = default;
~MetadataStreamer() = default;
void begin(const FeatureBitset &Features, const Module &Mod);
void begin(const Module &Mod);
void end() {}
@@ -90,8 +87,7 @@ public:
ErrorOr<std::string> toYamlString();
ErrorOr<std::string> toYamlString(const FeatureBitset &Features,
StringRef YamlString);
ErrorOr<std::string> toYamlString(StringRef YamlString);
};
} // end namespace CodeObject

23
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
View File

@@ -42,9 +42,8 @@ using namespace llvm::AMDGPU;
AMDGPUTargetStreamer::AMDGPUTargetStreamer(MCStreamer &S)
: MCTargetStreamer(S) {}
void AMDGPUTargetStreamer::EmitStartOfCodeObjectMetadata(
const FeatureBitset &Features, const Module &Mod) {
CodeObjectMetadataStreamer.begin(Features, Mod);
void AMDGPUTargetStreamer::EmitStartOfCodeObjectMetadata(const Module &Mod) {
CodeObjectMetadataStreamer.begin(Mod);
}
void AMDGPUTargetStreamer::EmitKernelCodeObjectMetadata(
@@ -52,11 +51,9 @@ void AMDGPUTargetStreamer::EmitKernelCodeObjectMetadata(
CodeObjectMetadataStreamer.emitKernel(Func, KernelCode);
}
void AMDGPUTargetStreamer::EmitEndOfCodeObjectMetadata(
const FeatureBitset &Features) {
void AMDGPUTargetStreamer::EmitEndOfCodeObjectMetadata() {
CodeObjectMetadataStreamer.end();
EmitCodeObjectMetadata(Features,
CodeObjectMetadataStreamer.toYamlString().get());
EmitCodeObjectMetadata(CodeObjectMetadataStreamer.toYamlString().get());
}
//===----------------------------------------------------------------------===//
@@ -113,10 +110,8 @@ void AMDGPUTargetAsmStreamer::EmitAMDGPUHsaProgramScopeGlobal(
OS << "\t.amdgpu_hsa_program_global " << GlobalName << '\n';
}
bool AMDGPUTargetAsmStreamer::EmitCodeObjectMetadata(
const FeatureBitset &Features, StringRef YamlString) {
auto VerifiedYamlString =
CodeObjectMetadataStreamer.toYamlString(Features, YamlString);
bool AMDGPUTargetAsmStreamer::EmitCodeObjectMetadata(StringRef YamlString) {
auto VerifiedYamlString = CodeObjectMetadataStreamer.toYamlString(YamlString);
if (!VerifiedYamlString)
return false;
@@ -237,10 +232,8 @@ void AMDGPUTargetELFStreamer::EmitAMDGPUHsaProgramScopeGlobal(
Symbol->setBinding(ELF::STB_GLOBAL);
}
bool AMDGPUTargetELFStreamer::EmitCodeObjectMetadata(
const FeatureBitset &Features, StringRef YamlString) {
auto VerifiedYamlString =
CodeObjectMetadataStreamer.toYamlString(Features, YamlString);
bool AMDGPUTargetELFStreamer::EmitCodeObjectMetadata(StringRef YamlString) {
auto VerifiedYamlString = CodeObjectMetadataStreamer.toYamlString(YamlString);
if (!VerifiedYamlString)
return false;

15
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
View File

@@ -18,7 +18,6 @@ namespace llvm {
#include "AMDGPUPTNote.h"
class DataLayout;
class FeatureBitset;
class Function;
class MCELFStreamer;
class MCSymbol;
@@ -49,17 +48,15 @@ public:
virtual void EmitAMDGPUHsaProgramScopeGlobal(StringRef GlobalName) = 0;
virtual void EmitStartOfCodeObjectMetadata(const FeatureBitset &Features,
const Module &Mod);
virtual void EmitStartOfCodeObjectMetadata(const Module &Mod);
virtual void EmitKernelCodeObjectMetadata(
const Function &Func, const amd_kernel_code_t &KernelCode);
virtual void EmitEndOfCodeObjectMetadata(const FeatureBitset &Features);
virtual void EmitEndOfCodeObjectMetadata();
/// \returns True on success, false on failure.
virtual bool EmitCodeObjectMetadata(const FeatureBitset &Features,
StringRef YamlString) = 0;
virtual bool EmitCodeObjectMetadata(StringRef YamlString) = 0;
};
class AMDGPUTargetAsmStreamer final : public AMDGPUTargetStreamer {
@@ -82,8 +79,7 @@ public:
void EmitAMDGPUHsaProgramScopeGlobal(StringRef GlobalName) override;
/// \returns True on success, false on failure.
bool EmitCodeObjectMetadata(const FeatureBitset &Features,
StringRef YamlString) override;
bool EmitCodeObjectMetadata(StringRef YamlString) override;
};
class AMDGPUTargetELFStreamer final : public AMDGPUTargetStreamer {
@@ -114,8 +110,7 @@ public:
void EmitAMDGPUHsaProgramScopeGlobal(StringRef GlobalName) override;
/// \returns True on success, false on failure.
bool EmitCodeObjectMetadata(const FeatureBitset &Features,
StringRef YamlString) override;
bool EmitCodeObjectMetadata(StringRef YamlString) override;
};
}

27
llvm/test/CodeGen/AMDGPU/code-object-metadata-from-llvm-ir-full.ll
View File

@@ -16,28 +16,7 @@
; CHECK: ---
; CHECK: Version: [ 1, 0 ]
; CHECK: Isa:
; CHECK: WavefrontSize: 64
; CHECK: LocalMemorySize: 65536
; CHECK: EUsPerCU: 4
; CHECK: MaxWavesPerEU: 10
; CHECK: MaxFlatWorkGroupSize: 2048
; GFX700: SGPRAllocGranule: 8
; GFX800: SGPRAllocGranule: 16
; GFX900: SGPRAllocGranule: 16
; GFX700: TotalNumSGPRs: 512
; GFX800: TotalNumSGPRs: 800
; GFX900: TotalNumSGPRs: 800
; GFX700: AddressableNumSGPRs: 104
; GFX800: AddressableNumSGPRs: 96
; GFX900: AddressableNumSGPRs: 102
; CHECK: VGPRAllocGranule: 4
; CHECK: TotalNumVGPRs: 256
; CHECK: AddressableNumVGPRs: 256
; CHECK: Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
; CHECK: Kernels:
; CHECK: - Name: test_char
@@ -1274,8 +1253,8 @@ define amdgpu_kernel void @test_pointee_align(i64 addrspace(1)* %a,
; NOTES-NEXT: Owner Data size Description
; NOTES-NEXT: AMD 0x00000008 Unknown note type: (0x00000001)
; NOTES-NEXT: AMD 0x0000001b Unknown note type: (0x00000003)
; GFX700: AMD 0x0000928a Unknown note type: (0x0000000a)
; GFX800: AMD 0x000092a9 Unknown note type: (0x0000000a)
; GFX900: AMD 0x0000928b Unknown note type: (0x0000000a)
; GFX700: AMD 0x00009171 Unknown note type: (0x0000000a)
; GFX800: AMD 0x00009190 Unknown note type: (0x0000000a)
; GFX900: AMD 0x00009171 Unknown note type: (0x0000000a)
; PARSER: AMDGPU Code Object Metadata Parser Test: PASS

12
llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-1.ll
View File

@@ -4,18 +4,6 @@
; CHECK: ---
; CHECK: Version: [ 1, 0 ]
; CHECK: Isa:
; CHECK: WavefrontSize: 64
; CHECK: LocalMemorySize: 65536
; CHECK: EUsPerCU: 4
; CHECK: MaxWavesPerEU: 10
; CHECK: MaxFlatWorkGroupSize: 2048
; CHECK: SGPRAllocGranule: 8
; CHECK: TotalNumSGPRs: 512
; CHECK: AddressableNumSGPRs: 104
; CHECK: VGPRAllocGranule: 4
; CHECK: TotalNumVGPRs: 256
; CHECK: AddressableNumVGPRs: 256
; CHECK: ...
!opencl.ocl.version = !{}

12
llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-2.ll
View File

@@ -4,18 +4,6 @@
; CHECK: ---
; CHECK: Version: [ 1, 0 ]
; CHECK: Isa:
; CHECK: WavefrontSize: 64
; CHECK: LocalMemorySize: 65536
; CHECK: EUsPerCU: 4
; CHECK: MaxWavesPerEU: 10
; CHECK: MaxFlatWorkGroupSize: 2048
; CHECK: SGPRAllocGranule: 8
; CHECK: TotalNumSGPRs: 512
; CHECK: AddressableNumSGPRs: 104
; CHECK: VGPRAllocGranule: 4
; CHECK: TotalNumVGPRs: 256
; CHECK: AddressableNumVGPRs: 256
; CHECK: ...
!opencl.ocl.version = !{!0}

12
llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-3.ll
View File

@@ -4,18 +4,6 @@
; CHECK: ---
; CHECK: Version: [ 1, 0 ]
; CHECK: Isa:
; CHECK: WavefrontSize: 64
; CHECK: LocalMemorySize: 65536
; CHECK: EUsPerCU: 4
; CHECK: MaxWavesPerEU: 10
; CHECK: MaxFlatWorkGroupSize: 2048
; CHECK: SGPRAllocGranule: 8
; CHECK: TotalNumSGPRs: 512
; CHECK: AddressableNumSGPRs: 104
; CHECK: VGPRAllocGranule: 4
; CHECK: TotalNumVGPRs: 256
; CHECK: AddressableNumVGPRs: 256
; CHECK: ...
!opencl.ocl.version = !{!0}

98
llvm/test/MC/AMDGPU/code-object-metadata-isa.s
View File

@@ -1,98 +0,0 @@
// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX700 %s
// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX800 %s
// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX900 %s
// CHECK: .amdgpu_code_object_metadata
// CHECK: Version: [ 1, 0 ]
// CHECK: Isa:
// CHECK: WavefrontSize: 64
// CHECK: LocalMemorySize: 65536
// CHECK: EUsPerCU: 4
// CHECK: MaxWavesPerEU: 10
// CHECK: MaxFlatWorkGroupSize: 2048
// GFX700: SGPRAllocGranule: 8
// GFX800: SGPRAllocGranule: 16
// GFX900: SGPRAllocGranule: 16
// GFX700: TotalNumSGPRs: 512
// GFX800: TotalNumSGPRs: 800
// GFX900: TotalNumSGPRs: 800
// GFX700: AddressableNumSGPRs: 104
// GFX800: AddressableNumSGPRs: 96
// GFX900: AddressableNumSGPRs: 102
// CHECK: VGPRAllocGranule: 4
// CHECK: TotalNumVGPRs: 256
// CHECK: AddressableNumVGPRs: 256
// CHECK: Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
// CHECK: Kernels:
// CHECK: - Name: test_kernel
// CHECK: Language: OpenCL C
// CHECK: LanguageVersion: [ 2, 0 ]
// CHECK: Args:
// CHECK: - Size: 1
// CHECK: Align: 1
// CHECK: Kind: ByValue
// CHECK: ValueType: I8
// CHECK: AccQual: Default
// CHECK: TypeName: char
// CHECK: - Size: 8
// CHECK: Align: 8
// CHECK: Kind: HiddenGlobalOffsetX
// CHECK: ValueType: I64
// CHECK: - Size: 8
// CHECK: Align: 8
// CHECK: Kind: HiddenGlobalOffsetY
// CHECK: ValueType: I64
// CHECK: - Size: 8
// CHECK: Align: 8
// CHECK: Kind: HiddenGlobalOffsetZ
// CHECK: ValueType: I64
// CHECK: - Size: 8
// CHECK: Align: 8
// CHECK: Kind: HiddenPrintfBuffer
// CHECK: ValueType: I8
// CHECK: AddrSpaceQual: Global
// CHECK: .end_amdgpu_code_object_metadata
.amdgpu_code_object_metadata
Version: [ 1, 0 ]
Isa:
WavefrontSize: 1
LocalMemorySize: 1
EUsPerCU: 1
MaxWavesPerEU: 1
MaxFlatWorkGroupSize: 1
SGPRAllocGranule: 1
TotalNumSGPRs: 1
AddressableNumSGPRs: 1
VGPRAllocGranule: 1
TotalNumVGPRs: 1
AddressableNumVGPRs: 1
Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
Kernels:
- Name: test_kernel
Language: OpenCL C
LanguageVersion: [ 2, 0 ]
Args:
- Size: 1
Align: 1
Kind: ByValue
ValueType: I8
AccQual: Default
TypeName: char
- Size: 8
Align: 8
Kind: HiddenGlobalOffsetX
ValueType: I64
- Size: 8
Align: 8
Kind: HiddenGlobalOffsetY
ValueType: I64
- Size: 8
Align: 8
Kind: HiddenGlobalOffsetZ
ValueType: I64
- Size: 8
Align: 8
Kind: HiddenPrintfBuffer
ValueType: I8
AddrSpaceQual: Global
.end_amdgpu_code_object_metadata

18
llvm/test/MC/AMDGPU/code-object-metadata-kernel-args.s
View File

@@ -4,24 +4,6 @@
// CHECK: .amdgpu_code_object_metadata
// CHECK: Version: [ 1, 0 ]
// CHECK: Isa:
// CHECK: WavefrontSize: 64
// CHECK: LocalMemorySize: 65536
// CHECK: EUsPerCU: 4
// CHECK: MaxWavesPerEU: 10
// CHECK: MaxFlatWorkGroupSize: 2048
// GFX700: SGPRAllocGranule: 8
// GFX800: SGPRAllocGranule: 16
// GFX900: SGPRAllocGranule: 16
// GFX700: TotalNumSGPRs: 512
// GFX800: TotalNumSGPRs: 800
// GFX900: TotalNumSGPRs: 800
// GFX700: AddressableNumSGPRs: 104
// GFX800: AddressableNumSGPRs: 96
// GFX900: AddressableNumSGPRs: 102
// CHECK: VGPRAllocGranule: 4
// CHECK: TotalNumVGPRs: 256
// CHECK: AddressableNumVGPRs: 256
// CHECK: Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
// CHECK: Kernels:
// CHECK: - Name: test_kernel

18
llvm/test/MC/AMDGPU/code-object-metadata-kernel-attrs.s
View File

@@ -4,24 +4,6 @@
// CHECK: .amdgpu_code_object_metadata
// CHECK: Version: [ 1, 0 ]
// CHECK: Isa:
// CHECK: WavefrontSize: 64
// CHECK: LocalMemorySize: 65536
// CHECK: EUsPerCU: 4
// CHECK: MaxWavesPerEU: 10
// CHECK: MaxFlatWorkGroupSize: 2048
// GFX700: SGPRAllocGranule: 8
// GFX800: SGPRAllocGranule: 16
// GFX900: SGPRAllocGranule: 16
// GFX700: TotalNumSGPRs: 512
// GFX800: TotalNumSGPRs: 800
// GFX900: TotalNumSGPRs: 800
// GFX700: AddressableNumSGPRs: 104
// GFX800: AddressableNumSGPRs: 96
// GFX900: AddressableNumSGPRs: 102
// CHECK: VGPRAllocGranule: 4
// CHECK: TotalNumVGPRs: 256
// CHECK: AddressableNumVGPRs: 256
// CHECK: Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
// CHECK: Kernels:
// CHECK: - Name: test_kernel

12
llvm/test/MC/AMDGPU/hsa.s
View File

@@ -46,18 +46,6 @@
// ASM: .amdgpu_code_object_metadata
// ASM: Version: [ 3, 0 ]
// ASM: Isa:
// ASM: WavefrontSize: 64
// ASM: LocalMemorySize: 65536
// ASM: EUsPerCU: 4
// ASM: MaxWavesPerEU: 10
// ASM: MaxFlatWorkGroupSize: 2048
// ASM: SGPRAllocGranule: 8
// ASM: TotalNumSGPRs: 512
// ASM: AddressableNumSGPRs: 104
// ASM: VGPRAllocGranule: 4
// ASM: TotalNumVGPRs: 256
// ASM: AddressableNumVGPRs: 256
// ASM: Kernels:
// ASM: - Name: amd_kernel_code_t_test_all
// ASM: - Name: amd_kernel_code_t_minimal