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[x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usage

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Commit on behalf of mharoush 

After LGTM and check all: 
This patch enables usage of k registers in inline assembly syntax.

Reviewer: 1. rnk
          2. delena 

Differential Revision: https://reviews.llvm.org/D25011

llvm-svn: 285555
This commit is contained in:
Michael Zuckerman
2016-10-31 09:37:59 +00:00
parent 3565c96d86
commit 4fe34fa2ec
2 changed files with 18 additions and 0 deletions
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1
clang/lib/Basic/Targets.cpp
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@@ -2397,6 +2397,7 @@ static const char* const GCCRegNames[] = {
"zmm8", "zmm9", "zmm10", "zmm11", "zmm12", "zmm13", "zmm14", "zmm15",
"zmm16", "zmm17", "zmm18", "zmm19", "zmm20", "zmm21", "zmm22", "zmm23",
"zmm24", "zmm25", "zmm26", "zmm27", "zmm28", "zmm29", "zmm30", "zmm31",
"k0", "k1", "k2", "k3", "k4", "k5", "k6", "k7",
};
const TargetInfo::AddlRegName AddlRegNames[] = {

17
clang/test/CodeGen/avx512-inline-asm-kregisters-basics.c Normal file
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@@ -0,0 +1,17 @@
// RUN: %clang_cc1 %s -target-cpu skylake-avx512 -O0 -S -o - -Wall -Werror | FileCheck %s
// This test checks basic inline assembly recognition of k0-k7 registers for avx512.
void test_basic_inline_asm_with_k_regs() {
//CHECK: #APP
//CHECK: kandw %k1, %k2, %k3
//CHECK: #NO_APP
asm("kandw %k1, %k2, %k3\t");
//CHECK: #APP
//CHECK: kandw %k4, %k5, %k6
//CHECK: #NO_APP
asm("kandw %k4, %k5, %k6\t");
//CHECK: #APP
//CHECK: kandw %k7, %k0, %k1
//CHECK: #NO_APP
asm("kandw %k7, %k0, %k1\t");
}