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Reland: "[mlir][index][spirv] Add conversion for index to spirv" (#69790)
Due to an issue when lowering from scf to spirv as there was no conversion pass for index to spirv, we are motivated to add a conversion pass from the Index dialect to the SPIR-V dialect. Furthermore, we add the new conversion patterns to the scf-to-spirv conversion. Fixes https://github.com/llvm/llvm-project/issues/63713 --------- Co-authored-by: Jeremy Kun <jkun@google.com>
This commit is contained in:
Finn Plummer
GitHub
30
mlir/include/mlir/Conversion/IndexToSPIRV/IndexToSPIRV.h
Normal file
30
mlir/include/mlir/Conversion/IndexToSPIRV/IndexToSPIRV.h
Normal file
@@ -0,0 +1,30 @@
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//===- IndexToSPIRV.h - Index to SPIRV dialect conversion -------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef MLIR_CONVERSION_INDEXTOSPIRV_INDEXTOSPIRV_H
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#define MLIR_CONVERSION_INDEXTOSPIRV_INDEXTOSPIRV_H
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#include "mlir/Pass/Pass.h"
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#include <memory>
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namespace mlir {
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class RewritePatternSet;
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class SPIRVTypeConverter;
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class Pass;
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#define GEN_PASS_DECL_CONVERTINDEXTOSPIRVPASS
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#include "mlir/Conversion/Passes.h.inc"
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namespace index {
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void populateIndexToSPIRVPatterns(SPIRVTypeConverter &converter,
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RewritePatternSet &patterns);
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std::unique_ptr<OperationPass<>> createConvertIndexToSPIRVPass();
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} // namespace index
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} // namespace mlir
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#endif // MLIR_CONVERSION_INDEXTOSPIRV_INDEXTOSPIRV_H
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@@ -35,6 +35,7 @@
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#include "mlir/Conversion/GPUToSPIRV/GPUToSPIRVPass.h"
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#include "mlir/Conversion/GPUToVulkan/ConvertGPUToVulkanPass.h"
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#include "mlir/Conversion/IndexToLLVM/IndexToLLVM.h"
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#include "mlir/Conversion/IndexToSPIRV/IndexToSPIRV.h"
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#include "mlir/Conversion/LinalgToStandard/LinalgToStandard.h"
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#include "mlir/Conversion/MathToFuncs/MathToFuncs.h"
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#include "mlir/Conversion/MathToLLVM/MathToLLVM.h"
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@@ -644,6 +644,28 @@ def ConvertIndexToLLVMPass : Pass<"convert-index-to-llvm"> {
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];
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}
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//===----------------------------------------------------------------------===//
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// ConvertIndexToSPIRVPass
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//===----------------------------------------------------------------------===//
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def ConvertIndexToSPIRVPass : Pass<"convert-index-to-spirv"> {
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let summary = "Lower the `index` dialect to the `spirv` dialect.";
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let description = [{
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This pass lowers Index dialect operations to SPIR-V dialect operations.
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Operation conversions are 1-to-1 except for the exotic divides: `ceildivs`,
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`ceildivu`, and `floordivs`. The index bitwidth will be 32 or 64 as
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specified by use-64bit-index.
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}];
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let dependentDialects = ["::mlir::spirv::SPIRVDialect"];
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let options = [
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Option<"use64bitIndex", "use-64bit-index",
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"bool", /*default=*/"false",
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"Use 64-bit integers to convert index types">
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];
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}
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//===----------------------------------------------------------------------===//
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// LinalgToStandard
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//===----------------------------------------------------------------------===//
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@@ -55,13 +55,13 @@ struct SPIRVConversionOptions {
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/// values will be packed into one 32-bit value to be memory efficient.
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bool emulateLT32BitScalarTypes{true};
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/// Use 64-bit integers to convert index types.
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bool use64bitIndex{false};
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/// Whether to enable fast math mode during conversion. If true, various
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/// patterns would assume no NaN/infinity numbers as inputs, and thus there
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/// will be no special guards emitted to check and handle such cases.
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bool enableFastMathMode{false};
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/// Use 64-bit integers when converting index types.
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bool use64bitIndex{false};
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};
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/// Type conversion from builtin types to SPIR-V types for shader interface.
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@@ -77,6 +77,11 @@ public:
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/// Gets the SPIR-V correspondence for the standard index type.
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Type getIndexType() const;
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/// Gets the bitwidth of the index type when converted to SPIR-V.
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unsigned getIndexTypeBitwidth() const {
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return options.use64bitIndex ? 64 : 32;
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}
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const spirv::TargetEnv &getTargetEnv() const { return targetEnv; }
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/// Returns the options controlling the SPIR-V type converter.
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@@ -24,6 +24,7 @@ add_subdirectory(GPUToROCDL)
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add_subdirectory(GPUToSPIRV)
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add_subdirectory(GPUToVulkan)
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add_subdirectory(IndexToLLVM)
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add_subdirectory(IndexToSPIRV)
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add_subdirectory(LinalgToStandard)
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add_subdirectory(LLVMCommon)
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add_subdirectory(MathToFuncs)
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17
mlir/lib/Conversion/IndexToSPIRV/CMakeLists.txt
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17
mlir/lib/Conversion/IndexToSPIRV/CMakeLists.txt
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@@ -0,0 +1,17 @@
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add_mlir_conversion_library(MLIRIndexToSPIRV
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IndexToSPIRV.cpp
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ADDITIONAL_HEADER_DIRS
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${MLIR_MAIN_INCLUDE_DIR}/mlir/Conversion/IndexToSPIRV
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DEPENDS
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MLIRConversionPassIncGen
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LINK_COMPONENTS
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Core
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LINK_LIBS PUBLIC
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MLIRIndexDialect
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MLIRSPIRVConversion
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MLIRSPIRVDialect
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)
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418
mlir/lib/Conversion/IndexToSPIRV/IndexToSPIRV.cpp
Normal file
418
mlir/lib/Conversion/IndexToSPIRV/IndexToSPIRV.cpp
Normal file
@@ -0,0 +1,418 @@
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//===- IndexToSPIRV.cpp - Index to SPIRV dialect conversion -----*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Conversion/IndexToSPIRV/IndexToSPIRV.h"
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#include "../SPIRVCommon/Pattern.h"
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#include "mlir/Dialect/Index/IR/IndexDialect.h"
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#include "mlir/Dialect/Index/IR/IndexOps.h"
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#include "mlir/Dialect/SPIRV/IR/SPIRVDialect.h"
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#include "mlir/Dialect/SPIRV/IR/SPIRVOps.h"
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#include "mlir/Dialect/SPIRV/Transforms/SPIRVConversion.h"
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#include "mlir/Pass/Pass.h"
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using namespace mlir;
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using namespace index;
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namespace {
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//===----------------------------------------------------------------------===//
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// Trivial Conversions
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//===----------------------------------------------------------------------===//
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using ConvertIndexAdd = spirv::ElementwiseOpPattern<AddOp, spirv::IAddOp>;
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using ConvertIndexSub = spirv::ElementwiseOpPattern<SubOp, spirv::ISubOp>;
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using ConvertIndexMul = spirv::ElementwiseOpPattern<MulOp, spirv::IMulOp>;
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using ConvertIndexDivS = spirv::ElementwiseOpPattern<DivSOp, spirv::SDivOp>;
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using ConvertIndexDivU = spirv::ElementwiseOpPattern<DivUOp, spirv::UDivOp>;
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using ConvertIndexRemS = spirv::ElementwiseOpPattern<RemSOp, spirv::SRemOp>;
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using ConvertIndexRemU = spirv::ElementwiseOpPattern<RemUOp, spirv::UModOp>;
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using ConvertIndexMaxS = spirv::ElementwiseOpPattern<MaxSOp, spirv::GLSMaxOp>;
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using ConvertIndexMaxU = spirv::ElementwiseOpPattern<MaxUOp, spirv::GLUMaxOp>;
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using ConvertIndexMinS = spirv::ElementwiseOpPattern<MinSOp, spirv::GLSMinOp>;
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using ConvertIndexMinU = spirv::ElementwiseOpPattern<MinUOp, spirv::GLUMinOp>;
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using ConvertIndexShl =
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spirv::ElementwiseOpPattern<ShlOp, spirv::ShiftLeftLogicalOp>;
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using ConvertIndexShrS =
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spirv::ElementwiseOpPattern<ShrSOp, spirv::ShiftRightArithmeticOp>;
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using ConvertIndexShrU =
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spirv::ElementwiseOpPattern<ShrUOp, spirv::ShiftRightLogicalOp>;
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/// It is the case that when we convert bitwise operations to SPIR-V operations
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/// we must take into account the special pattern in SPIR-V that if the
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/// operands are boolean values, then SPIR-V uses `SPIRVLogicalOp`. Otherwise,
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/// for non-boolean operands, SPIR-V should use `SPIRVBitwiseOp`. However,
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/// index.add is never a boolean operation so we can directly convert it to the
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/// Bitwise[And|Or]Op.
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using ConvertIndexAnd = spirv::ElementwiseOpPattern<AndOp, spirv::BitwiseAndOp>;
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using ConvertIndexOr = spirv::ElementwiseOpPattern<OrOp, spirv::BitwiseOrOp>;
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using ConvertIndexXor = spirv::ElementwiseOpPattern<XOrOp, spirv::BitwiseXorOp>;
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//===----------------------------------------------------------------------===//
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// ConvertConstantBool
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//===----------------------------------------------------------------------===//
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// Converts index.bool.constant operation to spirv.Constant.
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struct ConvertIndexConstantBoolOpPattern final
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: OpConversionPattern<BoolConstantOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(BoolConstantOp op, BoolConstantOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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rewriter.replaceOpWithNewOp<spirv::ConstantOp>(op, op.getType(),
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op.getValueAttr());
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return success();
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}
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};
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//===----------------------------------------------------------------------===//
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// ConvertConstant
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//===----------------------------------------------------------------------===//
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// Converts index.constant op to spirv.Constant. Will truncate from i64 to i32
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// when required.
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struct ConvertIndexConstantOpPattern final : OpConversionPattern<ConstantOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(ConstantOp op, ConstantOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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auto *typeConverter = this->template getTypeConverter<SPIRVTypeConverter>();
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Type indexType = typeConverter->getIndexType();
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APInt value = op.getValue().trunc(typeConverter->getIndexTypeBitwidth());
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rewriter.replaceOpWithNewOp<spirv::ConstantOp>(
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op, indexType, IntegerAttr::get(indexType, value));
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return success();
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}
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};
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//===----------------------------------------------------------------------===//
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// ConvertIndexCeilDivS
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//===----------------------------------------------------------------------===//
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/// Convert `ceildivs(n, m)` into `x = m > 0 ? -1 : 1` and then
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/// `n*m > 0 ? (n+x)/m + 1 : -(-n/m)`. Formula taken from the equivalent
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/// conversion in IndexToLLVM.
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struct ConvertIndexCeilDivSPattern final : OpConversionPattern<CeilDivSOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(CeilDivSOp op, CeilDivSOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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Location loc = op.getLoc();
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Value n = adaptor.getLhs();
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Type n_type = n.getType();
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Value m = adaptor.getRhs();
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// Define the constants
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Value zero = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, 0));
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Value posOne = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, 1));
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Value negOne = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, -1));
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// Compute `x`.
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Value mPos = rewriter.create<spirv::SGreaterThanOp>(loc, m, zero);
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Value x = rewriter.create<spirv::SelectOp>(loc, mPos, negOne, posOne);
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// Compute the positive result.
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Value nPlusX = rewriter.create<spirv::IAddOp>(loc, n, x);
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Value nPlusXDivM = rewriter.create<spirv::SDivOp>(loc, nPlusX, m);
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Value posRes = rewriter.create<spirv::IAddOp>(loc, nPlusXDivM, posOne);
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// Compute the negative result.
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Value negN = rewriter.create<spirv::ISubOp>(loc, zero, n);
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Value negNDivM = rewriter.create<spirv::SDivOp>(loc, negN, m);
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Value negRes = rewriter.create<spirv::ISubOp>(loc, zero, negNDivM);
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// Pick the positive result if `n` and `m` have the same sign and `n` is
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// non-zero, i.e. `(n > 0) == (m > 0) && n != 0`.
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Value nPos = rewriter.create<spirv::SGreaterThanOp>(loc, n, zero);
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Value sameSign = rewriter.create<spirv::LogicalEqualOp>(loc, nPos, mPos);
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Value nNonZero = rewriter.create<spirv::INotEqualOp>(loc, n, zero);
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Value cmp = rewriter.create<spirv::LogicalAndOp>(loc, sameSign, nNonZero);
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rewriter.replaceOpWithNewOp<spirv::SelectOp>(op, cmp, posRes, negRes);
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return success();
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}
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};
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//===----------------------------------------------------------------------===//
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// ConvertIndexCeilDivU
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//===----------------------------------------------------------------------===//
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/// Convert `ceildivu(n, m)` into `n == 0 ? 0 : (n-1)/m + 1`. Formula taken
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/// from the equivalent conversion in IndexToLLVM.
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struct ConvertIndexCeilDivUPattern final : OpConversionPattern<CeilDivUOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(CeilDivUOp op, CeilDivUOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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Location loc = op.getLoc();
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Value n = adaptor.getLhs();
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Type n_type = n.getType();
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Value m = adaptor.getRhs();
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// Define the constants
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Value zero = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, 0));
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Value one = rewriter.create<spirv::ConstantOp>(loc, n_type,
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IntegerAttr::get(n_type, 1));
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// Compute the non-zero result.
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Value minusOne = rewriter.create<spirv::ISubOp>(loc, n, one);
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Value quotient = rewriter.create<spirv::UDivOp>(loc, minusOne, m);
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Value plusOne = rewriter.create<spirv::IAddOp>(loc, quotient, one);
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// Pick the result
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Value cmp = rewriter.create<spirv::IEqualOp>(loc, n, zero);
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rewriter.replaceOpWithNewOp<spirv::SelectOp>(op, cmp, zero, plusOne);
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return success();
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}
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};
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//===----------------------------------------------------------------------===//
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// ConvertIndexFloorDivS
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//===----------------------------------------------------------------------===//
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/// Convert `floordivs(n, m)` into `x = m < 0 ? 1 : -1` and then
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/// `n*m < 0 ? -1 - (x-n)/m : n/m`. Formula taken from the equivalent conversion
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/// in IndexToLLVM.
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struct ConvertIndexFloorDivSPattern final : OpConversionPattern<FloorDivSOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(FloorDivSOp op, FloorDivSOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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Location loc = op.getLoc();
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Value n = adaptor.getLhs();
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Type n_type = n.getType();
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Value m = adaptor.getRhs();
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// Define the constants
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Value zero = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, 0));
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Value posOne = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, 1));
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Value negOne = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, -1));
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// Compute `x`.
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Value mNeg = rewriter.create<spirv::SLessThanOp>(loc, m, zero);
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Value x = rewriter.create<spirv::SelectOp>(loc, mNeg, posOne, negOne);
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// Compute the negative result
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Value xMinusN = rewriter.create<spirv::ISubOp>(loc, x, n);
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Value xMinusNDivM = rewriter.create<spirv::SDivOp>(loc, xMinusN, m);
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Value negRes = rewriter.create<spirv::ISubOp>(loc, negOne, xMinusNDivM);
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// Compute the positive result.
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Value posRes = rewriter.create<spirv::SDivOp>(loc, n, m);
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// Pick the negative result if `n` and `m` have different signs and `n` is
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// non-zero, i.e. `(n < 0) != (m < 0) && n != 0`.
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Value nNeg = rewriter.create<spirv::SLessThanOp>(loc, n, zero);
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Value diffSign = rewriter.create<spirv::LogicalNotEqualOp>(loc, nNeg, mNeg);
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Value nNonZero = rewriter.create<spirv::INotEqualOp>(loc, n, zero);
|
||||
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Value cmp = rewriter.create<spirv::LogicalAndOp>(loc, diffSign, nNonZero);
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rewriter.replaceOpWithNewOp<spirv::SelectOp>(op, cmp, posRes, negRes);
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return success();
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}
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};
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//===----------------------------------------------------------------------===//
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// ConvertIndexCast
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//===----------------------------------------------------------------------===//
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||||
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/// Convert a cast op. If the materialized index type is the same as the other
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/// type, fold away the op. Otherwise, use the Convert SPIR-V operation.
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/// Signed casts sign extend when the result bitwidth is larger. Unsigned casts
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/// zero extend when the result bitwidth is larger.
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template <typename CastOp, typename ConvertOp>
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struct ConvertIndexCast final : OpConversionPattern<CastOp> {
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using OpConversionPattern<CastOp>::OpConversionPattern;
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LogicalResult
|
||||
matchAndRewrite(CastOp op, typename CastOp::Adaptor adaptor,
|
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ConversionPatternRewriter &rewriter) const override {
|
||||
auto *typeConverter = this->template getTypeConverter<SPIRVTypeConverter>();
|
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Type indexType = typeConverter->getIndexType();
|
||||
|
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Type srcType = adaptor.getInput().getType();
|
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Type dstType = op.getType();
|
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if (isa<IndexType>(srcType)) {
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srcType = indexType;
|
||||
}
|
||||
if (isa<IndexType>(dstType)) {
|
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dstType = indexType;
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||||
}
|
||||
|
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if (srcType == dstType) {
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rewriter.replaceOp(op, adaptor.getInput());
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} else {
|
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rewriter.template replaceOpWithNewOp<ConvertOp>(op, dstType,
|
||||
adaptor.getOperands());
|
||||
}
|
||||
return success();
|
||||
}
|
||||
};
|
||||
|
||||
using ConvertIndexCastS = ConvertIndexCast<CastSOp, spirv::SConvertOp>;
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using ConvertIndexCastU = ConvertIndexCast<CastUOp, spirv::UConvertOp>;
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//===----------------------------------------------------------------------===//
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// ConvertIndexCmp
|
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//===----------------------------------------------------------------------===//
|
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|
||||
// Helper template to replace the operation
|
||||
template <typename ICmpOp>
|
||||
static LogicalResult rewriteCmpOp(CmpOp op, CmpOpAdaptor adaptor,
|
||||
ConversionPatternRewriter &rewriter) {
|
||||
rewriter.replaceOpWithNewOp<ICmpOp>(op, adaptor.getLhs(), adaptor.getRhs());
|
||||
return success();
|
||||
}
|
||||
|
||||
struct ConvertIndexCmpPattern final : OpConversionPattern<CmpOp> {
|
||||
using OpConversionPattern::OpConversionPattern;
|
||||
|
||||
LogicalResult
|
||||
matchAndRewrite(CmpOp op, CmpOpAdaptor adaptor,
|
||||
ConversionPatternRewriter &rewriter) const override {
|
||||
// We must convert the predicates to the corresponding int comparions.
|
||||
switch (op.getPred()) {
|
||||
case IndexCmpPredicate::EQ:
|
||||
return rewriteCmpOp<spirv::IEqualOp>(op, adaptor, rewriter);
|
||||
case IndexCmpPredicate::NE:
|
||||
return rewriteCmpOp<spirv::INotEqualOp>(op, adaptor, rewriter);
|
||||
case IndexCmpPredicate::SGE:
|
||||
return rewriteCmpOp<spirv::SGreaterThanEqualOp>(op, adaptor, rewriter);
|
||||
case IndexCmpPredicate::SGT:
|
||||
return rewriteCmpOp<spirv::SGreaterThanOp>(op, adaptor, rewriter);
|
||||
case IndexCmpPredicate::SLE:
|
||||
return rewriteCmpOp<spirv::SLessThanEqualOp>(op, adaptor, rewriter);
|
||||
case IndexCmpPredicate::SLT:
|
||||
return rewriteCmpOp<spirv::SLessThanOp>(op, adaptor, rewriter);
|
||||
case IndexCmpPredicate::UGE:
|
||||
return rewriteCmpOp<spirv::UGreaterThanEqualOp>(op, adaptor, rewriter);
|
||||
case IndexCmpPredicate::UGT:
|
||||
return rewriteCmpOp<spirv::UGreaterThanOp>(op, adaptor, rewriter);
|
||||
case IndexCmpPredicate::ULE:
|
||||
return rewriteCmpOp<spirv::ULessThanEqualOp>(op, adaptor, rewriter);
|
||||
case IndexCmpPredicate::ULT:
|
||||
return rewriteCmpOp<spirv::ULessThanOp>(op, adaptor, rewriter);
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// ConvertIndexSizeOf
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
/// Lower `index.sizeof` to a constant with the value of the index bitwidth.
|
||||
struct ConvertIndexSizeOf final : OpConversionPattern<SizeOfOp> {
|
||||
using OpConversionPattern::OpConversionPattern;
|
||||
|
||||
LogicalResult
|
||||
matchAndRewrite(SizeOfOp op, SizeOfOpAdaptor adaptor,
|
||||
ConversionPatternRewriter &rewriter) const override {
|
||||
auto *typeConverter = this->template getTypeConverter<SPIRVTypeConverter>();
|
||||
Type indexType = typeConverter->getIndexType();
|
||||
unsigned bitwidth = typeConverter->getIndexTypeBitwidth();
|
||||
rewriter.replaceOpWithNewOp<spirv::ConstantOp>(
|
||||
op, indexType, IntegerAttr::get(indexType, bitwidth));
|
||||
return success();
|
||||
}
|
||||
};
|
||||
} // namespace
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Pattern Population
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
void index::populateIndexToSPIRVPatterns(SPIRVTypeConverter &typeConverter,
|
||||
RewritePatternSet &patterns) {
|
||||
patterns.add<
|
||||
// clang-format off
|
||||
ConvertIndexAdd,
|
||||
ConvertIndexSub,
|
||||
ConvertIndexMul,
|
||||
ConvertIndexDivS,
|
||||
ConvertIndexDivU,
|
||||
ConvertIndexRemS,
|
||||
ConvertIndexRemU,
|
||||
ConvertIndexMaxS,
|
||||
ConvertIndexMaxU,
|
||||
ConvertIndexMinS,
|
||||
ConvertIndexMinU,
|
||||
ConvertIndexShl,
|
||||
ConvertIndexShrS,
|
||||
ConvertIndexShrU,
|
||||
ConvertIndexAnd,
|
||||
ConvertIndexOr,
|
||||
ConvertIndexXor,
|
||||
ConvertIndexConstantBoolOpPattern,
|
||||
ConvertIndexConstantOpPattern,
|
||||
ConvertIndexCeilDivSPattern,
|
||||
ConvertIndexCeilDivUPattern,
|
||||
ConvertIndexFloorDivSPattern,
|
||||
ConvertIndexCastS,
|
||||
ConvertIndexCastU,
|
||||
ConvertIndexCmpPattern,
|
||||
ConvertIndexSizeOf
|
||||
>(typeConverter, patterns.getContext());
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// ODS-Generated Definitions
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
namespace mlir {
|
||||
#define GEN_PASS_DEF_CONVERTINDEXTOSPIRVPASS
|
||||
#include "mlir/Conversion/Passes.h.inc"
|
||||
} // namespace mlir
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Pass Definition
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
namespace {
|
||||
struct ConvertIndexToSPIRVPass
|
||||
: public impl::ConvertIndexToSPIRVPassBase<ConvertIndexToSPIRVPass> {
|
||||
using Base::Base;
|
||||
|
||||
void runOnOperation() override {
|
||||
Operation *op = getOperation();
|
||||
spirv::TargetEnvAttr targetAttr = spirv::lookupTargetEnvOrDefault(op);
|
||||
std::unique_ptr<SPIRVConversionTarget> target =
|
||||
SPIRVConversionTarget::get(targetAttr);
|
||||
|
||||
SPIRVConversionOptions options;
|
||||
options.use64bitIndex = this->use64bitIndex;
|
||||
SPIRVTypeConverter typeConverter(targetAttr, options);
|
||||
|
||||
// Use UnrealizedConversionCast as the bridge so that we don't need to pull
|
||||
// in patterns for other dialects.
|
||||
target->addLegalOp<UnrealizedConversionCastOp>();
|
||||
|
||||
// Allow the spirv operations we are converting to
|
||||
target->addLegalDialect<spirv::SPIRVDialect>();
|
||||
// Fail hard when there are any remaining 'index' ops.
|
||||
target->addIllegalDialect<index::IndexDialect>();
|
||||
|
||||
RewritePatternSet patterns(&getContext());
|
||||
index::populateIndexToSPIRVPatterns(typeConverter, patterns);
|
||||
|
||||
if (failed(applyPartialConversion(op, *target, std::move(patterns))))
|
||||
signalPassFailure();
|
||||
}
|
||||
};
|
||||
} // namespace
|
||||
@@ -11,6 +11,7 @@ add_mlir_conversion_library(MLIRSCFToSPIRV
|
||||
LINK_LIBS PUBLIC
|
||||
MLIRArithToSPIRV
|
||||
MLIRFuncToSPIRV
|
||||
MLIRIndexToSPIRV
|
||||
MLIRMemRefToSPIRV
|
||||
MLIRSPIRVDialect
|
||||
MLIRSPIRVConversion
|
||||
|
||||
@@ -14,6 +14,7 @@
|
||||
|
||||
#include "mlir/Conversion/ArithToSPIRV/ArithToSPIRV.h"
|
||||
#include "mlir/Conversion/FuncToSPIRV/FuncToSPIRV.h"
|
||||
#include "mlir/Conversion/IndexToSPIRV/IndexToSPIRV.h"
|
||||
#include "mlir/Conversion/MemRefToSPIRV/MemRefToSPIRV.h"
|
||||
#include "mlir/Conversion/SCFToSPIRV/SCFToSPIRV.h"
|
||||
#include "mlir/Dialect/SCF/IR/SCF.h"
|
||||
@@ -52,6 +53,7 @@ void SCFToSPIRVPass::runOnOperation() {
|
||||
populateFuncToSPIRVPatterns(typeConverter, patterns);
|
||||
populateMemRefToSPIRVPatterns(typeConverter, patterns);
|
||||
populateBuiltinFuncToSPIRVPatterns(typeConverter, patterns);
|
||||
index::populateIndexToSPIRVPatterns(typeConverter, patterns);
|
||||
|
||||
if (failed(applyPartialConversion(op, *target, std::move(patterns))))
|
||||
return signalPassFailure();
|
||||
|
||||
222
mlir/test/Conversion/IndexToSPRIV/index-to-spirv.mlir
Normal file
222
mlir/test/Conversion/IndexToSPRIV/index-to-spirv.mlir
Normal file
@@ -0,0 +1,222 @@
|
||||
// RUN: mlir-opt %s -convert-index-to-spirv | FileCheck %s
|
||||
// RUN: mlir-opt %s -convert-index-to-spirv=use-64bit-index=false | FileCheck %s --check-prefix=INDEX32
|
||||
// RUN: mlir-opt %s -convert-index-to-spirv=use-64bit-index=true | FileCheck %s --check-prefix=INDEX64
|
||||
|
||||
module attributes {
|
||||
spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Int64], []>, #spirv.resource_limits<>>
|
||||
} {
|
||||
// CHECK-LABEL: @trivial_ops
|
||||
func.func @trivial_ops(%a: index, %b: index) {
|
||||
// CHECK: spirv.IAdd
|
||||
%0 = index.add %a, %b
|
||||
// CHECK: spirv.ISub
|
||||
%1 = index.sub %a, %b
|
||||
// CHECK: spirv.IMul
|
||||
%2 = index.mul %a, %b
|
||||
// CHECK: spirv.SDiv
|
||||
%3 = index.divs %a, %b
|
||||
// CHECK: spirv.UDiv
|
||||
%4 = index.divu %a, %b
|
||||
// CHECK: spirv.SRem
|
||||
%5 = index.rems %a, %b
|
||||
// CHECK: spirv.UMod
|
||||
%6 = index.remu %a, %b
|
||||
// CHECK: spirv.GL.SMax
|
||||
%7 = index.maxs %a, %b
|
||||
// CHECK: spirv.GL.UMax
|
||||
%8 = index.maxu %a, %b
|
||||
// CHECK: spirv.GL.SMin
|
||||
%9 = index.mins %a, %b
|
||||
// CHECK: spirv.GL.UMin
|
||||
%10 = index.minu %a, %b
|
||||
// CHECK: spirv.ShiftLeftLogical
|
||||
%11 = index.shl %a, %b
|
||||
// CHECK: spirv.ShiftRightArithmetic
|
||||
%12 = index.shrs %a, %b
|
||||
// CHECK: spirv.ShiftRightLogical
|
||||
%13 = index.shru %a, %b
|
||||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @bitwise_ops
|
||||
func.func @bitwise_ops(%a: index, %b: index) {
|
||||
// CHECK: spirv.BitwiseAnd
|
||||
%0 = index.and %a, %b
|
||||
// CHECK: spirv.BitwiseOr
|
||||
%1 = index.or %a, %b
|
||||
// CHECK: spirv.BitwiseXor
|
||||
%2 = index.xor %a, %b
|
||||
return
|
||||
}
|
||||
|
||||
// INDEX32-LABEL: @constant_ops
|
||||
// INDEX64-LABEL: @constant_ops
|
||||
func.func @constant_ops() {
|
||||
// INDEX32: spirv.Constant 42 : i32
|
||||
// INDEX64: spirv.Constant 42 : i64
|
||||
%0 = index.constant 42
|
||||
// INDEX32: spirv.Constant true
|
||||
// INDEX64: spirv.Constant true
|
||||
%1 = index.bool.constant true
|
||||
// INDEX32: spirv.Constant false
|
||||
// INDEX64: spirv.Constant false
|
||||
%2 = index.bool.constant false
|
||||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @ceildivs
|
||||
// CHECK-SAME: %[[NI:.*]]: index, %[[MI:.*]]: index
|
||||
func.func @ceildivs(%n: index, %m: index) -> index {
|
||||
// CHECK: %[[N:.*]] = builtin.unrealized_conversion_cast %[[NI]]
|
||||
// CHECK: %[[M:.*]] = builtin.unrealized_conversion_cast %[[MI]]
|
||||
// CHECK: %[[ZERO:.*]] = spirv.Constant 0
|
||||
// CHECK: %[[POS_ONE:.*]] = spirv.Constant 1
|
||||
// CHECK: %[[NEG_ONE:.*]] = spirv.Constant -1
|
||||
|
||||
// CHECK: %[[M_POS:.*]] = spirv.SGreaterThan %[[M]], %[[ZERO]]
|
||||
// CHECK: %[[X:.*]] = spirv.Select %[[M_POS]], %[[NEG_ONE]], %[[POS_ONE]]
|
||||
|
||||
// CHECK: %[[N_PLUS_X:.*]] = spirv.IAdd %[[N]], %[[X]]
|
||||
// CHECK: %[[N_PLUS_X_DIV_M:.*]] = spirv.SDiv %[[N_PLUS_X]], %[[M]]
|
||||
// CHECK: %[[POS_RES:.*]] = spirv.IAdd %[[N_PLUS_X_DIV_M]], %[[POS_ONE]]
|
||||
|
||||
// CHECK: %[[NEG_N:.*]] = spirv.ISub %[[ZERO]], %[[N]]
|
||||
// CHECK: %[[NEG_N_DIV_M:.*]] = spirv.SDiv %[[NEG_N]], %[[M]]
|
||||
// CHECK: %[[NEG_RES:.*]] = spirv.ISub %[[ZERO]], %[[NEG_N_DIV_M]]
|
||||
|
||||
// CHECK: %[[N_POS:.*]] = spirv.SGreaterThan %[[N]], %[[ZERO]]
|
||||
// CHECK: %[[SAME_SIGN:.*]] = spirv.LogicalEqual %[[N_POS]], %[[M_POS]]
|
||||
// CHECK: %[[N_NON_ZERO:.*]] = spirv.INotEqual %[[N]], %[[ZERO]]
|
||||
// CHECK: %[[CMP:.*]] = spirv.LogicalAnd %[[SAME_SIGN]], %[[N_NON_ZERO]]
|
||||
// CHECK: %[[RESULT:.*]] = spirv.Select %[[CMP]], %[[POS_RES]], %[[NEG_RES]]
|
||||
%result = index.ceildivs %n, %m
|
||||
|
||||
// %[[RESULTI:.*] = builtin.unrealized_conversion_cast %[[RESULT]]
|
||||
// return %[[RESULTI]]
|
||||
return %result : index
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @ceildivu
|
||||
// CHECK-SAME: %[[NI:.*]]: index, %[[MI:.*]]: index
|
||||
func.func @ceildivu(%n: index, %m: index) -> index {
|
||||
// CHECK: %[[N:.*]] = builtin.unrealized_conversion_cast %[[NI]]
|
||||
// CHECK: %[[M:.*]] = builtin.unrealized_conversion_cast %[[MI]]
|
||||
// CHECK: %[[ZERO:.*]] = spirv.Constant 0
|
||||
// CHECK: %[[ONE:.*]] = spirv.Constant 1
|
||||
|
||||
// CHECK: %[[N_MINUS_ONE:.*]] = spirv.ISub %[[N]], %[[ONE]]
|
||||
// CHECK: %[[N_MINUS_ONE_DIV_M:.*]] = spirv.UDiv %[[N_MINUS_ONE]], %[[M]]
|
||||
// CHECK: %[[N_MINUS_ONE_DIV_M_PLUS_ONE:.*]] = spirv.IAdd %[[N_MINUS_ONE_DIV_M]], %[[ONE]]
|
||||
|
||||
// CHECK: %[[CMP:.*]] = spirv.IEqual %[[N]], %[[ZERO]]
|
||||
// CHECK: %[[RESULT:.*]] = spirv.Select %[[CMP]], %[[ZERO]], %[[N_MINUS_ONE_DIV_M_PLUS_ONE]]
|
||||
%result = index.ceildivu %n, %m
|
||||
|
||||
// %[[RESULTI:.*] = builtin.unrealized_conversion_cast %[[RESULT]]
|
||||
// return %[[RESULTI]]
|
||||
return %result : index
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @floordivs
|
||||
// CHECK-SAME: %[[NI:.*]]: index, %[[MI:.*]]: index
|
||||
func.func @floordivs(%n: index, %m: index) -> index {
|
||||
// CHECK: %[[N:.*]] = builtin.unrealized_conversion_cast %[[NI]]
|
||||
// CHECK: %[[M:.*]] = builtin.unrealized_conversion_cast %[[MI]]
|
||||
// CHECK: %[[ZERO:.*]] = spirv.Constant 0
|
||||
// CHECK: %[[POS_ONE:.*]] = spirv.Constant 1
|
||||
// CHECK: %[[NEG_ONE:.*]] = spirv.Constant -1
|
||||
|
||||
// CHECK: %[[M_NEG:.*]] = spirv.SLessThan %[[M]], %[[ZERO]]
|
||||
// CHECK: %[[X:.*]] = spirv.Select %[[M_NEG]], %[[POS_ONE]], %[[NEG_ONE]]
|
||||
|
||||
// CHECK: %[[X_MINUS_N:.*]] = spirv.ISub %[[X]], %[[N]]
|
||||
// CHECK: %[[X_MINUS_N_DIV_M:.*]] = spirv.SDiv %[[X_MINUS_N]], %[[M]]
|
||||
// CHECK: %[[NEG_RES:.*]] = spirv.ISub %[[NEG_ONE]], %[[X_MINUS_N_DIV_M]]
|
||||
|
||||
// CHECK: %[[POS_RES:.*]] = spirv.SDiv %[[N]], %[[M]]
|
||||
|
||||
// CHECK: %[[N_NEG:.*]] = spirv.SLessThan %[[N]], %[[ZERO]]
|
||||
// CHECK: %[[DIFF_SIGN:.*]] = spirv.LogicalNotEqual %[[N_NEG]], %[[M_NEG]]
|
||||
// CHECK: %[[N_NON_ZERO:.*]] = spirv.INotEqual %[[N]], %[[ZERO]]
|
||||
|
||||
// CHECK: %[[CMP:.*]] = spirv.LogicalAnd %[[DIFF_SIGN]], %[[N_NON_ZERO]]
|
||||
// CHECK: %[[RESULT:.*]] = spirv.Select %[[CMP]], %[[POS_RES]], %[[NEG_RES]]
|
||||
%result = index.floordivs %n, %m
|
||||
|
||||
// %[[RESULTI:.*] = builtin.unrealized_conversion_cast %[[RESULT]]
|
||||
// return %[[RESULTI]]
|
||||
return %result : index
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @index_cmp
|
||||
func.func @index_cmp(%a : index, %b : index) {
|
||||
// CHECK: spirv.IEqual
|
||||
%0 = index.cmp eq(%a, %b)
|
||||
// CHECK: spirv.INotEqual
|
||||
%1 = index.cmp ne(%a, %b)
|
||||
|
||||
// CHECK: spirv.SLessThan
|
||||
%2 = index.cmp slt(%a, %b)
|
||||
// CHECK: spirv.SLessThanEqual
|
||||
%3 = index.cmp sle(%a, %b)
|
||||
// CHECK: spirv.SGreaterThan
|
||||
%4 = index.cmp sgt(%a, %b)
|
||||
// CHECK: spirv.SGreaterThanEqual
|
||||
%5 = index.cmp sge(%a, %b)
|
||||
|
||||
// CHECK: spirv.ULessThan
|
||||
%6 = index.cmp ult(%a, %b)
|
||||
// CHECK: spirv.ULessThanEqual
|
||||
%7 = index.cmp ule(%a, %b)
|
||||
// CHECK: spirv.UGreaterThan
|
||||
%8 = index.cmp ugt(%a, %b)
|
||||
// CHECK: spirv.UGreaterThanEqual
|
||||
%9 = index.cmp uge(%a, %b)
|
||||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @index_sizeof
|
||||
func.func @index_sizeof() {
|
||||
// CHECK: spirv.Constant 32 : i32
|
||||
%0 = index.sizeof
|
||||
return
|
||||
}
|
||||
|
||||
// INDEX32-LABEL: @index_cast_from
|
||||
// INDEX64-LABEL: @index_cast_from
|
||||
// INDEX32-SAME: %[[AI:.*]]: index
|
||||
// INDEX64-SAME: %[[AI:.*]]: index
|
||||
func.func @index_cast_from(%a: index) -> (i64, i32, i64, i32) {
|
||||
// INDEX32: %[[A:.*]] = builtin.unrealized_conversion_cast %[[AI]] : index to i32
|
||||
// INDEX64: %[[A:.*]] = builtin.unrealized_conversion_cast %[[AI]] : index to i64
|
||||
|
||||
// INDEX32: %[[V0:.*]] = spirv.SConvert %[[A]] : i32 to i64
|
||||
%0 = index.casts %a : index to i64
|
||||
// INDEX64: %[[V1:.*]] = spirv.SConvert %[[A]] : i64 to i32
|
||||
%1 = index.casts %a : index to i32
|
||||
// INDEX32: %[[V2:.*]] = spirv.UConvert %[[A]] : i32 to i64
|
||||
%2 = index.castu %a : index to i64
|
||||
// INDEX64: %[[V3:.*]] = spirv.UConvert %[[A]] : i64 to i32
|
||||
%3 = index.castu %a : index to i32
|
||||
|
||||
// INDEX32: return %[[V0]], %[[A]], %[[V2]], %[[A]]
|
||||
// INDEX64: return %[[A]], %[[V1]], %[[A]], %[[V3]]
|
||||
return %0, %1, %2, %3 : i64, i32, i64, i32
|
||||
}
|
||||
|
||||
// INDEX32-LABEL: @index_cast_to
|
||||
// INDEX64-LABEL: @index_cast_to
|
||||
// INDEX32-SAME: %[[A:.*]]: i32, %[[B:.*]]: i64
|
||||
// INDEX64-SAME: %[[A:.*]]: i32, %[[B:.*]]: i64
|
||||
func.func @index_cast_to(%a: i32, %b: i64) -> (index, index, index, index) {
|
||||
// INDEX64: %[[V0:.*]] = spirv.SConvert %[[A]] : i32 to i64
|
||||
%0 = index.casts %a : i32 to index
|
||||
// INDEX32: %[[V1:.*]] = spirv.SConvert %[[B]] : i64 to i32
|
||||
%1 = index.casts %b : i64 to index
|
||||
// INDEX64: %[[V2:.*]] = spirv.UConvert %[[A]] : i32 to i64
|
||||
%2 = index.castu %a : i32 to index
|
||||
// INDEX32: %[[V3:.*]] = spirv.UConvert %[[B]] : i64 to i32
|
||||
%3 = index.castu %b : i64 to index
|
||||
return %0, %1, %2, %3 : index, index, index, index
|
||||
}
|
||||
}
|
||||
28
mlir/test/Conversion/SCFToSPIRV/use-indices.mlir
Normal file
28
mlir/test/Conversion/SCFToSPIRV/use-indices.mlir
Normal file
@@ -0,0 +1,28 @@
|
||||
// RUN: mlir-opt -convert-scf-to-spirv %s -o - | FileCheck %s
|
||||
|
||||
// CHECK-LABEL: @forward
|
||||
func.func @forward() {
|
||||
// CHECK: %[[LB:.*]] = spirv.Constant 0 : i32
|
||||
%c0 = arith.constant 0 : index
|
||||
// CHECK: %[[UB:.*]] = spirv.Constant 32 : i32
|
||||
%c32 = arith.constant 32 : index
|
||||
// CHECK: %[[STEP:.*]] = spirv.Constant 1 : i32
|
||||
%c1 = arith.constant 1 : index
|
||||
|
||||
// CHECK: spirv.mlir.loop {
|
||||
// CHECK-NEXT: spirv.Branch ^[[HEADER:.*]](%[[LB]] : i32)
|
||||
// CHECK: ^[[HEADER]](%[[INDVAR:.*]]: i32):
|
||||
// CHECK: %[[CMP:.*]] = spirv.SLessThan %[[INDVAR]], %[[UB]] : i32
|
||||
// CHECK: spirv.BranchConditional %[[CMP]], ^[[BODY:.*]], ^[[MERGE:.*]]
|
||||
// CHECK: ^[[BODY]]:
|
||||
// CHECK: %[[X:.*]] = spirv.IAdd %[[INDVAR]], %[[INDVAR]] : i32
|
||||
// CHECK: %[[INDNEXT:.*]] = spirv.IAdd %[[INDVAR]], %[[STEP]] : i32
|
||||
// CHECK: spirv.Branch ^[[HEADER]](%[[INDNEXT]] : i32)
|
||||
// CHECK: ^[[MERGE]]:
|
||||
// CHECK: spirv.mlir.merge
|
||||
// CHECK: }
|
||||
scf.for %arg2 = %c0 to %c32 step %c1 {
|
||||
%1 = index.add %arg2, %arg2
|
||||
}
|
||||
return
|
||||
}
|
||||
@@ -7426,6 +7426,7 @@ cc_library(
|
||||
":FuncDialect",
|
||||
":FuncToSPIRV",
|
||||
":IR",
|
||||
":IndexToSPIRV",
|
||||
":MemRefToSPIRV",
|
||||
":Pass",
|
||||
":SCFDialect",
|
||||
@@ -9843,6 +9844,31 @@ cc_library(
|
||||
],
|
||||
)
|
||||
|
||||
cc_library(
|
||||
name = "IndexToSPIRV",
|
||||
srcs = glob([
|
||||
"lib/Conversion/IndexToSPIRV/*.cpp",
|
||||
"lib/Conversion/IndexToSPIRV/*.h",
|
||||
]),
|
||||
hdrs = glob([
|
||||
"include/mlir/Conversion/IndexToSPIRV/*.h",
|
||||
]),
|
||||
includes = ["include"],
|
||||
deps = [
|
||||
":ConversionPassIncGen",
|
||||
":IR",
|
||||
":IndexDialect",
|
||||
":Pass",
|
||||
":SPIRVCommonConversion",
|
||||
":SPIRVConversion",
|
||||
":SPIRVDialect",
|
||||
":Support",
|
||||
":Transforms",
|
||||
"//llvm:Core",
|
||||
"//llvm:Support",
|
||||
],
|
||||
)
|
||||
|
||||
cc_library(
|
||||
name = "IndexDialect",
|
||||
srcs = glob(["lib/Dialect/Index/IR/*.cpp"]),
|
||||
|
||||
Reference in New Issue
Block a user