[VPlan] Use createSelect in adjustRecipesForReductions (NFCI).

Simplify the code and rename Result->NewExitingVPV as suggested by
@ayalz in https://github.com/llvm/llvm-project/pull/70253.
This commit is contained in:
Florian Hahn
2024-01-03 20:54:08 +00:00
parent 92e211ab33
commit 6dda74cc51
2 changed files with 22 additions and 18 deletions

View File

@@ -167,9 +167,14 @@ public:
}
VPValue *createSelect(VPValue *Cond, VPValue *TrueVal, VPValue *FalseVal,
DebugLoc DL, const Twine &Name = "") {
return createNaryOp(Instruction::Select, {Cond, TrueVal, FalseVal}, DL,
Name);
DebugLoc DL, const Twine &Name = "",
std::optional<FastMathFlags> FMFs = std::nullopt) {
auto *Select =
FMFs ? new VPInstruction(Instruction::Select, {Cond, TrueVal, FalseVal},
*FMFs, DL, Name)
: new VPInstruction(Instruction::Select, {Cond, TrueVal, FalseVal},
DL, Name);
return tryInsertInstruction(Select);
}
/// Create a new ICmp VPInstruction with predicate \p Pred and operands \p A

View File

@@ -9141,7 +9141,7 @@ void LoopVectorizationPlanner::adjustRecipesForReductions(
continue;
const RecurrenceDescriptor &RdxDesc = PhiR->getRecurrenceDescriptor();
auto *Result = PhiR->getBackedgeValue()->getDefiningRecipe();
auto *NewExitingVPV = PhiR->getBackedgeValue();
// If tail is folded by masking, introduce selects between the phi
// and the live-out instruction of each reduction, at the beginning of the
// dedicated latch block.
@@ -9151,21 +9151,20 @@ void LoopVectorizationPlanner::adjustRecipesForReductions(
VPValue *Red = PhiR->getBackedgeValue();
assert(Red->getDefiningRecipe()->getParent() != LatchVPBB &&
"reduction recipe must be defined before latch");
FastMathFlags FMFs = RdxDesc.getFastMathFlags();
Type *PhiTy = PhiR->getOperand(0)->getLiveInIRValue()->getType();
Result =
std::optional<FastMathFlags> FMFs =
PhiTy->isFloatingPointTy()
? new VPInstruction(Instruction::Select, {Cond, Red, PhiR}, FMFs)
: new VPInstruction(Instruction::Select, {Cond, Red, PhiR});
Result->insertBefore(&*Builder.getInsertPoint());
Red->replaceUsesWithIf(
Result->getVPSingleValue(),
[](VPUser &U, unsigned) { return isa<VPLiveOut>(&U); });
? std::make_optional(RdxDesc.getFastMathFlags())
: std::nullopt;
NewExitingVPV = Builder.createSelect(Cond, Red, PhiR, {}, "", FMFs);
Red->replaceUsesWithIf(NewExitingVPV, [](VPUser &U, unsigned) {
return isa<VPLiveOut>(&U);
});
if (PreferPredicatedReductionSelect ||
TTI.preferPredicatedReductionSelect(
PhiR->getRecurrenceDescriptor().getOpcode(), PhiTy,
TargetTransformInfo::ReductionFlags()))
PhiR->setOperand(1, Result->getVPSingleValue());
PhiR->setOperand(1, NewExitingVPV);
}
// If the vector reduction can be performed in a smaller type, we truncate
// then extend the loop exit value to enable InstCombine to evaluate the
@@ -9174,17 +9173,17 @@ void LoopVectorizationPlanner::adjustRecipesForReductions(
if (MinVF.isVector() && PhiTy != RdxDesc.getRecurrenceType()) {
assert(!PhiR->isInLoop() && "Unexpected truncated inloop reduction!");
Type *RdxTy = RdxDesc.getRecurrenceType();
auto *Trunc = new VPWidenCastRecipe(Instruction::Trunc,
Result->getVPSingleValue(), RdxTy);
auto *Trunc =
new VPWidenCastRecipe(Instruction::Trunc, NewExitingVPV, RdxTy);
auto *Extnd =
RdxDesc.isSigned()
? new VPWidenCastRecipe(Instruction::SExt, Trunc, PhiTy)
: new VPWidenCastRecipe(Instruction::ZExt, Trunc, PhiTy);
Trunc->insertAfter(Result);
Trunc->insertAfter(NewExitingVPV->getDefiningRecipe());
Extnd->insertAfter(Trunc);
Result->getVPSingleValue()->replaceAllUsesWith(Extnd);
Trunc->setOperand(0, Result->getVPSingleValue());
NewExitingVPV->replaceAllUsesWith(Extnd);
Trunc->setOperand(0, NewExitingVPV);
}
}