[RISCV] Use PseudoInstExpansion for PseudoReadVLENB and PseudoReadVL. NFC

This lets tablegen generated the code and avoids a string lookup
of the CSR name at runtime.
This commit is contained in:
Craig Topper
2023-04-06 09:33:01 -07:00
parent cd3f2749ed
commit 77313ddfb2
3 changed files with 4 additions and 14 deletions

View File

@@ -5427,12 +5427,14 @@ let Predicates = [HasVInstructions] in {
let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 1 in {
def PseudoReadVLENB : Pseudo<(outs GPR:$rd), (ins),
[(set GPR:$rd, (riscv_read_vlenb))]>,
PseudoInstExpansion<(CSRRS GPR:$rd, SysRegVLENB.Encoding, X0)>,
Sched<[WriteRdVLENB]>;
}
let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 1,
Uses = [VL] in
def PseudoReadVL : Pseudo<(outs GPR:$rd), (ins), []>;
def PseudoReadVL : Pseudo<(outs GPR:$rd), (ins), []>,
PseudoInstExpansion<(CSRRS GPR:$rd, SysRegVL.Encoding, X0)>;
foreach lmul = MxList in {
foreach nf = NFSet<lmul>.L in {

View File

@@ -253,18 +253,6 @@ bool llvm::lowerRISCVMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
}
break;
}
case RISCV::PseudoReadVLENB:
OutMI.setOpcode(RISCV::CSRRS);
OutMI.addOperand(MCOperand::createImm(
RISCVSysReg::lookupSysRegByName("VLENB")->Encoding));
OutMI.addOperand(MCOperand::createReg(RISCV::X0));
break;
case RISCV::PseudoReadVL:
OutMI.setOpcode(RISCV::CSRRS);
OutMI.addOperand(
MCOperand::createImm(RISCVSysReg::lookupSysRegByName("VL")->Encoding));
OutMI.addOperand(MCOperand::createReg(RISCV::X0));
break;
}
return false;
}

View File

@@ -352,7 +352,7 @@ def : SysReg<"vstart", 0x008>;
def : SysReg<"vxsat", 0x009>;
def : SysReg<"vxrm", 0x00A>;
def : SysReg<"vcsr", 0x00F>;
def : SysReg<"vl", 0xC20>;
def SysRegVL : SysReg<"vl", 0xC20>;
def : SysReg<"vtype", 0xC21>;
def SysRegVLENB: SysReg<"vlenb", 0xC22>;