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synced 2026-01-13 11:02:04 +08:00
[CIR][NFC] Use TableGen to generate LLVM lowering patterns (#159390)
Most lowering patterns have exactly the same class declaration with different names and different `matchAndRewrite` implementations, yet their declaration occupies near 1000 lines of code in `LowerToLLVM.h`, making this file difficult to read and boring to maintain. In this patch, I migrate their declarations to be generated from `CIROps.td` using `clang-tblgen`. Some extra `CIR_Op` TableGen fields are introduced to help this: - The `CIR_Op` class now defines a `bit` field `hasLLVMLowering` which defaults to `true`. If its value is `true`, `clang-tblgen` would generate an LLVM lowering pattern declaration for the operation. - Some LLVM lowering patterns has bounded recursion. This could be enabled by setting the `isLLVMLoweringRecursive` field in a `CIR_Op` record to `true`. - Some LLVM lowering patterns have defined additional class members. They could be listed in the `extraLLVMLoweringPatternDecl` field. Note that in the incubator we have a similar TableGen code generator that generates LLVM lowering code for CIR builtin ops which has a one-to-one correspondence to LLVM dialect operations. This patch does NOT try to upstream it. Some additional noticeable changes made by this patch: - This patch adds the `dataLayout` member to every LLVM lowering pattern class to make the job easier for a code generator. In the future we might want to add more members to the lowering patterns, and we will need to update the code generator to make such changes.
This commit is contained in:
@@ -78,7 +78,15 @@ class LLVMLoweringInfo {
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}
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class CIR_Op<string mnemonic, list<Trait> traits = []> :
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Op<CIR_Dialect, mnemonic, traits>, LLVMLoweringInfo;
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Op<CIR_Dialect, mnemonic, traits>, LLVMLoweringInfo {
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// Should we generate an LLVM lowering pattern for this op?
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bit hasLLVMLowering = true;
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// Is the LLVM lowering pattern for this operation recursive?
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bit isLLVMLoweringRecursive = false;
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// Extra class declarations to be included in the generated LLVM lowering
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// pattern.
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code extraLLVMLoweringPatternDecl = "";
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}
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//===----------------------------------------------------------------------===//
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// CastOp
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@@ -218,6 +226,10 @@ def CIR_CastOp : CIR_Op<"cast", [
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// The input and output types should match the cast kind.
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let hasVerifier = 1;
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let hasFolder = 1;
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let extraLLVMLoweringPatternDecl = [{
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mlir::Type convertTy(mlir::Type ty) const;
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}];
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}
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@@ -297,6 +309,8 @@ def CIR_ConstantOp : CIR_Op<"const", [
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}];
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let hasFolder = 1;
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let isLLVMLoweringRecursive = true;
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}
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//===----------------------------------------------------------------------===//
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@@ -613,6 +627,8 @@ def CIR_IfOp : CIR_Op<"if", [
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CArg<"BuilderCallbackRef", "buildTerminatedBody">:$thenBuilder,
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CArg<"BuilderCallbackRef", "nullptr">:$elseBuilder)>
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];
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -659,6 +675,7 @@ def CIR_ConditionOp : CIR_Op<"condition", [
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let arguments = (ins CIR_BoolType:$condition);
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let assemblyFormat = " `(` $condition `)` attr-dict ";
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let hasVerifier = 1;
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -726,6 +743,8 @@ def CIR_YieldOp : CIR_Op<"yield", [
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let builders = [
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OpBuilder<(ins), [{ /* nothing to do */ }]>,
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];
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -741,6 +760,7 @@ def CIR_BreakOp : CIR_Op<"break", [Terminator]> {
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}];
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let assemblyFormat = "attr-dict";
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let hasVerifier = 1;
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -756,6 +776,7 @@ def CIR_ContinueOp : CIR_Op<"continue", [Terminator]> {
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}];
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let assemblyFormat = "attr-dict";
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let hasVerifier = 1;
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -814,6 +835,8 @@ def CIR_ScopeOp : CIR_Op<"scope", [
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// Scopes without yielding values.
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OpBuilder<(ins "llvm::function_ref<void(mlir::OpBuilder &, mlir::Location)>":$scopeBuilder)>
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];
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -860,6 +883,8 @@ def CIR_CaseOp : CIR_Op<"case", [
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"CaseOpKind":$kind,
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"mlir::OpBuilder::InsertPoint &":$insertPoint)>
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];
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let hasLLVMLowering = false;
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}
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def CIR_SwitchOp : CIR_Op<"switch", [
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@@ -1025,6 +1050,8 @@ def CIR_SwitchOp : CIR_Op<"switch", [
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// This is an expensive and need to be used with caution.
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bool isSimpleForm(llvm::SmallVectorImpl<CaseOp> &cases);
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}];
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -1170,6 +1197,8 @@ def CIR_GotoOp : CIR_Op<"goto", [Terminator]> {
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}];
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let arguments = (ins StrAttr:$label);
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let assemblyFormat = [{ $label attr-dict }];
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -1185,6 +1214,8 @@ def CIR_LabelOp : CIR_Op<"label", [AlwaysSpeculatable]> {
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let arguments = (ins StrAttr:$label);
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let assemblyFormat = [{ $label attr-dict }];
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let hasVerifier = 1;
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -1349,6 +1380,8 @@ def CIR_WhileOp : CIR_WhileOpBase<"while"> {
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}
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```
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}];
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let hasLLVMLowering = false;
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}
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def CIR_DoWhileOp : CIR_WhileOpBase<"do"> {
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@@ -1375,6 +1408,8 @@ def CIR_DoWhileOp : CIR_WhileOpBase<"do"> {
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}
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```
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}];
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -1442,6 +1477,8 @@ def CIR_ForOp : CIR_LoopOpBase<"for"> {
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return llvm::SmallVector<mlir::Region *, 3>{&getCond(), &getBody(), &getStep()};
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}
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}];
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -1480,6 +1517,8 @@ def CIR_CmpOp : CIR_Op<"cmp", [Pure, SameTypeOperands]> {
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let assemblyFormat = [{
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`(` $kind `,` $lhs `,` $rhs `)` `:` type($lhs) `,` type($result) attr-dict
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}];
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let isLLVMLoweringRecursive = true;
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}
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//===----------------------------------------------------------------------===//
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@@ -1550,6 +1589,10 @@ def CIR_BinOp : CIR_Op<"binop", [
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}];
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let hasVerifier = 1;
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let extraLLVMLoweringPatternDecl = [{
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mlir::LLVM::IntegerOverflowFlags getIntOverflowFlag(cir::BinOp op) const;
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}];
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}
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//===----------------------------------------------------------------------===//
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@@ -1687,6 +1730,8 @@ def CIR_TernaryOp : CIR_Op<"ternary", [
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`false` $falseRegion
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`)` `:` functional-type(operands, results) attr-dict
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}];
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -1790,6 +1835,20 @@ def CIR_GlobalOp : CIR_Op<"global", [
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"cir::GlobalLinkageKind::ExternalLinkage">:$linkage)>];
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let hasVerifier = 1;
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let isLLVMLoweringRecursive = true;
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let extraLLVMLoweringPatternDecl = [{
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mlir::LogicalResult matchAndRewriteRegionInitializedGlobal(
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cir::GlobalOp op, mlir::Attribute init,
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mlir::ConversionPatternRewriter &rewriter) const;
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void setupRegionInitializedLLVMGlobalOp(
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cir::GlobalOp op, mlir::ConversionPatternRewriter &rewriter) const;
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mutable mlir::LLVM::ComdatOp comdatOp = nullptr;
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mlir::SymbolRefAttr getComdatAttr(cir::GlobalOp &op,
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mlir::OpBuilder &builder) const;
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}];
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}
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//===----------------------------------------------------------------------===//
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@@ -2340,6 +2399,19 @@ def CIR_FuncOp : CIR_Op<"func", [
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let hasCustomAssemblyFormat = 1;
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let hasVerifier = 1;
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let extraLLVMLoweringPatternDecl = [{
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static mlir::StringRef getLinkageAttrNameString() { return "linkage"; }
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void lowerFuncAttributes(
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cir::FuncOp func, bool filterArgAndResAttrs,
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mlir::SmallVectorImpl<mlir::NamedAttribute> &result) const;
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mlir::LogicalResult
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matchAndRewriteAlias(cir::FuncOp op, llvm::StringRef aliasee, mlir::Type ty,
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OpAdaptor adaptor,
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mlir::ConversionPatternRewriter &rewriter) const;
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}];
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}
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//===----------------------------------------------------------------------===//
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@@ -2761,6 +2833,8 @@ class CIR_ArrayInitDestroy<string mnemonic> : CIR_Op<mnemonic> {
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regionBuilder($_builder, $_state.location);
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}]>
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];
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let hasLLVMLowering = false;
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}
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def CIR_ArrayCtor : CIR_ArrayInitDestroy<"array.ctor"> {
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@@ -3380,6 +3454,8 @@ def CIR_ComplexMulOp : CIR_Op<"complex.mul", [
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let assemblyFormat = [{
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$lhs `,` $rhs `range` `(` $range `)` `:` qualified(type($result)) attr-dict
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}];
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let hasLLVMLowering = false;
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}
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def CIR_ComplexDivOp : CIR_Op<"complex.div", [
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@@ -3422,6 +3498,8 @@ def CIR_ComplexDivOp : CIR_Op<"complex.div", [
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let assemblyFormat = [{
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$lhs `,` $rhs `range` `(` $range `)` `:` qualified(type($result)) attr-dict
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}];
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let hasLLVMLowering = false;
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}
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//===----------------------------------------------------------------------===//
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@@ -20,6 +20,10 @@ mlir_tablegen(CIROpsAttributes.h.inc -gen-attrdef-decls)
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mlir_tablegen(CIROpsAttributes.cpp.inc -gen-attrdef-defs)
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add_public_tablegen_target(MLIRCIREnumsGen)
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clang_tablegen(CIRLowering.inc -gen-cir-lowering
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SOURCE CIROps.td
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TARGET CIRLowering)
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set(LLVM_TARGET_DEFINITIONS CIRTypeConstraints.td)
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mlir_tablegen(CIRTypeConstraints.h.inc -gen-type-constraint-decls)
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mlir_tablegen(CIRTypeConstraints.cpp.inc -gen-type-constraint-defs)
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@@ -2463,87 +2463,11 @@ void ConvertCIRToLLVMPass::runOnOperation() {
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mlir::RewritePatternSet patterns(&getContext());
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patterns.add<CIRToLLVMReturnOpLowering>(patterns.getContext());
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// This could currently be merged with the group below, but it will get more
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// arguments later, so we'll keep it separate for now.
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patterns.add<CIRToLLVMAllocaOpLowering>(converter, patterns.getContext(), dl);
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patterns.add<CIRToLLVMLoadOpLowering>(converter, patterns.getContext(), dl);
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patterns.add<CIRToLLVMStoreOpLowering>(converter, patterns.getContext(), dl);
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patterns.add<CIRToLLVMGlobalOpLowering>(converter, patterns.getContext(), dl);
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patterns.add<CIRToLLVMCastOpLowering>(converter, patterns.getContext(), dl);
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patterns.add<CIRToLLVMPtrStrideOpLowering>(converter, patterns.getContext(),
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dl);
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patterns.add<CIRToLLVMInlineAsmOpLowering>(converter, patterns.getContext(),
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dl);
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patterns.add<
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// clang-format off
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CIRToLLVMACosOpLowering,
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CIRToLLVMASinOpLowering,
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CIRToLLVMAssumeOpLowering,
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CIRToLLVMAssumeAlignedOpLowering,
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CIRToLLVMAssumeSepStorageOpLowering,
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CIRToLLVMAtomicCmpXchgLowering,
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CIRToLLVMBaseClassAddrOpLowering,
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CIRToLLVMATanOpLowering,
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CIRToLLVMBinOpLowering,
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CIRToLLVMBitClrsbOpLowering,
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CIRToLLVMBitClzOpLowering,
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CIRToLLVMBitCtzOpLowering,
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CIRToLLVMBitFfsOpLowering,
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CIRToLLVMBitParityOpLowering,
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CIRToLLVMBitPopcountOpLowering,
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CIRToLLVMBitReverseOpLowering,
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CIRToLLVMBrCondOpLowering,
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CIRToLLVMBrOpLowering,
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CIRToLLVMByteSwapOpLowering,
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CIRToLLVMCallOpLowering,
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CIRToLLVMCmpOpLowering,
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CIRToLLVMComplexAddOpLowering,
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CIRToLLVMComplexCreateOpLowering,
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CIRToLLVMComplexImagOpLowering,
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CIRToLLVMComplexImagPtrOpLowering,
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CIRToLLVMComplexRealOpLowering,
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CIRToLLVMComplexRealPtrOpLowering,
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CIRToLLVMComplexSubOpLowering,
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CIRToLLVMCopyOpLowering,
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CIRToLLVMCosOpLowering,
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CIRToLLVMConstantOpLowering,
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CIRToLLVMExpectOpLowering,
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CIRToLLVMFAbsOpLowering,
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CIRToLLVMFrameAddrOpLowering,
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CIRToLLVMFuncOpLowering,
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CIRToLLVMGetBitfieldOpLowering,
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CIRToLLVMGetGlobalOpLowering,
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CIRToLLVMGetMemberOpLowering,
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CIRToLLVMReturnAddrOpLowering,
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CIRToLLVMRotateOpLowering,
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CIRToLLVMSelectOpLowering,
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CIRToLLVMSetBitfieldOpLowering,
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CIRToLLVMShiftOpLowering,
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CIRToLLVMStackRestoreOpLowering,
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CIRToLLVMStackSaveOpLowering,
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CIRToLLVMSwitchFlatOpLowering,
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CIRToLLVMThrowOpLowering,
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CIRToLLVMTrapOpLowering,
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CIRToLLVMUnaryOpLowering,
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CIRToLLVMUnreachableOpLowering,
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CIRToLLVMVAArgOpLowering,
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CIRToLLVMVAEndOpLowering,
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CIRToLLVMVAStartOpLowering,
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CIRToLLVMVecCmpOpLowering,
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CIRToLLVMVecCreateOpLowering,
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CIRToLLVMVecExtractOpLowering,
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CIRToLLVMVecInsertOpLowering,
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CIRToLLVMVecShuffleDynamicOpLowering,
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CIRToLLVMVecShuffleOpLowering,
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CIRToLLVMVecSplatOpLowering,
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CIRToLLVMVecTernaryOpLowering,
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CIRToLLVMVTableAddrPointOpLowering,
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CIRToLLVMVTableGetVPtrOpLowering,
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CIRToLLVMVTableGetVirtualFnAddrOpLowering,
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CIRToLLVMVTTAddrPointOpLowering
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// clang-format on
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>(converter, patterns.getContext());
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#define GET_LLVM_LOWERING_PATTERNS_LIST
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#include "clang/CIR/Dialect/IR/CIRLowering.inc"
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#undef GET_LLVM_LOWERING_PATTERNS_LIST
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>(converter, patterns.getContext(), dl);
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processCIRAttrs(module);
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@@ -34,801 +34,9 @@ void convertSideEffectForCall(mlir::Operation *callOp, bool isNothrow,
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mlir::LLVM::MemoryEffectsAttr &memoryEffect,
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bool &noUnwind, bool &willReturn);
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class CIRToLLVMAssumeOpLowering
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: public mlir::OpConversionPattern<cir::AssumeOp> {
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public:
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using mlir::OpConversionPattern<cir::AssumeOp>::OpConversionPattern;
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mlir::LogicalResult
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matchAndRewrite(cir::AssumeOp op, OpAdaptor,
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mlir::ConversionPatternRewriter &) const override;
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};
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class CIRToLLVMAssumeAlignedOpLowering
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: public mlir::OpConversionPattern<cir::AssumeAlignedOp> {
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public:
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using mlir::OpConversionPattern<cir::AssumeAlignedOp>::OpConversionPattern;
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mlir::LogicalResult
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matchAndRewrite(cir::AssumeAlignedOp op, OpAdaptor,
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mlir::ConversionPatternRewriter &) const override;
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};
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class CIRToLLVMAssumeSepStorageOpLowering
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: public mlir::OpConversionPattern<cir::AssumeSepStorageOp> {
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public:
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using mlir::OpConversionPattern<cir::AssumeSepStorageOp>::OpConversionPattern;
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mlir::LogicalResult
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matchAndRewrite(cir::AssumeSepStorageOp op, OpAdaptor,
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mlir::ConversionPatternRewriter &) const override;
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};
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class CIRToLLVMBitClrsbOpLowering
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: public mlir::OpConversionPattern<cir::BitClrsbOp> {
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public:
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using mlir::OpConversionPattern<cir::BitClrsbOp>::OpConversionPattern;
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mlir::LogicalResult
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matchAndRewrite(cir::BitClrsbOp op, OpAdaptor,
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mlir::ConversionPatternRewriter &) const override;
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};
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class CIRToLLVMBitClzOpLowering
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: public mlir::OpConversionPattern<cir::BitClzOp> {
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public:
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using mlir::OpConversionPattern<cir::BitClzOp>::OpConversionPattern;
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mlir::LogicalResult
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matchAndRewrite(cir::BitClzOp op, OpAdaptor,
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mlir::ConversionPatternRewriter &) const override;
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};
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class CIRToLLVMBitCtzOpLowering
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: public mlir::OpConversionPattern<cir::BitCtzOp> {
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public:
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using mlir::OpConversionPattern<cir::BitCtzOp>::OpConversionPattern;
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mlir::LogicalResult
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matchAndRewrite(cir::BitCtzOp op, OpAdaptor,
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mlir::ConversionPatternRewriter &) const override;
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};
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class CIRToLLVMBitFfsOpLowering
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: public mlir::OpConversionPattern<cir::BitFfsOp> {
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public:
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using mlir::OpConversionPattern<cir::BitFfsOp>::OpConversionPattern;
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mlir::LogicalResult
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matchAndRewrite(cir::BitFfsOp op, OpAdaptor,
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mlir::ConversionPatternRewriter &) const override;
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};
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class CIRToLLVMBitParityOpLowering
|
||||
: public mlir::OpConversionPattern<cir::BitParityOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::BitParityOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::BitParityOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMBitPopcountOpLowering
|
||||
: public mlir::OpConversionPattern<cir::BitPopcountOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::BitPopcountOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::BitPopcountOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMBitReverseOpLowering
|
||||
: public mlir::OpConversionPattern<cir::BitReverseOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::BitReverseOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::BitReverseOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMAtomicCmpXchgLowering
|
||||
: public mlir::OpConversionPattern<cir::AtomicCmpXchg> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::AtomicCmpXchg>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::AtomicCmpXchg op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMBrCondOpLowering
|
||||
: public mlir::OpConversionPattern<cir::BrCondOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::BrCondOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::BrCondOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMByteSwapOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ByteSwapOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ByteSwapOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ByteSwapOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMCastOpLowering : public mlir::OpConversionPattern<cir::CastOp> {
|
||||
mlir::DataLayout const &dataLayout;
|
||||
|
||||
mlir::Type convertTy(mlir::Type ty) const;
|
||||
|
||||
public:
|
||||
CIRToLLVMCastOpLowering(const mlir::TypeConverter &typeConverter,
|
||||
mlir::MLIRContext *context,
|
||||
mlir::DataLayout const &dataLayout)
|
||||
: OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::CastOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMCopyOpLowering : public mlir::OpConversionPattern<cir::CopyOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::CopyOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::CopyOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMCosOpLowering : public mlir::OpConversionPattern<cir::CosOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::CosOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::CosOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMExpectOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ExpectOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ExpectOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ExpectOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMReturnOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ReturnOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ReturnOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ReturnOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMRotateOpLowering
|
||||
: public mlir::OpConversionPattern<cir::RotateOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::RotateOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::RotateOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMCallOpLowering : public mlir::OpConversionPattern<cir::CallOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::CallOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::CallOp op, OpAdaptor adaptor,
|
||||
mlir::ConversionPatternRewriter &rewriter) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMReturnAddrOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ReturnAddrOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ReturnAddrOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ReturnAddrOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMFrameAddrOpLowering
|
||||
: public mlir::OpConversionPattern<cir::FrameAddrOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::FrameAddrOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::FrameAddrOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMAllocaOpLowering
|
||||
: public mlir::OpConversionPattern<cir::AllocaOp> {
|
||||
mlir::DataLayout const &dataLayout;
|
||||
|
||||
public:
|
||||
CIRToLLVMAllocaOpLowering(mlir::TypeConverter const &typeConverter,
|
||||
mlir::MLIRContext *context,
|
||||
mlir::DataLayout const &dataLayout)
|
||||
: OpConversionPattern<cir::AllocaOp>(typeConverter, context),
|
||||
dataLayout(dataLayout) {}
|
||||
|
||||
using mlir::OpConversionPattern<cir::AllocaOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::AllocaOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMLoadOpLowering : public mlir::OpConversionPattern<cir::LoadOp> {
|
||||
mlir::DataLayout const &dataLayout;
|
||||
|
||||
public:
|
||||
CIRToLLVMLoadOpLowering(const mlir::TypeConverter &typeConverter,
|
||||
mlir::MLIRContext *context,
|
||||
mlir::DataLayout const &dataLayout)
|
||||
: OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::LoadOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMStoreOpLowering
|
||||
: public mlir::OpConversionPattern<cir::StoreOp> {
|
||||
mlir::DataLayout const &dataLayout;
|
||||
|
||||
public:
|
||||
CIRToLLVMStoreOpLowering(const mlir::TypeConverter &typeConverter,
|
||||
mlir::MLIRContext *context,
|
||||
mlir::DataLayout const &dataLayout)
|
||||
: OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::StoreOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMConstantOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ConstantOp> {
|
||||
public:
|
||||
CIRToLLVMConstantOpLowering(const mlir::TypeConverter &typeConverter,
|
||||
mlir::MLIRContext *context)
|
||||
: OpConversionPattern(typeConverter, context) {
|
||||
setHasBoundedRewriteRecursion();
|
||||
}
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ConstantOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMFuncOpLowering : public mlir::OpConversionPattern<cir::FuncOp> {
|
||||
static mlir::StringRef getLinkageAttrNameString() { return "linkage"; }
|
||||
|
||||
void lowerFuncAttributes(
|
||||
cir::FuncOp func, bool filterArgAndResAttrs,
|
||||
mlir::SmallVectorImpl<mlir::NamedAttribute> &result) const;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewriteAlias(cir::FuncOp op, llvm::StringRef aliasee, mlir::Type ty,
|
||||
OpAdaptor adaptor,
|
||||
mlir::ConversionPatternRewriter &rewriter) const;
|
||||
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::FuncOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::FuncOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMSwitchFlatOpLowering
|
||||
: public mlir::OpConversionPattern<cir::SwitchFlatOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::SwitchFlatOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::SwitchFlatOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMGetGlobalOpLowering
|
||||
: public mlir::OpConversionPattern<cir::GetGlobalOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::GetGlobalOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::GetGlobalOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMGlobalOpLowering
|
||||
: public mlir::OpConversionPattern<cir::GlobalOp> {
|
||||
const mlir::DataLayout &dataLayout;
|
||||
|
||||
public:
|
||||
CIRToLLVMGlobalOpLowering(const mlir::TypeConverter &typeConverter,
|
||||
mlir::MLIRContext *context,
|
||||
const mlir::DataLayout &dataLayout)
|
||||
: OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {
|
||||
setHasBoundedRewriteRecursion();
|
||||
}
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::GlobalOp op, OpAdaptor adaptor,
|
||||
mlir::ConversionPatternRewriter &rewriter) const override;
|
||||
|
||||
private:
|
||||
mlir::LogicalResult matchAndRewriteRegionInitializedGlobal(
|
||||
cir::GlobalOp op, mlir::Attribute init,
|
||||
mlir::ConversionPatternRewriter &rewriter) const;
|
||||
|
||||
void setupRegionInitializedLLVMGlobalOp(
|
||||
cir::GlobalOp op, mlir::ConversionPatternRewriter &rewriter) const;
|
||||
|
||||
mutable mlir::LLVM::ComdatOp comdatOp = nullptr;
|
||||
mlir::SymbolRefAttr getComdatAttr(cir::GlobalOp &op,
|
||||
mlir::OpBuilder &builder) const;
|
||||
};
|
||||
|
||||
class CIRToLLVMUnaryOpLowering
|
||||
: public mlir::OpConversionPattern<cir::UnaryOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::UnaryOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::UnaryOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMBinOpLowering : public mlir::OpConversionPattern<cir::BinOp> {
|
||||
mlir::LLVM::IntegerOverflowFlags getIntOverflowFlag(cir::BinOp op) const;
|
||||
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::BinOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::BinOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMCmpOpLowering : public mlir::OpConversionPattern<cir::CmpOp> {
|
||||
public:
|
||||
CIRToLLVMCmpOpLowering(const mlir::TypeConverter &typeConverter,
|
||||
mlir::MLIRContext *context)
|
||||
: OpConversionPattern(typeConverter, context) {
|
||||
setHasBoundedRewriteRecursion();
|
||||
}
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::CmpOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMShiftOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ShiftOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ShiftOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ShiftOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMSelectOpLowering
|
||||
: public mlir::OpConversionPattern<cir::SelectOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::SelectOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::SelectOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMBrOpLowering : public mlir::OpConversionPattern<cir::BrOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::BrOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::BrOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMGetMemberOpLowering
|
||||
: public mlir::OpConversionPattern<cir::GetMemberOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::GetMemberOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::GetMemberOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMUnreachableOpLowering
|
||||
: public mlir::OpConversionPattern<cir::UnreachableOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::UnreachableOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::UnreachableOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMTrapOpLowering : public mlir::OpConversionPattern<cir::TrapOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::TrapOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::TrapOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMPtrStrideOpLowering
|
||||
: public mlir::OpConversionPattern<cir::PtrStrideOp> {
|
||||
mlir::DataLayout const &dataLayout;
|
||||
|
||||
public:
|
||||
CIRToLLVMPtrStrideOpLowering(const mlir::TypeConverter &typeConverter,
|
||||
mlir::MLIRContext *context,
|
||||
mlir::DataLayout const &dataLayout)
|
||||
: OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
|
||||
using mlir::OpConversionPattern<cir::PtrStrideOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::PtrStrideOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMBaseClassAddrOpLowering
|
||||
: public mlir::OpConversionPattern<cir::BaseClassAddrOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::BaseClassAddrOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::BaseClassAddrOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVTableAddrPointOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VTableAddrPointOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VTableAddrPointOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VTableAddrPointOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVTableGetVPtrOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VTableGetVPtrOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VTableGetVPtrOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VTableGetVPtrOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVTableGetVirtualFnAddrOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VTableGetVirtualFnAddrOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<
|
||||
cir::VTableGetVirtualFnAddrOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VTableGetVirtualFnAddrOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVTTAddrPointOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VTTAddrPointOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VTTAddrPointOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VTTAddrPointOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMStackSaveOpLowering
|
||||
: public mlir::OpConversionPattern<cir::StackSaveOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::StackSaveOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::StackSaveOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMStackRestoreOpLowering
|
||||
: public mlir::OpConversionPattern<cir::StackRestoreOp> {
|
||||
public:
|
||||
using OpConversionPattern<cir::StackRestoreOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::StackRestoreOp op, OpAdaptor adaptor,
|
||||
mlir::ConversionPatternRewriter &rewriter) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVecCreateOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VecCreateOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VecCreateOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VecCreateOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVecExtractOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VecExtractOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VecExtractOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VecExtractOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVecInsertOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VecInsertOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VecInsertOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VecInsertOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVecCmpOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VecCmpOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VecCmpOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VecCmpOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVecSplatOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VecSplatOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VecSplatOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VecSplatOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVecShuffleOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VecShuffleOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VecShuffleOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VecShuffleOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVecShuffleDynamicOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VecShuffleDynamicOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<
|
||||
cir::VecShuffleDynamicOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VecShuffleDynamicOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVecTernaryOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VecTernaryOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VecTernaryOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VecTernaryOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMComplexCreateOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ComplexCreateOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ComplexCreateOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ComplexCreateOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMComplexRealOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ComplexRealOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ComplexRealOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ComplexRealOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMComplexImagOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ComplexImagOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ComplexImagOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ComplexImagOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMComplexImagPtrOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ComplexImagPtrOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ComplexImagPtrOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ComplexImagPtrOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMComplexRealPtrOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ComplexRealPtrOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ComplexRealPtrOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ComplexRealPtrOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMComplexAddOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ComplexAddOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ComplexAddOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ComplexAddOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMComplexSubOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ComplexSubOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ComplexSubOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ComplexSubOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMSetBitfieldOpLowering
|
||||
: public mlir::OpConversionPattern<cir::SetBitfieldOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::SetBitfieldOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::SetBitfieldOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMGetBitfieldOpLowering
|
||||
: public mlir::OpConversionPattern<cir::GetBitfieldOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::GetBitfieldOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::GetBitfieldOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMFAbsOpLowering : public mlir::OpConversionPattern<cir::FAbsOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::FAbsOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::FAbsOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMACosOpLowering : public mlir::OpConversionPattern<cir::ACosOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ACosOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ACosOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMASinOpLowering : public mlir::OpConversionPattern<cir::ASinOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ASinOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ASinOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMATanOpLowering : public mlir::OpConversionPattern<cir::ATanOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ATanOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ATanOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMInlineAsmOpLowering
|
||||
: public mlir::OpConversionPattern<cir::InlineAsmOp> {
|
||||
mlir::DataLayout const &dataLayout;
|
||||
|
||||
public:
|
||||
CIRToLLVMInlineAsmOpLowering(const mlir::TypeConverter &typeConverter,
|
||||
mlir::MLIRContext *context,
|
||||
mlir::DataLayout const &dataLayout)
|
||||
: OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
|
||||
|
||||
using mlir::OpConversionPattern<cir::InlineAsmOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::InlineAsmOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMThrowOpLowering
|
||||
: public mlir::OpConversionPattern<cir::ThrowOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::ThrowOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::ThrowOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVAStartOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VAStartOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VAStartOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VAStartOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVAEndOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VAEndOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VAEndOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VAEndOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
|
||||
class CIRToLLVMVAArgOpLowering
|
||||
: public mlir::OpConversionPattern<cir::VAArgOp> {
|
||||
public:
|
||||
using mlir::OpConversionPattern<cir::VAArgOp>::OpConversionPattern;
|
||||
|
||||
mlir::LogicalResult
|
||||
matchAndRewrite(cir::VAArgOp op, OpAdaptor,
|
||||
mlir::ConversionPatternRewriter &) const override;
|
||||
};
|
||||
#define GET_LLVM_LOWERING_PATTERNS
|
||||
#include "clang/CIR/Dialect/IR/CIRLowering.inc"
|
||||
#undef GET_LLVM_LOWERING_PATTERNS
|
||||
|
||||
} // namespace direct
|
||||
} // namespace cir
|
||||
|
||||
125
clang/utils/TableGen/CIRLoweringEmitter.cpp
Normal file
125
clang/utils/TableGen/CIRLoweringEmitter.cpp
Normal file
@@ -0,0 +1,125 @@
|
||||
//===-- CIRLoweringEmitter.cpp - Generate CIR lowering patterns -----------===//
|
||||
//
|
||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||
// See https://llvm.org/LICENSE.txt for license information.
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
//
|
||||
// This TableGen backend emits CIR operation lowering patterns.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#include "TableGenBackends.h"
|
||||
#include "llvm/TableGen/TableGenBackend.h"
|
||||
#include <string>
|
||||
#include <utility>
|
||||
#include <vector>
|
||||
|
||||
using namespace llvm;
|
||||
using namespace clang;
|
||||
|
||||
namespace {
|
||||
std::vector<std::string> LLVMLoweringPatterns;
|
||||
std::vector<std::string> LLVMLoweringPatternsList;
|
||||
|
||||
// Adapted from mlir/lib/TableGen/Operator.cpp
|
||||
// Returns the C++ class name of the operation, which is the name of the
|
||||
// operation with the dialect prefix removed and the first underscore removed.
|
||||
// If the operation name starts with an underscore, the underscore is considered
|
||||
// part of the class name.
|
||||
std::string GetOpCppClassName(const Record *OpRecord) {
|
||||
StringRef Name = OpRecord->getName();
|
||||
StringRef Prefix;
|
||||
StringRef CppClassName;
|
||||
std::tie(Prefix, CppClassName) = Name.split('_');
|
||||
if (Prefix.empty()) {
|
||||
// Class name with a leading underscore and without dialect prefix
|
||||
return Name.str();
|
||||
}
|
||||
if (CppClassName.empty()) {
|
||||
// Class name without dialect prefix
|
||||
return Prefix.str();
|
||||
}
|
||||
|
||||
return CppClassName.str();
|
||||
}
|
||||
|
||||
std::string GetOpLLVMLoweringPatternName(llvm::StringRef OpName) {
|
||||
std::string Name = "CIRToLLVM";
|
||||
Name += OpName;
|
||||
Name += "Lowering";
|
||||
return Name;
|
||||
}
|
||||
|
||||
void GenerateLLVMLoweringPattern(llvm::StringRef OpName,
|
||||
llvm::StringRef PatternName, bool IsRecursive,
|
||||
llvm::StringRef ExtraDecl) {
|
||||
std::string CodeBuffer;
|
||||
llvm::raw_string_ostream Code(CodeBuffer);
|
||||
|
||||
Code << "class " << PatternName
|
||||
<< " : public mlir::OpConversionPattern<cir::" << OpName << "> {\n";
|
||||
Code << " [[maybe_unused]] mlir::DataLayout const &dataLayout;\n";
|
||||
Code << "\n";
|
||||
|
||||
Code << "public:\n";
|
||||
Code << " using mlir::OpConversionPattern<cir::" << OpName
|
||||
<< ">::OpConversionPattern;\n";
|
||||
|
||||
Code << " " << PatternName
|
||||
<< "(mlir::TypeConverter const "
|
||||
"&typeConverter, mlir::MLIRContext *context, mlir::DataLayout const "
|
||||
"&dataLayout)\n";
|
||||
Code << " : OpConversionPattern<cir::" << OpName
|
||||
<< ">(typeConverter, context), dataLayout(dataLayout)";
|
||||
if (IsRecursive) {
|
||||
Code << " {\n";
|
||||
Code << " setHasBoundedRewriteRecursion();\n";
|
||||
Code << " }\n";
|
||||
} else {
|
||||
Code << " {}\n";
|
||||
}
|
||||
|
||||
Code << "\n";
|
||||
|
||||
Code << " mlir::LogicalResult matchAndRewrite(cir::" << OpName
|
||||
<< " op, OpAdaptor adaptor, mlir::ConversionPatternRewriter &rewriter) "
|
||||
"const override;\n";
|
||||
|
||||
if (!ExtraDecl.empty()) {
|
||||
Code << "\nprivate:\n";
|
||||
Code << ExtraDecl << "\n";
|
||||
}
|
||||
|
||||
Code << "};\n";
|
||||
|
||||
LLVMLoweringPatterns.push_back(std::move(CodeBuffer));
|
||||
}
|
||||
|
||||
void Generate(const Record *OpRecord) {
|
||||
std::string OpName = GetOpCppClassName(OpRecord);
|
||||
|
||||
if (OpRecord->getValueAsBit("hasLLVMLowering")) {
|
||||
std::string PatternName = GetOpLLVMLoweringPatternName(OpName);
|
||||
bool IsRecursive = OpRecord->getValueAsBit("isLLVMLoweringRecursive");
|
||||
llvm::StringRef ExtraDecl =
|
||||
OpRecord->getValueAsString("extraLLVMLoweringPatternDecl");
|
||||
|
||||
GenerateLLVMLoweringPattern(OpName, PatternName, IsRecursive, ExtraDecl);
|
||||
LLVMLoweringPatternsList.push_back(std::move(PatternName));
|
||||
}
|
||||
}
|
||||
} // namespace
|
||||
|
||||
void clang::EmitCIRLowering(const llvm::RecordKeeper &RK,
|
||||
llvm::raw_ostream &OS) {
|
||||
emitSourceFileHeader("Lowering patterns for CIR operations", OS);
|
||||
for (const auto *OpRecord : RK.getAllDerivedDefinitions("CIR_Op"))
|
||||
Generate(OpRecord);
|
||||
|
||||
OS << "#ifdef GET_LLVM_LOWERING_PATTERNS\n"
|
||||
<< llvm::join(LLVMLoweringPatterns, "\n") << "#endif\n\n";
|
||||
OS << "#ifdef GET_LLVM_LOWERING_PATTERNS_LIST\n"
|
||||
<< llvm::join(LLVMLoweringPatternsList, ",\n") << "\n#endif\n\n";
|
||||
}
|
||||
@@ -4,6 +4,7 @@ add_tablegen(clang-tblgen CLANG
|
||||
DESTINATION "${CLANG_TOOLS_INSTALL_DIR}"
|
||||
EXPORT Clang
|
||||
ASTTableGen.cpp
|
||||
CIRLoweringEmitter.cpp
|
||||
ClangASTNodesEmitter.cpp
|
||||
ClangASTPropertiesEmitter.cpp
|
||||
ClangAttrEmitter.cpp
|
||||
|
||||
@@ -25,6 +25,7 @@ using namespace clang;
|
||||
enum ActionType {
|
||||
PrintRecords,
|
||||
DumpJSON,
|
||||
GenCIRLowering,
|
||||
GenClangAttrClasses,
|
||||
GenClangAttrParserStringSwitches,
|
||||
GenClangAttrSubjectMatchRulesParserStringSwitches,
|
||||
@@ -128,6 +129,8 @@ cl::opt<ActionType> Action(
|
||||
"Print all records to stdout (default)"),
|
||||
clEnumValN(DumpJSON, "dump-json",
|
||||
"Dump all records as machine-readable JSON"),
|
||||
clEnumValN(GenCIRLowering, "gen-cir-lowering",
|
||||
"Generate CIR operation lowering patterns"),
|
||||
clEnumValN(GenClangAttrClasses, "gen-clang-attr-classes",
|
||||
"Generate clang attribute clases"),
|
||||
clEnumValN(GenClangAttrParserStringSwitches,
|
||||
@@ -354,6 +357,9 @@ bool ClangTableGenMain(raw_ostream &OS, const RecordKeeper &Records) {
|
||||
case DumpJSON:
|
||||
EmitJSON(Records, OS);
|
||||
break;
|
||||
case GenCIRLowering:
|
||||
EmitCIRLowering(Records, OS);
|
||||
break;
|
||||
case GenClangAttrClasses:
|
||||
EmitClangAttrClass(Records, OS);
|
||||
break;
|
||||
|
||||
@@ -24,6 +24,7 @@ class RecordKeeper;
|
||||
|
||||
namespace clang {
|
||||
|
||||
void EmitCIRLowering(const llvm::RecordKeeper &RK, llvm::raw_ostream &OS);
|
||||
void EmitClangDeclContext(const llvm::RecordKeeper &RK, llvm::raw_ostream &OS);
|
||||
/**
|
||||
@param PriorizeIfSubclassOf These classes should be prioritized in the output.
|
||||
|
||||
Reference in New Issue
Block a user