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[mlir][sparse] implement direct IR alloc/empty/new for non-permutations (#72585)
This change implements the correct *level* sizes set up for the direct IR codegen fields in the sparse storage scheme. This brings libgen and codegen together again. This is step 3 out of 3 to make sparse_tensor.new work for BSR
This commit is contained in:
Aart Bik
GitHub
@@ -1,4 +1,4 @@
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//===- File.h - Reading sparse tensors from files --------------*- C++ -*-===//
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//===- File.h - Reading sparse tensors from files ---------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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@@ -159,41 +159,46 @@ static Value createAllocation(OpBuilder &builder, Location loc,
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return buffer;
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}
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/// Creates the dim sizes array, filling in from dynamic sizes.
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static void createDimSizes(OpBuilder &builder, Location loc,
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SparseTensorType stt, ValueRange dynSizes,
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/*out*/ SmallVectorImpl<Value> &dimSizesValues) {
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const Dimension dimRank = stt.getDimRank();
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dimSizesValues.clear();
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dimSizesValues.reserve(dimRank);
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unsigned i = 0;
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for (const Size sz : stt.getDimShape())
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dimSizesValues.push_back(ShapedType::isDynamic(sz)
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? dynSizes[i++]
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: constantIndex(builder, loc, sz));
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}
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/// Creates allocation for each field in sparse tensor type. Note that
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/// for all dynamic memrefs in the sparse tensor stroage layout, the
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/// memory size is really the capacity of the "vector", while the actual
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/// size resides in the sizes array.
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static void createAllocFields(OpBuilder &builder, Location loc,
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SparseTensorType stt, ValueRange dynSizes,
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bool enableInit, SmallVectorImpl<Value> &fields,
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Value sizeHint) {
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// Build original sizes.
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assert((dynSizes.size() == static_cast<size_t>(stt.getNumDynamicDims())) &&
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"Got wrong number of dynamic sizes");
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const Dimension dimRank = stt.getDimRank();
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SmallVector<Value> dimSizes;
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dimSizes.reserve(dimRank);
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unsigned i = 0; // cumulative index into `dynSizes`.
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for (const Size sh : stt.getDimShape())
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dimSizes.push_back(ShapedType::isDynamic(sh)
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? dynSizes[i++]
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: constantIndex(builder, loc, sh));
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SparseTensorType stt, bool enableInit,
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Value sizeHint,
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SmallVectorImpl<Value> &lvlSizesValues,
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/*out*/ SmallVectorImpl<Value> &fields) {
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Level lvlRank = stt.getLvlRank();
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// Set up some heuristic sizes. We try to set the initial
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// size based on available information. Otherwise we just
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// initialize a few elements to start the reallocation chain.
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// TODO: refine this
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Value posHeuristic, crdHeuristic, valHeuristic;
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if (stt.isAllDense()) {
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valHeuristic = dimSizes[0];
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for (const Value sz : ArrayRef<Value>{dimSizes}.drop_front())
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valHeuristic = builder.create<arith::MulIOp>(loc, valHeuristic, sz);
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valHeuristic = lvlSizesValues[0];
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for (Level lvl = 1; lvl < lvlRank; lvl++)
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valHeuristic =
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builder.create<arith::MulIOp>(loc, valHeuristic, lvlSizesValues[lvl]);
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} else if (sizeHint) {
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if (getCOOStart(stt.getEncoding()) == 0) {
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posHeuristic = constantIndex(builder, loc, 2);
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crdHeuristic = builder.create<arith::MulIOp>(
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loc, constantIndex(builder, loc, dimRank), sizeHint); // AOS
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} else if (dimRank == 2 && stt.isDenseLvl(0) && stt.isCompressedLvl(1)) {
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loc, constantIndex(builder, loc, lvlRank), sizeHint); // AOS
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} else if (lvlRank == 2 && stt.isDenseLvl(0) && stt.isCompressedLvl(1)) {
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posHeuristic = builder.create<arith::AddIOp>(
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loc, sizeHint, constantIndex(builder, loc, 1));
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crdHeuristic = sizeHint;
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@@ -205,7 +210,6 @@ static void createAllocFields(OpBuilder &builder, Location loc,
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posHeuristic = crdHeuristic = valHeuristic =
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constantIndex(builder, loc, 16);
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}
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// Initializes all fields. An initial storage specifier and allocated
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// positions/coordinates/values memrefs (with heuristic capacity).
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foreachFieldAndTypeInSparseTensor(
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@@ -237,16 +241,13 @@ static void createAllocFields(OpBuilder &builder, Location loc,
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// Returns true to continue the iteration.
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return true;
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});
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// Initialize the storage scheme to an empty tensor. Sets the lvlSizes
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// and gives all position fields an initial zero entry, so that it is
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// easier to maintain the "linear + 1" length property.
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MutSparseTensorDescriptor desc(stt, fields);
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Value posZero = constantZero(builder, loc, stt.getPosType());
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for (Level lvl = 0, lvlRank = stt.getLvlRank(); lvl < lvlRank; lvl++) {
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// FIXME: `toOrigDim` is deprecated.
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desc.setLvlSize(builder, loc, lvl,
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dimSizes[toOrigDim(stt.getEncoding(), lvl)]);
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desc.setLvlSize(builder, loc, lvl, lvlSizesValues[lvl]);
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const auto dlt = stt.getLvlType(lvl);
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if (isCompressedDLT(dlt) || isLooseCompressedDLT(dlt))
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createPushback(builder, loc, desc, SparseTensorFieldKind::PosMemRef, lvl,
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@@ -371,8 +372,8 @@ static void genEndInsert(OpBuilder &builder, Location loc,
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SparseTensorDescriptor desc) {
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const SparseTensorType stt(desc.getRankedTensorType());
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const Level lvlRank = stt.getLvlRank();
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for (Level l = 0; l < lvlRank; l++) {
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const auto dlt = stt.getLvlType(l);
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for (Level lvl = 0; lvl < lvlRank; lvl++) {
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const auto dlt = stt.getLvlType(lvl);
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if (isCompressedDLT(dlt)) {
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// Compressed dimensions need a position cleanup for all entries
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// that were not visited during the insertion pass.
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@@ -380,10 +381,10 @@ static void genEndInsert(OpBuilder &builder, Location loc,
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// TODO: avoid cleanup and keep compressed scheme consistent at all
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// times?
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//
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if (l > 0) {
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if (lvl > 0) {
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Type posType = stt.getPosType();
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Value posMemRef = desc.getPosMemRef(l);
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Value hi = desc.getPosMemSize(builder, loc, l);
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Value posMemRef = desc.getPosMemRef(lvl);
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Value hi = desc.getPosMemSize(builder, loc, lvl);
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Value zero = constantIndex(builder, loc, 0);
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Value one = constantIndex(builder, loc, 1);
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// Vector of only one, but needed by createFor's prototype.
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@@ -729,7 +730,6 @@ public:
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};
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/// Sparse codegen rule for the alloc operator.
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/// TODO(springerm): remove when bufferization.alloc_tensor is gone
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class SparseTensorAllocConverter
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: public OpConversionPattern<bufferization::AllocTensorOp> {
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public:
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@@ -746,6 +746,8 @@ public:
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if (!resType.hasEncoding())
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return failure();
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Location loc = op.getLoc();
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// Deal with copy.
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if (op.getCopy()) {
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auto desc = getDescriptorFromTensorTuple(adaptor.getCopy());
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SmallVector<Value> fields;
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@@ -766,17 +768,22 @@ public:
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return success();
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}
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// Construct the dim/lvl sizes and the (unused) dim2lvl/lvl2dim buffers.
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SmallVector<Value> dimSizesValues;
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SmallVector<Value> lvlSizesValues;
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Value dimSizesBuffer;
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Value dim2lvlBuffer;
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Value lvl2dimBuffer;
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createDimSizes(rewriter, loc, resType, adaptor.getDynamicSizes(),
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dimSizesValues);
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genMapBuffers(rewriter, loc, resType, dimSizesValues, dimSizesBuffer,
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lvlSizesValues, dim2lvlBuffer, lvl2dimBuffer);
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// Construct allocation for each field.
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Value sizeHint = op.getSizeHint();
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ValueRange dynSizes = adaptor.getDynamicSizes();
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const size_t found = dynSizes.size();
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const int64_t expected = resType.getNumDynamicDims();
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if (found != static_cast<size_t>(expected))
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return rewriter.notifyMatchFailure(op,
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"Got wrong number of dynamic sizes");
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SmallVector<Value> fields;
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createAllocFields(rewriter, loc, resType, dynSizes,
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enableBufferInitialization, fields, sizeHint);
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createAllocFields(rewriter, loc, resType, enableBufferInitialization,
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sizeHint, lvlSizesValues, fields);
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// Replace operation with resulting memrefs.
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rewriter.replaceOp(op, genTuple(rewriter, loc, resType, fields));
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@@ -788,7 +795,6 @@ private:
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};
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/// Sparse codegen rule for the empty tensor operator.
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/// TODO(springerm): remove when bufferization.alloc_tensor is gone
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class SparseTensorEmptyConverter : public OpConversionPattern<tensor::EmptyOp> {
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public:
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using OpConversionPattern::OpConversionPattern;
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@@ -803,19 +809,24 @@ public:
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const auto resType = getSparseTensorType(op);
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if (!resType.hasEncoding())
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return failure();
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Location loc = op.getLoc();
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// Construct the dim/lvl sizes and the (unused) dim2lvl/lvl2dim buffers.
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SmallVector<Value> dimSizesValues;
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SmallVector<Value> lvlSizesValues;
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Value dimSizesBuffer;
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Value dim2lvlBuffer;
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Value lvl2dimBuffer;
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createDimSizes(rewriter, loc, resType, adaptor.getDynamicSizes(),
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dimSizesValues);
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genMapBuffers(rewriter, loc, resType, dimSizesValues, dimSizesBuffer,
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lvlSizesValues, dim2lvlBuffer, lvl2dimBuffer);
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// Construct allocation for each field.
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Location loc = op.getLoc();
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Value sizeHint; // none
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const ValueRange dynSizes = adaptor.getDynamicSizes();
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const size_t found = dynSizes.size();
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const int64_t expected = resType.getNumDynamicDims();
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if (found != static_cast<size_t>(expected))
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return rewriter.notifyMatchFailure(op,
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"Got wrong number of dynamic sizes");
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SmallVector<Value> fields;
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createAllocFields(rewriter, loc, resType, dynSizes,
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enableBufferInitialization, fields, sizeHint);
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createAllocFields(rewriter, loc, resType, enableBufferInitialization,
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sizeHint, lvlSizesValues, fields);
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// Replace operation with resulting memrefs.
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rewriter.replaceOp(op, genTuple(rewriter, loc, resType, fields));
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@@ -1461,10 +1472,10 @@ struct SparseNewConverter : public OpConversionPattern<NewOp> {
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// if (! %isSorted) sparse_tensor.sort_coo(%nse, %coordinates, %values)
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// update storage specifier
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// @delSparseTensorReader(%reader)
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SmallVector<Value> dimShapesValues;
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SmallVector<Value> dimSizesValues;
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Value dimSizesBuffer;
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Value reader = genReader(rewriter, loc, dstTp, adaptor.getOperands()[0],
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dimShapesValues, dimSizesBuffer);
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dimSizesValues, dimSizesBuffer);
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// Get the number of stored entries.
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const Type indexTp = rewriter.getIndexType();
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@@ -1472,25 +1483,19 @@ struct SparseNewConverter : public OpConversionPattern<NewOp> {
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{indexTp}, {reader}, EmitCInterface::Off)
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.getResult(0);
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// Construct allocation for each field.
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SmallVector<Value> dynSizes;
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if (dstTp.hasDynamicDimShape()) {
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for (const auto &d : llvm::enumerate(dstTp.getDimShape()))
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if (ShapedType::isDynamic(d.value()))
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dynSizes.push_back(rewriter.create<memref::LoadOp>(
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loc, dimSizesBuffer, constantIndex(rewriter, loc, d.index())));
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}
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SmallVector<Value> fields;
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createAllocFields(rewriter, loc, dstTp, dynSizes, /*enableInit=*/false,
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fields, nse);
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// Now construct the lvl sizes and the dim2lvl/lvl2dim buffers.
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// Construct the lvl sizes and the dim2lvl/lvl2dim buffers.
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SmallVector<Value> lvlSizesValues;
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Value dim2lvlBuffer;
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Value lvl2dimBuffer;
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genMapBuffers(rewriter, loc, dstTp, dimShapesValues, dimSizesBuffer,
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genMapBuffers(rewriter, loc, dstTp, dimSizesValues, dimSizesBuffer,
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lvlSizesValues, dim2lvlBuffer, lvl2dimBuffer);
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// Construct allocation for each field.
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Value sizeHint = nse;
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SmallVector<Value> fields;
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createAllocFields(rewriter, loc, dstTp, /*enableInit=*/false, sizeHint,
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lvlSizesValues, fields);
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// Read the COO tensor data.
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MutSparseTensorDescriptor desc(dstTp, fields);
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Value xs = desc.getAOSMemRef();
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@@ -252,7 +252,7 @@ func.func @sparse_values_coo(%arg0: tensor<?x?x?xf64, #ccoo>) -> memref<?xf64> {
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}
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// CHECK-LABEL: func.func @sparse_indices_coo(
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// CHECK-LABEL: func.func @sparse_indices_coo(
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// CHECK-SAME: %[[A0:.*0]]: memref<?xindex>,
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// CHECK-SAME: %[[A1:.*1]]: memref<?xindex>,
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// CHECK-SAME: %[[A2:.*2]]: memref<?xindex>,
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@@ -270,7 +270,7 @@ func.func @sparse_indices_coo(%arg0: tensor<?x?x?xf64, #ccoo>) -> memref<?xindex
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return %0 : memref<?xindex, strided<[?], offset: ?>>
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}
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// CHECK-LABEL: func.func @sparse_indices_buffer_coo(
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// CHECK-LABEL: func.func @sparse_indices_buffer_coo(
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// CHECK-SAME: %[[A0:.*0]]: memref<?xindex>,
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// CHECK-SAME: %[[A1:.*1]]: memref<?xindex>,
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// CHECK-SAME: %[[A2:.*2]]: memref<?xindex>,
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@@ -676,26 +676,26 @@ func.func @sparse_convert_element_type(%arg0: tensor<32xf32, #SparseVector>) ->
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// CHECK: memref.store %[[VAL_4]], %[[VAL_6]]{{\[}}%[[VAL_3]]] : memref<2xindex>
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// CHECK: %[[VAL_8:.*]] = call @createCheckedSparseTensorReader(%[[A0]], %[[VAL_7]], %[[VAL_2]]) : (!llvm.ptr, memref<?xindex>, i32) -> !llvm.ptr
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// CHECK: %[[VAL_9:.*]] = call @getSparseTensorReaderDimSizes(%[[VAL_8]]) : (!llvm.ptr) -> memref<?xindex>
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// CHECK: %[[VAL_10:.*]] = call @getSparseTensorReaderNSE(%[[VAL_8]]) : (!llvm.ptr) -> index
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// CHECK: %[[VAL_11:.*]] = memref.load %[[VAL_9]]{{\[}}%[[VAL_4]]] : memref<?xindex>
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// CHECK: %[[VAL_12:.*]] = memref.load %[[VAL_9]]{{\[}}%[[VAL_3]]] : memref<?xindex>
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// CHECK: %[[VAL_13:.*]] = arith.muli %[[VAL_10]], %[[VAL_5]] : index
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// CHECK: %[[VAL_14:.*]] = memref.alloc() : memref<2xindex>
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// CHECK: %[[VAL_15:.*]] = memref.cast %[[VAL_14]] : memref<2xindex> to memref<?xindex>
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// CHECK: %[[VAL_16:.*]] = memref.alloc(%[[VAL_13]]) : memref<?xindex>
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// CHECK: %[[VAL_17:.*]] = memref.alloc(%[[VAL_10]]) : memref<?xf32>
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// CHECK: %[[VAL_18:.*]] = sparse_tensor.storage_specifier.init
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// CHECK: %[[VAL_19:.*]] = sparse_tensor.storage_specifier.set %[[VAL_18]] lvl_sz at 0 with %[[VAL_11]]
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// CHECK: %[[VAL_20:.*]] = sparse_tensor.storage_specifier.get %[[VAL_19]] pos_mem_sz at 0
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// CHECK: %[[VAL_21:.*]], %[[VAL_22:.*]] = sparse_tensor.push_back %[[VAL_20]], %[[VAL_15]], %[[VAL_4]]
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// CHECK: %[[VAL_23:.*]] = sparse_tensor.storage_specifier.set %[[VAL_19]] pos_mem_sz at 0 with %[[VAL_22]]
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// CHECK: %[[VAL_24:.*]] = sparse_tensor.storage_specifier.set %[[VAL_23]] lvl_sz at 1 with %[[VAL_12]]
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// CHECK: %[[VAL_25:.*]], %[[VAL_26:.*]] = sparse_tensor.push_back %[[VAL_22]], %[[VAL_21]], %[[VAL_4]], %[[VAL_3]]
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// CHECK: %[[VAL_27:.*]] = sparse_tensor.storage_specifier.set %[[VAL_24]] pos_mem_sz at 0 with %[[VAL_26]]
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// CHECK: %[[VAL_28:.*]] = memref.alloca() : memref<2xindex>
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// CHECK: %[[VAL_29:.*]] = memref.cast %[[VAL_28]] : memref<2xindex> to memref<?xindex>
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// CHECK: memref.store %[[VAL_4]], %[[VAL_28]]{{\[}}%[[VAL_4]]] : memref<2xindex>
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// CHECK: memref.store %[[VAL_3]], %[[VAL_28]]{{\[}}%[[VAL_3]]] : memref<2xindex>
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// CHECK-DAG: %[[VAL_10:.*]] = call @getSparseTensorReaderNSE(%[[VAL_8]]) : (!llvm.ptr) -> index
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// CHECK-DAG: %[[VAL_11:.*]] = memref.load %[[VAL_9]]{{\[}}%[[VAL_4]]] : memref<?xindex>
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// CHECK-DAG: %[[VAL_12:.*]] = memref.load %[[VAL_9]]{{\[}}%[[VAL_3]]] : memref<?xindex>
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// CHECK-DAG: %[[VAL_13:.*]] = arith.muli %[[VAL_10]], %[[VAL_5]] : index
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// CHECK-DAG: %[[VAL_14:.*]] = memref.alloc() : memref<2xindex>
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// CHECK-DAG: %[[VAL_15:.*]] = memref.cast %[[VAL_14]] : memref<2xindex> to memref<?xindex>
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// CHECK-DAG: %[[VAL_16:.*]] = memref.alloc(%[[VAL_13]]) : memref<?xindex>
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// CHECK-DAG: %[[VAL_17:.*]] = memref.alloc(%[[VAL_10]]) : memref<?xf32>
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// CHECK-DAG: %[[VAL_18:.*]] = sparse_tensor.storage_specifier.init
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// CHECK-DAG: %[[VAL_19:.*]] = sparse_tensor.storage_specifier.set %[[VAL_18]] lvl_sz at 0 with %[[VAL_11]]
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// CHECK-DAG: %[[VAL_20:.*]] = sparse_tensor.storage_specifier.get %[[VAL_19]] pos_mem_sz at 0
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// CHECK-DAG: %[[VAL_21:.*]], %[[VAL_22:.*]] = sparse_tensor.push_back %[[VAL_20]], %[[VAL_15]], %[[VAL_4]]
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// CHECK-DAG: %[[VAL_23:.*]] = sparse_tensor.storage_specifier.set %[[VAL_19]] pos_mem_sz at 0 with %[[VAL_22]]
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// CHECK-DAG: %[[VAL_24:.*]] = sparse_tensor.storage_specifier.set %[[VAL_23]] lvl_sz at 1 with %[[VAL_12]]
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// CHECK-DAG: %[[VAL_25:.*]], %[[VAL_26:.*]] = sparse_tensor.push_back %[[VAL_22]], %[[VAL_21]], %[[VAL_4]], %[[VAL_3]]
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// CHECK-DAG: %[[VAL_27:.*]] = sparse_tensor.storage_specifier.set %[[VAL_24]] pos_mem_sz at 0 with %[[VAL_26]]
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// CHECK-DAG: %[[VAL_28:.*]] = memref.alloca() : memref<2xindex>
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// CHECK-DAG: %[[VAL_29:.*]] = memref.cast %[[VAL_28]] : memref<2xindex> to memref<?xindex>
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// CHECK-DAG: memref.store %[[VAL_4]], %[[VAL_28]]{{\[}}%[[VAL_4]]] : memref<2xindex>
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// CHECK-DAG: memref.store %[[VAL_3]], %[[VAL_28]]{{\[}}%[[VAL_3]]] : memref<2xindex>
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// CHECK: %[[VAL_30:.*]] = call @getSparseTensorReaderReadToBuffers0F32(%[[VAL_8]], %[[VAL_29]], %[[VAL_29]], %[[VAL_16]], %[[VAL_17]]) : (!llvm.ptr, memref<?xindex>, memref<?xindex>, memref<?xindex>, memref<?xf32>) -> i1
|
||||
// CHECK: %[[VAL_31:.*]] = arith.cmpi eq, %[[VAL_30]], %[[VAL_1]] : i1
|
||||
// CHECK: scf.if %[[VAL_31]] {
|
||||
@@ -722,31 +722,31 @@ func.func @sparse_new_coo(%arg0: !llvm.ptr) -> tensor<?x?xf32, #Coo> {
|
||||
// CHECK: memref.store %[[VAL_3]], %[[VAL_5]]{{\[}}%[[VAL_3]]] : memref<2xindex>
|
||||
// CHECK: memref.store %[[VAL_3]], %[[VAL_5]]{{\[}}%[[VAL_2]]] : memref<2xindex>
|
||||
// CHECK: %[[VAL_7:.*]] = call @createCheckedSparseTensorReader(%[[A0]], %[[VAL_6]], %[[VAL_1]]) : (!llvm.ptr, memref<?xindex>, i32) -> !llvm.ptr
|
||||
// CHECK: %[[VAL_8:.*]] = call @getSparseTensorReaderDimSizes(%[[VAL_7]]) : (!llvm.ptr) -> memref<?xindex>
|
||||
// CHECK: %[[VAL_9:.*]] = call @getSparseTensorReaderNSE(%[[VAL_7]]) : (!llvm.ptr) -> index
|
||||
// CHECK: %[[VAL_10:.*]] = memref.load %[[VAL_8]]{{\[}}%[[VAL_3]]] : memref<?xindex>
|
||||
// CHECK: %[[VAL_11:.*]] = memref.load %[[VAL_8]]{{\[}}%[[VAL_2]]] : memref<?xindex>
|
||||
// CHECK: %[[VAL_12:.*]] = arith.muli %[[VAL_9]], %[[VAL_4]] : index
|
||||
// CHECK: %[[VAL_13:.*]] = memref.alloc() : memref<2xindex>
|
||||
// CHECK: %[[VAL_14:.*]] = memref.cast %[[VAL_13]] : memref<2xindex> to memref<?xindex>
|
||||
// CHECK: %[[VAL_15:.*]] = memref.alloc(%[[VAL_12]]) : memref<?xindex>
|
||||
// CHECK: %[[VAL_16:.*]] = memref.alloc(%[[VAL_9]]) : memref<?xf32>
|
||||
// CHECK: %[[VAL_17:.*]] = sparse_tensor.storage_specifier.init
|
||||
// CHECK: %[[VAL_18:.*]] = sparse_tensor.storage_specifier.set %[[VAL_17]] lvl_sz at 0 with %[[VAL_11]]
|
||||
// CHECK: %[[VAL_19:.*]] = sparse_tensor.storage_specifier.get %[[VAL_18]] pos_mem_sz at 0
|
||||
// CHECK: %[[VAL_20:.*]], %[[VAL_21:.*]] = sparse_tensor.push_back %[[VAL_19]], %[[VAL_14]], %[[VAL_3]]
|
||||
// CHECK: %[[VAL_22:.*]] = sparse_tensor.storage_specifier.set %[[VAL_18]] pos_mem_sz at 0 with %[[VAL_21]]
|
||||
// CHECK: %[[VAL_23:.*]] = sparse_tensor.storage_specifier.set %[[VAL_22]] lvl_sz at 1 with %[[VAL_10]]
|
||||
// CHECK: %[[VAL_24:.*]], %[[VAL_25:.*]] = sparse_tensor.push_back %[[VAL_21]], %[[VAL_20]], %[[VAL_3]], %[[VAL_2]]
|
||||
// CHECK: %[[VAL_26:.*]] = sparse_tensor.storage_specifier.set %[[VAL_23]] pos_mem_sz at 0 with %[[VAL_25]]
|
||||
// CHECK: %[[VAL_27:.*]] = memref.alloca() : memref<2xindex>
|
||||
// CHECK: %[[VAL_28:.*]] = memref.cast %[[VAL_27]] : memref<2xindex> to memref<?xindex>
|
||||
// CHECK: memref.store %[[VAL_2]], %[[VAL_27]]{{\[}}%[[VAL_3]]] : memref<2xindex>
|
||||
// CHECK: memref.store %[[VAL_3]], %[[VAL_27]]{{\[}}%[[VAL_2]]] : memref<2xindex>
|
||||
// CHECK: %[[VAL_29:.*]] = memref.alloca() : memref<2xindex>
|
||||
// CHECK: %[[VAL_30:.*]] = memref.cast %[[VAL_29]] : memref<2xindex> to memref<?xindex>
|
||||
// CHECK: memref.store %[[VAL_2]], %[[VAL_29]]{{\[}}%[[VAL_3]]] : memref<2xindex>
|
||||
// CHECK: memref.store %[[VAL_3]], %[[VAL_29]]{{\[}}%[[VAL_2]]] : memref<2xindex>
|
||||
// CHECK-DAG: %[[VAL_8:.*]] = call @getSparseTensorReaderDimSizes(%[[VAL_7]]) : (!llvm.ptr) -> memref<?xindex>
|
||||
// CHECK-DAG: %[[VAL_9:.*]] = call @getSparseTensorReaderNSE(%[[VAL_7]]) : (!llvm.ptr) -> index
|
||||
// CHECK-DAG: %[[VAL_10:.*]] = memref.load %[[VAL_8]]{{\[}}%[[VAL_3]]] : memref<?xindex>
|
||||
// CHECK-DAG: %[[VAL_11:.*]] = memref.load %[[VAL_8]]{{\[}}%[[VAL_2]]] : memref<?xindex>
|
||||
// CHECK-DAG: %[[VAL_12:.*]] = arith.muli %[[VAL_9]], %[[VAL_4]] : index
|
||||
// CHECK-DAG: %[[VAL_13:.*]] = memref.alloc() : memref<2xindex>
|
||||
// CHECK-DAG: %[[VAL_14:.*]] = memref.cast %[[VAL_13]] : memref<2xindex> to memref<?xindex>
|
||||
// CHECK-DAG: %[[VAL_15:.*]] = memref.alloc(%[[VAL_12]]) : memref<?xindex>
|
||||
// CHECK-DAG: %[[VAL_16:.*]] = memref.alloc(%[[VAL_9]]) : memref<?xf32>
|
||||
// CHECK-DAG: %[[VAL_17:.*]] = sparse_tensor.storage_specifier.init
|
||||
// CHECK-DAG: %[[VAL_18:.*]] = sparse_tensor.storage_specifier.set %[[VAL_17]] lvl_sz at 0 with %[[VAL_11]]
|
||||
// CHECK-DAG: %[[VAL_19:.*]] = sparse_tensor.storage_specifier.get %[[VAL_18]] pos_mem_sz at 0
|
||||
// CHECK-DAG: %[[VAL_20:.*]], %[[VAL_21:.*]] = sparse_tensor.push_back %[[VAL_19]], %[[VAL_14]], %[[VAL_3]]
|
||||
// CHECK-DAG: %[[VAL_22:.*]] = sparse_tensor.storage_specifier.set %[[VAL_18]] pos_mem_sz at 0 with %[[VAL_21]]
|
||||
// CHECK-DAG: %[[VAL_23:.*]] = sparse_tensor.storage_specifier.set %[[VAL_22]] lvl_sz at 1 with %[[VAL_10]]
|
||||
// CHECK-DAG: %[[VAL_24:.*]], %[[VAL_25:.*]] = sparse_tensor.push_back %[[VAL_21]], %[[VAL_20]], %[[VAL_3]], %[[VAL_2]]
|
||||
// CHECK-DAG: %[[VAL_26:.*]] = sparse_tensor.storage_specifier.set %[[VAL_23]] pos_mem_sz at 0 with %[[VAL_25]]
|
||||
// CHECK-DAG: %[[VAL_27:.*]] = memref.alloca() : memref<2xindex>
|
||||
// CHECK-DAG: %[[VAL_28:.*]] = memref.cast %[[VAL_27]] : memref<2xindex> to memref<?xindex>
|
||||
// CHECK-DAG: memref.store %[[VAL_2]], %[[VAL_27]]{{\[}}%[[VAL_3]]] : memref<2xindex>
|
||||
// CHECK-DAG: memref.store %[[VAL_3]], %[[VAL_27]]{{\[}}%[[VAL_2]]] : memref<2xindex>
|
||||
// CHECK-DAG: %[[VAL_29:.*]] = memref.alloca() : memref<2xindex>
|
||||
// CHECK-DAG: %[[VAL_30:.*]] = memref.cast %[[VAL_29]] : memref<2xindex> to memref<?xindex>
|
||||
// CHECK-DAG: memref.store %[[VAL_2]], %[[VAL_29]]{{\[}}%[[VAL_3]]] : memref<2xindex>
|
||||
// CHECK-DAG: memref.store %[[VAL_3]], %[[VAL_29]]{{\[}}%[[VAL_2]]] : memref<2xindex>
|
||||
// CHECK: %[[VAL_31:.*]] = call @getSparseTensorReaderReadToBuffers0F32(%[[VAL_7]], %[[VAL_28]], %[[VAL_30]], %[[VAL_15]], %[[VAL_16]]) : (!llvm.ptr, memref<?xindex>, memref<?xindex>, memref<?xindex>, memref<?xf32>) -> i1
|
||||
// CHECK: memref.store %[[VAL_9]], %[[VAL_24]]{{\[}}%[[VAL_2]]] : memref<?xindex>
|
||||
// CHECK: %[[VAL_32:.*]] = sparse_tensor.storage_specifier.set %[[VAL_26]] crd_mem_sz at 0 with %[[VAL_12]]
|
||||
|
||||
@@ -4,9 +4,9 @@
|
||||
|
||||
// CHECK-LABEL: func.func @empty_sparse_vector(
|
||||
// CHECK-SAME: %[[VAL_0:.*]]: index) -> (memref<?xindex>, memref<?xindex>, memref<?xf64>, !sparse_tensor.storage_specifier
|
||||
// CHECK: %[[VAL_1:.*]] = arith.constant 1 : index
|
||||
// CHECK: %[[VAL_2:.*]] = arith.constant 0.000000e+00 : f64
|
||||
// CHECK: %[[VAL_3:.*]] = arith.constant 0 : index
|
||||
// CHECK-DAG: %[[VAL_1:.*]] = arith.constant 1 : index
|
||||
// CHECK-DAG: %[[VAL_2:.*]] = arith.constant 0.000000e+00 : f64
|
||||
// CHECK-DAG: %[[VAL_3:.*]] = arith.constant 0 : index
|
||||
// CHECK: %[[VAL_4:.*]] = memref.alloc() : memref<16xindex>
|
||||
// CHECK: %[[VAL_5:.*]] = memref.cast %[[VAL_4]] : memref<16xindex> to memref<?xindex>
|
||||
// CHECK: linalg.fill ins(%[[VAL_3]] : index) outs(%[[VAL_4]] : memref<16xindex>)
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
//
|
||||
// Set-up that's shared across all tests in this directory. In principle, this
|
||||
// config could be moved to lit.local.cfg. However, there are downstream users that
|
||||
// do not use these LIT config files. Hence why this is kept inline.
|
||||
// do not use these LIT config files. Hence why this is kept inline.
|
||||
//
|
||||
// DEFINE: %{sparsifier_opts} = enable-runtime-library=true
|
||||
// DEFINE: %{sparsifier_opts_sve} = enable-arm-sve=true %{sparsifier_opts}
|
||||
@@ -20,10 +20,13 @@
|
||||
// REDEFINE: %{env} = TENSOR0="%mlir_src_dir/test/Integration/data/block.mtx"
|
||||
// RUN: %{compile} | env %{env} %{run} | FileCheck %s
|
||||
//
|
||||
// TODO: enable!
|
||||
// Do the same run, but now with direct IR generation.
|
||||
// REDEFINE: %{sparsifier_opts} = enable-runtime-library=false
|
||||
// R_UN: %{compile} | env %{env} %{run} | FileCheck %s
|
||||
// RUN: %{compile} | env %{env} %{run} | FileCheck %s
|
||||
//
|
||||
// Do the same run, but now with direct IR generation and vectorization.
|
||||
// REDEFINE: %{sparsifier_opts} = enable-runtime-library=false enable-buffer-initialization=true vl=2 reassociate-fp-reductions=true enable-index-optimizations=true
|
||||
// RUN: %{compile} | env %{env} %{run} | FileCheck %s
|
||||
|
||||
!Filename = !llvm.ptr
|
||||
|
||||
|
||||
@@ -16,8 +16,7 @@
|
||||
//
|
||||
// without RT lib:
|
||||
//
|
||||
// TODO: make this work
|
||||
// R_U_N: %{compile} enable-runtime-library=false" | %{run}
|
||||
// RUN: %{compile} enable-runtime-library=false" | %{run}
|
||||
|
||||
!Filename = !llvm.ptr
|
||||
|
||||
|
||||
Reference in New Issue
Block a user