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[BOLT][AArch64] Handle PAuth call instructions in isIndirectCall (#133227)
Handle `BLRA*` opcodes in AArch64MCPlusBuilder::isIndirectCall, update getRegUsedAsCallDest accordingly.
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@@ -577,12 +577,12 @@ public:
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return getNoRegister();
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}
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/// Returns the register used as call destination, or no-register, if not
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/// an indirect call. Sets IsAuthenticatedInternally if the instruction
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/// accepts a signed pointer as its operand and authenticates it internally.
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/// Returns the register used as the destination of an indirect branch or call
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/// instruction. Sets IsAuthenticatedInternally if the instruction accepts
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/// a signed pointer as its operand and authenticates it internally.
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virtual MCPhysReg
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getRegUsedAsCallDest(const MCInst &Inst,
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bool &IsAuthenticatedInternally) const {
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getRegUsedAsIndirectBranchDest(const MCInst &Inst,
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bool &IsAuthenticatedInternally) const {
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llvm_unreachable("not implemented");
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return getNoRegister();
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}
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@@ -498,14 +498,16 @@ static std::shared_ptr<Report>
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shouldReportCallGadget(const BinaryContext &BC, const MCInstReference &Inst,
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const State &S) {
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static const GadgetKind CallKind("non-protected call found");
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if (!BC.MIB->isCall(Inst) && !BC.MIB->isBranch(Inst))
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if (!BC.MIB->isIndirectCall(Inst) && !BC.MIB->isIndirectBranch(Inst))
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return nullptr;
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bool IsAuthenticated = false;
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MCPhysReg DestReg = BC.MIB->getRegUsedAsCallDest(Inst, IsAuthenticated);
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if (IsAuthenticated || DestReg == BC.MIB->getNoRegister())
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MCPhysReg DestReg =
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BC.MIB->getRegUsedAsIndirectBranchDest(Inst, IsAuthenticated);
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if (IsAuthenticated)
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return nullptr;
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assert(DestReg != BC.MIB->getNoRegister());
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LLVM_DEBUG({
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traceInst(BC, "Found call inst", Inst);
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traceReg(BC, "Call destination reg", DestReg);
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@@ -10,6 +10,7 @@
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64InstrInfo.h"
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#include "AArch64MCSymbolizer.h"
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#include "MCTargetDesc/AArch64AddressingModes.h"
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#include "MCTargetDesc/AArch64FixupKinds.h"
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@@ -277,15 +278,14 @@ public:
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}
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}
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MCPhysReg
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getRegUsedAsCallDest(const MCInst &Inst,
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bool &IsAuthenticatedInternally) const override {
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assert(isCall(Inst) || isBranch(Inst));
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IsAuthenticatedInternally = false;
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MCPhysReg getRegUsedAsIndirectBranchDest(
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const MCInst &Inst, bool &IsAuthenticatedInternally) const override {
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assert(isIndirectCall(Inst) || isIndirectBranch(Inst));
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switch (Inst.getOpcode()) {
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case AArch64::BR:
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case AArch64::BLR:
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IsAuthenticatedInternally = false;
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return Inst.getOperand(0).getReg();
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case AArch64::BRAA:
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case AArch64::BRAB:
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@@ -298,9 +298,7 @@ public:
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IsAuthenticatedInternally = true;
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return Inst.getOperand(0).getReg();
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default:
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if (isIndirectCall(Inst) || isIndirectBranch(Inst))
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llvm_unreachable("Unhandled indirect branch");
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return getNoRegister();
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llvm_unreachable("Unhandled indirect branch or call");
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}
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}
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@@ -699,7 +697,7 @@ public:
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}
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bool isIndirectCall(const MCInst &Inst) const override {
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return Inst.getOpcode() == AArch64::BLR;
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return isIndirectCallOpcode(Inst.getOpcode());
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}
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MCPhysReg getSpRegister(int Size) const {
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@@ -726,6 +726,19 @@ static inline bool isIndirectBranchOpcode(int Opc) {
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return false;
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}
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static inline bool isIndirectCallOpcode(unsigned Opc) {
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switch (Opc) {
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case AArch64::BLR:
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case AArch64::BLRAA:
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case AArch64::BLRAB:
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case AArch64::BLRAAZ:
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case AArch64::BLRABZ:
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return true;
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default:
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return false;
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}
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}
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static inline bool isPTrueOpcode(unsigned Opc) {
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switch (Opc) {
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case AArch64::PTRUE_B:
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