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[WebAssembly] Do not omit range checks for i64 switches
Summary: Since the br_table instruction takes an i32, switches over i64s (and larger integers) must use the i32.wrap_i64 instruction to truncate the table index. This truncation makes numbers just over 2^32 indistinguishable from small numbers, so it was a miscompilation to omit the range check preceding these br_tables. This change fixes the problem by skipping the "fixing" of the br_table when the range check is an i64 instruction. Fixes PR46447. Reviewers: aheejin, dschuff, kripken Reviewed By: kripken Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D83017
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@@ -41,9 +41,11 @@ public:
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char WebAssemblyFixBrTableDefaults::ID = 0;
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// `MI` is a br_table instruction missing its default target argument. This
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// `MI` is a br_table instruction with a dummy default target argument. This
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// function finds and adds the default target argument and removes any redundant
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// range check preceding the br_table.
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// range check preceding the br_table. Returns the MBB that the br_table is
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// moved into so it can be removed from further consideration, or nullptr if the
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// br_table cannot be optimized.
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MachineBasicBlock *fixBrTable(MachineInstr &MI, MachineBasicBlock *MBB,
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MachineFunction &MF) {
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// Get the header block, which contains the redundant range check.
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@@ -51,11 +53,13 @@ MachineBasicBlock *fixBrTable(MachineInstr &MI, MachineBasicBlock *MBB,
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auto *HeaderMBB = *MBB->pred_begin();
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// Find the conditional jump to the default target. If it doesn't exist, the
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// default target is unreachable anyway, so we can choose anything.
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// default target is unreachable anyway, so we can keep the existing dummy
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// target.
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MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
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SmallVector<MachineOperand, 2> Cond;
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const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
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TII.analyzeBranch(*HeaderMBB, TBB, FBB, Cond);
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bool Analyzed = !TII.analyzeBranch(*HeaderMBB, TBB, FBB, Cond);
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assert(Analyzed && "Could not analyze jump header branches");
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// Here are the possible outcomes. '_' is nullptr, `J` is the jump table block
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// aka MBB, 'D' is the default block.
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@@ -66,14 +70,27 @@ MachineBasicBlock *fixBrTable(MachineInstr &MI, MachineBasicBlock *MBB,
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// D | _ | Header jumps to the default and falls through to the jump table
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// D | J | Header jumps to the default and also to the jump table
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if (TBB && TBB != MBB) {
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// Install the default target.
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assert((FBB == nullptr || FBB == MBB) &&
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"Expected jump or fallthrough to br_table block");
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assert(Cond.size() == 2 && Cond[1].isReg() && "Unexpected condition info");
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// If the range check checks an i64 value, we cannot optimize it out because
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// the i64 index is truncated to an i32, making values over 2^32
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// indistinguishable from small numbers.
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MachineRegisterInfo &MRI = MF.getRegInfo();
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auto *RangeCheck = MRI.getVRegDef(Cond[1].getReg());
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assert(RangeCheck != nullptr);
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unsigned RangeCheckOp = RangeCheck->getOpcode();
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assert(RangeCheckOp == WebAssembly::GT_U_I32 ||
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RangeCheckOp == WebAssembly::GT_U_I64);
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if (RangeCheckOp == WebAssembly::GT_U_I64) {
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// Bail out and leave the jump table untouched
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return nullptr;
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}
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// Remove the dummy default target and install the real one.
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MI.RemoveOperand(MI.getNumExplicitOperands() - 1);
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MI.addOperand(MF, MachineOperand::CreateMBB(TBB));
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} else {
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// Arbitrarily choose the first jump target as the default.
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auto *SomeMBB = MI.getOperand(1).getMBB();
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MI.addOperand(MachineOperand::CreateMBB(SomeMBB));
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}
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// Remove any branches from the header and splice in the jump table instead
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@@ -110,8 +127,10 @@ bool WebAssemblyFixBrTableDefaults::runOnMachineFunction(MachineFunction &MF) {
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for (auto &MI : *MBB) {
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if (WebAssembly::isBrTable(MI)) {
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auto *Fixed = fixBrTable(MI, MBB, MF);
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MBBSet.erase(Fixed);
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Changed = true;
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if (Fixed != nullptr) {
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MBBSet.erase(Fixed);
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Changed = true;
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}
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break;
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}
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}
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@@ -1285,8 +1285,10 @@ SDValue WebAssemblyTargetLowering::LowerBR_JT(SDValue Op,
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for (auto MBB : MBBs)
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Ops.push_back(DAG.getBasicBlock(MBB));
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// Do not add the default case for now. It will be added in
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// WebAssemblyFixBrTableDefaults.
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// Add the first MBB as a dummy default target for now. This will be replaced
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// with the proper default target (and the preceding range check eliminated)
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// if possible by WebAssemblyFixBrTableDefaults.
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Ops.push_back(DAG.getBasicBlock(*MBBs.begin()));
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return DAG.getNode(WebAssemblyISD::BR_TABLE, DL, MVT::Other, Ops);
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}
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@@ -95,26 +95,30 @@ sw.epilog: ; preds = %entry, %sw.bb.5, %s
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; CHECK-LABEL: bar64:
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; CHECK: block {{$}}
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; CHECK: i64.const
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; CHECK: i64.gt_u
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; CHECK: br_if 0
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: br_table {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5, 6{{$}}
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; CHECK: .LBB{{[0-9]+}}_1:
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; CHECK: call foo0{{$}}
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; CHECK: i32.wrap_i64
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; CHECK: br_table {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5, 0{{$}}
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK: call foo1{{$}}
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; CHECK: call foo0{{$}}
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; CHECK: .LBB{{[0-9]+}}_3:
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; CHECK: call foo2{{$}}
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; CHECK: call foo1{{$}}
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; CHECK: .LBB{{[0-9]+}}_4:
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; CHECK: call foo3{{$}}
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; CHECK: call foo2{{$}}
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; CHECK: .LBB{{[0-9]+}}_5:
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; CHECK: call foo4{{$}}
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; CHECK: call foo3{{$}}
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; CHECK: .LBB{{[0-9]+}}_6:
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; CHECK: call foo5{{$}}
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; CHECK: call foo4{{$}}
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; CHECK: .LBB{{[0-9]+}}_7:
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; CHECK: call foo5{{$}}
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; CHECK: .LBB{{[0-9]+}}_8:
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; CHECK: return{{$}}
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define void @bar64(i64 %n) {
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entry:
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@@ -172,3 +176,43 @@ sw.bb.5: ; preds = %entry
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sw.epilog: ; preds = %entry, %sw.bb.5, %sw.bb.4, %sw.bb.3, %sw.bb.2, %sw.bb.1, %sw.bb
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ret void
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}
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; CHECK-LABEL: truncated:
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; CHECK: block
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; CHECK: block
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; CHECK: block
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; CHECK: i32.wrap_i64
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; CHECK: br_table {{[^,]+}}, 0, 1, 2{{$}}
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; CHECK: .LBB{{[0-9]+}}_1
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; CHECK: end_block
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; CHECK: call foo0{{$}}
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; CHECK: return{{$}}
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; CHECK: .LBB{{[0-9]+}}_2
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; CHECK: end_block
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; CHECK: call foo1{{$}}
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; CHECK: return{{$}}
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; CHECK: .LBB{{[0-9]+}}_3
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; CHECK: end_block
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; CHECK: call foo2{{$}}
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; CHECK: return{{$}}
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; CHECK: end_function
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define void @truncated(i64 %n) {
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entry:
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%m = trunc i64 %n to i32
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switch i32 %m, label %default [
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i32 0, label %bb1
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i32 1, label %bb2
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]
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bb1:
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tail call void @foo0()
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ret void
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bb2:
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tail call void @foo1()
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ret void
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default:
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tail call void @foo2()
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ret void
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}
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