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[RISCV] Update driver tests
Add the RISC-V Bullet core to the driver tests.
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@@ -1,11 +1,18 @@
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// Check target CPUs are correctly passed.
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// RUN: %clang -target riscv32 -### -c %s 2>&1 -mcpu=rocket-rv32 | FileCheck -check-prefix=MCPU-ROCKETCHIP32 %s
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// MCPU-ROCKETCHIP32: "-nostdsysteminc" "-target-cpu" "rocket-rv32"
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// RUN: %clang -target riscv32 -### -c %s 2>&1 -mcpu=rocket-rv32 | FileCheck -check-prefix=MCPU-ROCKET32 %s
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// MCPU-ROCKET32: "-nostdsysteminc" "-target-cpu" "rocket-rv32"
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// RUN: %clang -target riscv64 -### -c %s 2>&1 -mcpu=rocket-rv64 | FileCheck -check-prefix=MCPU-ROCKETCHIP64 %s
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// MCPU-ROCKETCHIP64: "-nostdsysteminc" "-target-cpu" "rocket-rv64"
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// MCPU-ROCKETCHIP64: "-target-feature" "+64bit"
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// RUN: %clang -target riscv64 -### -c %s 2>&1 -mcpu=rocket-rv64 | FileCheck -check-prefix=MCPU-ROCKET64 %s
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// MCPU-ROCKET64: "-nostdsysteminc" "-target-cpu" "rocket-rv64"
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// MCPU-ROCKET64: "-target-feature" "+64bit"
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// RUN: %clang -target riscv32 -### -c %s 2>&1 -mcpu=bullet-rv32 | FileCheck -check-prefix=MCPU-BULLET32 %s
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// MCPU-BULLET32: "-nostdsysteminc" "-target-cpu" "bullet-rv32"
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// RUN: %clang -target riscv64 -### -c %s 2>&1 -mcpu=bullet-rv64 | FileCheck -check-prefix=MCPU-BULLET64 %s
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// MCPU-BULLET64: "-nostdsysteminc" "-target-cpu" "bullet-rv64"
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// MCPU-BULLET64: "-target-feature" "+64bit"
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// mcpu with default march
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// RUN: %clang -target riscv64 -### -c %s 2>&1 -mcpu=sifive-u54 | FileCheck -check-prefix=MCPU-SIFIVE-U54 %s
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@@ -191,8 +191,8 @@
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// RUN: not %clang_cc1 -triple riscv32 -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix RISCV32
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// RISCV32: error: unknown target CPU 'not-a-cpu'
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// RISCV32: note: valid target CPU values are: generic-rv32, rocket-rv32, sifive-e31
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// RISCV32: note: valid target CPU values are: generic-rv32, rocket-rv32, bullet-rv32, sifive-e31
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// RUN: not %clang_cc1 -triple riscv64 -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix RISCV64
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// RISCV64: error: unknown target CPU 'not-a-cpu'
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// RISCV64: note: valid target CPU values are: generic-rv64, rocket-rv64, sifive-u54
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// RISCV64: note: valid target CPU values are: generic-rv64, rocket-rv64, bullet-rv64, sifive-u54
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