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[VectorCombine] fix insertion point of shuffles
As shown in issue #60649, the new shuffles were being inserted before a phi, and that is invalid. It seems like most test coverage for this fold (foldSelectShuffle) lives in the AArch64 dir, but this doesn't repro there for a base target.
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@@ -1660,16 +1660,16 @@ bool VectorCombine::foldSelectShuffle(Instruction &I, bool FromReduction) {
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return SSV->getOperand(Op);
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return SV->getOperand(Op);
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};
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Builder.SetInsertPoint(SVI0A->getNextNode());
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Builder.SetInsertPoint(SVI0A->getInsertionPointAfterDef());
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Value *NSV0A = Builder.CreateShuffleVector(GetShuffleOperand(SVI0A, 0),
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GetShuffleOperand(SVI0A, 1), V1A);
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Builder.SetInsertPoint(SVI0B->getNextNode());
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Builder.SetInsertPoint(SVI0B->getInsertionPointAfterDef());
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Value *NSV0B = Builder.CreateShuffleVector(GetShuffleOperand(SVI0B, 0),
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GetShuffleOperand(SVI0B, 1), V1B);
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Builder.SetInsertPoint(SVI1A->getNextNode());
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Builder.SetInsertPoint(SVI1A->getInsertionPointAfterDef());
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Value *NSV1A = Builder.CreateShuffleVector(GetShuffleOperand(SVI1A, 0),
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GetShuffleOperand(SVI1A, 1), V2A);
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Builder.SetInsertPoint(SVI1B->getNextNode());
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Builder.SetInsertPoint(SVI1B->getInsertionPointAfterDef());
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Value *NSV1B = Builder.CreateShuffleVector(GetShuffleOperand(SVI1B, 0),
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GetShuffleOperand(SVI1B, 1), V2B);
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Builder.SetInsertPoint(Op0);
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38
llvm/test/Transforms/VectorCombine/X86/select-shuffle.ll
Normal file
38
llvm/test/Transforms/VectorCombine/X86/select-shuffle.ll
Normal file
@@ -0,0 +1,38 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- | FileCheck %s
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target datalayout = "e-p:64:64-i64:64-f80:128-n8:16:32:64-S128"
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; This would insert before a phi instruction which is invalid IR.
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define <4 x double> @PR60649() {
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; CHECK-LABEL: @PR60649(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[END:%.*]]
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; CHECK: unreachable:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[T0:%.*]] = phi <4 x double> [ zeroinitializer, [[ENTRY:%.*]] ], [ zeroinitializer, [[UNREACHABLE:%.*]] ]
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; CHECK-NEXT: [[T1:%.*]] = phi <4 x double> [ zeroinitializer, [[ENTRY]] ], [ zeroinitializer, [[UNREACHABLE]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <4 x double> [[T0]], <4 x double> [[T0]], <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[T0]], <4 x double> [[T0]], <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP2:%.*]] = fdiv <4 x double> [[TMP1]], <double 0.000000e+00, double 0.000000e+00, double undef, double undef>
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; CHECK-NEXT: [[TMP3:%.*]] = fmul <4 x double> [[TMP0]], <double 0.000000e+00, double 0.000000e+00, double undef, double undef>
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; CHECK-NEXT: [[T5:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP3]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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; CHECK-NEXT: ret <4 x double> [[T5]]
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;
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entry:
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br label %end
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unreachable:
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br label %end
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end:
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%t0 = phi <4 x double> [ zeroinitializer, %entry ], [ zeroinitializer, %unreachable ]
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%t1 = phi <4 x double> [ zeroinitializer, %entry ], [ zeroinitializer, %unreachable ]
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%t2 = shufflevector <4 x double> zeroinitializer, <4 x double> zeroinitializer, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
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%t3 = fdiv <4 x double> %t0, %t2
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%t4 = fmul <4 x double> %t0, %t2
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%t5 = shufflevector <4 x double> %t3, <4 x double> %t4, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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ret <4 x double> %t5
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}
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