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[X86] scalarizeExtEltFP - don't assume setcc result pre-legalisation will be vXi1

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Another fold may have generated the setcc using getSetCCResultType

Encountered this while investigating topological sorting of dag nodes
This commit is contained in:
Simon Pilgrim
2025-06-10 14:48:33 +01:00
parent 65d530193e
commit b21be0e440
1 changed files with 2 additions and 3 deletions
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5
llvm/lib/Target/X86/X86ISelLowering.cpp
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@@ -46802,9 +46802,8 @@ static SDValue scalarizeExtEltFP(SDNode *ExtElt, SelectionDAG &DAG,
// need to convert vector bool to a scalar bool.
if (DCI.isBeforeLegalize() && Vec.getOpcode() == ISD::VSELECT &&
Vec.getOperand(0).getOpcode() == ISD::SETCC &&
Vec.getOperand(0).getOperand(0).getValueType() == VecVT) {
assert(Vec.getOperand(0).getValueType().getScalarType() == MVT::i1 &&
"Unexpected cond type for combine");
Vec.getOperand(0).getOperand(0).getValueType() == VecVT &&
Vec.getOperand(0).getValueType().getScalarType() == MVT::i1) {
// ext (sel Cond, X, Y), 0 --> sel (ext Cond, 0), (ext X, 0), (ext Y, 0)
SDLoc DL(ExtElt);
SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,