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[CodeGen] Ignore unnamed bitfields before handling vector fields

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We processed unnamed bitfields after our logic for non-vector field
elements in records larger than 128 bits.  The vector logic would
determine that the bit-field disqualifies the record from occupying a
register despite the unnamed bit-field not participating in the record
size nor its alignment.

N.B. This behavior matches GCC and ICC.

llvm-svn: 278656
This commit is contained in:
David Majnemer
2016-08-15 07:20:40 +00:00
parent b229cb0a43
commit b439dfe6ba
2 changed files with 14 additions and 4 deletions
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9
clang/lib/CodeGen/TargetInfo.cpp
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@@ -2589,6 +2589,10 @@ void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
bool BitField = i->isBitField();
// Ignore padding bit-fields.
if (BitField && i->isUnnamedBitfield())
continue;
// AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than
// four eightbytes, or it contains unaligned fields, it has class MEMORY.
//
@@ -2621,10 +2625,7 @@ void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
// structure to be passed in memory even if unaligned, and
// therefore they can straddle an eightbyte.
if (BitField) {
// Ignore padding bit-fields.
if (i->isUnnamedBitfield())
continue;
assert(!i->isUnnamedBitfield());
uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
uint64_t Size = i->getBitWidthValue(getContext());

9
clang/test/CodeGen/x86_64-arguments.c
View File

@@ -536,3 +536,12 @@ void f64() {
f64_helper(x64, x64, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i);
f64_helper(x64, x64, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i);
}
struct t65 {
__m256 m;
int : 0;
};
// SSE-LABEL: @f65(%struct.t65* byval align 32 %{{[^,)]+}})
// AVX: @f65(<8 x float> %{{[^,)]+}})
void f65(struct t65 a0) {
}