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[ELF] Start a new PT_LOAD if LMA region is different

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GNU ld has a counterintuitive lang_propagate_lma_regions rule.

```
// .foo's LMA region is propagated to .bar because their VMA region is the same,
// and .bar does not have an explicit output section address (addr_tree).
.foo : { *(.foo) } >RAM AT> FLASH
.bar : { *(.bar) } >RAM

// An explicit output section address disables propagation.
.foo : { *(.foo) } >RAM AT> FLASH
.bar . : { *(.bar) } >RAM
```

In both cases, lld thinks .foo's LMA region is propagated and
places .bar in the same PT_LOAD, so lld diverges from GNU ld w.r.t. the
second case (lma-align.test).

This patch changes Writer<ELFT>::createPhdrs to disable propagation
(start a new PT_LOAD). A user of the first case can make linker scripts
portable by explicitly specifying `AT>`. By contrast, there was no
workaround for the old behavior.

This change uncovers another LMA related bug in assignOffsets() where
`ctx->lmaOffset = 0;` was omitted. It caused a spurious "load address
range overlaps" error for at2.test

The new PT_LOAD rule is complex. For convenience, I listed the origins of some subexpressions:

* rL323449: `sec->memRegion == load->firstSec->memRegion`; linkerscript/at3.test
* D43284: `load->lastSec == Out::programHeaders` (don't start a new PT_LOAD after program headers); linkerscript/at4.test
* D58892: `sec != relroEnd` (start a new PT_LOAD after PT_GNU_RELRO)

Reviewed By: psmith

Differential Revision: https://reviews.llvm.org/D74297
This commit is contained in:
Fangrui Song
2020-02-08 22:04:06 -08:00
parent e21b9ca751
commit b498d99338
6 changed files with 29 additions and 16 deletions
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3
lld/ELF/LinkerScript.cpp
View File

@@ -831,9 +831,10 @@ void LinkerScript::assignOffsets(OutputSection *sec) {
switchTo(sec);
ctx->lmaOffset = 0;
if (sec->lmaExpr)
ctx->lmaOffset = sec->lmaExpr().getValue() - dot;
if (MemoryRegion *mr = sec->lmaRegion)
ctx->lmaOffset = alignTo(mr->curPos, sec->alignment) - dot;

11
lld/ELF/Writer.cpp
View File

@@ -2110,12 +2110,11 @@ std::vector<PhdrEntry *> Writer<ELFT>::createPhdrs(Partition &part) {
// time, we don't want to create a separate load segment for the headers,
// even if the first output section has an AT or AT> attribute.
uint64_t newFlags = computeFlags(sec->getPhdrFlags());
if (!load ||
((sec->lmaExpr ||
(sec->lmaRegion && (sec->lmaRegion != load->firstSec->lmaRegion))) &&
load->lastSec != Out::programHeaders) ||
sec->memRegion != load->firstSec->memRegion || flags != newFlags ||
sec == relroEnd) {
bool sameLMARegion =
load && !sec->lmaExpr && sec->lmaRegion == load->firstSec->lmaRegion;
if (!(load && newFlags == flags && sec != relroEnd &&
sec->memRegion == load->firstSec->memRegion &&
(sameLMARegion || load->lastSec == Out::programHeaders))) {
load = addHdr(PT_LOAD, newFlags);
flags = newFlags;
}

3
lld/test/ELF/linkerscript/Inputs/at2.s
View File

@@ -12,3 +12,6 @@
.section .bar3, "aw"
.quad 0
.section .bar4, "aw"
.quad 0

18
lld/test/ELF/linkerscript/at2.test
View File

@@ -13,15 +13,24 @@ MEMORY {
SECTIONS {
.foo1 : { *(.foo1) } > AX AT>FLASH
## In GNU ld, .foo1's LMA region is propagated to .foo2 because their VMA region
## is the same and .foo2 does not set an explicit address.
## lld sets .foo2's LMA region to null.
.foo2 : { *(.foo2) } > AX
.bar1 : { *(.bar1) } > AW AT> RAM
.bar1 : { *(.bar1) } > AW
.bar2 : { *(.bar2) } > AW AT > RAM
.bar3 : { *(.bar3) } > AW AT >RAM
.bar3 . : { *(.bar3) } > AW
.bar4 : { *(.bar4) } > AW AT >RAM
}
# CHECK: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
# CHECK-NEXT: LOAD 0x001000 0x0000000000002000 0x0000000000006000 0x000010 0x000010 R E 0x1000
# CHECK-NEXT: LOAD 0x002000 0x0000000000003000 0x0000000000007000 0x000018 0x000018 RW 0x1000
# CHECK-NEXT: LOAD 0x001000 0x0000000000002000 0x0000000000006000 0x000008 0x000008 R E 0x1000
# CHECK-NEXT: LOAD 0x001008 0x0000000000002008 0x0000000000002008 0x000008 0x000008 R E 0x1000
# CHECK-NEXT: LOAD 0x002000 0x0000000000003000 0x0000000000003000 0x000008 0x000008 RW 0x1000
# CHECK-NEXT: LOAD 0x002008 0x0000000000003008 0x0000000000007000 0x000008 0x000008 RW 0x1000
# CHECK-NEXT: LOAD 0x002010 0x0000000000003010 0x0000000000003010 0x000008 0x000008 RW 0x1000
# CHECK-NEXT: LOAD 0x002018 0x0000000000003018 0x0000000000007008 0x000008 0x000008 RW 0x1000
# SECTIONS: Sections:
# SECTIONS-NEXT: Idx Name Size VMA
@@ -32,3 +41,4 @@ SECTIONS {
# SECTIONS-NEXT: 4 .bar1 00000008 0000000000003000
# SECTIONS-NEXT: 5 .bar2 00000008 0000000000003008
# SECTIONS-NEXT: 6 .bar3 00000008 0000000000003010
# SECTIONS-NEXT: 7 .bar4 00000008 0000000000003018

2
lld/test/ELF/linkerscript/at8.test
View File

@@ -11,7 +11,7 @@ MEMORY {
SECTIONS {
.text : { *(.text) } > FLASH
.sec1 : { *(.sec1) } > RAM AT > FLASH
.sec2 : { *(.sec2) } > RAM
.sec2 : { *(.sec2) } > RAM AT > FLASH
.sec3 : { *(.sec3) } > RAM AT > FLASH
}

8
lld/test/ELF/linkerscript/lma-align.test
View File

@@ -9,14 +9,13 @@
# CHECK-NEXT: .text PROGBITS 0000000000001000 001000 000001 00 AX 0 0 4
# CHECK-NEXT: .data.rel.ro PROGBITS 0000000000011000 002000 000001 00 WA 0 0 16
# CHECK-NEXT: .data PROGBITS 0000000000011010 002010 000001 00 WA 0 0 16
# CHECK-NEXT: .bss NOBITS 0000000000011040 002011 000001 00 WA 0 0 64
# CHECK-NEXT: .bss NOBITS 0000000000011040 002040 000001 00 WA 0 0 64
# CHECK: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
# CHECK-NEXT: LOAD 0x001000 0x0000000000001000 0x0000000000001000 0x000001 0x000001 R E 0x1000
# CHECK-NEXT: LOAD 0x002000 0x0000000000011000 0x0000000000001010 0x000001 0x000001 RW 0x1000
## FIXME .data and .bss should be placed in different PT_LOAD segments
## because their LMA regions are different.
# CHECK-NEXT: LOAD 0x002010 0x0000000000011010 0x0000000000001020 0x000001 0x000031 RW 0x1000
# CHECK-NEXT: LOAD 0x002010 0x0000000000011010 0x0000000000001020 0x000001 0x000001 RW 0x1000
# CHECK-NEXT: LOAD 0x002040 0x0000000000011040 0x0000000000011040 0x000000 0x000001 RW 0x1000
MEMORY {
ROM : ORIGIN = 0x1000, LENGTH = 1K
@@ -28,5 +27,6 @@ SECTIONS {
.data.rel.ro 0x11000 : { *(.data.rel.ro) } >RAM AT>ROM
## ALIGN decides output section alignment.
.data . : ALIGN(16) { *(.data*) } >RAM AT>ROM
## Start a new PT_LOAD because the LMA region is different from the previous one.
.bss . : ALIGN(64) { *(.bss*) } >RAM
}