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[InstCombine] Call InstSimplify for cast instructions (#162849)

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InstCombine currently fails to call into InstSimplify for cast
instructions. I noticed this because the transform from
https://github.com/llvm/llvm-project/pull/98649 can be triggered via
`-passes=instsimplify` but not `-passes=instcombine`, which is not
supposed to happen.
This commit is contained in:
Nikita Popov
2025-10-16 11:27:47 +02:00
committed by GitHub
parent c46fec840d
commit c3366256fa
3 changed files with 15 additions and 6 deletions
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6
llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
View File

@@ -156,9 +156,9 @@ Instruction *InstCombinerImpl::commonCastTransforms(CastInst &CI) {
Value *Src = CI.getOperand(0);
Type *Ty = CI.getType();
if (auto *SrcC = dyn_cast<Constant>(Src))
if (Constant *Res = ConstantFoldCastOperand(CI.getOpcode(), SrcC, Ty, DL))
return replaceInstUsesWith(CI, Res);
if (Value *Res =
simplifyCastInst(CI.getOpcode(), Src, Ty, SQ.getWithInstruction(&CI)))
return replaceInstUsesWith(CI, Res);
// Try to eliminate a cast of a cast.
if (auto *CSrc = dyn_cast<CastInst>(Src)) { // A->B->C cast

4
llvm/test/Transforms/InstCombine/cast-set-preserve-signed-dbg-val.ll
View File

@@ -11,10 +11,8 @@ define i16 @test5(i16 %A) !dbg !34 {
call void @llvm.dbg.value(metadata i32 %C, metadata !37, metadata !DIExpression()), !dbg !41
; Preserve the dbg.value for the DCE'd 32-bit 'and'.
;
; The high 16 bits of the original 'and' require sign-extending the new 16-bit and:
; CHECK-NEXT: #dbg_value(i16 [[and]], [[C:![0-9]+]],
; CHECK-SAME: !DIExpression(DW_OP_LLVM_convert, 16, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value)
; CHECK-SAME: !DIExpression(DW_OP_LLVM_convert, 16, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value)
%D = trunc i32 %C to i16, !dbg !42
call void @llvm.dbg.value(metadata i16 %D, metadata !38, metadata !DIExpression()), !dbg !42

11
llvm/test/Transforms/InstCombine/ptr-int-cast.ll
View File

@@ -86,3 +86,14 @@ define <4 x ptr> @test7(<4 x i128> %arg) nounwind {
%p1 = inttoptr <4 x i128> %arg to <4 x ptr>
ret <4 x ptr> %p1
}
define i64 @ptrtoint_gep_sub(ptr %ptr, i64 %end.addr) {
; CHECK-LABEL: @ptrtoint_gep_sub(
; CHECK-NEXT: ret i64 [[END_ADDR:%.*]]
;
%ptr.addr = ptrtoint ptr %ptr to i64
%size = sub i64 %end.addr, %ptr.addr
%end = getelementptr i8, ptr %ptr, i64 %size
%end.addr2 = ptrtoint ptr %end to i64
ret i64 %end.addr2
}