[flang][openacc] Add missing piece to translate to LLVM IR dialect

Add missing pieces to translate handle OpenACC dialect in the translation. Depends on D147825 Reviewed By: PeteSteinfeld, razvanlupusoru Differential Revision: https://reviews.llvm.org/D147828
2026-01-15 12:25:46 +08:00 · 2023-04-10 14:29:58 -07:00
parent a2ef896a96
commit cd9cdc6837
6 changed files with 75 additions and 3 deletions
--- a/flang/lib/Optimizer/CodeGen/CMakeLists.txt
+++ b/flang/lib/Optimizer/CodeGen/CMakeLists.txt
@@ -23,6 +23,7 @@ add_flang_library(FIRCodeGen
  MLIRMathToFuncs
  MLIRMathToLLVM
  MLIRMathToLibm
+  MLIROpenACCToLLVM
  MLIROpenMPToLLVM
  MLIRBuiltinToLLVMIRTranslation
  MLIRLLVMToLLVMIRTranslation
--- a/flang/lib/Optimizer/CodeGen/CodeGen.cpp
+++ b/flang/lib/Optimizer/CodeGen/CodeGen.cpp
@@ -31,8 +31,11 @@
 #include "mlir/Conversion/MathToFuncs/MathToFuncs.h"
 #include "mlir/Conversion/MathToLLVM/MathToLLVM.h"
 #include "mlir/Conversion/MathToLibm/MathToLibm.h"
+#include "mlir/Conversion/OpenACCToLLVM/ConvertOpenACCToLLVM.h"
 #include "mlir/Conversion/OpenMPToLLVM/ConvertOpenMPToLLVM.h"
+#include "mlir/Conversion/ReconcileUnrealizedCasts/ReconcileUnrealizedCasts.h"
 #include "mlir/Dialect/LLVMIR/LLVMDialect.h"
+#include "mlir/Dialect/OpenACC/OpenACC.h"
 #include "mlir/Dialect/OpenMP/OpenMPDialect.h"
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/Matchers.h"
@@ -3640,6 +3643,29 @@ struct MustBeDeadConversion : public FIROpConversion<FromOp> {
  }
 };

+struct UnrealizedConversionCastOpConversion
+    : public FIROpConversion<mlir::UnrealizedConversionCastOp> {
+  using FIROpConversion::FIROpConversion;
+
+  mlir::LogicalResult
+  matchAndRewrite(mlir::UnrealizedConversionCastOp op, OpAdaptor adaptor,
+                  mlir::ConversionPatternRewriter &rewriter) const override {
+    assert(op.getOutputs().getTypes().size() == 1 && "expect a single type");
+    mlir::Type convertedType = convertType(op.getOutputs().getTypes()[0]);
+    if (convertedType == adaptor.getInputs().getTypes()[0]) {
+      rewriter.replaceOp(op, adaptor.getInputs());
+      return mlir::success();
+    }
+
+    convertedType = adaptor.getInputs().getTypes()[0];
+    if (convertedType == op.getOutputs().getType()[0]) {
+      rewriter.replaceOp(op, adaptor.getInputs());
+      return mlir::success();
+    }
+    return mlir::failure();
+  }
+};
+
 struct ShapeOpConversion : public MustBeDeadConversion<fir::ShapeOp> {
  using MustBeDeadConversion::MustBeDeadConversion;
 };
@@ -3762,9 +3788,11 @@ public:
        SliceOpConversion, StoreOpConversion, StringLitOpConversion,
        SubcOpConversion, TypeDescOpConversion, UnboxCharOpConversion,
        UnboxProcOpConversion, UndefOpConversion, UnreachableOpConversion,
-        XArrayCoorOpConversion, XEmboxOpConversion, XReboxOpConversion,
-        ZeroOpConversion>(typeConverter, options);
+        UnrealizedConversionCastOpConversion, XArrayCoorOpConversion,
+        XEmboxOpConversion, XReboxOpConversion, ZeroOpConversion>(typeConverter,
+                                                                  options);
    mlir::populateFuncToLLVMConversionPatterns(typeConverter, pattern);
+    mlir::populateOpenACCToLLVMConversionPatterns(typeConverter, pattern);
    mlir::populateOpenMPToLLVMConversionPatterns(typeConverter, pattern);
    mlir::arith::populateArithToLLVMConversionPatterns(typeConverter, pattern);
    mlir::cf::populateControlFlowToLLVMConversionPatterns(typeConverter,
@@ -3781,6 +3809,7 @@ public:
    // legalize conversion of OpenMP operations without regions.
    mlir::configureOpenMPToLLVMConversionLegality(target, typeConverter);
    target.addLegalDialect<mlir::omp::OpenMPDialect>();
+    target.addLegalDialect<mlir::acc::OpenACCDialect>();

    // required NOPs for applying a full conversion
    target.addLegalOp<mlir::ModuleOp>();
--- a/flang/lib/Optimizer/Support/CMakeLists.txt
+++ b/flang/lib/Optimizer/Support/CMakeLists.txt
@@ -13,6 +13,7 @@ add_flang_library(FIRSupport
  LINK_LIBS
  ${dialect_libs}
  MLIRBuiltinToLLVMIRTranslation
+  MLIROpenACCToLLVMIRTranslation
  MLIROpenMPToLLVMIRTranslation
  MLIRLLVMToLLVMIRTranslation
  MLIRTargetLLVMIRExport
--- a/flang/lib/Optimizer/Support/InitFIR.cpp
+++ b/flang/lib/Optimizer/Support/InitFIR.cpp
@@ -9,10 +9,13 @@
 #include "flang/Optimizer/Support/InitFIR.h"
 #include "mlir/Target/LLVMIR/Dialect/Builtin/BuiltinToLLVMIRTranslation.h"
 #include "mlir/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.h"
+#include "mlir/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.h"
 #include "mlir/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.h"

 void fir::support::registerLLVMTranslation(mlir::MLIRContext &context) {
  mlir::DialectRegistry registry;
+  // Register OpenACC dialect interface here as well.
+  registerOpenACCDialectTranslation(registry);
  // Register OpenMP dialect interface here as well.
  registerOpenMPDialectTranslation(registry);
  // Register LLVM-IR dialect interface.
--- a/flang/lib/Optimizer/Transforms/OpenACC/OpenACCDataOperandConversion.cpp
+++ b/flang/lib/Optimizer/Transforms/OpenACC/OpenACCDataOperandConversion.cpp
@@ -111,7 +111,7 @@ void OpenACCDataOperandConversion::runOnOperation() {
  ConversionTarget target(*context);
  target.addLegalDialect<fir::FIROpsDialect>();
  target.addLegalDialect<LLVM::LLVMDialect>();
-  target.addLegalOp<UnrealizedConversionCastOp>();
+  target.addLegalOp<mlir::UnrealizedConversionCastOp>();

  auto allDataOperandsAreConverted = [](ValueRange operands) {
    for (Value operand : operands) {
--- a/flang/test/Transforms/OpenACC/convert-data-operands-to-llvmir.fir
+++ b/flang/test/Transforms/OpenACC/convert-data-operands-to-llvmir.fir
@@ -1,4 +1,10 @@
 // RUN: fir-opt -fir-openacc-data-operand-conversion='use-opaque-pointers=1' -split-input-file %s | FileCheck %s
+// RUN: fir-opt -fir-openacc-data-operand-conversion='use-opaque-pointers=1' -split-input-file %s | fir-opt --fir-to-llvm-ir | FileCheck %s --check-prefix=LLVMIR
+
+fir.global internal @_QFEa : !fir.array<10xf32> {
+  %0 = fir.undefined !fir.array<10xf32>
+  fir.has_value %0 : !fir.array<10xf32>
+}

 func.func @_QQsub1() attributes {fir.bindc_name = "arr"} {
  %0 = fir.address_of(@_QFEa) : !fir.ref<!fir.array<10xf32>>
@@ -13,8 +19,17 @@ func.func @_QQsub1() attributes {fir.bindc_name = "arr"} {
 // CHECK: %[[CAST:.*]] = builtin.unrealized_conversion_cast %[[ADDR]] : !fir.ref<!fir.array<10xf32>> to !llvm.ptr<array<10 x f32>>
 // CHECK: acc.data copy(%[[CAST]] : !llvm.ptr<array<10 x f32>>)

+// LLVMIR-LABEL: llvm.func @_QQsub1() attributes {fir.bindc_name = "arr"} {
+// LLVMIR: %[[ADDR:.*]] = llvm.mlir.addressof @_QFEa : !llvm.ptr<array<10 x f32>>
+// LLVMIR: acc.data copy(%[[ADDR]] : !llvm.ptr<array<10 x f32>>) {
+
 // -----

+fir.global internal @_QFEa : !fir.array<10xf32> {
+  %0 = fir.undefined !fir.array<10xf32>
+  fir.has_value %0 : !fir.array<10xf32>
+}
+
 func.func @_QQsub_enter_exit() attributes {fir.bindc_name = "a"} {
  %0 = fir.address_of(@_QFEa) : !fir.ref<!fir.array<10xf32>>
  acc.enter_data copyin(%0 : !fir.ref<!fir.array<10xf32>>)
@@ -29,8 +44,18 @@ func.func @_QQsub_enter_exit() attributes {fir.bindc_name = "a"} {
 // CHECK: %[[CAST1:.*]] = builtin.unrealized_conversion_cast %[[ADDR]] : !fir.ref<!fir.array<10xf32>> to !llvm.ptr<array<10 x f32>>
 // CHECK: acc.exit_data copyout(%[[CAST1]] : !llvm.ptr<array<10 x f32>>)

+// LLVMIR-LABEL: llvm.func @_QQsub_enter_exit() attributes {fir.bindc_name = "a"} {
+// LLVMIR: %[[ADDR:.*]] = llvm.mlir.addressof @_QFEa : !llvm.ptr<array<10 x f32>>
+// LLVMIR: acc.enter_data copyin(%[[ADDR]] : !llvm.ptr<array<10 x f32>>)
+// LLVMIR: acc.exit_data copyout(%[[ADDR]] : !llvm.ptr<array<10 x f32>>)
+
 // -----

+fir.global internal @_QFEa : !fir.array<10xf32> {
+  %0 = fir.undefined !fir.array<10xf32>
+  fir.has_value %0 : !fir.array<10xf32>
+}
+
 func.func @_QQsub_update() attributes {fir.bindc_name = "a"} {
  %0 = fir.address_of(@_QFEa) : !fir.ref<!fir.array<10xf32>>
  acc.update device(%0 : !fir.ref<!fir.array<10xf32>>)
@@ -42,8 +67,17 @@ func.func @_QQsub_update() attributes {fir.bindc_name = "a"} {
 // CHECK: %[[CAST:.*]] = builtin.unrealized_conversion_cast %[[ADDR]] : !fir.ref<!fir.array<10xf32>> to !llvm.ptr<array<10 x f32>>
 // CHECK: acc.update device(%[[CAST]] : !llvm.ptr<array<10 x f32>>)

+// LLVMIR-LABEL: llvm.func @_QQsub_update() attributes {fir.bindc_name = "a"} {
+// LLVMIR: %[[ADDR:.*]] = llvm.mlir.addressof @_QFEa : !llvm.ptr<array<10 x f32>>
+// LLVMIR: acc.update device(%[[ADDR]] : !llvm.ptr<array<10 x f32>>)
+
 // -----

+fir.global internal @_QFEa : !fir.array<10xf32> {
+  %0 = fir.undefined !fir.array<10xf32>
+  fir.has_value %0 : !fir.array<10xf32>
+}
+
 func.func @_QQsub_parallel() attributes {fir.bindc_name = "test"} {
  %0 = fir.address_of(@_QFEa) : !fir.ref<!fir.array<10xf32>>
  %1 = fir.alloca i32 {bindc_name = "i", uniq_name = "_QFEi"}
@@ -82,3 +116,7 @@ func.func @_QQsub_parallel() attributes {fir.bindc_name = "test"} {
 // CHECK: %[[ADDR:.*]] = fir.address_of(@_QFEa) : !fir.ref<!fir.array<10xf32>>
 // CHECK: %[[CAST:.*]] = builtin.unrealized_conversion_cast %[[ADDR]] : !fir.ref<!fir.array<10xf32>> to !llvm.ptr<array<10 x f32>>
 // CHECK: acc.parallel copyin(%[[CAST]]: !llvm.ptr<array<10 x f32>>) {
+
+// LLVMIR-LABEL: llvm.func @_QQsub_parallel() attributes {fir.bindc_name = "test"} {
+// LLVMIR: %[[ADDR:.*]] = llvm.mlir.addressof @_QFEa : !llvm.ptr<array<10 x f32>>
+// LLVMIR: acc.parallel copyin(%[[ADDR]]: !llvm.ptr<array<10 x f32>>) {