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[NFC][AMDGPU] Re-enable two tests previously disabled due to missing upstream features (#149568)

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This PR re-enables two tests that were previously disabled because they
depended on features not yet upstreamed.
This commit is contained in:
Shilei Tian
2025-07-18 17:04:34 -04:00
committed by GitHub
parent ffb453989b
commit d46de86ca4
3 changed files with 2 additions and 6 deletions
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3
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
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@@ -1,10 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; xUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 < %s | FileCheck -check-prefix=SDAG-TRUE16 %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 < %s | FileCheck -check-prefix=SDAG-TRUE16 %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 < %s | FileCheck -check-prefix=SDAG-FAKE16 %s
; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 < %s | FileCheck -check-prefix=GI-TRUE16 %s
; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 < %s | FileCheck -check-prefix=GI-FAKE16 %s
; FIXME: t16 doesn't work at the moment because the store of s16 under t16 mode fails to select.
; FIXME: GlobalISel does not work with bf16
declare bfloat @llvm.amdgcn.rcp.bf16(bfloat) #0

3
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.bf16.ll
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@@ -1,10 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; xUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 %s -o - | FileCheck -check-prefix=SDAG-REAL16 %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 %s -o - | FileCheck -check-prefix=SDAG-REAL16 %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 %s -o - | FileCheck -check-prefix=SDAG-FAKE16 %s
; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 %s -o - | FileCheck -check-prefix=GISEL-REAL16 %s
; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 %s -o - | FileCheck -check-prefix=GISEL-FAKE16 %s
; FIXME: t16 doesn't work at the moment because the store of s16 under t16 mode fails to select.
; FIXME: GlobalISel does not work with bf16
declare bfloat @llvm.amdgcn.rsq.bf16(bfloat) #0

2
llvm/test/CodeGen/AMDGPU/llvm.sqrt.bf16.ll
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@@ -2,8 +2,6 @@
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX12-TRUE16 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX12-FAKE16 %s
; FIXME: t16 doesn't work at the moment because the store of s16 under t16 mode fails to select.
declare bfloat @llvm.sqrt.bf16(bfloat %a)
declare <2 x bfloat> @llvm.sqrt.v2bf16(<2 x bfloat> %a)