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Implement __atomic_fetch_nand and __atomic_nand_fetch to complete our set of
GNU __atomic builtins. llvm-svn: 154659
This commit is contained in:
@@ -630,11 +630,13 @@ ATOMIC_BUILTIN(__atomic_fetch_sub, "v.", "t")
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ATOMIC_BUILTIN(__atomic_fetch_and, "v.", "t")
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ATOMIC_BUILTIN(__atomic_fetch_or, "v.", "t")
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ATOMIC_BUILTIN(__atomic_fetch_xor, "v.", "t")
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ATOMIC_BUILTIN(__atomic_fetch_nand, "v.", "t")
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ATOMIC_BUILTIN(__atomic_add_fetch, "v.", "t")
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ATOMIC_BUILTIN(__atomic_sub_fetch, "v.", "t")
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ATOMIC_BUILTIN(__atomic_and_fetch, "v.", "t")
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ATOMIC_BUILTIN(__atomic_or_fetch, "v.", "t")
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ATOMIC_BUILTIN(__atomic_xor_fetch, "v.", "t")
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ATOMIC_BUILTIN(__atomic_nand_fetch, "v.", "t")
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BUILTIN(__atomic_test_and_set, "bvD*i", "n")
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BUILTIN(__atomic_clear, "vvD*i", "n")
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BUILTIN(__atomic_thread_fence, "vi", "n")
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@@ -3879,11 +3879,13 @@ unsigned AtomicExpr::getNumSubExprs(AtomicOp Op) {
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case AO__atomic_fetch_and:
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case AO__atomic_fetch_or:
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case AO__atomic_fetch_xor:
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case AO__atomic_fetch_nand:
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case AO__atomic_add_fetch:
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case AO__atomic_sub_fetch:
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case AO__atomic_and_fetch:
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case AO__atomic_or_fetch:
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case AO__atomic_xor_fetch:
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case AO__atomic_nand_fetch:
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return 3;
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case AO__atomic_exchange:
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@@ -2788,6 +2788,13 @@ EmitAtomicOp(CodeGenFunction &CGF, AtomicExpr *E, llvm::Value *Dest,
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case AtomicExpr::AO__atomic_fetch_xor:
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Op = llvm::AtomicRMWInst::Xor;
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break;
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case AtomicExpr::AO__atomic_nand_fetch:
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PostOp = llvm::Instruction::And;
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// Fall through.
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case AtomicExpr::AO__atomic_fetch_nand:
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Op = llvm::AtomicRMWInst::Nand;
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break;
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}
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llvm::LoadInst *LoadVal1 = CGF.Builder.CreateLoad(Val1);
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@@ -2801,7 +2808,8 @@ EmitAtomicOp(CodeGenFunction &CGF, AtomicExpr *E, llvm::Value *Dest,
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llvm::Value *Result = RMWI;
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if (PostOp)
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Result = CGF.Builder.CreateBinOp(PostOp, RMWI, LoadVal1);
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if (E->getOp() == AtomicExpr::AO__atomic_nand_fetch)
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Result = CGF.Builder.CreateNot(Result);
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llvm::StoreInst *StoreDest = CGF.Builder.CreateStore(Result, Dest);
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StoreDest->setAlignment(Align);
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}
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@@ -2933,9 +2941,11 @@ RValue CodeGenFunction::EmitAtomicExpr(AtomicExpr *E, llvm::Value *Dest) {
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case AtomicExpr::AO__atomic_fetch_and:
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case AtomicExpr::AO__atomic_fetch_or:
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case AtomicExpr::AO__atomic_fetch_xor:
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case AtomicExpr::AO__atomic_fetch_nand:
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case AtomicExpr::AO__atomic_and_fetch:
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case AtomicExpr::AO__atomic_or_fetch:
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case AtomicExpr::AO__atomic_xor_fetch:
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case AtomicExpr::AO__atomic_nand_fetch:
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Val1 = EmitValToTemp(*this, E->getVal1());
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break;
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}
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@@ -560,9 +560,11 @@ ExprResult Sema::SemaAtomicOpsOverloaded(ExprResult TheCallResult,
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case AtomicExpr::AO__atomic_fetch_and:
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case AtomicExpr::AO__atomic_fetch_or:
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case AtomicExpr::AO__atomic_fetch_xor:
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case AtomicExpr::AO__atomic_fetch_nand:
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case AtomicExpr::AO__atomic_and_fetch:
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case AtomicExpr::AO__atomic_or_fetch:
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case AtomicExpr::AO__atomic_xor_fetch:
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case AtomicExpr::AO__atomic_nand_fetch:
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Form = Arithmetic;
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break;
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@@ -74,6 +74,21 @@ int fi3b(int *i) {
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return __atomic_add_fetch(i, 1, memory_order_seq_cst);
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}
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int fi3c(int *i) {
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// CHECK: @fi3c
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// CHECK: atomicrmw nand
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// CHECK-NOT: and
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return __atomic_fetch_nand(i, 1, memory_order_seq_cst);
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}
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int fi3d(int *i) {
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// CHECK: @fi3d
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// CHECK: atomicrmw nand
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// CHECK: and
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// CHECK: xor
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return __atomic_nand_fetch(i, 1, memory_order_seq_cst);
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}
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_Bool fi4(_Atomic(int) *i) {
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// CHECK: @fi4
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// CHECK: cmpxchg i32*
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