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[mlir][spirv] Add GroupNonUniformBallotFindLSB and GroupNonUniformBallotFindMSB ops (#104791)
This commit is contained in:
Angel Zhang
GitHub
@@ -4243,230 +4243,231 @@ class SPIRV_OpCode<string name, int val> {
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// Begin opcode section. Generated from SPIR-V spec; DO NOT MODIFY!
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def SPIRV_OC_OpNop : I32EnumAttrCase<"OpNop", 0>;
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def SPIRV_OC_OpUndef : I32EnumAttrCase<"OpUndef", 1>;
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def SPIRV_OC_OpSourceContinued : I32EnumAttrCase<"OpSourceContinued", 2>;
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def SPIRV_OC_OpSource : I32EnumAttrCase<"OpSource", 3>;
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def SPIRV_OC_OpSourceExtension : I32EnumAttrCase<"OpSourceExtension", 4>;
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def SPIRV_OC_OpName : I32EnumAttrCase<"OpName", 5>;
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def SPIRV_OC_OpMemberName : I32EnumAttrCase<"OpMemberName", 6>;
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def SPIRV_OC_OpString : I32EnumAttrCase<"OpString", 7>;
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def SPIRV_OC_OpLine : I32EnumAttrCase<"OpLine", 8>;
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def SPIRV_OC_OpExtension : I32EnumAttrCase<"OpExtension", 10>;
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def SPIRV_OC_OpExtInstImport : I32EnumAttrCase<"OpExtInstImport", 11>;
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def SPIRV_OC_OpExtInst : I32EnumAttrCase<"OpExtInst", 12>;
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def SPIRV_OC_OpMemoryModel : I32EnumAttrCase<"OpMemoryModel", 14>;
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def SPIRV_OC_OpEntryPoint : I32EnumAttrCase<"OpEntryPoint", 15>;
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def SPIRV_OC_OpExecutionMode : I32EnumAttrCase<"OpExecutionMode", 16>;
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def SPIRV_OC_OpCapability : I32EnumAttrCase<"OpCapability", 17>;
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def SPIRV_OC_OpTypeVoid : I32EnumAttrCase<"OpTypeVoid", 19>;
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def SPIRV_OC_OpTypeBool : I32EnumAttrCase<"OpTypeBool", 20>;
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def SPIRV_OC_OpTypeInt : I32EnumAttrCase<"OpTypeInt", 21>;
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def SPIRV_OC_OpTypeFloat : I32EnumAttrCase<"OpTypeFloat", 22>;
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def SPIRV_OC_OpTypeVector : I32EnumAttrCase<"OpTypeVector", 23>;
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def SPIRV_OC_OpTypeMatrix : I32EnumAttrCase<"OpTypeMatrix", 24>;
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def SPIRV_OC_OpTypeImage : I32EnumAttrCase<"OpTypeImage", 25>;
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def SPIRV_OC_OpTypeSampledImage : I32EnumAttrCase<"OpTypeSampledImage", 27>;
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def SPIRV_OC_OpTypeArray : I32EnumAttrCase<"OpTypeArray", 28>;
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def SPIRV_OC_OpTypeRuntimeArray : I32EnumAttrCase<"OpTypeRuntimeArray", 29>;
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def SPIRV_OC_OpTypeStruct : I32EnumAttrCase<"OpTypeStruct", 30>;
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def SPIRV_OC_OpTypePointer : I32EnumAttrCase<"OpTypePointer", 32>;
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def SPIRV_OC_OpTypeFunction : I32EnumAttrCase<"OpTypeFunction", 33>;
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def SPIRV_OC_OpTypeForwardPointer : I32EnumAttrCase<"OpTypeForwardPointer", 39>;
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def SPIRV_OC_OpConstantTrue : I32EnumAttrCase<"OpConstantTrue", 41>;
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def SPIRV_OC_OpConstantFalse : I32EnumAttrCase<"OpConstantFalse", 42>;
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def SPIRV_OC_OpConstant : I32EnumAttrCase<"OpConstant", 43>;
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def SPIRV_OC_OpConstantComposite : I32EnumAttrCase<"OpConstantComposite", 44>;
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def SPIRV_OC_OpConstantNull : I32EnumAttrCase<"OpConstantNull", 46>;
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def SPIRV_OC_OpSpecConstantTrue : I32EnumAttrCase<"OpSpecConstantTrue", 48>;
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def SPIRV_OC_OpSpecConstantFalse : I32EnumAttrCase<"OpSpecConstantFalse", 49>;
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def SPIRV_OC_OpSpecConstant : I32EnumAttrCase<"OpSpecConstant", 50>;
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def SPIRV_OC_OpSpecConstantComposite : I32EnumAttrCase<"OpSpecConstantComposite", 51>;
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def SPIRV_OC_OpSpecConstantOp : I32EnumAttrCase<"OpSpecConstantOp", 52>;
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def SPIRV_OC_OpFunction : I32EnumAttrCase<"OpFunction", 54>;
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def SPIRV_OC_OpFunctionParameter : I32EnumAttrCase<"OpFunctionParameter", 55>;
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def SPIRV_OC_OpFunctionEnd : I32EnumAttrCase<"OpFunctionEnd", 56>;
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def SPIRV_OC_OpFunctionCall : I32EnumAttrCase<"OpFunctionCall", 57>;
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def SPIRV_OC_OpVariable : I32EnumAttrCase<"OpVariable", 59>;
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def SPIRV_OC_OpLoad : I32EnumAttrCase<"OpLoad", 61>;
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def SPIRV_OC_OpStore : I32EnumAttrCase<"OpStore", 62>;
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def SPIRV_OC_OpCopyMemory : I32EnumAttrCase<"OpCopyMemory", 63>;
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def SPIRV_OC_OpAccessChain : I32EnumAttrCase<"OpAccessChain", 65>;
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def SPIRV_OC_OpPtrAccessChain : I32EnumAttrCase<"OpPtrAccessChain", 67>;
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def SPIRV_OC_OpInBoundsPtrAccessChain : I32EnumAttrCase<"OpInBoundsPtrAccessChain", 70>;
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def SPIRV_OC_OpDecorate : I32EnumAttrCase<"OpDecorate", 71>;
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def SPIRV_OC_OpMemberDecorate : I32EnumAttrCase<"OpMemberDecorate", 72>;
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def SPIRV_OC_OpVectorExtractDynamic : I32EnumAttrCase<"OpVectorExtractDynamic", 77>;
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def SPIRV_OC_OpVectorInsertDynamic : I32EnumAttrCase<"OpVectorInsertDynamic", 78>;
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def SPIRV_OC_OpVectorShuffle : I32EnumAttrCase<"OpVectorShuffle", 79>;
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def SPIRV_OC_OpCompositeConstruct : I32EnumAttrCase<"OpCompositeConstruct", 80>;
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def SPIRV_OC_OpCompositeExtract : I32EnumAttrCase<"OpCompositeExtract", 81>;
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def SPIRV_OC_OpCompositeInsert : I32EnumAttrCase<"OpCompositeInsert", 82>;
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def SPIRV_OC_OpTranspose : I32EnumAttrCase<"OpTranspose", 84>;
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def SPIRV_OC_OpImageDrefGather : I32EnumAttrCase<"OpImageDrefGather", 97>;
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def SPIRV_OC_OpImage : I32EnumAttrCase<"OpImage", 100>;
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def SPIRV_OC_OpImageQuerySize : I32EnumAttrCase<"OpImageQuerySize", 104>;
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def SPIRV_OC_OpConvertFToU : I32EnumAttrCase<"OpConvertFToU", 109>;
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def SPIRV_OC_OpConvertFToS : I32EnumAttrCase<"OpConvertFToS", 110>;
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def SPIRV_OC_OpConvertSToF : I32EnumAttrCase<"OpConvertSToF", 111>;
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def SPIRV_OC_OpConvertUToF : I32EnumAttrCase<"OpConvertUToF", 112>;
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def SPIRV_OC_OpUConvert : I32EnumAttrCase<"OpUConvert", 113>;
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def SPIRV_OC_OpSConvert : I32EnumAttrCase<"OpSConvert", 114>;
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def SPIRV_OC_OpFConvert : I32EnumAttrCase<"OpFConvert", 115>;
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def SPIRV_OC_OpConvertPtrToU : I32EnumAttrCase<"OpConvertPtrToU", 117>;
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def SPIRV_OC_OpConvertUToPtr : I32EnumAttrCase<"OpConvertUToPtr", 120>;
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def SPIRV_OC_OpPtrCastToGeneric : I32EnumAttrCase<"OpPtrCastToGeneric", 121>;
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def SPIRV_OC_OpGenericCastToPtr : I32EnumAttrCase<"OpGenericCastToPtr", 122>;
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def SPIRV_OC_OpGenericCastToPtrExplicit : I32EnumAttrCase<"OpGenericCastToPtrExplicit", 123>;
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def SPIRV_OC_OpBitcast : I32EnumAttrCase<"OpBitcast", 124>;
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def SPIRV_OC_OpSNegate : I32EnumAttrCase<"OpSNegate", 126>;
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def SPIRV_OC_OpFNegate : I32EnumAttrCase<"OpFNegate", 127>;
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def SPIRV_OC_OpIAdd : I32EnumAttrCase<"OpIAdd", 128>;
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def SPIRV_OC_OpFAdd : I32EnumAttrCase<"OpFAdd", 129>;
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def SPIRV_OC_OpISub : I32EnumAttrCase<"OpISub", 130>;
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def SPIRV_OC_OpFSub : I32EnumAttrCase<"OpFSub", 131>;
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def SPIRV_OC_OpIMul : I32EnumAttrCase<"OpIMul", 132>;
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def SPIRV_OC_OpFMul : I32EnumAttrCase<"OpFMul", 133>;
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def SPIRV_OC_OpUDiv : I32EnumAttrCase<"OpUDiv", 134>;
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def SPIRV_OC_OpSDiv : I32EnumAttrCase<"OpSDiv", 135>;
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def SPIRV_OC_OpFDiv : I32EnumAttrCase<"OpFDiv", 136>;
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def SPIRV_OC_OpUMod : I32EnumAttrCase<"OpUMod", 137>;
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def SPIRV_OC_OpSRem : I32EnumAttrCase<"OpSRem", 138>;
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def SPIRV_OC_OpSMod : I32EnumAttrCase<"OpSMod", 139>;
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def SPIRV_OC_OpFRem : I32EnumAttrCase<"OpFRem", 140>;
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def SPIRV_OC_OpFMod : I32EnumAttrCase<"OpFMod", 141>;
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def SPIRV_OC_OpVectorTimesScalar : I32EnumAttrCase<"OpVectorTimesScalar", 142>;
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def SPIRV_OC_OpMatrixTimesScalar : I32EnumAttrCase<"OpMatrixTimesScalar", 143>;
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def SPIRV_OC_OpMatrixTimesMatrix : I32EnumAttrCase<"OpMatrixTimesMatrix", 146>;
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def SPIRV_OC_OpDot : I32EnumAttrCase<"OpDot", 148>;
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def SPIRV_OC_OpIAddCarry : I32EnumAttrCase<"OpIAddCarry", 149>;
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def SPIRV_OC_OpISubBorrow : I32EnumAttrCase<"OpISubBorrow", 150>;
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def SPIRV_OC_OpUMulExtended : I32EnumAttrCase<"OpUMulExtended", 151>;
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def SPIRV_OC_OpSMulExtended : I32EnumAttrCase<"OpSMulExtended", 152>;
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def SPIRV_OC_OpIsNan : I32EnumAttrCase<"OpIsNan", 156>;
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def SPIRV_OC_OpIsInf : I32EnumAttrCase<"OpIsInf", 157>;
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def SPIRV_OC_OpOrdered : I32EnumAttrCase<"OpOrdered", 162>;
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def SPIRV_OC_OpUnordered : I32EnumAttrCase<"OpUnordered", 163>;
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def SPIRV_OC_OpLogicalEqual : I32EnumAttrCase<"OpLogicalEqual", 164>;
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def SPIRV_OC_OpLogicalNotEqual : I32EnumAttrCase<"OpLogicalNotEqual", 165>;
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def SPIRV_OC_OpLogicalOr : I32EnumAttrCase<"OpLogicalOr", 166>;
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def SPIRV_OC_OpLogicalAnd : I32EnumAttrCase<"OpLogicalAnd", 167>;
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def SPIRV_OC_OpLogicalNot : I32EnumAttrCase<"OpLogicalNot", 168>;
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def SPIRV_OC_OpSelect : I32EnumAttrCase<"OpSelect", 169>;
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def SPIRV_OC_OpIEqual : I32EnumAttrCase<"OpIEqual", 170>;
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def SPIRV_OC_OpINotEqual : I32EnumAttrCase<"OpINotEqual", 171>;
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def SPIRV_OC_OpUGreaterThan : I32EnumAttrCase<"OpUGreaterThan", 172>;
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def SPIRV_OC_OpSGreaterThan : I32EnumAttrCase<"OpSGreaterThan", 173>;
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def SPIRV_OC_OpUGreaterThanEqual : I32EnumAttrCase<"OpUGreaterThanEqual", 174>;
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def SPIRV_OC_OpSGreaterThanEqual : I32EnumAttrCase<"OpSGreaterThanEqual", 175>;
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def SPIRV_OC_OpULessThan : I32EnumAttrCase<"OpULessThan", 176>;
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def SPIRV_OC_OpSLessThan : I32EnumAttrCase<"OpSLessThan", 177>;
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def SPIRV_OC_OpULessThanEqual : I32EnumAttrCase<"OpULessThanEqual", 178>;
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def SPIRV_OC_OpSLessThanEqual : I32EnumAttrCase<"OpSLessThanEqual", 179>;
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def SPIRV_OC_OpFOrdEqual : I32EnumAttrCase<"OpFOrdEqual", 180>;
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def SPIRV_OC_OpFUnordEqual : I32EnumAttrCase<"OpFUnordEqual", 181>;
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def SPIRV_OC_OpFOrdNotEqual : I32EnumAttrCase<"OpFOrdNotEqual", 182>;
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def SPIRV_OC_OpFUnordNotEqual : I32EnumAttrCase<"OpFUnordNotEqual", 183>;
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def SPIRV_OC_OpFOrdLessThan : I32EnumAttrCase<"OpFOrdLessThan", 184>;
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def SPIRV_OC_OpFUnordLessThan : I32EnumAttrCase<"OpFUnordLessThan", 185>;
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def SPIRV_OC_OpFOrdGreaterThan : I32EnumAttrCase<"OpFOrdGreaterThan", 186>;
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def SPIRV_OC_OpFUnordGreaterThan : I32EnumAttrCase<"OpFUnordGreaterThan", 187>;
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def SPIRV_OC_OpFOrdLessThanEqual : I32EnumAttrCase<"OpFOrdLessThanEqual", 188>;
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def SPIRV_OC_OpFUnordLessThanEqual : I32EnumAttrCase<"OpFUnordLessThanEqual", 189>;
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def SPIRV_OC_OpFOrdGreaterThanEqual : I32EnumAttrCase<"OpFOrdGreaterThanEqual", 190>;
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def SPIRV_OC_OpFUnordGreaterThanEqual : I32EnumAttrCase<"OpFUnordGreaterThanEqual", 191>;
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def SPIRV_OC_OpShiftRightLogical : I32EnumAttrCase<"OpShiftRightLogical", 194>;
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def SPIRV_OC_OpShiftRightArithmetic : I32EnumAttrCase<"OpShiftRightArithmetic", 195>;
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def SPIRV_OC_OpShiftLeftLogical : I32EnumAttrCase<"OpShiftLeftLogical", 196>;
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def SPIRV_OC_OpBitwiseOr : I32EnumAttrCase<"OpBitwiseOr", 197>;
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def SPIRV_OC_OpBitwiseXor : I32EnumAttrCase<"OpBitwiseXor", 198>;
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def SPIRV_OC_OpBitwiseAnd : I32EnumAttrCase<"OpBitwiseAnd", 199>;
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def SPIRV_OC_OpNot : I32EnumAttrCase<"OpNot", 200>;
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def SPIRV_OC_OpBitFieldInsert : I32EnumAttrCase<"OpBitFieldInsert", 201>;
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def SPIRV_OC_OpBitFieldSExtract : I32EnumAttrCase<"OpBitFieldSExtract", 202>;
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def SPIRV_OC_OpBitFieldUExtract : I32EnumAttrCase<"OpBitFieldUExtract", 203>;
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def SPIRV_OC_OpBitReverse : I32EnumAttrCase<"OpBitReverse", 204>;
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def SPIRV_OC_OpBitCount : I32EnumAttrCase<"OpBitCount", 205>;
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def SPIRV_OC_OpControlBarrier : I32EnumAttrCase<"OpControlBarrier", 224>;
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def SPIRV_OC_OpMemoryBarrier : I32EnumAttrCase<"OpMemoryBarrier", 225>;
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def SPIRV_OC_OpAtomicExchange : I32EnumAttrCase<"OpAtomicExchange", 229>;
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def SPIRV_OC_OpAtomicCompareExchange : I32EnumAttrCase<"OpAtomicCompareExchange", 230>;
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def SPIRV_OC_OpAtomicCompareExchangeWeak : I32EnumAttrCase<"OpAtomicCompareExchangeWeak", 231>;
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def SPIRV_OC_OpAtomicIIncrement : I32EnumAttrCase<"OpAtomicIIncrement", 232>;
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def SPIRV_OC_OpAtomicIDecrement : I32EnumAttrCase<"OpAtomicIDecrement", 233>;
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def SPIRV_OC_OpAtomicIAdd : I32EnumAttrCase<"OpAtomicIAdd", 234>;
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def SPIRV_OC_OpAtomicISub : I32EnumAttrCase<"OpAtomicISub", 235>;
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def SPIRV_OC_OpAtomicSMin : I32EnumAttrCase<"OpAtomicSMin", 236>;
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def SPIRV_OC_OpAtomicUMin : I32EnumAttrCase<"OpAtomicUMin", 237>;
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def SPIRV_OC_OpAtomicSMax : I32EnumAttrCase<"OpAtomicSMax", 238>;
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def SPIRV_OC_OpAtomicUMax : I32EnumAttrCase<"OpAtomicUMax", 239>;
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def SPIRV_OC_OpAtomicAnd : I32EnumAttrCase<"OpAtomicAnd", 240>;
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def SPIRV_OC_OpAtomicOr : I32EnumAttrCase<"OpAtomicOr", 241>;
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def SPIRV_OC_OpAtomicXor : I32EnumAttrCase<"OpAtomicXor", 242>;
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def SPIRV_OC_OpPhi : I32EnumAttrCase<"OpPhi", 245>;
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def SPIRV_OC_OpLoopMerge : I32EnumAttrCase<"OpLoopMerge", 246>;
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def SPIRV_OC_OpSelectionMerge : I32EnumAttrCase<"OpSelectionMerge", 247>;
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def SPIRV_OC_OpLabel : I32EnumAttrCase<"OpLabel", 248>;
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def SPIRV_OC_OpBranch : I32EnumAttrCase<"OpBranch", 249>;
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def SPIRV_OC_OpBranchConditional : I32EnumAttrCase<"OpBranchConditional", 250>;
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def SPIRV_OC_OpReturn : I32EnumAttrCase<"OpReturn", 253>;
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def SPIRV_OC_OpReturnValue : I32EnumAttrCase<"OpReturnValue", 254>;
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def SPIRV_OC_OpUnreachable : I32EnumAttrCase<"OpUnreachable", 255>;
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def SPIRV_OC_OpGroupBroadcast : I32EnumAttrCase<"OpGroupBroadcast", 263>;
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def SPIRV_OC_OpGroupIAdd : I32EnumAttrCase<"OpGroupIAdd", 264>;
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def SPIRV_OC_OpGroupFAdd : I32EnumAttrCase<"OpGroupFAdd", 265>;
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def SPIRV_OC_OpGroupFMin : I32EnumAttrCase<"OpGroupFMin", 266>;
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def SPIRV_OC_OpGroupUMin : I32EnumAttrCase<"OpGroupUMin", 267>;
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def SPIRV_OC_OpGroupSMin : I32EnumAttrCase<"OpGroupSMin", 268>;
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def SPIRV_OC_OpGroupFMax : I32EnumAttrCase<"OpGroupFMax", 269>;
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def SPIRV_OC_OpGroupUMax : I32EnumAttrCase<"OpGroupUMax", 270>;
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def SPIRV_OC_OpGroupSMax : I32EnumAttrCase<"OpGroupSMax", 271>;
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def SPIRV_OC_OpNoLine : I32EnumAttrCase<"OpNoLine", 317>;
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def SPIRV_OC_OpModuleProcessed : I32EnumAttrCase<"OpModuleProcessed", 330>;
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def SPIRV_OC_OpGroupNonUniformElect : I32EnumAttrCase<"OpGroupNonUniformElect", 333>;
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def SPIRV_OC_OpGroupNonUniformBroadcast : I32EnumAttrCase<"OpGroupNonUniformBroadcast", 337>;
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def SPIRV_OC_OpGroupNonUniformBallot : I32EnumAttrCase<"OpGroupNonUniformBallot", 339>;
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def SPIRV_OC_OpGroupNonUniformShuffle : I32EnumAttrCase<"OpGroupNonUniformShuffle", 345>;
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def SPIRV_OC_OpGroupNonUniformShuffleXor : I32EnumAttrCase<"OpGroupNonUniformShuffleXor", 346>;
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def SPIRV_OC_OpGroupNonUniformShuffleUp : I32EnumAttrCase<"OpGroupNonUniformShuffleUp", 347>;
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def SPIRV_OC_OpGroupNonUniformShuffleDown : I32EnumAttrCase<"OpGroupNonUniformShuffleDown", 348>;
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def SPIRV_OC_OpGroupNonUniformIAdd : I32EnumAttrCase<"OpGroupNonUniformIAdd", 349>;
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def SPIRV_OC_OpGroupNonUniformFAdd : I32EnumAttrCase<"OpGroupNonUniformFAdd", 350>;
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def SPIRV_OC_OpGroupNonUniformIMul : I32EnumAttrCase<"OpGroupNonUniformIMul", 351>;
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def SPIRV_OC_OpGroupNonUniformFMul : I32EnumAttrCase<"OpGroupNonUniformFMul", 352>;
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def SPIRV_OC_OpGroupNonUniformSMin : I32EnumAttrCase<"OpGroupNonUniformSMin", 353>;
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def SPIRV_OC_OpGroupNonUniformUMin : I32EnumAttrCase<"OpGroupNonUniformUMin", 354>;
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def SPIRV_OC_OpGroupNonUniformFMin : I32EnumAttrCase<"OpGroupNonUniformFMin", 355>;
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def SPIRV_OC_OpGroupNonUniformSMax : I32EnumAttrCase<"OpGroupNonUniformSMax", 356>;
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def SPIRV_OC_OpGroupNonUniformUMax : I32EnumAttrCase<"OpGroupNonUniformUMax", 357>;
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def SPIRV_OC_OpGroupNonUniformFMax : I32EnumAttrCase<"OpGroupNonUniformFMax", 358>;
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def SPIRV_OC_OpGroupNonUniformBitwiseAnd : I32EnumAttrCase<"OpGroupNonUniformBitwiseAnd", 359>;
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def SPIRV_OC_OpGroupNonUniformBitwiseOr : I32EnumAttrCase<"OpGroupNonUniformBitwiseOr", 360>;
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def SPIRV_OC_OpGroupNonUniformBitwiseXor : I32EnumAttrCase<"OpGroupNonUniformBitwiseXor", 361>;
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def SPIRV_OC_OpGroupNonUniformLogicalAnd : I32EnumAttrCase<"OpGroupNonUniformLogicalAnd", 362>;
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def SPIRV_OC_OpGroupNonUniformLogicalOr : I32EnumAttrCase<"OpGroupNonUniformLogicalOr", 363>;
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def SPIRV_OC_OpGroupNonUniformLogicalXor : I32EnumAttrCase<"OpGroupNonUniformLogicalXor", 364>;
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def SPIRV_OC_OpSubgroupBallotKHR : I32EnumAttrCase<"OpSubgroupBallotKHR", 4421>;
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def SPIRV_OC_OpSDot : I32EnumAttrCase<"OpSDot", 4450>;
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def SPIRV_OC_OpUDot : I32EnumAttrCase<"OpUDot", 4451>;
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def SPIRV_OC_OpSUDot : I32EnumAttrCase<"OpSUDot", 4452>;
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def SPIRV_OC_OpSDotAccSat : I32EnumAttrCase<"OpSDotAccSat", 4453>;
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def SPIRV_OC_OpUDotAccSat : I32EnumAttrCase<"OpUDotAccSat", 4454>;
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def SPIRV_OC_OpSUDotAccSat : I32EnumAttrCase<"OpSUDotAccSat", 4455>;
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def SPIRV_OC_OpTypeCooperativeMatrixKHR : I32EnumAttrCase<"OpTypeCooperativeMatrixKHR", 4456>;
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def SPIRV_OC_OpCooperativeMatrixLoadKHR : I32EnumAttrCase<"OpCooperativeMatrixLoadKHR", 4457>;
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def SPIRV_OC_OpCooperativeMatrixStoreKHR : I32EnumAttrCase<"OpCooperativeMatrixStoreKHR", 4458>;
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def SPIRV_OC_OpCooperativeMatrixMulAddKHR : I32EnumAttrCase<"OpCooperativeMatrixMulAddKHR", 4459>;
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def SPIRV_OC_OpCooperativeMatrixLengthKHR : I32EnumAttrCase<"OpCooperativeMatrixLengthKHR", 4460>;
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def SPIRV_OC_OpSubgroupBlockReadINTEL : I32EnumAttrCase<"OpSubgroupBlockReadINTEL", 5575>;
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def SPIRV_OC_OpSubgroupBlockWriteINTEL : I32EnumAttrCase<"OpSubgroupBlockWriteINTEL", 5576>;
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def SPIRV_OC_OpAssumeTrueKHR : I32EnumAttrCase<"OpAssumeTrueKHR", 5630>;
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def SPIRV_OC_OpAtomicFAddEXT : I32EnumAttrCase<"OpAtomicFAddEXT", 6035>;
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def SPIRV_OC_OpGroupIMulKHR : I32EnumAttrCase<"OpGroupIMulKHR", 6401>;
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def SPIRV_OC_OpGroupFMulKHR : I32EnumAttrCase<"OpGroupFMulKHR", 6402>;
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def SPIRV_OC_OpConvertFToBF16INTEL : I32EnumAttrCase<"OpConvertFToBF16INTEL", 6116>;
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def SPIRV_OC_OpConvertBF16ToFINTEL : I32EnumAttrCase<"OpConvertBF16ToFINTEL", 6117>;
|
||||
def SPIRV_OC_OpNop : I32EnumAttrCase<"OpNop", 0>;
|
||||
def SPIRV_OC_OpUndef : I32EnumAttrCase<"OpUndef", 1>;
|
||||
def SPIRV_OC_OpSourceContinued : I32EnumAttrCase<"OpSourceContinued", 2>;
|
||||
def SPIRV_OC_OpSource : I32EnumAttrCase<"OpSource", 3>;
|
||||
def SPIRV_OC_OpSourceExtension : I32EnumAttrCase<"OpSourceExtension", 4>;
|
||||
def SPIRV_OC_OpName : I32EnumAttrCase<"OpName", 5>;
|
||||
def SPIRV_OC_OpMemberName : I32EnumAttrCase<"OpMemberName", 6>;
|
||||
def SPIRV_OC_OpString : I32EnumAttrCase<"OpString", 7>;
|
||||
def SPIRV_OC_OpLine : I32EnumAttrCase<"OpLine", 8>;
|
||||
def SPIRV_OC_OpExtension : I32EnumAttrCase<"OpExtension", 10>;
|
||||
def SPIRV_OC_OpExtInstImport : I32EnumAttrCase<"OpExtInstImport", 11>;
|
||||
def SPIRV_OC_OpExtInst : I32EnumAttrCase<"OpExtInst", 12>;
|
||||
def SPIRV_OC_OpMemoryModel : I32EnumAttrCase<"OpMemoryModel", 14>;
|
||||
def SPIRV_OC_OpEntryPoint : I32EnumAttrCase<"OpEntryPoint", 15>;
|
||||
def SPIRV_OC_OpExecutionMode : I32EnumAttrCase<"OpExecutionMode", 16>;
|
||||
def SPIRV_OC_OpCapability : I32EnumAttrCase<"OpCapability", 17>;
|
||||
def SPIRV_OC_OpTypeVoid : I32EnumAttrCase<"OpTypeVoid", 19>;
|
||||
def SPIRV_OC_OpTypeBool : I32EnumAttrCase<"OpTypeBool", 20>;
|
||||
def SPIRV_OC_OpTypeInt : I32EnumAttrCase<"OpTypeInt", 21>;
|
||||
def SPIRV_OC_OpTypeFloat : I32EnumAttrCase<"OpTypeFloat", 22>;
|
||||
def SPIRV_OC_OpTypeVector : I32EnumAttrCase<"OpTypeVector", 23>;
|
||||
def SPIRV_OC_OpTypeMatrix : I32EnumAttrCase<"OpTypeMatrix", 24>;
|
||||
def SPIRV_OC_OpTypeImage : I32EnumAttrCase<"OpTypeImage", 25>;
|
||||
def SPIRV_OC_OpTypeSampledImage : I32EnumAttrCase<"OpTypeSampledImage", 27>;
|
||||
def SPIRV_OC_OpTypeArray : I32EnumAttrCase<"OpTypeArray", 28>;
|
||||
def SPIRV_OC_OpTypeRuntimeArray : I32EnumAttrCase<"OpTypeRuntimeArray", 29>;
|
||||
def SPIRV_OC_OpTypeStruct : I32EnumAttrCase<"OpTypeStruct", 30>;
|
||||
def SPIRV_OC_OpTypePointer : I32EnumAttrCase<"OpTypePointer", 32>;
|
||||
def SPIRV_OC_OpTypeFunction : I32EnumAttrCase<"OpTypeFunction", 33>;
|
||||
def SPIRV_OC_OpTypeForwardPointer : I32EnumAttrCase<"OpTypeForwardPointer", 39>;
|
||||
def SPIRV_OC_OpConstantTrue : I32EnumAttrCase<"OpConstantTrue", 41>;
|
||||
def SPIRV_OC_OpConstantFalse : I32EnumAttrCase<"OpConstantFalse", 42>;
|
||||
def SPIRV_OC_OpConstant : I32EnumAttrCase<"OpConstant", 43>;
|
||||
def SPIRV_OC_OpConstantComposite : I32EnumAttrCase<"OpConstantComposite", 44>;
|
||||
def SPIRV_OC_OpConstantNull : I32EnumAttrCase<"OpConstantNull", 46>;
|
||||
def SPIRV_OC_OpSpecConstantTrue : I32EnumAttrCase<"OpSpecConstantTrue", 48>;
|
||||
def SPIRV_OC_OpSpecConstantFalse : I32EnumAttrCase<"OpSpecConstantFalse", 49>;
|
||||
def SPIRV_OC_OpSpecConstant : I32EnumAttrCase<"OpSpecConstant", 50>;
|
||||
def SPIRV_OC_OpSpecConstantComposite : I32EnumAttrCase<"OpSpecConstantComposite", 51>;
|
||||
def SPIRV_OC_OpSpecConstantOp : I32EnumAttrCase<"OpSpecConstantOp", 52>;
|
||||
def SPIRV_OC_OpFunction : I32EnumAttrCase<"OpFunction", 54>;
|
||||
def SPIRV_OC_OpFunctionParameter : I32EnumAttrCase<"OpFunctionParameter", 55>;
|
||||
def SPIRV_OC_OpFunctionEnd : I32EnumAttrCase<"OpFunctionEnd", 56>;
|
||||
def SPIRV_OC_OpFunctionCall : I32EnumAttrCase<"OpFunctionCall", 57>;
|
||||
def SPIRV_OC_OpVariable : I32EnumAttrCase<"OpVariable", 59>;
|
||||
def SPIRV_OC_OpLoad : I32EnumAttrCase<"OpLoad", 61>;
|
||||
def SPIRV_OC_OpStore : I32EnumAttrCase<"OpStore", 62>;
|
||||
def SPIRV_OC_OpCopyMemory : I32EnumAttrCase<"OpCopyMemory", 63>;
|
||||
def SPIRV_OC_OpAccessChain : I32EnumAttrCase<"OpAccessChain", 65>;
|
||||
def SPIRV_OC_OpPtrAccessChain : I32EnumAttrCase<"OpPtrAccessChain", 67>;
|
||||
def SPIRV_OC_OpInBoundsPtrAccessChain : I32EnumAttrCase<"OpInBoundsPtrAccessChain", 70>;
|
||||
def SPIRV_OC_OpDecorate : I32EnumAttrCase<"OpDecorate", 71>;
|
||||
def SPIRV_OC_OpMemberDecorate : I32EnumAttrCase<"OpMemberDecorate", 72>;
|
||||
def SPIRV_OC_OpVectorExtractDynamic : I32EnumAttrCase<"OpVectorExtractDynamic", 77>;
|
||||
def SPIRV_OC_OpVectorInsertDynamic : I32EnumAttrCase<"OpVectorInsertDynamic", 78>;
|
||||
def SPIRV_OC_OpVectorShuffle : I32EnumAttrCase<"OpVectorShuffle", 79>;
|
||||
def SPIRV_OC_OpCompositeConstruct : I32EnumAttrCase<"OpCompositeConstruct", 80>;
|
||||
def SPIRV_OC_OpCompositeExtract : I32EnumAttrCase<"OpCompositeExtract", 81>;
|
||||
def SPIRV_OC_OpCompositeInsert : I32EnumAttrCase<"OpCompositeInsert", 82>;
|
||||
def SPIRV_OC_OpTranspose : I32EnumAttrCase<"OpTranspose", 84>;
|
||||
def SPIRV_OC_OpImageDrefGather : I32EnumAttrCase<"OpImageDrefGather", 97>;
|
||||
def SPIRV_OC_OpImage : I32EnumAttrCase<"OpImage", 100>;
|
||||
def SPIRV_OC_OpImageQuerySize : I32EnumAttrCase<"OpImageQuerySize", 104>;
|
||||
def SPIRV_OC_OpConvertFToU : I32EnumAttrCase<"OpConvertFToU", 109>;
|
||||
def SPIRV_OC_OpConvertFToS : I32EnumAttrCase<"OpConvertFToS", 110>;
|
||||
def SPIRV_OC_OpConvertSToF : I32EnumAttrCase<"OpConvertSToF", 111>;
|
||||
def SPIRV_OC_OpConvertUToF : I32EnumAttrCase<"OpConvertUToF", 112>;
|
||||
def SPIRV_OC_OpUConvert : I32EnumAttrCase<"OpUConvert", 113>;
|
||||
def SPIRV_OC_OpSConvert : I32EnumAttrCase<"OpSConvert", 114>;
|
||||
def SPIRV_OC_OpFConvert : I32EnumAttrCase<"OpFConvert", 115>;
|
||||
def SPIRV_OC_OpConvertPtrToU : I32EnumAttrCase<"OpConvertPtrToU", 117>;
|
||||
def SPIRV_OC_OpConvertUToPtr : I32EnumAttrCase<"OpConvertUToPtr", 120>;
|
||||
def SPIRV_OC_OpPtrCastToGeneric : I32EnumAttrCase<"OpPtrCastToGeneric", 121>;
|
||||
def SPIRV_OC_OpGenericCastToPtr : I32EnumAttrCase<"OpGenericCastToPtr", 122>;
|
||||
def SPIRV_OC_OpGenericCastToPtrExplicit : I32EnumAttrCase<"OpGenericCastToPtrExplicit", 123>;
|
||||
def SPIRV_OC_OpBitcast : I32EnumAttrCase<"OpBitcast", 124>;
|
||||
def SPIRV_OC_OpSNegate : I32EnumAttrCase<"OpSNegate", 126>;
|
||||
def SPIRV_OC_OpFNegate : I32EnumAttrCase<"OpFNegate", 127>;
|
||||
def SPIRV_OC_OpIAdd : I32EnumAttrCase<"OpIAdd", 128>;
|
||||
def SPIRV_OC_OpFAdd : I32EnumAttrCase<"OpFAdd", 129>;
|
||||
def SPIRV_OC_OpISub : I32EnumAttrCase<"OpISub", 130>;
|
||||
def SPIRV_OC_OpFSub : I32EnumAttrCase<"OpFSub", 131>;
|
||||
def SPIRV_OC_OpIMul : I32EnumAttrCase<"OpIMul", 132>;
|
||||
def SPIRV_OC_OpFMul : I32EnumAttrCase<"OpFMul", 133>;
|
||||
def SPIRV_OC_OpUDiv : I32EnumAttrCase<"OpUDiv", 134>;
|
||||
def SPIRV_OC_OpSDiv : I32EnumAttrCase<"OpSDiv", 135>;
|
||||
def SPIRV_OC_OpFDiv : I32EnumAttrCase<"OpFDiv", 136>;
|
||||
def SPIRV_OC_OpUMod : I32EnumAttrCase<"OpUMod", 137>;
|
||||
def SPIRV_OC_OpSRem : I32EnumAttrCase<"OpSRem", 138>;
|
||||
def SPIRV_OC_OpSMod : I32EnumAttrCase<"OpSMod", 139>;
|
||||
def SPIRV_OC_OpFRem : I32EnumAttrCase<"OpFRem", 140>;
|
||||
def SPIRV_OC_OpFMod : I32EnumAttrCase<"OpFMod", 141>;
|
||||
def SPIRV_OC_OpVectorTimesScalar : I32EnumAttrCase<"OpVectorTimesScalar", 142>;
|
||||
def SPIRV_OC_OpMatrixTimesScalar : I32EnumAttrCase<"OpMatrixTimesScalar", 143>;
|
||||
def SPIRV_OC_OpMatrixTimesMatrix : I32EnumAttrCase<"OpMatrixTimesMatrix", 146>;
|
||||
def SPIRV_OC_OpDot : I32EnumAttrCase<"OpDot", 148>;
|
||||
def SPIRV_OC_OpIAddCarry : I32EnumAttrCase<"OpIAddCarry", 149>;
|
||||
def SPIRV_OC_OpISubBorrow : I32EnumAttrCase<"OpISubBorrow", 150>;
|
||||
def SPIRV_OC_OpUMulExtended : I32EnumAttrCase<"OpUMulExtended", 151>;
|
||||
def SPIRV_OC_OpSMulExtended : I32EnumAttrCase<"OpSMulExtended", 152>;
|
||||
def SPIRV_OC_OpIsNan : I32EnumAttrCase<"OpIsNan", 156>;
|
||||
def SPIRV_OC_OpIsInf : I32EnumAttrCase<"OpIsInf", 157>;
|
||||
def SPIRV_OC_OpOrdered : I32EnumAttrCase<"OpOrdered", 162>;
|
||||
def SPIRV_OC_OpUnordered : I32EnumAttrCase<"OpUnordered", 163>;
|
||||
def SPIRV_OC_OpLogicalEqual : I32EnumAttrCase<"OpLogicalEqual", 164>;
|
||||
def SPIRV_OC_OpLogicalNotEqual : I32EnumAttrCase<"OpLogicalNotEqual", 165>;
|
||||
def SPIRV_OC_OpLogicalOr : I32EnumAttrCase<"OpLogicalOr", 166>;
|
||||
def SPIRV_OC_OpLogicalAnd : I32EnumAttrCase<"OpLogicalAnd", 167>;
|
||||
def SPIRV_OC_OpLogicalNot : I32EnumAttrCase<"OpLogicalNot", 168>;
|
||||
def SPIRV_OC_OpSelect : I32EnumAttrCase<"OpSelect", 169>;
|
||||
def SPIRV_OC_OpIEqual : I32EnumAttrCase<"OpIEqual", 170>;
|
||||
def SPIRV_OC_OpINotEqual : I32EnumAttrCase<"OpINotEqual", 171>;
|
||||
def SPIRV_OC_OpUGreaterThan : I32EnumAttrCase<"OpUGreaterThan", 172>;
|
||||
def SPIRV_OC_OpSGreaterThan : I32EnumAttrCase<"OpSGreaterThan", 173>;
|
||||
def SPIRV_OC_OpUGreaterThanEqual : I32EnumAttrCase<"OpUGreaterThanEqual", 174>;
|
||||
def SPIRV_OC_OpSGreaterThanEqual : I32EnumAttrCase<"OpSGreaterThanEqual", 175>;
|
||||
def SPIRV_OC_OpULessThan : I32EnumAttrCase<"OpULessThan", 176>;
|
||||
def SPIRV_OC_OpSLessThan : I32EnumAttrCase<"OpSLessThan", 177>;
|
||||
def SPIRV_OC_OpULessThanEqual : I32EnumAttrCase<"OpULessThanEqual", 178>;
|
||||
def SPIRV_OC_OpSLessThanEqual : I32EnumAttrCase<"OpSLessThanEqual", 179>;
|
||||
def SPIRV_OC_OpFOrdEqual : I32EnumAttrCase<"OpFOrdEqual", 180>;
|
||||
def SPIRV_OC_OpFUnordEqual : I32EnumAttrCase<"OpFUnordEqual", 181>;
|
||||
def SPIRV_OC_OpFOrdNotEqual : I32EnumAttrCase<"OpFOrdNotEqual", 182>;
|
||||
def SPIRV_OC_OpFUnordNotEqual : I32EnumAttrCase<"OpFUnordNotEqual", 183>;
|
||||
def SPIRV_OC_OpFOrdLessThan : I32EnumAttrCase<"OpFOrdLessThan", 184>;
|
||||
def SPIRV_OC_OpFUnordLessThan : I32EnumAttrCase<"OpFUnordLessThan", 185>;
|
||||
def SPIRV_OC_OpFOrdGreaterThan : I32EnumAttrCase<"OpFOrdGreaterThan", 186>;
|
||||
def SPIRV_OC_OpFUnordGreaterThan : I32EnumAttrCase<"OpFUnordGreaterThan", 187>;
|
||||
def SPIRV_OC_OpFOrdLessThanEqual : I32EnumAttrCase<"OpFOrdLessThanEqual", 188>;
|
||||
def SPIRV_OC_OpFUnordLessThanEqual : I32EnumAttrCase<"OpFUnordLessThanEqual", 189>;
|
||||
def SPIRV_OC_OpFOrdGreaterThanEqual : I32EnumAttrCase<"OpFOrdGreaterThanEqual", 190>;
|
||||
def SPIRV_OC_OpFUnordGreaterThanEqual : I32EnumAttrCase<"OpFUnordGreaterThanEqual", 191>;
|
||||
def SPIRV_OC_OpShiftRightLogical : I32EnumAttrCase<"OpShiftRightLogical", 194>;
|
||||
def SPIRV_OC_OpShiftRightArithmetic : I32EnumAttrCase<"OpShiftRightArithmetic", 195>;
|
||||
def SPIRV_OC_OpShiftLeftLogical : I32EnumAttrCase<"OpShiftLeftLogical", 196>;
|
||||
def SPIRV_OC_OpBitwiseOr : I32EnumAttrCase<"OpBitwiseOr", 197>;
|
||||
def SPIRV_OC_OpBitwiseXor : I32EnumAttrCase<"OpBitwiseXor", 198>;
|
||||
def SPIRV_OC_OpBitwiseAnd : I32EnumAttrCase<"OpBitwiseAnd", 199>;
|
||||
def SPIRV_OC_OpNot : I32EnumAttrCase<"OpNot", 200>;
|
||||
def SPIRV_OC_OpBitFieldInsert : I32EnumAttrCase<"OpBitFieldInsert", 201>;
|
||||
def SPIRV_OC_OpBitFieldSExtract : I32EnumAttrCase<"OpBitFieldSExtract", 202>;
|
||||
def SPIRV_OC_OpBitFieldUExtract : I32EnumAttrCase<"OpBitFieldUExtract", 203>;
|
||||
def SPIRV_OC_OpBitReverse : I32EnumAttrCase<"OpBitReverse", 204>;
|
||||
def SPIRV_OC_OpBitCount : I32EnumAttrCase<"OpBitCount", 205>;
|
||||
def SPIRV_OC_OpControlBarrier : I32EnumAttrCase<"OpControlBarrier", 224>;
|
||||
def SPIRV_OC_OpMemoryBarrier : I32EnumAttrCase<"OpMemoryBarrier", 225>;
|
||||
def SPIRV_OC_OpAtomicExchange : I32EnumAttrCase<"OpAtomicExchange", 229>;
|
||||
def SPIRV_OC_OpAtomicCompareExchange : I32EnumAttrCase<"OpAtomicCompareExchange", 230>;
|
||||
def SPIRV_OC_OpAtomicCompareExchangeWeak : I32EnumAttrCase<"OpAtomicCompareExchangeWeak", 231>;
|
||||
def SPIRV_OC_OpAtomicIIncrement : I32EnumAttrCase<"OpAtomicIIncrement", 232>;
|
||||
def SPIRV_OC_OpAtomicIDecrement : I32EnumAttrCase<"OpAtomicIDecrement", 233>;
|
||||
def SPIRV_OC_OpAtomicIAdd : I32EnumAttrCase<"OpAtomicIAdd", 234>;
|
||||
def SPIRV_OC_OpAtomicISub : I32EnumAttrCase<"OpAtomicISub", 235>;
|
||||
def SPIRV_OC_OpAtomicSMin : I32EnumAttrCase<"OpAtomicSMin", 236>;
|
||||
def SPIRV_OC_OpAtomicUMin : I32EnumAttrCase<"OpAtomicUMin", 237>;
|
||||
def SPIRV_OC_OpAtomicSMax : I32EnumAttrCase<"OpAtomicSMax", 238>;
|
||||
def SPIRV_OC_OpAtomicUMax : I32EnumAttrCase<"OpAtomicUMax", 239>;
|
||||
def SPIRV_OC_OpAtomicAnd : I32EnumAttrCase<"OpAtomicAnd", 240>;
|
||||
def SPIRV_OC_OpAtomicOr : I32EnumAttrCase<"OpAtomicOr", 241>;
|
||||
def SPIRV_OC_OpAtomicXor : I32EnumAttrCase<"OpAtomicXor", 242>;
|
||||
def SPIRV_OC_OpPhi : I32EnumAttrCase<"OpPhi", 245>;
|
||||
def SPIRV_OC_OpLoopMerge : I32EnumAttrCase<"OpLoopMerge", 246>;
|
||||
def SPIRV_OC_OpSelectionMerge : I32EnumAttrCase<"OpSelectionMerge", 247>;
|
||||
def SPIRV_OC_OpLabel : I32EnumAttrCase<"OpLabel", 248>;
|
||||
def SPIRV_OC_OpBranch : I32EnumAttrCase<"OpBranch", 249>;
|
||||
def SPIRV_OC_OpBranchConditional : I32EnumAttrCase<"OpBranchConditional", 250>;
|
||||
def SPIRV_OC_OpReturn : I32EnumAttrCase<"OpReturn", 253>;
|
||||
def SPIRV_OC_OpReturnValue : I32EnumAttrCase<"OpReturnValue", 254>;
|
||||
def SPIRV_OC_OpUnreachable : I32EnumAttrCase<"OpUnreachable", 255>;
|
||||
def SPIRV_OC_OpGroupBroadcast : I32EnumAttrCase<"OpGroupBroadcast", 263>;
|
||||
def SPIRV_OC_OpGroupIAdd : I32EnumAttrCase<"OpGroupIAdd", 264>;
|
||||
def SPIRV_OC_OpGroupFAdd : I32EnumAttrCase<"OpGroupFAdd", 265>;
|
||||
def SPIRV_OC_OpGroupFMin : I32EnumAttrCase<"OpGroupFMin", 266>;
|
||||
def SPIRV_OC_OpGroupUMin : I32EnumAttrCase<"OpGroupUMin", 267>;
|
||||
def SPIRV_OC_OpGroupSMin : I32EnumAttrCase<"OpGroupSMin", 268>;
|
||||
def SPIRV_OC_OpGroupFMax : I32EnumAttrCase<"OpGroupFMax", 269>;
|
||||
def SPIRV_OC_OpGroupUMax : I32EnumAttrCase<"OpGroupUMax", 270>;
|
||||
def SPIRV_OC_OpGroupSMax : I32EnumAttrCase<"OpGroupSMax", 271>;
|
||||
def SPIRV_OC_OpNoLine : I32EnumAttrCase<"OpNoLine", 317>;
|
||||
def SPIRV_OC_OpModuleProcessed : I32EnumAttrCase<"OpModuleProcessed", 330>;
|
||||
def SPIRV_OC_OpGroupNonUniformElect : I32EnumAttrCase<"OpGroupNonUniformElect", 333>;
|
||||
def SPIRV_OC_OpGroupNonUniformBroadcast : I32EnumAttrCase<"OpGroupNonUniformBroadcast", 337>;
|
||||
def SPIRV_OC_OpGroupNonUniformBallot : I32EnumAttrCase<"OpGroupNonUniformBallot", 339>;
|
||||
def SPIRV_OC_OpGroupNonUniformBallotFindLSB : I32EnumAttrCase<"OpGroupNonUniformBallotFindLSB", 343>;
|
||||
def SPIRV_OC_OpGroupNonUniformBallotFindMSB : I32EnumAttrCase<"OpGroupNonUniformBallotFindMSB", 344>;
|
||||
def SPIRV_OC_OpGroupNonUniformShuffle : I32EnumAttrCase<"OpGroupNonUniformShuffle", 345>;
|
||||
def SPIRV_OC_OpGroupNonUniformShuffleXor : I32EnumAttrCase<"OpGroupNonUniformShuffleXor", 346>;
|
||||
def SPIRV_OC_OpGroupNonUniformShuffleUp : I32EnumAttrCase<"OpGroupNonUniformShuffleUp", 347>;
|
||||
def SPIRV_OC_OpGroupNonUniformShuffleDown : I32EnumAttrCase<"OpGroupNonUniformShuffleDown", 348>;
|
||||
def SPIRV_OC_OpGroupNonUniformIAdd : I32EnumAttrCase<"OpGroupNonUniformIAdd", 349>;
|
||||
def SPIRV_OC_OpGroupNonUniformFAdd : I32EnumAttrCase<"OpGroupNonUniformFAdd", 350>;
|
||||
def SPIRV_OC_OpGroupNonUniformIMul : I32EnumAttrCase<"OpGroupNonUniformIMul", 351>;
|
||||
def SPIRV_OC_OpGroupNonUniformFMul : I32EnumAttrCase<"OpGroupNonUniformFMul", 352>;
|
||||
def SPIRV_OC_OpGroupNonUniformSMin : I32EnumAttrCase<"OpGroupNonUniformSMin", 353>;
|
||||
def SPIRV_OC_OpGroupNonUniformUMin : I32EnumAttrCase<"OpGroupNonUniformUMin", 354>;
|
||||
def SPIRV_OC_OpGroupNonUniformFMin : I32EnumAttrCase<"OpGroupNonUniformFMin", 355>;
|
||||
def SPIRV_OC_OpGroupNonUniformSMax : I32EnumAttrCase<"OpGroupNonUniformSMax", 356>;
|
||||
def SPIRV_OC_OpGroupNonUniformUMax : I32EnumAttrCase<"OpGroupNonUniformUMax", 357>;
|
||||
def SPIRV_OC_OpGroupNonUniformFMax : I32EnumAttrCase<"OpGroupNonUniformFMax", 358>;
|
||||
def SPIRV_OC_OpGroupNonUniformBitwiseAnd : I32EnumAttrCase<"OpGroupNonUniformBitwiseAnd", 359>;
|
||||
def SPIRV_OC_OpGroupNonUniformBitwiseOr : I32EnumAttrCase<"OpGroupNonUniformBitwiseOr", 360>;
|
||||
def SPIRV_OC_OpGroupNonUniformBitwiseXor : I32EnumAttrCase<"OpGroupNonUniformBitwiseXor", 361>;
|
||||
def SPIRV_OC_OpGroupNonUniformLogicalAnd : I32EnumAttrCase<"OpGroupNonUniformLogicalAnd", 362>;
|
||||
def SPIRV_OC_OpGroupNonUniformLogicalOr : I32EnumAttrCase<"OpGroupNonUniformLogicalOr", 363>;
|
||||
def SPIRV_OC_OpGroupNonUniformLogicalXor : I32EnumAttrCase<"OpGroupNonUniformLogicalXor", 364>;
|
||||
def SPIRV_OC_OpSubgroupBallotKHR : I32EnumAttrCase<"OpSubgroupBallotKHR", 4421>;
|
||||
def SPIRV_OC_OpSDot : I32EnumAttrCase<"OpSDot", 4450>;
|
||||
def SPIRV_OC_OpUDot : I32EnumAttrCase<"OpUDot", 4451>;
|
||||
def SPIRV_OC_OpSUDot : I32EnumAttrCase<"OpSUDot", 4452>;
|
||||
def SPIRV_OC_OpSDotAccSat : I32EnumAttrCase<"OpSDotAccSat", 4453>;
|
||||
def SPIRV_OC_OpUDotAccSat : I32EnumAttrCase<"OpUDotAccSat", 4454>;
|
||||
def SPIRV_OC_OpSUDotAccSat : I32EnumAttrCase<"OpSUDotAccSat", 4455>;
|
||||
def SPIRV_OC_OpTypeCooperativeMatrixKHR : I32EnumAttrCase<"OpTypeCooperativeMatrixKHR", 4456>;
|
||||
def SPIRV_OC_OpCooperativeMatrixLoadKHR : I32EnumAttrCase<"OpCooperativeMatrixLoadKHR", 4457>;
|
||||
def SPIRV_OC_OpCooperativeMatrixStoreKHR : I32EnumAttrCase<"OpCooperativeMatrixStoreKHR", 4458>;
|
||||
def SPIRV_OC_OpCooperativeMatrixMulAddKHR : I32EnumAttrCase<"OpCooperativeMatrixMulAddKHR", 4459>;
|
||||
def SPIRV_OC_OpCooperativeMatrixLengthKHR : I32EnumAttrCase<"OpCooperativeMatrixLengthKHR", 4460>;
|
||||
def SPIRV_OC_OpSubgroupBlockReadINTEL : I32EnumAttrCase<"OpSubgroupBlockReadINTEL", 5575>;
|
||||
def SPIRV_OC_OpSubgroupBlockWriteINTEL : I32EnumAttrCase<"OpSubgroupBlockWriteINTEL", 5576>;
|
||||
def SPIRV_OC_OpAssumeTrueKHR : I32EnumAttrCase<"OpAssumeTrueKHR", 5630>;
|
||||
def SPIRV_OC_OpAtomicFAddEXT : I32EnumAttrCase<"OpAtomicFAddEXT", 6035>;
|
||||
def SPIRV_OC_OpConvertFToBF16INTEL : I32EnumAttrCase<"OpConvertFToBF16INTEL", 6116>;
|
||||
def SPIRV_OC_OpConvertBF16ToFINTEL : I32EnumAttrCase<"OpConvertBF16ToFINTEL", 6117>;
|
||||
def SPIRV_OC_OpGroupIMulKHR : I32EnumAttrCase<"OpGroupIMulKHR", 6401>;
|
||||
def SPIRV_OC_OpGroupFMulKHR : I32EnumAttrCase<"OpGroupFMulKHR", 6402>;
|
||||
|
||||
def SPIRV_OpcodeAttr :
|
||||
SPIRV_I32EnumAttr<"Opcode", "valid SPIR-V instructions", "opcode", [
|
||||
@@ -4503,10 +4504,10 @@ def SPIRV_OpcodeAttr :
|
||||
SPIRV_OC_OpFSub, SPIRV_OC_OpIMul, SPIRV_OC_OpFMul, SPIRV_OC_OpUDiv,
|
||||
SPIRV_OC_OpSDiv, SPIRV_OC_OpFDiv, SPIRV_OC_OpUMod, SPIRV_OC_OpSRem,
|
||||
SPIRV_OC_OpSMod, SPIRV_OC_OpFRem, SPIRV_OC_OpFMod,
|
||||
SPIRV_OC_OpVectorTimesScalar, SPIRV_OC_OpMatrixTimesScalar, SPIRV_OC_OpDot,
|
||||
SPIRV_OC_OpMatrixTimesMatrix, SPIRV_OC_OpIAddCarry, SPIRV_OC_OpISubBorrow,
|
||||
SPIRV_OC_OpUMulExtended, SPIRV_OC_OpSMulExtended, SPIRV_OC_OpIsNan,
|
||||
SPIRV_OC_OpIsInf, SPIRV_OC_OpOrdered, SPIRV_OC_OpUnordered,
|
||||
SPIRV_OC_OpVectorTimesScalar, SPIRV_OC_OpMatrixTimesScalar,
|
||||
SPIRV_OC_OpMatrixTimesMatrix, SPIRV_OC_OpDot, SPIRV_OC_OpIAddCarry,
|
||||
SPIRV_OC_OpISubBorrow, SPIRV_OC_OpUMulExtended, SPIRV_OC_OpSMulExtended,
|
||||
SPIRV_OC_OpIsNan, SPIRV_OC_OpIsInf, SPIRV_OC_OpOrdered, SPIRV_OC_OpUnordered,
|
||||
SPIRV_OC_OpLogicalEqual, SPIRV_OC_OpLogicalNotEqual, SPIRV_OC_OpLogicalOr,
|
||||
SPIRV_OC_OpLogicalAnd, SPIRV_OC_OpLogicalNot, SPIRV_OC_OpSelect,
|
||||
SPIRV_OC_OpIEqual, SPIRV_OC_OpINotEqual, SPIRV_OC_OpUGreaterThan,
|
||||
@@ -4536,27 +4537,27 @@ def SPIRV_OpcodeAttr :
|
||||
SPIRV_OC_OpGroupFMax, SPIRV_OC_OpGroupUMax, SPIRV_OC_OpGroupSMax,
|
||||
SPIRV_OC_OpNoLine, SPIRV_OC_OpModuleProcessed, SPIRV_OC_OpGroupNonUniformElect,
|
||||
SPIRV_OC_OpGroupNonUniformBroadcast, SPIRV_OC_OpGroupNonUniformBallot,
|
||||
SPIRV_OC_OpGroupNonUniformShuffle, SPIRV_OC_OpGroupNonUniformShuffleXor,
|
||||
SPIRV_OC_OpGroupNonUniformShuffleUp, SPIRV_OC_OpGroupNonUniformShuffleDown,
|
||||
SPIRV_OC_OpGroupNonUniformIAdd, SPIRV_OC_OpGroupNonUniformFAdd,
|
||||
SPIRV_OC_OpGroupNonUniformIMul, SPIRV_OC_OpGroupNonUniformFMul,
|
||||
SPIRV_OC_OpGroupNonUniformSMin, SPIRV_OC_OpGroupNonUniformUMin,
|
||||
SPIRV_OC_OpGroupNonUniformFMin, SPIRV_OC_OpGroupNonUniformSMax,
|
||||
SPIRV_OC_OpGroupNonUniformUMax, SPIRV_OC_OpGroupNonUniformFMax,
|
||||
SPIRV_OC_OpGroupNonUniformBitwiseAnd, SPIRV_OC_OpGroupNonUniformBitwiseOr,
|
||||
SPIRV_OC_OpGroupNonUniformBitwiseXor, SPIRV_OC_OpGroupNonUniformLogicalAnd,
|
||||
SPIRV_OC_OpGroupNonUniformLogicalOr, SPIRV_OC_OpGroupNonUniformLogicalXor,
|
||||
SPIRV_OC_OpSubgroupBallotKHR, SPIRV_OC_OpSDot, SPIRV_OC_OpUDot,
|
||||
SPIRV_OC_OpSUDot, SPIRV_OC_OpSDotAccSat, SPIRV_OC_OpUDotAccSat,
|
||||
SPIRV_OC_OpSUDotAccSat,
|
||||
SPIRV_OC_OpGroupNonUniformBallotFindLSB,
|
||||
SPIRV_OC_OpGroupNonUniformBallotFindMSB, SPIRV_OC_OpGroupNonUniformShuffle,
|
||||
SPIRV_OC_OpGroupNonUniformShuffleXor, SPIRV_OC_OpGroupNonUniformShuffleUp,
|
||||
SPIRV_OC_OpGroupNonUniformShuffleDown, SPIRV_OC_OpGroupNonUniformIAdd,
|
||||
SPIRV_OC_OpGroupNonUniformFAdd, SPIRV_OC_OpGroupNonUniformIMul,
|
||||
SPIRV_OC_OpGroupNonUniformFMul, SPIRV_OC_OpGroupNonUniformSMin,
|
||||
SPIRV_OC_OpGroupNonUniformUMin, SPIRV_OC_OpGroupNonUniformFMin,
|
||||
SPIRV_OC_OpGroupNonUniformSMax, SPIRV_OC_OpGroupNonUniformUMax,
|
||||
SPIRV_OC_OpGroupNonUniformFMax, SPIRV_OC_OpGroupNonUniformBitwiseAnd,
|
||||
SPIRV_OC_OpGroupNonUniformBitwiseOr, SPIRV_OC_OpGroupNonUniformBitwiseXor,
|
||||
SPIRV_OC_OpGroupNonUniformLogicalAnd, SPIRV_OC_OpGroupNonUniformLogicalOr,
|
||||
SPIRV_OC_OpGroupNonUniformLogicalXor, SPIRV_OC_OpSubgroupBallotKHR,
|
||||
SPIRV_OC_OpSDot, SPIRV_OC_OpUDot, SPIRV_OC_OpSUDot, SPIRV_OC_OpSDotAccSat,
|
||||
SPIRV_OC_OpUDotAccSat, SPIRV_OC_OpSUDotAccSat,
|
||||
SPIRV_OC_OpTypeCooperativeMatrixKHR, SPIRV_OC_OpCooperativeMatrixLoadKHR,
|
||||
SPIRV_OC_OpCooperativeMatrixStoreKHR, SPIRV_OC_OpCooperativeMatrixMulAddKHR,
|
||||
SPIRV_OC_OpCooperativeMatrixLengthKHR,
|
||||
SPIRV_OC_OpSubgroupBlockReadINTEL, SPIRV_OC_OpSubgroupBlockWriteINTEL,
|
||||
SPIRV_OC_OpAssumeTrueKHR, SPIRV_OC_OpAtomicFAddEXT, SPIRV_OC_OpGroupIMulKHR,
|
||||
SPIRV_OC_OpGroupFMulKHR,
|
||||
|
||||
SPIRV_OC_OpConvertFToBF16INTEL, SPIRV_OC_OpConvertBF16ToFINTEL
|
||||
SPIRV_OC_OpCooperativeMatrixLengthKHR, SPIRV_OC_OpSubgroupBlockReadINTEL,
|
||||
SPIRV_OC_OpSubgroupBlockWriteINTEL, SPIRV_OC_OpAssumeTrueKHR,
|
||||
SPIRV_OC_OpAtomicFAddEXT, SPIRV_OC_OpConvertFToBF16INTEL,
|
||||
SPIRV_OC_OpConvertBF16ToFINTEL, SPIRV_OC_OpGroupIMulKHR,
|
||||
SPIRV_OC_OpGroupFMulKHR
|
||||
]>;
|
||||
|
||||
// End opcode section. Generated from SPIR-V spec; DO NOT MODIFY!
|
||||
|
||||
@@ -83,6 +83,118 @@ def SPIRV_GroupNonUniformBallotOp : SPIRV_Op<"GroupNonUniformBallot", []> {
|
||||
|
||||
// -----
|
||||
|
||||
def SPIRV_GroupNonUniformBallotFindLSBOp : SPIRV_Op<"GroupNonUniformBallotFindLSB", []> {
|
||||
let summary = [{
|
||||
Find the least significant bit set to 1 in Value, considering only the
|
||||
bits in Value required to represent all bits of the group's invocations.
|
||||
If none of the considered bits is set to 1, the resulting value is
|
||||
undefined.
|
||||
}];
|
||||
|
||||
let description = [{
|
||||
Result Type must be a scalar of integer type, whose Signedness operand
|
||||
is 0.
|
||||
|
||||
Execution is a Scope that identifies the group of invocations affected
|
||||
by this command. It must be Subgroup.
|
||||
|
||||
Value must be a vector of four components of integer type scalar, whose
|
||||
Width operand is 32 and whose Signedness operand is 0.
|
||||
|
||||
Value is a set of bitfields where the first invocation is represented in
|
||||
the lowest bit of the first vector component and the last (up to the
|
||||
size of the group) is the higher bit number of the last bitmask needed
|
||||
to represent all bits of the group invocations.
|
||||
|
||||
<!-- End of AutoGen section -->
|
||||
|
||||
#### Example:
|
||||
|
||||
```mlir
|
||||
%vector = ... : vector<4xi32>
|
||||
%0 = spirv.GroupNonUniformBallotFindLSB <Subgroup> %vector : vector<4xi32>, i32
|
||||
```
|
||||
}];
|
||||
|
||||
let availability = [
|
||||
MinVersion<SPIRV_V_1_3>,
|
||||
MaxVersion<SPIRV_V_1_6>,
|
||||
Extension<[]>,
|
||||
Capability<[SPIRV_C_GroupNonUniformBallot]>
|
||||
];
|
||||
|
||||
let arguments = (ins
|
||||
SPIRV_ScopeAttr:$execution_scope,
|
||||
SPIRV_IOrUIVec4:$value
|
||||
);
|
||||
|
||||
let results = (outs
|
||||
SPIRV_SignlessOrUnsignedInt:$result
|
||||
);
|
||||
|
||||
let assemblyFormat = [{
|
||||
$execution_scope $value attr-dict `:` type($value) `,` type($result)
|
||||
}];
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
def SPIRV_GroupNonUniformBallotFindMSBOp : SPIRV_Op<"GroupNonUniformBallotFindMSB", []> {
|
||||
let summary = [{
|
||||
Find the most significant bit set to 1 in Value, considering only the
|
||||
bits in Value required to represent all bits of the group's invocations.
|
||||
If none of the considered bits is set to 1, the resulting value is
|
||||
undefined.
|
||||
}];
|
||||
|
||||
let description = [{
|
||||
Result Type must be a scalar of integer type, whose Signedness operand
|
||||
is 0.
|
||||
|
||||
Execution is a Scope that identifies the group of invocations affected
|
||||
by this command. It must be Subgroup.
|
||||
|
||||
Value must be a vector of four components of integer type scalar, whose
|
||||
Width operand is 32 and whose Signedness operand is 0.
|
||||
|
||||
Value is a set of bitfields where the first invocation is represented in
|
||||
the lowest bit of the first vector component and the last (up to the
|
||||
size of the group) is the higher bit number of the last bitmask needed
|
||||
to represent all bits of the group invocations.
|
||||
|
||||
<!-- End of AutoGen section -->
|
||||
|
||||
#### Example:
|
||||
|
||||
```mlir
|
||||
%vector = ... : vector<4xi32>
|
||||
%0 = spirv.GroupNonUniformBallotFindMSB <Subgroup> %vector : vector<4xi32>, i32
|
||||
```
|
||||
}];
|
||||
|
||||
let availability = [
|
||||
MinVersion<SPIRV_V_1_3>,
|
||||
MaxVersion<SPIRV_V_1_6>,
|
||||
Extension<[]>,
|
||||
Capability<[SPIRV_C_GroupNonUniformBallot]>
|
||||
];
|
||||
|
||||
let arguments = (ins
|
||||
SPIRV_ScopeAttr:$execution_scope,
|
||||
SPIRV_IOrUIVec4:$value
|
||||
);
|
||||
|
||||
let results = (outs
|
||||
SPIRV_SignlessOrUnsignedInt:$result
|
||||
);
|
||||
|
||||
let assemblyFormat = [{
|
||||
$execution_scope $value attr-dict `:` type($value) `,` type($result)
|
||||
}];
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
def SPIRV_GroupNonUniformBroadcastOp : SPIRV_Op<"GroupNonUniformBroadcast",
|
||||
[Pure, AllTypesMatch<["value", "result"]>]> {
|
||||
let summary = [{
|
||||
|
||||
@@ -150,6 +150,30 @@ LogicalResult GroupNonUniformBallotOp::verify() {
|
||||
return success();
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// spirv.GroupNonUniformBallotFindLSBOp
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
LogicalResult GroupNonUniformBallotFindLSBOp::verify() {
|
||||
spirv::Scope scope = getExecutionScope();
|
||||
if (scope != spirv::Scope::Workgroup && scope != spirv::Scope::Subgroup)
|
||||
return emitOpError("execution scope must be 'Workgroup' or 'Subgroup'");
|
||||
|
||||
return success();
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// spirv.GroupNonUniformBallotFindLSBOp
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
LogicalResult GroupNonUniformBallotFindMSBOp::verify() {
|
||||
spirv::Scope scope = getExecutionScope();
|
||||
if (scope != spirv::Scope::Workgroup && scope != spirv::Scope::Subgroup)
|
||||
return emitOpError("execution scope must be 'Workgroup' or 'Subgroup'");
|
||||
|
||||
return success();
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// spirv.GroupNonUniformBroadcast
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
@@ -28,6 +28,62 @@ func.func @group_non_uniform_ballot(%predicate: i1) -> vector<4xsi32> {
|
||||
|
||||
// -----
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// spirv.GroupNonUniformBallotFindLSB
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
func.func @group_non_uniform_ballot_find_lsb(%value : vector<4xi32>) -> i32 {
|
||||
// CHECK: %{{.*}} = spirv.GroupNonUniformBallotFindLSB <Subgroup> %{{.*}}: vector<4xi32>, i32
|
||||
%0 = spirv.GroupNonUniformBallotFindLSB <Subgroup> %value : vector<4xi32>, i32
|
||||
return %0: i32
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func.func @group_non_uniform_ballot_find_lsb(%value : vector<4xi32>) -> i32 {
|
||||
// expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}
|
||||
%0 = spirv.GroupNonUniformBallotFindLSB <Device> %value : vector<4xi32>, i32
|
||||
return %0: i32
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func.func @group_non_uniform_ballot_find_lsb(%value : vector<4xi32>) -> si32 {
|
||||
// expected-error @+1 {{op result #0 must be 8/16/32/64-bit signless/unsigned integer, but got 'si32'}}
|
||||
%0 = spirv.GroupNonUniformBallotFindLSB <Subgroup> %value : vector<4xi32>, si32
|
||||
return %0: si32
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// spirv.GroupNonUniformBallotFindLSB
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
func.func @group_non_uniform_ballot_find_msb(%value : vector<4xi32>) -> i32 {
|
||||
// CHECK: %{{.*}} = spirv.GroupNonUniformBallotFindMSB <Subgroup> %{{.*}}: vector<4xi32>, i32
|
||||
%0 = spirv.GroupNonUniformBallotFindMSB <Subgroup> %value : vector<4xi32>, i32
|
||||
return %0: i32
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func.func @group_non_uniform_ballot_find_msb(%value : vector<4xi32>) -> i32 {
|
||||
// expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}
|
||||
%0 = spirv.GroupNonUniformBallotFindMSB <Device> %value : vector<4xi32>, i32
|
||||
return %0: i32
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func.func @group_non_uniform_ballot_find_msb(%value : vector<4xi32>) -> si32 {
|
||||
// expected-error @+1 {{op result #0 must be 8/16/32/64-bit signless/unsigned integer, but got 'si32'}}
|
||||
%0 = spirv.GroupNonUniformBallotFindMSB <Subgroup> %value : vector<4xi32>, si32
|
||||
return %0: si32
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// spirv.NonUniformGroupBroadcast
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
Reference in New Issue
Block a user