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https://github.com/intel/llvm.git
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[RISCV][NFC] Regenerate RISCV CodeGen tests
Regenerated using: ./llvm/utils/update_llc_test_checks.py -u llvm/test/CodeGen/RISCV/*.ll This has added comments to spill-related instructions and added @plt to some symbols. Differential Revision: https://reviews.llvm.org/D92841
This commit is contained in:
Michael Munday
committed by
Luís Marques
Luís Marques
parent
ea981165a4
commit
e28b6a60bc
@@ -11,17 +11,17 @@ define void @simple_alloca(i32 %n) nounwind {
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; RV32I-LABEL: simple_alloca:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: addi a0, a0, 15
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; RV32I-NEXT: andi a0, a0, -16
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; RV32I-NEXT: sub a0, sp, a0
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; RV32I-NEXT: mv sp, a0
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; RV32I-NEXT: call notdead
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; RV32I-NEXT: call notdead@plt
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; RV32I-NEXT: addi sp, s0, -16
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = alloca i8, i32 %n
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@@ -36,21 +36,21 @@ define void @scoped_alloca(i32 %n) nounwind {
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; RV32I-LABEL: scoped_alloca:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: sw s1, 4(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: mv s1, sp
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; RV32I-NEXT: addi a0, a0, 15
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; RV32I-NEXT: andi a0, a0, -16
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; RV32I-NEXT: sub a0, sp, a0
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; RV32I-NEXT: mv sp, a0
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; RV32I-NEXT: call notdead
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; RV32I-NEXT: call notdead@plt
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; RV32I-NEXT: mv sp, s1
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; RV32I-NEXT: addi sp, s0, -16
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; RV32I-NEXT: lw s1, 4(sp)
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
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; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%sp = call i8* @llvm.stacksave()
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@@ -68,8 +68,8 @@ define void @alloca_callframe(i32 %n) nounwind {
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; RV32I-LABEL: alloca_callframe:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: addi a0, a0, 15
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; RV32I-NEXT: andi a0, a0, -16
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@@ -91,11 +91,11 @@ define void @alloca_callframe(i32 %n) nounwind {
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; RV32I-NEXT: addi a6, zero, 7
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; RV32I-NEXT: addi a7, zero, 8
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; RV32I-NEXT: sw t0, 0(sp)
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; RV32I-NEXT: call func
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; RV32I-NEXT: call func@plt
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: addi sp, s0, -16
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = alloca i8, i32 %n
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@@ -16,17 +16,17 @@ define void @test_bcc_fallthrough_taken(i32 %in) nounwind {
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; RV32I-LABEL: test_bcc_fallthrough_taken:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi a1, zero, 42
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; RV32I-NEXT: bne a0, a1, .LBB0_3
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; RV32I-NEXT: # %bb.1: # %true
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; RV32I-NEXT: call test_true
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; RV32I-NEXT: call test_true@plt
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; RV32I-NEXT: .LBB0_2: # %true
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB0_3: # %false
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; RV32I-NEXT: call test_false
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; RV32I-NEXT: call test_false@plt
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; RV32I-NEXT: j .LBB0_2
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%tst = icmp eq i32 %in, 42
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br i1 %tst, label %true, label %false, !prof !0
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@@ -48,17 +48,17 @@ define void @test_bcc_fallthrough_nottaken(i32 %in) nounwind {
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; RV32I-LABEL: test_bcc_fallthrough_nottaken:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi a1, zero, 42
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; RV32I-NEXT: beq a0, a1, .LBB1_3
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; RV32I-NEXT: # %bb.1: # %false
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; RV32I-NEXT: call test_false
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; RV32I-NEXT: call test_false@plt
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; RV32I-NEXT: .LBB1_2: # %true
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB1_3: # %true
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; RV32I-NEXT: call test_true
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; RV32I-NEXT: call test_true@plt
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; RV32I-NEXT: j .LBB1_2
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%tst = icmp eq i32 %in, 42
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br i1 %tst, label %true, label %false, !prof !1
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File diff suppressed because it is too large
Load Diff
@@ -12,10 +12,10 @@ define i8 @atomic_load_i8_unordered(i8 *%a) nounwind {
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; RV32I-LABEL: atomic_load_i8_unordered:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: mv a1, zero
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; RV32I-NEXT: call __atomic_load_1
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: call __atomic_load_1@plt
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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@@ -27,10 +27,10 @@ define i8 @atomic_load_i8_unordered(i8 *%a) nounwind {
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; RV64I-LABEL: atomic_load_i8_unordered:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -16
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; RV64I-NEXT: sd ra, 8(sp)
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; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a1, zero
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; RV64I-NEXT: call __atomic_load_1
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; RV64I-NEXT: ld ra, 8(sp)
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; RV64I-NEXT: call __atomic_load_1@plt
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; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 16
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; RV64I-NEXT: ret
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;
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@@ -46,10 +46,10 @@ define i8 @atomic_load_i8_monotonic(i8 *%a) nounwind {
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; RV32I-LABEL: atomic_load_i8_monotonic:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: mv a1, zero
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; RV32I-NEXT: call __atomic_load_1
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: call __atomic_load_1@plt
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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@@ -61,10 +61,10 @@ define i8 @atomic_load_i8_monotonic(i8 *%a) nounwind {
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; RV64I-LABEL: atomic_load_i8_monotonic:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -16
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; RV64I-NEXT: sd ra, 8(sp)
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; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a1, zero
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; RV64I-NEXT: call __atomic_load_1
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; RV64I-NEXT: ld ra, 8(sp)
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; RV64I-NEXT: call __atomic_load_1@plt
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; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 16
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; RV64I-NEXT: ret
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;
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@@ -80,10 +80,10 @@ define i8 @atomic_load_i8_acquire(i8 *%a) nounwind {
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; RV32I-LABEL: atomic_load_i8_acquire:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi a1, zero, 2
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; RV32I-NEXT: call __atomic_load_1
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: call __atomic_load_1@plt
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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@@ -96,10 +96,10 @@ define i8 @atomic_load_i8_acquire(i8 *%a) nounwind {
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; RV64I-LABEL: atomic_load_i8_acquire:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -16
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; RV64I-NEXT: sd ra, 8(sp)
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; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: addi a1, zero, 2
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; RV64I-NEXT: call __atomic_load_1
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; RV64I-NEXT: ld ra, 8(sp)
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; RV64I-NEXT: call __atomic_load_1@plt
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; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 16
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; RV64I-NEXT: ret
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;
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@@ -116,10 +116,10 @@ define i8 @atomic_load_i8_seq_cst(i8 *%a) nounwind {
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; RV32I-LABEL: atomic_load_i8_seq_cst:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi a1, zero, 5
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; RV32I-NEXT: call __atomic_load_1
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: call __atomic_load_1@plt
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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@@ -133,10 +133,10 @@ define i8 @atomic_load_i8_seq_cst(i8 *%a) nounwind {
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; RV64I-LABEL: atomic_load_i8_seq_cst:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -16
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; RV64I-NEXT: sd ra, 8(sp)
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; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: addi a1, zero, 5
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; RV64I-NEXT: call __atomic_load_1
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; RV64I-NEXT: ld ra, 8(sp)
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; RV64I-NEXT: call __atomic_load_1@plt
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; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 16
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; RV64I-NEXT: ret
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;
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@@ -154,10 +154,10 @@ define i16 @atomic_load_i16_unordered(i16 *%a) nounwind {
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; RV32I-LABEL: atomic_load_i16_unordered:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: mv a1, zero
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; RV32I-NEXT: call __atomic_load_2
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: call __atomic_load_2@plt
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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@@ -169,10 +169,10 @@ define i16 @atomic_load_i16_unordered(i16 *%a) nounwind {
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; RV64I-LABEL: atomic_load_i16_unordered:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -16
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; RV64I-NEXT: sd ra, 8(sp)
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; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a1, zero
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; RV64I-NEXT: call __atomic_load_2
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; RV64I-NEXT: ld ra, 8(sp)
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; RV64I-NEXT: call __atomic_load_2@plt
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; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 16
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; RV64I-NEXT: ret
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;
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@@ -188,10 +188,10 @@ define i16 @atomic_load_i16_monotonic(i16 *%a) nounwind {
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; RV32I-LABEL: atomic_load_i16_monotonic:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: mv a1, zero
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; RV32I-NEXT: call __atomic_load_2
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: call __atomic_load_2@plt
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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@@ -203,10 +203,10 @@ define i16 @atomic_load_i16_monotonic(i16 *%a) nounwind {
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; RV64I-LABEL: atomic_load_i16_monotonic:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -16
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; RV64I-NEXT: sd ra, 8(sp)
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; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a1, zero
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; RV64I-NEXT: call __atomic_load_2
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; RV64I-NEXT: ld ra, 8(sp)
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; RV64I-NEXT: call __atomic_load_2@plt
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; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 16
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; RV64I-NEXT: ret
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;
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@@ -222,10 +222,10 @@ define i16 @atomic_load_i16_acquire(i16 *%a) nounwind {
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; RV32I-LABEL: atomic_load_i16_acquire:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi a1, zero, 2
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; RV32I-NEXT: call __atomic_load_2
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: call __atomic_load_2@plt
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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@@ -238,10 +238,10 @@ define i16 @atomic_load_i16_acquire(i16 *%a) nounwind {
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; RV64I-LABEL: atomic_load_i16_acquire:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -16
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; RV64I-NEXT: sd ra, 8(sp)
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; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: addi a1, zero, 2
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; RV64I-NEXT: call __atomic_load_2
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; RV64I-NEXT: ld ra, 8(sp)
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; RV64I-NEXT: call __atomic_load_2@plt
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; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 16
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; RV64I-NEXT: ret
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;
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@@ -258,10 +258,10 @@ define i16 @atomic_load_i16_seq_cst(i16 *%a) nounwind {
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; RV32I-LABEL: atomic_load_i16_seq_cst:
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; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, 5
|
||||
; RV32I-NEXT: call __atomic_load_2
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_load_2@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -275,10 +275,10 @@ define i16 @atomic_load_i16_seq_cst(i16 *%a) nounwind {
|
||||
; RV64I-LABEL: atomic_load_i16_seq_cst:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a1, zero, 5
|
||||
; RV64I-NEXT: call __atomic_load_2
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_load_2@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -296,10 +296,10 @@ define i32 @atomic_load_i32_unordered(i32 *%a) nounwind {
|
||||
; RV32I-LABEL: atomic_load_i32_unordered:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a1, zero
|
||||
; RV32I-NEXT: call __atomic_load_4
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_load_4@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -311,10 +311,10 @@ define i32 @atomic_load_i32_unordered(i32 *%a) nounwind {
|
||||
; RV64I-LABEL: atomic_load_i32_unordered:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a1, zero
|
||||
; RV64I-NEXT: call __atomic_load_4
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_load_4@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -330,10 +330,10 @@ define i32 @atomic_load_i32_monotonic(i32 *%a) nounwind {
|
||||
; RV32I-LABEL: atomic_load_i32_monotonic:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a1, zero
|
||||
; RV32I-NEXT: call __atomic_load_4
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_load_4@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -345,10 +345,10 @@ define i32 @atomic_load_i32_monotonic(i32 *%a) nounwind {
|
||||
; RV64I-LABEL: atomic_load_i32_monotonic:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a1, zero
|
||||
; RV64I-NEXT: call __atomic_load_4
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_load_4@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -364,10 +364,10 @@ define i32 @atomic_load_i32_acquire(i32 *%a) nounwind {
|
||||
; RV32I-LABEL: atomic_load_i32_acquire:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, 2
|
||||
; RV32I-NEXT: call __atomic_load_4
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_load_4@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -380,10 +380,10 @@ define i32 @atomic_load_i32_acquire(i32 *%a) nounwind {
|
||||
; RV64I-LABEL: atomic_load_i32_acquire:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a1, zero, 2
|
||||
; RV64I-NEXT: call __atomic_load_4
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_load_4@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -400,10 +400,10 @@ define i32 @atomic_load_i32_seq_cst(i32 *%a) nounwind {
|
||||
; RV32I-LABEL: atomic_load_i32_seq_cst:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, 5
|
||||
; RV32I-NEXT: call __atomic_load_4
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_load_4@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -417,10 +417,10 @@ define i32 @atomic_load_i32_seq_cst(i32 *%a) nounwind {
|
||||
; RV64I-LABEL: atomic_load_i32_seq_cst:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a1, zero, 5
|
||||
; RV64I-NEXT: call __atomic_load_4
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_load_4@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -438,30 +438,30 @@ define i64 @atomic_load_i64_unordered(i64 *%a) nounwind {
|
||||
; RV32I-LABEL: atomic_load_i64_unordered:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a1, zero
|
||||
; RV32I-NEXT: call __atomic_load_8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_load_8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IA-LABEL: atomic_load_i64_unordered:
|
||||
; RV32IA: # %bb.0:
|
||||
; RV32IA-NEXT: addi sp, sp, -16
|
||||
; RV32IA-NEXT: sw ra, 12(sp)
|
||||
; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IA-NEXT: mv a1, zero
|
||||
; RV32IA-NEXT: call __atomic_load_8
|
||||
; RV32IA-NEXT: lw ra, 12(sp)
|
||||
; RV32IA-NEXT: call __atomic_load_8@plt
|
||||
; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IA-NEXT: addi sp, sp, 16
|
||||
; RV32IA-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: atomic_load_i64_unordered:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a1, zero
|
||||
; RV64I-NEXT: call __atomic_load_8
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_load_8@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -477,30 +477,30 @@ define i64 @atomic_load_i64_monotonic(i64 *%a) nounwind {
|
||||
; RV32I-LABEL: atomic_load_i64_monotonic:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a1, zero
|
||||
; RV32I-NEXT: call __atomic_load_8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_load_8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IA-LABEL: atomic_load_i64_monotonic:
|
||||
; RV32IA: # %bb.0:
|
||||
; RV32IA-NEXT: addi sp, sp, -16
|
||||
; RV32IA-NEXT: sw ra, 12(sp)
|
||||
; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IA-NEXT: mv a1, zero
|
||||
; RV32IA-NEXT: call __atomic_load_8
|
||||
; RV32IA-NEXT: lw ra, 12(sp)
|
||||
; RV32IA-NEXT: call __atomic_load_8@plt
|
||||
; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IA-NEXT: addi sp, sp, 16
|
||||
; RV32IA-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: atomic_load_i64_monotonic:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a1, zero
|
||||
; RV64I-NEXT: call __atomic_load_8
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_load_8@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -516,30 +516,30 @@ define i64 @atomic_load_i64_acquire(i64 *%a) nounwind {
|
||||
; RV32I-LABEL: atomic_load_i64_acquire:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, 2
|
||||
; RV32I-NEXT: call __atomic_load_8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_load_8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IA-LABEL: atomic_load_i64_acquire:
|
||||
; RV32IA: # %bb.0:
|
||||
; RV32IA-NEXT: addi sp, sp, -16
|
||||
; RV32IA-NEXT: sw ra, 12(sp)
|
||||
; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IA-NEXT: addi a1, zero, 2
|
||||
; RV32IA-NEXT: call __atomic_load_8
|
||||
; RV32IA-NEXT: lw ra, 12(sp)
|
||||
; RV32IA-NEXT: call __atomic_load_8@plt
|
||||
; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IA-NEXT: addi sp, sp, 16
|
||||
; RV32IA-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: atomic_load_i64_acquire:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a1, zero, 2
|
||||
; RV64I-NEXT: call __atomic_load_8
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_load_8@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -556,30 +556,30 @@ define i64 @atomic_load_i64_seq_cst(i64 *%a) nounwind {
|
||||
; RV32I-LABEL: atomic_load_i64_seq_cst:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, 5
|
||||
; RV32I-NEXT: call __atomic_load_8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_load_8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IA-LABEL: atomic_load_i64_seq_cst:
|
||||
; RV32IA: # %bb.0:
|
||||
; RV32IA-NEXT: addi sp, sp, -16
|
||||
; RV32IA-NEXT: sw ra, 12(sp)
|
||||
; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IA-NEXT: addi a1, zero, 5
|
||||
; RV32IA-NEXT: call __atomic_load_8
|
||||
; RV32IA-NEXT: lw ra, 12(sp)
|
||||
; RV32IA-NEXT: call __atomic_load_8@plt
|
||||
; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IA-NEXT: addi sp, sp, 16
|
||||
; RV32IA-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: atomic_load_i64_seq_cst:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a1, zero, 5
|
||||
; RV64I-NEXT: call __atomic_load_8
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_load_8@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -597,10 +597,10 @@ define void @atomic_store_i8_unordered(i8 *%a, i8 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i8_unordered:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a2, zero
|
||||
; RV32I-NEXT: call __atomic_store_1
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_1@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -612,10 +612,10 @@ define void @atomic_store_i8_unordered(i8 *%a, i8 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i8_unordered:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a2, zero
|
||||
; RV64I-NEXT: call __atomic_store_1
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_1@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -631,10 +631,10 @@ define void @atomic_store_i8_monotonic(i8 *%a, i8 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i8_monotonic:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a2, zero
|
||||
; RV32I-NEXT: call __atomic_store_1
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_1@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -646,10 +646,10 @@ define void @atomic_store_i8_monotonic(i8 *%a, i8 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i8_monotonic:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a2, zero
|
||||
; RV64I-NEXT: call __atomic_store_1
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_1@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -665,10 +665,10 @@ define void @atomic_store_i8_release(i8 *%a, i8 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i8_release:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a2, zero, 3
|
||||
; RV32I-NEXT: call __atomic_store_1
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_1@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -681,10 +681,10 @@ define void @atomic_store_i8_release(i8 *%a, i8 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i8_release:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a2, zero, 3
|
||||
; RV64I-NEXT: call __atomic_store_1
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_1@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -701,10 +701,10 @@ define void @atomic_store_i8_seq_cst(i8 *%a, i8 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i8_seq_cst:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a2, zero, 5
|
||||
; RV32I-NEXT: call __atomic_store_1
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_1@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -717,10 +717,10 @@ define void @atomic_store_i8_seq_cst(i8 *%a, i8 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i8_seq_cst:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a2, zero, 5
|
||||
; RV64I-NEXT: call __atomic_store_1
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_1@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -737,10 +737,10 @@ define void @atomic_store_i16_unordered(i16 *%a, i16 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i16_unordered:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a2, zero
|
||||
; RV32I-NEXT: call __atomic_store_2
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_2@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -752,10 +752,10 @@ define void @atomic_store_i16_unordered(i16 *%a, i16 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i16_unordered:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a2, zero
|
||||
; RV64I-NEXT: call __atomic_store_2
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_2@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -771,10 +771,10 @@ define void @atomic_store_i16_monotonic(i16 *%a, i16 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i16_monotonic:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a2, zero
|
||||
; RV32I-NEXT: call __atomic_store_2
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_2@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -786,10 +786,10 @@ define void @atomic_store_i16_monotonic(i16 *%a, i16 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i16_monotonic:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a2, zero
|
||||
; RV64I-NEXT: call __atomic_store_2
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_2@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -805,10 +805,10 @@ define void @atomic_store_i16_release(i16 *%a, i16 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i16_release:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a2, zero, 3
|
||||
; RV32I-NEXT: call __atomic_store_2
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_2@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -821,10 +821,10 @@ define void @atomic_store_i16_release(i16 *%a, i16 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i16_release:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a2, zero, 3
|
||||
; RV64I-NEXT: call __atomic_store_2
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_2@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -841,10 +841,10 @@ define void @atomic_store_i16_seq_cst(i16 *%a, i16 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i16_seq_cst:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a2, zero, 5
|
||||
; RV32I-NEXT: call __atomic_store_2
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_2@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -857,10 +857,10 @@ define void @atomic_store_i16_seq_cst(i16 *%a, i16 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i16_seq_cst:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a2, zero, 5
|
||||
; RV64I-NEXT: call __atomic_store_2
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_2@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -877,10 +877,10 @@ define void @atomic_store_i32_unordered(i32 *%a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i32_unordered:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a2, zero
|
||||
; RV32I-NEXT: call __atomic_store_4
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_4@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -892,10 +892,10 @@ define void @atomic_store_i32_unordered(i32 *%a, i32 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i32_unordered:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a2, zero
|
||||
; RV64I-NEXT: call __atomic_store_4
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_4@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -911,10 +911,10 @@ define void @atomic_store_i32_monotonic(i32 *%a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i32_monotonic:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a2, zero
|
||||
; RV32I-NEXT: call __atomic_store_4
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_4@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -926,10 +926,10 @@ define void @atomic_store_i32_monotonic(i32 *%a, i32 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i32_monotonic:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a2, zero
|
||||
; RV64I-NEXT: call __atomic_store_4
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_4@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -945,10 +945,10 @@ define void @atomic_store_i32_release(i32 *%a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i32_release:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a2, zero, 3
|
||||
; RV32I-NEXT: call __atomic_store_4
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_4@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -961,10 +961,10 @@ define void @atomic_store_i32_release(i32 *%a, i32 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i32_release:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a2, zero, 3
|
||||
; RV64I-NEXT: call __atomic_store_4
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_4@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -981,10 +981,10 @@ define void @atomic_store_i32_seq_cst(i32 *%a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i32_seq_cst:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a2, zero, 5
|
||||
; RV32I-NEXT: call __atomic_store_4
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_4@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -997,10 +997,10 @@ define void @atomic_store_i32_seq_cst(i32 *%a, i32 %b) nounwind {
|
||||
; RV64I-LABEL: atomic_store_i32_seq_cst:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a2, zero, 5
|
||||
; RV64I-NEXT: call __atomic_store_4
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_4@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -1017,30 +1017,30 @@ define void @atomic_store_i64_unordered(i64 *%a, i64 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i64_unordered:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __atomic_store_8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IA-LABEL: atomic_store_i64_unordered:
|
||||
; RV32IA: # %bb.0:
|
||||
; RV32IA-NEXT: addi sp, sp, -16
|
||||
; RV32IA-NEXT: sw ra, 12(sp)
|
||||
; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IA-NEXT: mv a3, zero
|
||||
; RV32IA-NEXT: call __atomic_store_8
|
||||
; RV32IA-NEXT: lw ra, 12(sp)
|
||||
; RV32IA-NEXT: call __atomic_store_8@plt
|
||||
; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IA-NEXT: addi sp, sp, 16
|
||||
; RV32IA-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: atomic_store_i64_unordered:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a2, zero
|
||||
; RV64I-NEXT: call __atomic_store_8
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_8@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -1056,30 +1056,30 @@ define void @atomic_store_i64_monotonic(i64 *%a, i64 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i64_monotonic:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __atomic_store_8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IA-LABEL: atomic_store_i64_monotonic:
|
||||
; RV32IA: # %bb.0:
|
||||
; RV32IA-NEXT: addi sp, sp, -16
|
||||
; RV32IA-NEXT: sw ra, 12(sp)
|
||||
; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IA-NEXT: mv a3, zero
|
||||
; RV32IA-NEXT: call __atomic_store_8
|
||||
; RV32IA-NEXT: lw ra, 12(sp)
|
||||
; RV32IA-NEXT: call __atomic_store_8@plt
|
||||
; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IA-NEXT: addi sp, sp, 16
|
||||
; RV32IA-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: atomic_store_i64_monotonic:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a2, zero
|
||||
; RV64I-NEXT: call __atomic_store_8
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_8@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -1095,30 +1095,30 @@ define void @atomic_store_i64_release(i64 *%a, i64 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i64_release:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a3, zero, 3
|
||||
; RV32I-NEXT: call __atomic_store_8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IA-LABEL: atomic_store_i64_release:
|
||||
; RV32IA: # %bb.0:
|
||||
; RV32IA-NEXT: addi sp, sp, -16
|
||||
; RV32IA-NEXT: sw ra, 12(sp)
|
||||
; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IA-NEXT: addi a3, zero, 3
|
||||
; RV32IA-NEXT: call __atomic_store_8
|
||||
; RV32IA-NEXT: lw ra, 12(sp)
|
||||
; RV32IA-NEXT: call __atomic_store_8@plt
|
||||
; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IA-NEXT: addi sp, sp, 16
|
||||
; RV32IA-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: atomic_store_i64_release:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a2, zero, 3
|
||||
; RV64I-NEXT: call __atomic_store_8
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_8@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -1135,30 +1135,30 @@ define void @atomic_store_i64_seq_cst(i64 *%a, i64 %b) nounwind {
|
||||
; RV32I-LABEL: atomic_store_i64_seq_cst:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a3, zero, 5
|
||||
; RV32I-NEXT: call __atomic_store_8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __atomic_store_8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IA-LABEL: atomic_store_i64_seq_cst:
|
||||
; RV32IA: # %bb.0:
|
||||
; RV32IA-NEXT: addi sp, sp, -16
|
||||
; RV32IA-NEXT: sw ra, 12(sp)
|
||||
; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IA-NEXT: addi a3, zero, 5
|
||||
; RV32IA-NEXT: call __atomic_store_8
|
||||
; RV32IA-NEXT: lw ra, 12(sp)
|
||||
; RV32IA-NEXT: call __atomic_store_8@plt
|
||||
; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IA-NEXT: addi sp, sp, 16
|
||||
; RV32IA-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: atomic_store_i64_seq_cst:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a2, zero, 5
|
||||
; RV64I-NEXT: call __atomic_store_8
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __atomic_store_8@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -80,7 +80,7 @@ define i8 @test_cttz_i8(i8 %a) nounwind {
|
||||
; RV32I-LABEL: test_cttz_i8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: andi a1, a0, 255
|
||||
; RV32I-NEXT: beqz a1, .LBB3_2
|
||||
; RV32I-NEXT: # %bb.1: # %cond.false
|
||||
@@ -105,13 +105,13 @@ define i8 @test_cttz_i8(i8 %a) nounwind {
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi a1, a1, 257
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: j .LBB3_3
|
||||
; RV32I-NEXT: .LBB3_2:
|
||||
; RV32I-NEXT: addi a0, zero, 8
|
||||
; RV32I-NEXT: .LBB3_3: # %cond.end
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%tmp = call i8 @llvm.cttz.i8(i8 %a, i1 false)
|
||||
@@ -122,7 +122,7 @@ define i16 @test_cttz_i16(i16 %a) nounwind {
|
||||
; RV32I-LABEL: test_cttz_i16:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lui a1, 16
|
||||
; RV32I-NEXT: addi a1, a1, -1
|
||||
; RV32I-NEXT: and a1, a0, a1
|
||||
@@ -149,13 +149,13 @@ define i16 @test_cttz_i16(i16 %a) nounwind {
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi a1, a1, 257
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: j .LBB4_3
|
||||
; RV32I-NEXT: .LBB4_2:
|
||||
; RV32I-NEXT: addi a0, zero, 16
|
||||
; RV32I-NEXT: .LBB4_3: # %cond.end
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%tmp = call i16 @llvm.cttz.i16(i16 %a, i1 false)
|
||||
@@ -166,7 +166,7 @@ define i32 @test_cttz_i32(i32 %a) nounwind {
|
||||
; RV32I-LABEL: test_cttz_i32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: beqz a0, .LBB5_2
|
||||
; RV32I-NEXT: # %bb.1: # %cond.false
|
||||
; RV32I-NEXT: addi a1, a0, -1
|
||||
@@ -190,13 +190,13 @@ define i32 @test_cttz_i32(i32 %a) nounwind {
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi a1, a1, 257
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: j .LBB5_3
|
||||
; RV32I-NEXT: .LBB5_2:
|
||||
; RV32I-NEXT: addi a0, zero, 32
|
||||
; RV32I-NEXT: .LBB5_3: # %cond.end
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%tmp = call i32 @llvm.cttz.i32(i32 %a, i1 false)
|
||||
@@ -207,7 +207,7 @@ define i32 @test_ctlz_i32(i32 %a) nounwind {
|
||||
; RV32I-LABEL: test_ctlz_i32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: beqz a0, .LBB6_2
|
||||
; RV32I-NEXT: # %bb.1: # %cond.false
|
||||
; RV32I-NEXT: srli a1, a0, 1
|
||||
@@ -239,13 +239,13 @@ define i32 @test_ctlz_i32(i32 %a) nounwind {
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi a1, a1, 257
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: j .LBB6_3
|
||||
; RV32I-NEXT: .LBB6_2:
|
||||
; RV32I-NEXT: addi a0, zero, 32
|
||||
; RV32I-NEXT: .LBB6_3: # %cond.end
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%tmp = call i32 @llvm.ctlz.i32(i32 %a, i1 false)
|
||||
@@ -256,14 +256,14 @@ define i64 @test_cttz_i64(i64 %a) nounwind {
|
||||
; RV32I-LABEL: test_cttz_i64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw s4, 8(sp)
|
||||
; RV32I-NEXT: sw s5, 4(sp)
|
||||
; RV32I-NEXT: sw s6, 0(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s3, a1
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: addi a0, a0, -1
|
||||
@@ -288,7 +288,7 @@ define i64 @test_cttz_i64(i64 %a) nounwind {
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi s1, a1, 257
|
||||
; RV32I-NEXT: mv a1, s1
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: mv s2, a0
|
||||
; RV32I-NEXT: addi a0, s3, -1
|
||||
; RV32I-NEXT: not a1, s3
|
||||
@@ -304,7 +304,7 @@ define i64 @test_cttz_i64(i64 %a) nounwind {
|
||||
; RV32I-NEXT: add a0, a0, a1
|
||||
; RV32I-NEXT: and a0, a0, s6
|
||||
; RV32I-NEXT: mv a1, s1
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: bnez s4, .LBB7_2
|
||||
; RV32I-NEXT: # %bb.1:
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
@@ -314,14 +314,14 @@ define i64 @test_cttz_i64(i64 %a) nounwind {
|
||||
; RV32I-NEXT: srli a0, s2, 24
|
||||
; RV32I-NEXT: .LBB7_3:
|
||||
; RV32I-NEXT: mv a1, zero
|
||||
; RV32I-NEXT: lw s6, 0(sp)
|
||||
; RV32I-NEXT: lw s5, 4(sp)
|
||||
; RV32I-NEXT: lw s4, 8(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
%tmp = call i64 @llvm.cttz.i64(i64 %a, i1 false)
|
||||
@@ -332,7 +332,7 @@ define i8 @test_cttz_i8_zero_undef(i8 %a) nounwind {
|
||||
; RV32I-LABEL: test_cttz_i8_zero_undef:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, a0, -1
|
||||
; RV32I-NEXT: not a0, a0
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
@@ -354,9 +354,9 @@ define i8 @test_cttz_i8_zero_undef(i8 %a) nounwind {
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi a1, a1, 257
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%tmp = call i8 @llvm.cttz.i8(i8 %a, i1 true)
|
||||
@@ -367,7 +367,7 @@ define i16 @test_cttz_i16_zero_undef(i16 %a) nounwind {
|
||||
; RV32I-LABEL: test_cttz_i16_zero_undef:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, a0, -1
|
||||
; RV32I-NEXT: not a0, a0
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
@@ -389,9 +389,9 @@ define i16 @test_cttz_i16_zero_undef(i16 %a) nounwind {
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi a1, a1, 257
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%tmp = call i16 @llvm.cttz.i16(i16 %a, i1 true)
|
||||
@@ -402,7 +402,7 @@ define i32 @test_cttz_i32_zero_undef(i32 %a) nounwind {
|
||||
; RV32I-LABEL: test_cttz_i32_zero_undef:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, a0, -1
|
||||
; RV32I-NEXT: not a0, a0
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
@@ -424,9 +424,9 @@ define i32 @test_cttz_i32_zero_undef(i32 %a) nounwind {
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi a1, a1, 257
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%tmp = call i32 @llvm.cttz.i32(i32 %a, i1 true)
|
||||
@@ -437,14 +437,14 @@ define i64 @test_cttz_i64_zero_undef(i64 %a) nounwind {
|
||||
; RV32I-LABEL: test_cttz_i64_zero_undef:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw s4, 8(sp)
|
||||
; RV32I-NEXT: sw s5, 4(sp)
|
||||
; RV32I-NEXT: sw s6, 0(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s3, a1
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: addi a0, a0, -1
|
||||
@@ -469,7 +469,7 @@ define i64 @test_cttz_i64_zero_undef(i64 %a) nounwind {
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi s1, a1, 257
|
||||
; RV32I-NEXT: mv a1, s1
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: mv s2, a0
|
||||
; RV32I-NEXT: addi a0, s3, -1
|
||||
; RV32I-NEXT: not a1, s3
|
||||
@@ -485,7 +485,7 @@ define i64 @test_cttz_i64_zero_undef(i64 %a) nounwind {
|
||||
; RV32I-NEXT: add a0, a0, a1
|
||||
; RV32I-NEXT: and a0, a0, s6
|
||||
; RV32I-NEXT: mv a1, s1
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: bnez s4, .LBB11_2
|
||||
; RV32I-NEXT: # %bb.1:
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
@@ -495,14 +495,14 @@ define i64 @test_cttz_i64_zero_undef(i64 %a) nounwind {
|
||||
; RV32I-NEXT: srli a0, s2, 24
|
||||
; RV32I-NEXT: .LBB11_3:
|
||||
; RV32I-NEXT: mv a1, zero
|
||||
; RV32I-NEXT: lw s6, 0(sp)
|
||||
; RV32I-NEXT: lw s5, 4(sp)
|
||||
; RV32I-NEXT: lw s4, 8(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
%tmp = call i64 @llvm.cttz.i64(i64 %a, i1 true)
|
||||
@@ -513,7 +513,7 @@ define i32 @test_ctpop_i32(i32 %a) nounwind {
|
||||
; RV32I-LABEL: test_ctpop_i32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: srli a1, a0, 1
|
||||
; RV32I-NEXT: lui a2, 349525
|
||||
; RV32I-NEXT: addi a2, a2, 1365
|
||||
@@ -532,9 +532,9 @@ define i32 @test_ctpop_i32(i32 %a) nounwind {
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi a1, a1, 257
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = call i32 @llvm.ctpop.i32(i32 %a)
|
||||
|
||||
@@ -21,7 +21,7 @@ define void @caller() nounwind {
|
||||
; RV32I-LABEL: caller:
|
||||
; RV32I: # %bb.0: # %entry
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lui a0, %hi(foo)
|
||||
; RV32I-NEXT: lw a1, %lo(foo)(a0)
|
||||
; RV32I-NEXT: sw a1, 12(sp)
|
||||
@@ -34,7 +34,7 @@ define void @caller() nounwind {
|
||||
; RV32I-NEXT: sw a0, 16(sp)
|
||||
; RV32I-NEXT: addi a0, sp, 12
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
entry:
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -160,18 +160,18 @@ define void @callee() nounwind {
|
||||
; ILP32D-LABEL: callee:
|
||||
; ILP32D: # %bb.0:
|
||||
; ILP32D-NEXT: addi sp, sp, -96
|
||||
; ILP32D-NEXT: fsd fs0, 88(sp)
|
||||
; ILP32D-NEXT: fsd fs1, 80(sp)
|
||||
; ILP32D-NEXT: fsd fs2, 72(sp)
|
||||
; ILP32D-NEXT: fsd fs3, 64(sp)
|
||||
; ILP32D-NEXT: fsd fs4, 56(sp)
|
||||
; ILP32D-NEXT: fsd fs5, 48(sp)
|
||||
; ILP32D-NEXT: fsd fs6, 40(sp)
|
||||
; ILP32D-NEXT: fsd fs7, 32(sp)
|
||||
; ILP32D-NEXT: fsd fs8, 24(sp)
|
||||
; ILP32D-NEXT: fsd fs9, 16(sp)
|
||||
; ILP32D-NEXT: fsd fs10, 8(sp)
|
||||
; ILP32D-NEXT: fsd fs11, 0(sp)
|
||||
; ILP32D-NEXT: fsd fs0, 88(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs1, 80(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs2, 72(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs3, 64(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs4, 56(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs5, 48(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs6, 40(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs7, 32(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs8, 24(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs9, 16(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs11, 0(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: lui a0, %hi(var)
|
||||
; ILP32D-NEXT: fld ft0, %lo(var)(a0)
|
||||
; ILP32D-NEXT: fld ft1, %lo(var+8)(a0)
|
||||
@@ -238,36 +238,36 @@ define void @callee() nounwind {
|
||||
; ILP32D-NEXT: fsd ft2, 16(a1)
|
||||
; ILP32D-NEXT: fsd ft1, %lo(var+8)(a0)
|
||||
; ILP32D-NEXT: fsd ft0, %lo(var)(a0)
|
||||
; ILP32D-NEXT: fld fs11, 0(sp)
|
||||
; ILP32D-NEXT: fld fs10, 8(sp)
|
||||
; ILP32D-NEXT: fld fs9, 16(sp)
|
||||
; ILP32D-NEXT: fld fs8, 24(sp)
|
||||
; ILP32D-NEXT: fld fs7, 32(sp)
|
||||
; ILP32D-NEXT: fld fs6, 40(sp)
|
||||
; ILP32D-NEXT: fld fs5, 48(sp)
|
||||
; ILP32D-NEXT: fld fs4, 56(sp)
|
||||
; ILP32D-NEXT: fld fs3, 64(sp)
|
||||
; ILP32D-NEXT: fld fs2, 72(sp)
|
||||
; ILP32D-NEXT: fld fs1, 80(sp)
|
||||
; ILP32D-NEXT: fld fs0, 88(sp)
|
||||
; ILP32D-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: addi sp, sp, 96
|
||||
; ILP32D-NEXT: ret
|
||||
;
|
||||
; LP64D-LABEL: callee:
|
||||
; LP64D: # %bb.0:
|
||||
; LP64D-NEXT: addi sp, sp, -96
|
||||
; LP64D-NEXT: fsd fs0, 88(sp)
|
||||
; LP64D-NEXT: fsd fs1, 80(sp)
|
||||
; LP64D-NEXT: fsd fs2, 72(sp)
|
||||
; LP64D-NEXT: fsd fs3, 64(sp)
|
||||
; LP64D-NEXT: fsd fs4, 56(sp)
|
||||
; LP64D-NEXT: fsd fs5, 48(sp)
|
||||
; LP64D-NEXT: fsd fs6, 40(sp)
|
||||
; LP64D-NEXT: fsd fs7, 32(sp)
|
||||
; LP64D-NEXT: fsd fs8, 24(sp)
|
||||
; LP64D-NEXT: fsd fs9, 16(sp)
|
||||
; LP64D-NEXT: fsd fs10, 8(sp)
|
||||
; LP64D-NEXT: fsd fs11, 0(sp)
|
||||
; LP64D-NEXT: fsd fs0, 88(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs1, 80(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs2, 72(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs3, 64(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs4, 56(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs5, 48(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs6, 40(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs7, 32(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs8, 24(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs9, 16(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs11, 0(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: lui a0, %hi(var)
|
||||
; LP64D-NEXT: fld ft0, %lo(var)(a0)
|
||||
; LP64D-NEXT: fld ft1, %lo(var+8)(a0)
|
||||
@@ -334,18 +334,18 @@ define void @callee() nounwind {
|
||||
; LP64D-NEXT: fsd ft2, 16(a1)
|
||||
; LP64D-NEXT: fsd ft1, %lo(var+8)(a0)
|
||||
; LP64D-NEXT: fsd ft0, %lo(var)(a0)
|
||||
; LP64D-NEXT: fld fs11, 0(sp)
|
||||
; LP64D-NEXT: fld fs10, 8(sp)
|
||||
; LP64D-NEXT: fld fs9, 16(sp)
|
||||
; LP64D-NEXT: fld fs8, 24(sp)
|
||||
; LP64D-NEXT: fld fs7, 32(sp)
|
||||
; LP64D-NEXT: fld fs6, 40(sp)
|
||||
; LP64D-NEXT: fld fs5, 48(sp)
|
||||
; LP64D-NEXT: fld fs4, 56(sp)
|
||||
; LP64D-NEXT: fld fs3, 64(sp)
|
||||
; LP64D-NEXT: fld fs2, 72(sp)
|
||||
; LP64D-NEXT: fld fs1, 80(sp)
|
||||
; LP64D-NEXT: fld fs0, 88(sp)
|
||||
; LP64D-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: addi sp, sp, 96
|
||||
; LP64D-NEXT: ret
|
||||
%val = load [32 x double], [32 x double]* @var
|
||||
@@ -364,349 +364,349 @@ define void @caller() nounwind {
|
||||
; ILP32-LABEL: caller:
|
||||
; ILP32: # %bb.0:
|
||||
; ILP32-NEXT: addi sp, sp, -272
|
||||
; ILP32-NEXT: sw ra, 268(sp)
|
||||
; ILP32-NEXT: sw s0, 264(sp)
|
||||
; ILP32-NEXT: sw s1, 260(sp)
|
||||
; ILP32-NEXT: sw ra, 268(sp) # 4-byte Folded Spill
|
||||
; ILP32-NEXT: sw s0, 264(sp) # 4-byte Folded Spill
|
||||
; ILP32-NEXT: sw s1, 260(sp) # 4-byte Folded Spill
|
||||
; ILP32-NEXT: lui s0, %hi(var)
|
||||
; ILP32-NEXT: fld ft0, %lo(var)(s0)
|
||||
; ILP32-NEXT: fsd ft0, 248(sp)
|
||||
; ILP32-NEXT: fsd ft0, 248(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, %lo(var+8)(s0)
|
||||
; ILP32-NEXT: fsd ft0, 240(sp)
|
||||
; ILP32-NEXT: fsd ft0, 240(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: addi s1, s0, %lo(var)
|
||||
; ILP32-NEXT: fld ft0, 16(s1)
|
||||
; ILP32-NEXT: fsd ft0, 232(sp)
|
||||
; ILP32-NEXT: fsd ft0, 232(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 24(s1)
|
||||
; ILP32-NEXT: fsd ft0, 224(sp)
|
||||
; ILP32-NEXT: fsd ft0, 224(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 32(s1)
|
||||
; ILP32-NEXT: fsd ft0, 216(sp)
|
||||
; ILP32-NEXT: fsd ft0, 216(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 40(s1)
|
||||
; ILP32-NEXT: fsd ft0, 208(sp)
|
||||
; ILP32-NEXT: fsd ft0, 208(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 48(s1)
|
||||
; ILP32-NEXT: fsd ft0, 200(sp)
|
||||
; ILP32-NEXT: fsd ft0, 200(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 56(s1)
|
||||
; ILP32-NEXT: fsd ft0, 192(sp)
|
||||
; ILP32-NEXT: fsd ft0, 192(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 64(s1)
|
||||
; ILP32-NEXT: fsd ft0, 184(sp)
|
||||
; ILP32-NEXT: fsd ft0, 184(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 72(s1)
|
||||
; ILP32-NEXT: fsd ft0, 176(sp)
|
||||
; ILP32-NEXT: fsd ft0, 176(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 80(s1)
|
||||
; ILP32-NEXT: fsd ft0, 168(sp)
|
||||
; ILP32-NEXT: fsd ft0, 168(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 88(s1)
|
||||
; ILP32-NEXT: fsd ft0, 160(sp)
|
||||
; ILP32-NEXT: fsd ft0, 160(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 96(s1)
|
||||
; ILP32-NEXT: fsd ft0, 152(sp)
|
||||
; ILP32-NEXT: fsd ft0, 152(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 104(s1)
|
||||
; ILP32-NEXT: fsd ft0, 144(sp)
|
||||
; ILP32-NEXT: fsd ft0, 144(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 112(s1)
|
||||
; ILP32-NEXT: fsd ft0, 136(sp)
|
||||
; ILP32-NEXT: fsd ft0, 136(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 120(s1)
|
||||
; ILP32-NEXT: fsd ft0, 128(sp)
|
||||
; ILP32-NEXT: fsd ft0, 128(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 128(s1)
|
||||
; ILP32-NEXT: fsd ft0, 120(sp)
|
||||
; ILP32-NEXT: fsd ft0, 120(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 136(s1)
|
||||
; ILP32-NEXT: fsd ft0, 112(sp)
|
||||
; ILP32-NEXT: fsd ft0, 112(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 144(s1)
|
||||
; ILP32-NEXT: fsd ft0, 104(sp)
|
||||
; ILP32-NEXT: fsd ft0, 104(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 152(s1)
|
||||
; ILP32-NEXT: fsd ft0, 96(sp)
|
||||
; ILP32-NEXT: fsd ft0, 96(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 160(s1)
|
||||
; ILP32-NEXT: fsd ft0, 88(sp)
|
||||
; ILP32-NEXT: fsd ft0, 88(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 168(s1)
|
||||
; ILP32-NEXT: fsd ft0, 80(sp)
|
||||
; ILP32-NEXT: fsd ft0, 80(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 176(s1)
|
||||
; ILP32-NEXT: fsd ft0, 72(sp)
|
||||
; ILP32-NEXT: fsd ft0, 72(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 184(s1)
|
||||
; ILP32-NEXT: fsd ft0, 64(sp)
|
||||
; ILP32-NEXT: fsd ft0, 64(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 192(s1)
|
||||
; ILP32-NEXT: fsd ft0, 56(sp)
|
||||
; ILP32-NEXT: fsd ft0, 56(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 200(s1)
|
||||
; ILP32-NEXT: fsd ft0, 48(sp)
|
||||
; ILP32-NEXT: fsd ft0, 48(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 208(s1)
|
||||
; ILP32-NEXT: fsd ft0, 40(sp)
|
||||
; ILP32-NEXT: fsd ft0, 40(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 216(s1)
|
||||
; ILP32-NEXT: fsd ft0, 32(sp)
|
||||
; ILP32-NEXT: fsd ft0, 32(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 224(s1)
|
||||
; ILP32-NEXT: fsd ft0, 24(sp)
|
||||
; ILP32-NEXT: fsd ft0, 24(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 232(s1)
|
||||
; ILP32-NEXT: fsd ft0, 16(sp)
|
||||
; ILP32-NEXT: fsd ft0, 16(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 240(s1)
|
||||
; ILP32-NEXT: fsd ft0, 8(sp)
|
||||
; ILP32-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: fld ft0, 248(s1)
|
||||
; ILP32-NEXT: fsd ft0, 0(sp)
|
||||
; ILP32-NEXT: fsd ft0, 0(sp) # 8-byte Folded Spill
|
||||
; ILP32-NEXT: call callee
|
||||
; ILP32-NEXT: fld ft0, 0(sp)
|
||||
; ILP32-NEXT: fld ft0, 0(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 248(s1)
|
||||
; ILP32-NEXT: fld ft0, 8(sp)
|
||||
; ILP32-NEXT: fld ft0, 8(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 240(s1)
|
||||
; ILP32-NEXT: fld ft0, 16(sp)
|
||||
; ILP32-NEXT: fld ft0, 16(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 232(s1)
|
||||
; ILP32-NEXT: fld ft0, 24(sp)
|
||||
; ILP32-NEXT: fld ft0, 24(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 224(s1)
|
||||
; ILP32-NEXT: fld ft0, 32(sp)
|
||||
; ILP32-NEXT: fld ft0, 32(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 216(s1)
|
||||
; ILP32-NEXT: fld ft0, 40(sp)
|
||||
; ILP32-NEXT: fld ft0, 40(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 208(s1)
|
||||
; ILP32-NEXT: fld ft0, 48(sp)
|
||||
; ILP32-NEXT: fld ft0, 48(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 200(s1)
|
||||
; ILP32-NEXT: fld ft0, 56(sp)
|
||||
; ILP32-NEXT: fld ft0, 56(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 192(s1)
|
||||
; ILP32-NEXT: fld ft0, 64(sp)
|
||||
; ILP32-NEXT: fld ft0, 64(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 184(s1)
|
||||
; ILP32-NEXT: fld ft0, 72(sp)
|
||||
; ILP32-NEXT: fld ft0, 72(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 176(s1)
|
||||
; ILP32-NEXT: fld ft0, 80(sp)
|
||||
; ILP32-NEXT: fld ft0, 80(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 168(s1)
|
||||
; ILP32-NEXT: fld ft0, 88(sp)
|
||||
; ILP32-NEXT: fld ft0, 88(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 160(s1)
|
||||
; ILP32-NEXT: fld ft0, 96(sp)
|
||||
; ILP32-NEXT: fld ft0, 96(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 152(s1)
|
||||
; ILP32-NEXT: fld ft0, 104(sp)
|
||||
; ILP32-NEXT: fld ft0, 104(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 144(s1)
|
||||
; ILP32-NEXT: fld ft0, 112(sp)
|
||||
; ILP32-NEXT: fld ft0, 112(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 136(s1)
|
||||
; ILP32-NEXT: fld ft0, 120(sp)
|
||||
; ILP32-NEXT: fld ft0, 120(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 128(s1)
|
||||
; ILP32-NEXT: fld ft0, 128(sp)
|
||||
; ILP32-NEXT: fld ft0, 128(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 120(s1)
|
||||
; ILP32-NEXT: fld ft0, 136(sp)
|
||||
; ILP32-NEXT: fld ft0, 136(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 112(s1)
|
||||
; ILP32-NEXT: fld ft0, 144(sp)
|
||||
; ILP32-NEXT: fld ft0, 144(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 104(s1)
|
||||
; ILP32-NEXT: fld ft0, 152(sp)
|
||||
; ILP32-NEXT: fld ft0, 152(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 96(s1)
|
||||
; ILP32-NEXT: fld ft0, 160(sp)
|
||||
; ILP32-NEXT: fld ft0, 160(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 88(s1)
|
||||
; ILP32-NEXT: fld ft0, 168(sp)
|
||||
; ILP32-NEXT: fld ft0, 168(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 80(s1)
|
||||
; ILP32-NEXT: fld ft0, 176(sp)
|
||||
; ILP32-NEXT: fld ft0, 176(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 72(s1)
|
||||
; ILP32-NEXT: fld ft0, 184(sp)
|
||||
; ILP32-NEXT: fld ft0, 184(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 64(s1)
|
||||
; ILP32-NEXT: fld ft0, 192(sp)
|
||||
; ILP32-NEXT: fld ft0, 192(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 56(s1)
|
||||
; ILP32-NEXT: fld ft0, 200(sp)
|
||||
; ILP32-NEXT: fld ft0, 200(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 48(s1)
|
||||
; ILP32-NEXT: fld ft0, 208(sp)
|
||||
; ILP32-NEXT: fld ft0, 208(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 40(s1)
|
||||
; ILP32-NEXT: fld ft0, 216(sp)
|
||||
; ILP32-NEXT: fld ft0, 216(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 32(s1)
|
||||
; ILP32-NEXT: fld ft0, 224(sp)
|
||||
; ILP32-NEXT: fld ft0, 224(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 24(s1)
|
||||
; ILP32-NEXT: fld ft0, 232(sp)
|
||||
; ILP32-NEXT: fld ft0, 232(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, 16(s1)
|
||||
; ILP32-NEXT: fld ft0, 240(sp)
|
||||
; ILP32-NEXT: fld ft0, 240(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, %lo(var+8)(s0)
|
||||
; ILP32-NEXT: fld ft0, 248(sp)
|
||||
; ILP32-NEXT: fld ft0, 248(sp) # 8-byte Folded Reload
|
||||
; ILP32-NEXT: fsd ft0, %lo(var)(s0)
|
||||
; ILP32-NEXT: lw s1, 260(sp)
|
||||
; ILP32-NEXT: lw s0, 264(sp)
|
||||
; ILP32-NEXT: lw ra, 268(sp)
|
||||
; ILP32-NEXT: lw s1, 260(sp) # 4-byte Folded Reload
|
||||
; ILP32-NEXT: lw s0, 264(sp) # 4-byte Folded Reload
|
||||
; ILP32-NEXT: lw ra, 268(sp) # 4-byte Folded Reload
|
||||
; ILP32-NEXT: addi sp, sp, 272
|
||||
; ILP32-NEXT: ret
|
||||
;
|
||||
; LP64-LABEL: caller:
|
||||
; LP64: # %bb.0:
|
||||
; LP64-NEXT: addi sp, sp, -288
|
||||
; LP64-NEXT: sd ra, 280(sp)
|
||||
; LP64-NEXT: sd s0, 272(sp)
|
||||
; LP64-NEXT: sd s1, 264(sp)
|
||||
; LP64-NEXT: sd ra, 280(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: sd s0, 272(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: sd s1, 264(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: lui s0, %hi(var)
|
||||
; LP64-NEXT: fld ft0, %lo(var)(s0)
|
||||
; LP64-NEXT: fsd ft0, 256(sp)
|
||||
; LP64-NEXT: fsd ft0, 256(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, %lo(var+8)(s0)
|
||||
; LP64-NEXT: fsd ft0, 248(sp)
|
||||
; LP64-NEXT: fsd ft0, 248(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: addi s1, s0, %lo(var)
|
||||
; LP64-NEXT: fld ft0, 16(s1)
|
||||
; LP64-NEXT: fsd ft0, 240(sp)
|
||||
; LP64-NEXT: fsd ft0, 240(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 24(s1)
|
||||
; LP64-NEXT: fsd ft0, 232(sp)
|
||||
; LP64-NEXT: fsd ft0, 232(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 32(s1)
|
||||
; LP64-NEXT: fsd ft0, 224(sp)
|
||||
; LP64-NEXT: fsd ft0, 224(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 40(s1)
|
||||
; LP64-NEXT: fsd ft0, 216(sp)
|
||||
; LP64-NEXT: fsd ft0, 216(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 48(s1)
|
||||
; LP64-NEXT: fsd ft0, 208(sp)
|
||||
; LP64-NEXT: fsd ft0, 208(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 56(s1)
|
||||
; LP64-NEXT: fsd ft0, 200(sp)
|
||||
; LP64-NEXT: fsd ft0, 200(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 64(s1)
|
||||
; LP64-NEXT: fsd ft0, 192(sp)
|
||||
; LP64-NEXT: fsd ft0, 192(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 72(s1)
|
||||
; LP64-NEXT: fsd ft0, 184(sp)
|
||||
; LP64-NEXT: fsd ft0, 184(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 80(s1)
|
||||
; LP64-NEXT: fsd ft0, 176(sp)
|
||||
; LP64-NEXT: fsd ft0, 176(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 88(s1)
|
||||
; LP64-NEXT: fsd ft0, 168(sp)
|
||||
; LP64-NEXT: fsd ft0, 168(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 96(s1)
|
||||
; LP64-NEXT: fsd ft0, 160(sp)
|
||||
; LP64-NEXT: fsd ft0, 160(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 104(s1)
|
||||
; LP64-NEXT: fsd ft0, 152(sp)
|
||||
; LP64-NEXT: fsd ft0, 152(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 112(s1)
|
||||
; LP64-NEXT: fsd ft0, 144(sp)
|
||||
; LP64-NEXT: fsd ft0, 144(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 120(s1)
|
||||
; LP64-NEXT: fsd ft0, 136(sp)
|
||||
; LP64-NEXT: fsd ft0, 136(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 128(s1)
|
||||
; LP64-NEXT: fsd ft0, 128(sp)
|
||||
; LP64-NEXT: fsd ft0, 128(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 136(s1)
|
||||
; LP64-NEXT: fsd ft0, 120(sp)
|
||||
; LP64-NEXT: fsd ft0, 120(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 144(s1)
|
||||
; LP64-NEXT: fsd ft0, 112(sp)
|
||||
; LP64-NEXT: fsd ft0, 112(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 152(s1)
|
||||
; LP64-NEXT: fsd ft0, 104(sp)
|
||||
; LP64-NEXT: fsd ft0, 104(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 160(s1)
|
||||
; LP64-NEXT: fsd ft0, 96(sp)
|
||||
; LP64-NEXT: fsd ft0, 96(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 168(s1)
|
||||
; LP64-NEXT: fsd ft0, 88(sp)
|
||||
; LP64-NEXT: fsd ft0, 88(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 176(s1)
|
||||
; LP64-NEXT: fsd ft0, 80(sp)
|
||||
; LP64-NEXT: fsd ft0, 80(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 184(s1)
|
||||
; LP64-NEXT: fsd ft0, 72(sp)
|
||||
; LP64-NEXT: fsd ft0, 72(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 192(s1)
|
||||
; LP64-NEXT: fsd ft0, 64(sp)
|
||||
; LP64-NEXT: fsd ft0, 64(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 200(s1)
|
||||
; LP64-NEXT: fsd ft0, 56(sp)
|
||||
; LP64-NEXT: fsd ft0, 56(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 208(s1)
|
||||
; LP64-NEXT: fsd ft0, 48(sp)
|
||||
; LP64-NEXT: fsd ft0, 48(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 216(s1)
|
||||
; LP64-NEXT: fsd ft0, 40(sp)
|
||||
; LP64-NEXT: fsd ft0, 40(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 224(s1)
|
||||
; LP64-NEXT: fsd ft0, 32(sp)
|
||||
; LP64-NEXT: fsd ft0, 32(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 232(s1)
|
||||
; LP64-NEXT: fsd ft0, 24(sp)
|
||||
; LP64-NEXT: fsd ft0, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 240(s1)
|
||||
; LP64-NEXT: fsd ft0, 16(sp)
|
||||
; LP64-NEXT: fsd ft0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: fld ft0, 248(s1)
|
||||
; LP64-NEXT: fsd ft0, 8(sp)
|
||||
; LP64-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill
|
||||
; LP64-NEXT: call callee
|
||||
; LP64-NEXT: fld ft0, 8(sp)
|
||||
; LP64-NEXT: fld ft0, 8(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 248(s1)
|
||||
; LP64-NEXT: fld ft0, 16(sp)
|
||||
; LP64-NEXT: fld ft0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 240(s1)
|
||||
; LP64-NEXT: fld ft0, 24(sp)
|
||||
; LP64-NEXT: fld ft0, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 232(s1)
|
||||
; LP64-NEXT: fld ft0, 32(sp)
|
||||
; LP64-NEXT: fld ft0, 32(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 224(s1)
|
||||
; LP64-NEXT: fld ft0, 40(sp)
|
||||
; LP64-NEXT: fld ft0, 40(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 216(s1)
|
||||
; LP64-NEXT: fld ft0, 48(sp)
|
||||
; LP64-NEXT: fld ft0, 48(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 208(s1)
|
||||
; LP64-NEXT: fld ft0, 56(sp)
|
||||
; LP64-NEXT: fld ft0, 56(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 200(s1)
|
||||
; LP64-NEXT: fld ft0, 64(sp)
|
||||
; LP64-NEXT: fld ft0, 64(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 192(s1)
|
||||
; LP64-NEXT: fld ft0, 72(sp)
|
||||
; LP64-NEXT: fld ft0, 72(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 184(s1)
|
||||
; LP64-NEXT: fld ft0, 80(sp)
|
||||
; LP64-NEXT: fld ft0, 80(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 176(s1)
|
||||
; LP64-NEXT: fld ft0, 88(sp)
|
||||
; LP64-NEXT: fld ft0, 88(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 168(s1)
|
||||
; LP64-NEXT: fld ft0, 96(sp)
|
||||
; LP64-NEXT: fld ft0, 96(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 160(s1)
|
||||
; LP64-NEXT: fld ft0, 104(sp)
|
||||
; LP64-NEXT: fld ft0, 104(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 152(s1)
|
||||
; LP64-NEXT: fld ft0, 112(sp)
|
||||
; LP64-NEXT: fld ft0, 112(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 144(s1)
|
||||
; LP64-NEXT: fld ft0, 120(sp)
|
||||
; LP64-NEXT: fld ft0, 120(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 136(s1)
|
||||
; LP64-NEXT: fld ft0, 128(sp)
|
||||
; LP64-NEXT: fld ft0, 128(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 128(s1)
|
||||
; LP64-NEXT: fld ft0, 136(sp)
|
||||
; LP64-NEXT: fld ft0, 136(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 120(s1)
|
||||
; LP64-NEXT: fld ft0, 144(sp)
|
||||
; LP64-NEXT: fld ft0, 144(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 112(s1)
|
||||
; LP64-NEXT: fld ft0, 152(sp)
|
||||
; LP64-NEXT: fld ft0, 152(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 104(s1)
|
||||
; LP64-NEXT: fld ft0, 160(sp)
|
||||
; LP64-NEXT: fld ft0, 160(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 96(s1)
|
||||
; LP64-NEXT: fld ft0, 168(sp)
|
||||
; LP64-NEXT: fld ft0, 168(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 88(s1)
|
||||
; LP64-NEXT: fld ft0, 176(sp)
|
||||
; LP64-NEXT: fld ft0, 176(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 80(s1)
|
||||
; LP64-NEXT: fld ft0, 184(sp)
|
||||
; LP64-NEXT: fld ft0, 184(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 72(s1)
|
||||
; LP64-NEXT: fld ft0, 192(sp)
|
||||
; LP64-NEXT: fld ft0, 192(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 64(s1)
|
||||
; LP64-NEXT: fld ft0, 200(sp)
|
||||
; LP64-NEXT: fld ft0, 200(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 56(s1)
|
||||
; LP64-NEXT: fld ft0, 208(sp)
|
||||
; LP64-NEXT: fld ft0, 208(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 48(s1)
|
||||
; LP64-NEXT: fld ft0, 216(sp)
|
||||
; LP64-NEXT: fld ft0, 216(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 40(s1)
|
||||
; LP64-NEXT: fld ft0, 224(sp)
|
||||
; LP64-NEXT: fld ft0, 224(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 32(s1)
|
||||
; LP64-NEXT: fld ft0, 232(sp)
|
||||
; LP64-NEXT: fld ft0, 232(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 24(s1)
|
||||
; LP64-NEXT: fld ft0, 240(sp)
|
||||
; LP64-NEXT: fld ft0, 240(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, 16(s1)
|
||||
; LP64-NEXT: fld ft0, 248(sp)
|
||||
; LP64-NEXT: fld ft0, 248(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, %lo(var+8)(s0)
|
||||
; LP64-NEXT: fld ft0, 256(sp)
|
||||
; LP64-NEXT: fld ft0, 256(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: fsd ft0, %lo(var)(s0)
|
||||
; LP64-NEXT: ld s1, 264(sp)
|
||||
; LP64-NEXT: ld s0, 272(sp)
|
||||
; LP64-NEXT: ld ra, 280(sp)
|
||||
; LP64-NEXT: ld s1, 264(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: ld s0, 272(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: ld ra, 280(sp) # 8-byte Folded Reload
|
||||
; LP64-NEXT: addi sp, sp, 288
|
||||
; LP64-NEXT: ret
|
||||
;
|
||||
; ILP32D-LABEL: caller:
|
||||
; ILP32D: # %bb.0:
|
||||
; ILP32D-NEXT: addi sp, sp, -272
|
||||
; ILP32D-NEXT: sw ra, 268(sp)
|
||||
; ILP32D-NEXT: sw s0, 264(sp)
|
||||
; ILP32D-NEXT: sw s1, 260(sp)
|
||||
; ILP32D-NEXT: fsd fs0, 248(sp)
|
||||
; ILP32D-NEXT: fsd fs1, 240(sp)
|
||||
; ILP32D-NEXT: fsd fs2, 232(sp)
|
||||
; ILP32D-NEXT: fsd fs3, 224(sp)
|
||||
; ILP32D-NEXT: fsd fs4, 216(sp)
|
||||
; ILP32D-NEXT: fsd fs5, 208(sp)
|
||||
; ILP32D-NEXT: fsd fs6, 200(sp)
|
||||
; ILP32D-NEXT: fsd fs7, 192(sp)
|
||||
; ILP32D-NEXT: fsd fs8, 184(sp)
|
||||
; ILP32D-NEXT: fsd fs9, 176(sp)
|
||||
; ILP32D-NEXT: fsd fs10, 168(sp)
|
||||
; ILP32D-NEXT: fsd fs11, 160(sp)
|
||||
; ILP32D-NEXT: sw ra, 268(sp) # 4-byte Folded Spill
|
||||
; ILP32D-NEXT: sw s0, 264(sp) # 4-byte Folded Spill
|
||||
; ILP32D-NEXT: sw s1, 260(sp) # 4-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs0, 248(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs1, 240(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs2, 232(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs3, 224(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs4, 216(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs5, 208(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs6, 200(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs7, 192(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs8, 184(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs9, 176(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs10, 168(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fsd fs11, 160(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: lui s0, %hi(var)
|
||||
; ILP32D-NEXT: fld ft0, %lo(var)(s0)
|
||||
; ILP32D-NEXT: fsd ft0, 152(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 152(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, %lo(var+8)(s0)
|
||||
; ILP32D-NEXT: fsd ft0, 144(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 144(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: addi s1, s0, %lo(var)
|
||||
; ILP32D-NEXT: fld ft0, 16(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 136(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 136(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 24(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 128(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 128(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 32(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 120(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 120(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 40(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 112(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 112(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 48(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 104(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 104(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 56(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 96(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 96(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 64(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 88(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 88(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 72(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 80(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 80(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 80(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 72(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 72(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 88(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 64(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 64(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 96(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 56(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 56(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 104(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 48(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 48(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 112(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 40(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 40(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 120(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 32(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 32(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 128(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 24(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 24(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 136(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 16(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 16(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 144(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 8(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld ft0, 152(s1)
|
||||
; ILP32D-NEXT: fsd ft0, 0(sp)
|
||||
; ILP32D-NEXT: fsd ft0, 0(sp) # 8-byte Folded Spill
|
||||
; ILP32D-NEXT: fld fs8, 160(s1)
|
||||
; ILP32D-NEXT: fld fs9, 168(s1)
|
||||
; ILP32D-NEXT: fld fs10, 176(s1)
|
||||
@@ -732,124 +732,124 @@ define void @caller() nounwind {
|
||||
; ILP32D-NEXT: fsd fs10, 176(s1)
|
||||
; ILP32D-NEXT: fsd fs9, 168(s1)
|
||||
; ILP32D-NEXT: fsd fs8, 160(s1)
|
||||
; ILP32D-NEXT: fld ft0, 0(sp)
|
||||
; ILP32D-NEXT: fld ft0, 0(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 152(s1)
|
||||
; ILP32D-NEXT: fld ft0, 8(sp)
|
||||
; ILP32D-NEXT: fld ft0, 8(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 144(s1)
|
||||
; ILP32D-NEXT: fld ft0, 16(sp)
|
||||
; ILP32D-NEXT: fld ft0, 16(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 136(s1)
|
||||
; ILP32D-NEXT: fld ft0, 24(sp)
|
||||
; ILP32D-NEXT: fld ft0, 24(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 128(s1)
|
||||
; ILP32D-NEXT: fld ft0, 32(sp)
|
||||
; ILP32D-NEXT: fld ft0, 32(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 120(s1)
|
||||
; ILP32D-NEXT: fld ft0, 40(sp)
|
||||
; ILP32D-NEXT: fld ft0, 40(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 112(s1)
|
||||
; ILP32D-NEXT: fld ft0, 48(sp)
|
||||
; ILP32D-NEXT: fld ft0, 48(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 104(s1)
|
||||
; ILP32D-NEXT: fld ft0, 56(sp)
|
||||
; ILP32D-NEXT: fld ft0, 56(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 96(s1)
|
||||
; ILP32D-NEXT: fld ft0, 64(sp)
|
||||
; ILP32D-NEXT: fld ft0, 64(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 88(s1)
|
||||
; ILP32D-NEXT: fld ft0, 72(sp)
|
||||
; ILP32D-NEXT: fld ft0, 72(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 80(s1)
|
||||
; ILP32D-NEXT: fld ft0, 80(sp)
|
||||
; ILP32D-NEXT: fld ft0, 80(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 72(s1)
|
||||
; ILP32D-NEXT: fld ft0, 88(sp)
|
||||
; ILP32D-NEXT: fld ft0, 88(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 64(s1)
|
||||
; ILP32D-NEXT: fld ft0, 96(sp)
|
||||
; ILP32D-NEXT: fld ft0, 96(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 56(s1)
|
||||
; ILP32D-NEXT: fld ft0, 104(sp)
|
||||
; ILP32D-NEXT: fld ft0, 104(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 48(s1)
|
||||
; ILP32D-NEXT: fld ft0, 112(sp)
|
||||
; ILP32D-NEXT: fld ft0, 112(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 40(s1)
|
||||
; ILP32D-NEXT: fld ft0, 120(sp)
|
||||
; ILP32D-NEXT: fld ft0, 120(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 32(s1)
|
||||
; ILP32D-NEXT: fld ft0, 128(sp)
|
||||
; ILP32D-NEXT: fld ft0, 128(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 24(s1)
|
||||
; ILP32D-NEXT: fld ft0, 136(sp)
|
||||
; ILP32D-NEXT: fld ft0, 136(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, 16(s1)
|
||||
; ILP32D-NEXT: fld ft0, 144(sp)
|
||||
; ILP32D-NEXT: fld ft0, 144(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, %lo(var+8)(s0)
|
||||
; ILP32D-NEXT: fld ft0, 152(sp)
|
||||
; ILP32D-NEXT: fld ft0, 152(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fsd ft0, %lo(var)(s0)
|
||||
; ILP32D-NEXT: fld fs11, 160(sp)
|
||||
; ILP32D-NEXT: fld fs10, 168(sp)
|
||||
; ILP32D-NEXT: fld fs9, 176(sp)
|
||||
; ILP32D-NEXT: fld fs8, 184(sp)
|
||||
; ILP32D-NEXT: fld fs7, 192(sp)
|
||||
; ILP32D-NEXT: fld fs6, 200(sp)
|
||||
; ILP32D-NEXT: fld fs5, 208(sp)
|
||||
; ILP32D-NEXT: fld fs4, 216(sp)
|
||||
; ILP32D-NEXT: fld fs3, 224(sp)
|
||||
; ILP32D-NEXT: fld fs2, 232(sp)
|
||||
; ILP32D-NEXT: fld fs1, 240(sp)
|
||||
; ILP32D-NEXT: fld fs0, 248(sp)
|
||||
; ILP32D-NEXT: lw s1, 260(sp)
|
||||
; ILP32D-NEXT: lw s0, 264(sp)
|
||||
; ILP32D-NEXT: lw ra, 268(sp)
|
||||
; ILP32D-NEXT: fld fs11, 160(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs10, 168(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs9, 176(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs8, 184(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs7, 192(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs6, 200(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs5, 208(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs4, 216(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs3, 224(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs2, 232(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs1, 240(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: fld fs0, 248(sp) # 8-byte Folded Reload
|
||||
; ILP32D-NEXT: lw s1, 260(sp) # 4-byte Folded Reload
|
||||
; ILP32D-NEXT: lw s0, 264(sp) # 4-byte Folded Reload
|
||||
; ILP32D-NEXT: lw ra, 268(sp) # 4-byte Folded Reload
|
||||
; ILP32D-NEXT: addi sp, sp, 272
|
||||
; ILP32D-NEXT: ret
|
||||
;
|
||||
; LP64D-LABEL: caller:
|
||||
; LP64D: # %bb.0:
|
||||
; LP64D-NEXT: addi sp, sp, -288
|
||||
; LP64D-NEXT: sd ra, 280(sp)
|
||||
; LP64D-NEXT: sd s0, 272(sp)
|
||||
; LP64D-NEXT: sd s1, 264(sp)
|
||||
; LP64D-NEXT: fsd fs0, 256(sp)
|
||||
; LP64D-NEXT: fsd fs1, 248(sp)
|
||||
; LP64D-NEXT: fsd fs2, 240(sp)
|
||||
; LP64D-NEXT: fsd fs3, 232(sp)
|
||||
; LP64D-NEXT: fsd fs4, 224(sp)
|
||||
; LP64D-NEXT: fsd fs5, 216(sp)
|
||||
; LP64D-NEXT: fsd fs6, 208(sp)
|
||||
; LP64D-NEXT: fsd fs7, 200(sp)
|
||||
; LP64D-NEXT: fsd fs8, 192(sp)
|
||||
; LP64D-NEXT: fsd fs9, 184(sp)
|
||||
; LP64D-NEXT: fsd fs10, 176(sp)
|
||||
; LP64D-NEXT: fsd fs11, 168(sp)
|
||||
; LP64D-NEXT: sd ra, 280(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: sd s0, 272(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: sd s1, 264(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs0, 256(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs1, 248(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs2, 240(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs3, 232(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs4, 224(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs5, 216(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs6, 208(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs7, 200(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs8, 192(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs9, 184(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs10, 176(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fsd fs11, 168(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: lui s0, %hi(var)
|
||||
; LP64D-NEXT: fld ft0, %lo(var)(s0)
|
||||
; LP64D-NEXT: fsd ft0, 160(sp)
|
||||
; LP64D-NEXT: fsd ft0, 160(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, %lo(var+8)(s0)
|
||||
; LP64D-NEXT: fsd ft0, 152(sp)
|
||||
; LP64D-NEXT: fsd ft0, 152(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: addi s1, s0, %lo(var)
|
||||
; LP64D-NEXT: fld ft0, 16(s1)
|
||||
; LP64D-NEXT: fsd ft0, 144(sp)
|
||||
; LP64D-NEXT: fsd ft0, 144(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 24(s1)
|
||||
; LP64D-NEXT: fsd ft0, 136(sp)
|
||||
; LP64D-NEXT: fsd ft0, 136(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 32(s1)
|
||||
; LP64D-NEXT: fsd ft0, 128(sp)
|
||||
; LP64D-NEXT: fsd ft0, 128(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 40(s1)
|
||||
; LP64D-NEXT: fsd ft0, 120(sp)
|
||||
; LP64D-NEXT: fsd ft0, 120(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 48(s1)
|
||||
; LP64D-NEXT: fsd ft0, 112(sp)
|
||||
; LP64D-NEXT: fsd ft0, 112(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 56(s1)
|
||||
; LP64D-NEXT: fsd ft0, 104(sp)
|
||||
; LP64D-NEXT: fsd ft0, 104(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 64(s1)
|
||||
; LP64D-NEXT: fsd ft0, 96(sp)
|
||||
; LP64D-NEXT: fsd ft0, 96(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 72(s1)
|
||||
; LP64D-NEXT: fsd ft0, 88(sp)
|
||||
; LP64D-NEXT: fsd ft0, 88(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 80(s1)
|
||||
; LP64D-NEXT: fsd ft0, 80(sp)
|
||||
; LP64D-NEXT: fsd ft0, 80(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 88(s1)
|
||||
; LP64D-NEXT: fsd ft0, 72(sp)
|
||||
; LP64D-NEXT: fsd ft0, 72(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 96(s1)
|
||||
; LP64D-NEXT: fsd ft0, 64(sp)
|
||||
; LP64D-NEXT: fsd ft0, 64(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 104(s1)
|
||||
; LP64D-NEXT: fsd ft0, 56(sp)
|
||||
; LP64D-NEXT: fsd ft0, 56(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 112(s1)
|
||||
; LP64D-NEXT: fsd ft0, 48(sp)
|
||||
; LP64D-NEXT: fsd ft0, 48(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 120(s1)
|
||||
; LP64D-NEXT: fsd ft0, 40(sp)
|
||||
; LP64D-NEXT: fsd ft0, 40(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 128(s1)
|
||||
; LP64D-NEXT: fsd ft0, 32(sp)
|
||||
; LP64D-NEXT: fsd ft0, 32(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 136(s1)
|
||||
; LP64D-NEXT: fsd ft0, 24(sp)
|
||||
; LP64D-NEXT: fsd ft0, 24(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 144(s1)
|
||||
; LP64D-NEXT: fsd ft0, 16(sp)
|
||||
; LP64D-NEXT: fsd ft0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld ft0, 152(s1)
|
||||
; LP64D-NEXT: fsd ft0, 8(sp)
|
||||
; LP64D-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill
|
||||
; LP64D-NEXT: fld fs8, 160(s1)
|
||||
; LP64D-NEXT: fld fs9, 168(s1)
|
||||
; LP64D-NEXT: fld fs10, 176(s1)
|
||||
@@ -875,61 +875,61 @@ define void @caller() nounwind {
|
||||
; LP64D-NEXT: fsd fs10, 176(s1)
|
||||
; LP64D-NEXT: fsd fs9, 168(s1)
|
||||
; LP64D-NEXT: fsd fs8, 160(s1)
|
||||
; LP64D-NEXT: fld ft0, 8(sp)
|
||||
; LP64D-NEXT: fld ft0, 8(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 152(s1)
|
||||
; LP64D-NEXT: fld ft0, 16(sp)
|
||||
; LP64D-NEXT: fld ft0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 144(s1)
|
||||
; LP64D-NEXT: fld ft0, 24(sp)
|
||||
; LP64D-NEXT: fld ft0, 24(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 136(s1)
|
||||
; LP64D-NEXT: fld ft0, 32(sp)
|
||||
; LP64D-NEXT: fld ft0, 32(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 128(s1)
|
||||
; LP64D-NEXT: fld ft0, 40(sp)
|
||||
; LP64D-NEXT: fld ft0, 40(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 120(s1)
|
||||
; LP64D-NEXT: fld ft0, 48(sp)
|
||||
; LP64D-NEXT: fld ft0, 48(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 112(s1)
|
||||
; LP64D-NEXT: fld ft0, 56(sp)
|
||||
; LP64D-NEXT: fld ft0, 56(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 104(s1)
|
||||
; LP64D-NEXT: fld ft0, 64(sp)
|
||||
; LP64D-NEXT: fld ft0, 64(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 96(s1)
|
||||
; LP64D-NEXT: fld ft0, 72(sp)
|
||||
; LP64D-NEXT: fld ft0, 72(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 88(s1)
|
||||
; LP64D-NEXT: fld ft0, 80(sp)
|
||||
; LP64D-NEXT: fld ft0, 80(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 80(s1)
|
||||
; LP64D-NEXT: fld ft0, 88(sp)
|
||||
; LP64D-NEXT: fld ft0, 88(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 72(s1)
|
||||
; LP64D-NEXT: fld ft0, 96(sp)
|
||||
; LP64D-NEXT: fld ft0, 96(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 64(s1)
|
||||
; LP64D-NEXT: fld ft0, 104(sp)
|
||||
; LP64D-NEXT: fld ft0, 104(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 56(s1)
|
||||
; LP64D-NEXT: fld ft0, 112(sp)
|
||||
; LP64D-NEXT: fld ft0, 112(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 48(s1)
|
||||
; LP64D-NEXT: fld ft0, 120(sp)
|
||||
; LP64D-NEXT: fld ft0, 120(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 40(s1)
|
||||
; LP64D-NEXT: fld ft0, 128(sp)
|
||||
; LP64D-NEXT: fld ft0, 128(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 32(s1)
|
||||
; LP64D-NEXT: fld ft0, 136(sp)
|
||||
; LP64D-NEXT: fld ft0, 136(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 24(s1)
|
||||
; LP64D-NEXT: fld ft0, 144(sp)
|
||||
; LP64D-NEXT: fld ft0, 144(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, 16(s1)
|
||||
; LP64D-NEXT: fld ft0, 152(sp)
|
||||
; LP64D-NEXT: fld ft0, 152(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, %lo(var+8)(s0)
|
||||
; LP64D-NEXT: fld ft0, 160(sp)
|
||||
; LP64D-NEXT: fld ft0, 160(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fsd ft0, %lo(var)(s0)
|
||||
; LP64D-NEXT: fld fs11, 168(sp)
|
||||
; LP64D-NEXT: fld fs10, 176(sp)
|
||||
; LP64D-NEXT: fld fs9, 184(sp)
|
||||
; LP64D-NEXT: fld fs8, 192(sp)
|
||||
; LP64D-NEXT: fld fs7, 200(sp)
|
||||
; LP64D-NEXT: fld fs6, 208(sp)
|
||||
; LP64D-NEXT: fld fs5, 216(sp)
|
||||
; LP64D-NEXT: fld fs4, 224(sp)
|
||||
; LP64D-NEXT: fld fs3, 232(sp)
|
||||
; LP64D-NEXT: fld fs2, 240(sp)
|
||||
; LP64D-NEXT: fld fs1, 248(sp)
|
||||
; LP64D-NEXT: fld fs0, 256(sp)
|
||||
; LP64D-NEXT: ld s1, 264(sp)
|
||||
; LP64D-NEXT: ld s0, 272(sp)
|
||||
; LP64D-NEXT: ld ra, 280(sp)
|
||||
; LP64D-NEXT: fld fs11, 168(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs10, 176(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs9, 184(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs8, 192(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs7, 200(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs6, 208(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs5, 216(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs4, 224(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs3, 232(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs2, 240(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs1, 248(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: fld fs0, 256(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: ld s1, 264(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: ld s0, 272(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: ld ra, 280(sp) # 8-byte Folded Reload
|
||||
; LP64D-NEXT: addi sp, sp, 288
|
||||
; LP64D-NEXT: ret
|
||||
%val = load [32 x double], [32 x double]* @var
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -21,33 +21,33 @@ define i32 @callee_double_in_regs(i32 %a, double %b) nounwind {
|
||||
; RV32I-FPELIM-LABEL: callee_double_in_regs:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw s0, 8(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: mv s0, a0
|
||||
; RV32I-FPELIM-NEXT: mv a0, a1
|
||||
; RV32I-FPELIM-NEXT: mv a1, a2
|
||||
; RV32I-FPELIM-NEXT: call __fixdfsi
|
||||
; RV32I-FPELIM-NEXT: call __fixdfsi@plt
|
||||
; RV32I-FPELIM-NEXT: add a0, s0, a0
|
||||
; RV32I-FPELIM-NEXT: lw s0, 8(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: callee_double_in_regs:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s1, 4(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: mv s1, a0
|
||||
; RV32I-WITHFP-NEXT: mv a0, a1
|
||||
; RV32I-WITHFP-NEXT: mv a1, a2
|
||||
; RV32I-WITHFP-NEXT: call __fixdfsi
|
||||
; RV32I-WITHFP-NEXT: call __fixdfsi@plt
|
||||
; RV32I-WITHFP-NEXT: add a0, s1, a0
|
||||
; RV32I-WITHFP-NEXT: lw s1, 4(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%b_fptosi = fptosi double %b to i32
|
||||
@@ -59,27 +59,27 @@ define i32 @caller_double_in_regs() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_double_in_regs:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 1
|
||||
; RV32I-FPELIM-NEXT: lui a2, 262144
|
||||
; RV32I-FPELIM-NEXT: mv a1, zero
|
||||
; RV32I-FPELIM-NEXT: call callee_double_in_regs
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_double_in_regs:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: addi a0, zero, 1
|
||||
; RV32I-WITHFP-NEXT: lui a2, 262144
|
||||
; RV32I-WITHFP-NEXT: mv a1, zero
|
||||
; RV32I-WITHFP-NEXT: call callee_double_in_regs
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call i32 @callee_double_in_regs(i32 1, double 2.0)
|
||||
@@ -108,8 +108,8 @@ define i32 @callee_aligned_stack(i32 %a, i32 %b, fp128 %c, i32 %d, i32 %e, i64 %
|
||||
; RV32I-WITHFP-LABEL: callee_aligned_stack:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lw a0, 0(a2)
|
||||
; RV32I-WITHFP-NEXT: lw a1, 20(s0)
|
||||
@@ -121,8 +121,8 @@ define i32 @callee_aligned_stack(i32 %a, i32 %b, fp128 %c, i32 %d, i32 %e, i64 %
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, a3
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, a4
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, a1
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = bitcast fp128 %c to i128
|
||||
@@ -144,7 +144,7 @@ define void @caller_aligned_stack() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_aligned_stack:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -64
|
||||
; RV32I-FPELIM-NEXT: sw ra, 60(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 18
|
||||
; RV32I-FPELIM-NEXT: sw a0, 24(sp)
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 17
|
||||
@@ -181,15 +181,15 @@ define void @caller_aligned_stack() nounwind {
|
||||
; RV32I-FPELIM-NEXT: addi a7, zero, 14
|
||||
; RV32I-FPELIM-NEXT: sw t0, 32(sp)
|
||||
; RV32I-FPELIM-NEXT: call callee_aligned_stack
|
||||
; RV32I-FPELIM-NEXT: lw ra, 60(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 64
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_aligned_stack:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -64
|
||||
; RV32I-WITHFP-NEXT: sw ra, 60(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 56(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 64
|
||||
; RV32I-WITHFP-NEXT: addi a0, zero, 18
|
||||
; RV32I-WITHFP-NEXT: sw a0, 24(sp)
|
||||
@@ -227,8 +227,8 @@ define void @caller_aligned_stack() nounwind {
|
||||
; RV32I-WITHFP-NEXT: addi a7, zero, 14
|
||||
; RV32I-WITHFP-NEXT: sw t0, -32(s0)
|
||||
; RV32I-WITHFP-NEXT: call callee_aligned_stack
|
||||
; RV32I-WITHFP-NEXT: lw s0, 56(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 60(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 64
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call i32 @callee_aligned_stack(i32 1, i32 11,
|
||||
@@ -248,13 +248,13 @@ define double @callee_small_scalar_ret() nounwind {
|
||||
; RV32I-WITHFP-LABEL: callee_small_scalar_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lui a1, 261888
|
||||
; RV32I-WITHFP-NEXT: mv a0, zero
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
ret double 1.0
|
||||
@@ -264,21 +264,21 @@ define i64 @caller_small_scalar_ret() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_small_scalar_ret:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: call callee_small_scalar_ret
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_small_scalar_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: call callee_small_scalar_ret
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call double @callee_small_scalar_ret()
|
||||
|
||||
@@ -33,12 +33,12 @@ define i32 @callee_i64_in_regs(i32 %a, i64 %b) nounwind {
|
||||
; RV32I-WITHFP-LABEL: callee_i64_in_regs:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, a1
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%b_trunc = trunc i64 %b to i32
|
||||
@@ -50,27 +50,27 @@ define i32 @caller_i64_in_regs() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_i64_in_regs:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 1
|
||||
; RV32I-FPELIM-NEXT: addi a1, zero, 2
|
||||
; RV32I-FPELIM-NEXT: mv a2, zero
|
||||
; RV32I-FPELIM-NEXT: call callee_i64_in_regs
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_i64_in_regs:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: addi a0, zero, 1
|
||||
; RV32I-WITHFP-NEXT: addi a1, zero, 2
|
||||
; RV32I-WITHFP-NEXT: mv a2, zero
|
||||
; RV32I-WITHFP-NEXT: call callee_i64_in_regs
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call i32 @callee_i64_in_regs(i32 1, i64 2)
|
||||
@@ -103,8 +103,8 @@ define i32 @callee_many_scalars(i8 %a, i16 %b, i32 %c, i64 %d, i32 %e, i32 %f, i
|
||||
; RV32I-WITHFP-LABEL: callee_many_scalars:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lw t0, 4(s0)
|
||||
; RV32I-WITHFP-NEXT: lw t1, 0(s0)
|
||||
@@ -122,8 +122,8 @@ define i32 @callee_many_scalars(i8 %a, i16 %b, i32 %c, i64 %d, i32 %e, i32 %f, i
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, a5
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, a6
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, t0
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%a_ext = zext i8 %a to i32
|
||||
@@ -143,7 +143,7 @@ define i32 @caller_many_scalars() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_many_scalars:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 8
|
||||
; RV32I-FPELIM-NEXT: sw a0, 4(sp)
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 1
|
||||
@@ -156,15 +156,15 @@ define i32 @caller_many_scalars() nounwind {
|
||||
; RV32I-FPELIM-NEXT: sw zero, 0(sp)
|
||||
; RV32I-FPELIM-NEXT: mv a4, zero
|
||||
; RV32I-FPELIM-NEXT: call callee_many_scalars
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_many_scalars:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: addi a0, zero, 8
|
||||
; RV32I-WITHFP-NEXT: sw a0, 4(sp)
|
||||
@@ -178,8 +178,8 @@ define i32 @caller_many_scalars() nounwind {
|
||||
; RV32I-WITHFP-NEXT: sw zero, 0(sp)
|
||||
; RV32I-WITHFP-NEXT: mv a4, zero
|
||||
; RV32I-WITHFP-NEXT: call callee_many_scalars
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call i32 @callee_many_scalars(i8 1, i16 2, i32 3, i64 4, i32 5, i32 6, i64 7, i32 8)
|
||||
@@ -213,8 +213,8 @@ define i32 @callee_large_scalars(i128 %a, fp128 %b) nounwind {
|
||||
; RV32I-WITHFP-LABEL: callee_large_scalars:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lw a6, 0(a1)
|
||||
; RV32I-WITHFP-NEXT: lw a7, 0(a0)
|
||||
@@ -232,8 +232,8 @@ define i32 @callee_large_scalars(i128 %a, fp128 %b) nounwind {
|
||||
; RV32I-WITHFP-NEXT: or a0, a1, a0
|
||||
; RV32I-WITHFP-NEXT: or a0, a0, a2
|
||||
; RV32I-WITHFP-NEXT: seqz a0, a0
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%b_bitcast = bitcast fp128 %b to i128
|
||||
@@ -246,7 +246,7 @@ define i32 @caller_large_scalars() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_large_scalars:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -48
|
||||
; RV32I-FPELIM-NEXT: sw ra, 44(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: lui a0, 524272
|
||||
; RV32I-FPELIM-NEXT: sw a0, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw zero, 8(sp)
|
||||
@@ -260,15 +260,15 @@ define i32 @caller_large_scalars() nounwind {
|
||||
; RV32I-FPELIM-NEXT: mv a1, sp
|
||||
; RV32I-FPELIM-NEXT: sw a2, 24(sp)
|
||||
; RV32I-FPELIM-NEXT: call callee_large_scalars
|
||||
; RV32I-FPELIM-NEXT: lw ra, 44(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 48
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_large_scalars:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -48
|
||||
; RV32I-WITHFP-NEXT: sw ra, 44(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 40(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 48
|
||||
; RV32I-WITHFP-NEXT: lui a0, 524272
|
||||
; RV32I-WITHFP-NEXT: sw a0, -36(s0)
|
||||
@@ -283,8 +283,8 @@ define i32 @caller_large_scalars() nounwind {
|
||||
; RV32I-WITHFP-NEXT: addi a1, s0, -48
|
||||
; RV32I-WITHFP-NEXT: sw a2, -24(s0)
|
||||
; RV32I-WITHFP-NEXT: call callee_large_scalars
|
||||
; RV32I-WITHFP-NEXT: lw s0, 40(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 44(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 48
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call i32 @callee_large_scalars(i128 1, fp128 0xL00000000000000007FFF000000000000)
|
||||
@@ -320,8 +320,8 @@ define i32 @callee_large_scalars_exhausted_regs(i32 %a, i32 %b, i32 %c, i32 %d,
|
||||
; RV32I-WITHFP-LABEL: callee_large_scalars_exhausted_regs:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lw a0, 4(s0)
|
||||
; RV32I-WITHFP-NEXT: lw a6, 0(a0)
|
||||
@@ -340,8 +340,8 @@ define i32 @callee_large_scalars_exhausted_regs(i32 %a, i32 %b, i32 %c, i32 %d,
|
||||
; RV32I-WITHFP-NEXT: or a0, a2, a0
|
||||
; RV32I-WITHFP-NEXT: or a0, a0, a1
|
||||
; RV32I-WITHFP-NEXT: seqz a0, a0
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%j_bitcast = bitcast fp128 %j to i128
|
||||
@@ -354,7 +354,7 @@ define i32 @caller_large_scalars_exhausted_regs() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_large_scalars_exhausted_regs:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -64
|
||||
; RV32I-FPELIM-NEXT: sw ra, 60(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: addi a0, sp, 16
|
||||
; RV32I-FPELIM-NEXT: sw a0, 4(sp)
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 9
|
||||
@@ -378,15 +378,15 @@ define i32 @caller_large_scalars_exhausted_regs() nounwind {
|
||||
; RV32I-FPELIM-NEXT: addi a7, sp, 40
|
||||
; RV32I-FPELIM-NEXT: sw t0, 40(sp)
|
||||
; RV32I-FPELIM-NEXT: call callee_large_scalars_exhausted_regs
|
||||
; RV32I-FPELIM-NEXT: lw ra, 60(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 64
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_large_scalars_exhausted_regs:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -64
|
||||
; RV32I-WITHFP-NEXT: sw ra, 60(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 56(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 64
|
||||
; RV32I-WITHFP-NEXT: addi a0, s0, -48
|
||||
; RV32I-WITHFP-NEXT: sw a0, 4(sp)
|
||||
@@ -411,8 +411,8 @@ define i32 @caller_large_scalars_exhausted_regs() nounwind {
|
||||
; RV32I-WITHFP-NEXT: addi a7, s0, -24
|
||||
; RV32I-WITHFP-NEXT: sw t0, -24(s0)
|
||||
; RV32I-WITHFP-NEXT: call callee_large_scalars_exhausted_regs
|
||||
; RV32I-WITHFP-NEXT: lw s0, 56(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 60(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 64
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call i32 @callee_large_scalars_exhausted_regs(
|
||||
@@ -427,29 +427,29 @@ define i32 @caller_mixed_scalar_libcalls(i64 %a) nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_mixed_scalar_libcalls:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -32
|
||||
; RV32I-FPELIM-NEXT: sw ra, 28(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: mv a2, a1
|
||||
; RV32I-FPELIM-NEXT: mv a1, a0
|
||||
; RV32I-FPELIM-NEXT: addi a0, sp, 8
|
||||
; RV32I-FPELIM-NEXT: call __floatditf
|
||||
; RV32I-FPELIM-NEXT: call __floatditf@plt
|
||||
; RV32I-FPELIM-NEXT: lw a0, 8(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 28(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 32
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_mixed_scalar_libcalls:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -32
|
||||
; RV32I-WITHFP-NEXT: sw ra, 28(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 24(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 32
|
||||
; RV32I-WITHFP-NEXT: mv a2, a1
|
||||
; RV32I-WITHFP-NEXT: mv a1, a0
|
||||
; RV32I-WITHFP-NEXT: addi a0, s0, -24
|
||||
; RV32I-WITHFP-NEXT: call __floatditf
|
||||
; RV32I-WITHFP-NEXT: call __floatditf@plt
|
||||
; RV32I-WITHFP-NEXT: lw a0, -24(s0)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 24(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 28(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 32
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = sitofp i64 %a to fp128
|
||||
@@ -472,13 +472,13 @@ define i32 @callee_small_coerced_struct([2 x i32] %a.coerce) nounwind {
|
||||
; RV32I-WITHFP-LABEL: callee_small_coerced_struct:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: xor a0, a0, a1
|
||||
; RV32I-WITHFP-NEXT: seqz a0, a0
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = extractvalue [2 x i32] %a.coerce, 0
|
||||
@@ -492,25 +492,25 @@ define i32 @caller_small_coerced_struct() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_small_coerced_struct:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 1
|
||||
; RV32I-FPELIM-NEXT: addi a1, zero, 2
|
||||
; RV32I-FPELIM-NEXT: call callee_small_coerced_struct
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_small_coerced_struct:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: addi a0, zero, 1
|
||||
; RV32I-WITHFP-NEXT: addi a1, zero, 2
|
||||
; RV32I-WITHFP-NEXT: call callee_small_coerced_struct
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call i32 @callee_small_coerced_struct([2 x i32] [i32 1, i32 2])
|
||||
@@ -532,14 +532,14 @@ define i32 @callee_large_struct(%struct.large* byval(%struct.large) align 4 %a)
|
||||
; RV32I-WITHFP-LABEL: callee_large_struct:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lw a1, 0(a0)
|
||||
; RV32I-WITHFP-NEXT: lw a0, 12(a0)
|
||||
; RV32I-WITHFP-NEXT: add a0, a1, a0
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = getelementptr inbounds %struct.large, %struct.large* %a, i32 0, i32 0
|
||||
@@ -554,7 +554,7 @@ define i32 @caller_large_struct() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_large_struct:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -48
|
||||
; RV32I-FPELIM-NEXT: sw ra, 44(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 1
|
||||
; RV32I-FPELIM-NEXT: sw a0, 24(sp)
|
||||
; RV32I-FPELIM-NEXT: addi a1, zero, 2
|
||||
@@ -569,15 +569,15 @@ define i32 @caller_large_struct() nounwind {
|
||||
; RV32I-FPELIM-NEXT: sw a3, 20(sp)
|
||||
; RV32I-FPELIM-NEXT: addi a0, sp, 8
|
||||
; RV32I-FPELIM-NEXT: call callee_large_struct
|
||||
; RV32I-FPELIM-NEXT: lw ra, 44(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 48
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_large_struct:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -48
|
||||
; RV32I-WITHFP-NEXT: sw ra, 44(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 40(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 48
|
||||
; RV32I-WITHFP-NEXT: addi a0, zero, 1
|
||||
; RV32I-WITHFP-NEXT: sw a0, -24(s0)
|
||||
@@ -593,8 +593,8 @@ define i32 @caller_large_struct() nounwind {
|
||||
; RV32I-WITHFP-NEXT: sw a3, -28(s0)
|
||||
; RV32I-WITHFP-NEXT: addi a0, s0, -40
|
||||
; RV32I-WITHFP-NEXT: call callee_large_struct
|
||||
; RV32I-WITHFP-NEXT: lw s0, 40(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 44(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 48
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%ls = alloca %struct.large, align 4
|
||||
@@ -633,8 +633,8 @@ define i32 @callee_aligned_stack(i32 %a, i32 %b, fp128 %c, i32 %d, i32 %e, i64 %
|
||||
; RV32I-WITHFP-LABEL: callee_aligned_stack:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lw a0, 0(a2)
|
||||
; RV32I-WITHFP-NEXT: lw a1, 20(s0)
|
||||
@@ -646,8 +646,8 @@ define i32 @callee_aligned_stack(i32 %a, i32 %b, fp128 %c, i32 %d, i32 %e, i64 %
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, a3
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, a4
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, a1
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = bitcast fp128 %c to i128
|
||||
@@ -668,7 +668,7 @@ define void @caller_aligned_stack() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_aligned_stack:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -64
|
||||
; RV32I-FPELIM-NEXT: sw ra, 60(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 19
|
||||
; RV32I-FPELIM-NEXT: sw a0, 24(sp)
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 18
|
||||
@@ -702,15 +702,15 @@ define void @caller_aligned_stack() nounwind {
|
||||
; RV32I-FPELIM-NEXT: addi a7, zero, 14
|
||||
; RV32I-FPELIM-NEXT: sw t0, 32(sp)
|
||||
; RV32I-FPELIM-NEXT: call callee_aligned_stack
|
||||
; RV32I-FPELIM-NEXT: lw ra, 60(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 64
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_aligned_stack:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -64
|
||||
; RV32I-WITHFP-NEXT: sw ra, 60(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 56(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 64
|
||||
; RV32I-WITHFP-NEXT: addi a0, zero, 19
|
||||
; RV32I-WITHFP-NEXT: sw a0, 24(sp)
|
||||
@@ -745,8 +745,8 @@ define void @caller_aligned_stack() nounwind {
|
||||
; RV32I-WITHFP-NEXT: addi a7, zero, 14
|
||||
; RV32I-WITHFP-NEXT: sw t0, -32(s0)
|
||||
; RV32I-WITHFP-NEXT: call callee_aligned_stack
|
||||
; RV32I-WITHFP-NEXT: lw s0, 56(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 60(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 64
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call i32 @callee_aligned_stack(i32 1, i32 11,
|
||||
@@ -769,14 +769,14 @@ define i64 @callee_small_scalar_ret() nounwind {
|
||||
; RV32I-WITHFP-LABEL: callee_small_scalar_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lui a0, 466866
|
||||
; RV32I-WITHFP-NEXT: addi a0, a0, 1677
|
||||
; RV32I-WITHFP-NEXT: addi a1, zero, 287
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
ret i64 1234567898765
|
||||
@@ -786,7 +786,7 @@ define i32 @caller_small_scalar_ret() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_small_scalar_ret:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: call callee_small_scalar_ret
|
||||
; RV32I-FPELIM-NEXT: lui a2, 56
|
||||
; RV32I-FPELIM-NEXT: addi a2, a2, 580
|
||||
@@ -796,15 +796,15 @@ define i32 @caller_small_scalar_ret() nounwind {
|
||||
; RV32I-FPELIM-NEXT: xor a0, a0, a2
|
||||
; RV32I-FPELIM-NEXT: or a0, a0, a1
|
||||
; RV32I-FPELIM-NEXT: seqz a0, a0
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_small_scalar_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: call callee_small_scalar_ret
|
||||
; RV32I-WITHFP-NEXT: lui a2, 56
|
||||
@@ -815,8 +815,8 @@ define i32 @caller_small_scalar_ret() nounwind {
|
||||
; RV32I-WITHFP-NEXT: xor a0, a0, a2
|
||||
; RV32I-WITHFP-NEXT: or a0, a0, a1
|
||||
; RV32I-WITHFP-NEXT: seqz a0, a0
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call i64 @callee_small_scalar_ret()
|
||||
@@ -837,13 +837,13 @@ define %struct.small @callee_small_struct_ret() nounwind {
|
||||
; RV32I-WITHFP-LABEL: callee_small_struct_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: addi a0, zero, 1
|
||||
; RV32I-WITHFP-NEXT: mv a1, zero
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
ret %struct.small { i32 1, i32* null }
|
||||
@@ -853,23 +853,23 @@ define i32 @caller_small_struct_ret() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_small_struct_ret:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: call callee_small_struct_ret
|
||||
; RV32I-FPELIM-NEXT: add a0, a0, a1
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_small_struct_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: call callee_small_struct_ret
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, a1
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call %struct.small @callee_small_struct_ret()
|
||||
@@ -895,16 +895,16 @@ define fp128 @callee_large_scalar_ret() nounwind {
|
||||
; RV32I-WITHFP-LABEL: callee_large_scalar_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lui a1, 524272
|
||||
; RV32I-WITHFP-NEXT: sw a1, 12(a0)
|
||||
; RV32I-WITHFP-NEXT: sw zero, 8(a0)
|
||||
; RV32I-WITHFP-NEXT: sw zero, 4(a0)
|
||||
; RV32I-WITHFP-NEXT: sw zero, 0(a0)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
ret fp128 0xL00000000000000007FFF000000000000
|
||||
@@ -914,23 +914,23 @@ define void @caller_large_scalar_ret() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_large_scalar_ret:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -32
|
||||
; RV32I-FPELIM-NEXT: sw ra, 28(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: mv a0, sp
|
||||
; RV32I-FPELIM-NEXT: call callee_large_scalar_ret
|
||||
; RV32I-FPELIM-NEXT: lw ra, 28(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 32
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_large_scalar_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -32
|
||||
; RV32I-WITHFP-NEXT: sw ra, 28(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 24(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 32
|
||||
; RV32I-WITHFP-NEXT: addi a0, s0, -32
|
||||
; RV32I-WITHFP-NEXT: call callee_large_scalar_ret
|
||||
; RV32I-WITHFP-NEXT: lw s0, 24(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 28(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 32
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call fp128 @callee_large_scalar_ret()
|
||||
@@ -955,8 +955,8 @@ define void @callee_large_struct_ret(%struct.large* noalias sret(%struct.large)
|
||||
; RV32I-WITHFP-LABEL: callee_large_struct_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: addi a1, zero, 1
|
||||
; RV32I-WITHFP-NEXT: sw a1, 0(a0)
|
||||
@@ -966,8 +966,8 @@ define void @callee_large_struct_ret(%struct.large* noalias sret(%struct.large)
|
||||
; RV32I-WITHFP-NEXT: sw a1, 8(a0)
|
||||
; RV32I-WITHFP-NEXT: addi a1, zero, 4
|
||||
; RV32I-WITHFP-NEXT: sw a1, 12(a0)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%a = getelementptr inbounds %struct.large, %struct.large* %agg.result, i32 0, i32 0
|
||||
@@ -985,29 +985,29 @@ define i32 @caller_large_struct_ret() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_large_struct_ret:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -32
|
||||
; RV32I-FPELIM-NEXT: sw ra, 28(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: addi a0, sp, 8
|
||||
; RV32I-FPELIM-NEXT: call callee_large_struct_ret
|
||||
; RV32I-FPELIM-NEXT: lw a0, 8(sp)
|
||||
; RV32I-FPELIM-NEXT: lw a1, 20(sp)
|
||||
; RV32I-FPELIM-NEXT: add a0, a0, a1
|
||||
; RV32I-FPELIM-NEXT: lw ra, 28(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 32
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_large_struct_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -32
|
||||
; RV32I-WITHFP-NEXT: sw ra, 28(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 24(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 32
|
||||
; RV32I-WITHFP-NEXT: addi a0, s0, -24
|
||||
; RV32I-WITHFP-NEXT: call callee_large_struct_ret
|
||||
; RV32I-WITHFP-NEXT: lw a0, -24(s0)
|
||||
; RV32I-WITHFP-NEXT: lw a1, -12(s0)
|
||||
; RV32I-WITHFP-NEXT: add a0, a0, a1
|
||||
; RV32I-WITHFP-NEXT: lw s0, 24(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 28(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 32
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = alloca %struct.large
|
||||
|
||||
@@ -16,31 +16,31 @@ define i32 @callee_float_in_regs(i32 %a, float %b) nounwind {
|
||||
; RV32I-FPELIM-LABEL: callee_float_in_regs:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw s0, 8(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: mv s0, a0
|
||||
; RV32I-FPELIM-NEXT: mv a0, a1
|
||||
; RV32I-FPELIM-NEXT: call __fixsfsi
|
||||
; RV32I-FPELIM-NEXT: call __fixsfsi@plt
|
||||
; RV32I-FPELIM-NEXT: add a0, s0, a0
|
||||
; RV32I-FPELIM-NEXT: lw s0, 8(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: callee_float_in_regs:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s1, 4(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: mv s1, a0
|
||||
; RV32I-WITHFP-NEXT: mv a0, a1
|
||||
; RV32I-WITHFP-NEXT: call __fixsfsi
|
||||
; RV32I-WITHFP-NEXT: call __fixsfsi@plt
|
||||
; RV32I-WITHFP-NEXT: add a0, s1, a0
|
||||
; RV32I-WITHFP-NEXT: lw s1, 4(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%b_fptosi = fptosi float %b to i32
|
||||
@@ -52,25 +52,25 @@ define i32 @caller_float_in_regs() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_float_in_regs:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 1
|
||||
; RV32I-FPELIM-NEXT: lui a1, 262144
|
||||
; RV32I-FPELIM-NEXT: call callee_float_in_regs
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_float_in_regs:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: addi a0, zero, 1
|
||||
; RV32I-WITHFP-NEXT: lui a1, 262144
|
||||
; RV32I-WITHFP-NEXT: call callee_float_in_regs
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call i32 @callee_float_in_regs(i32 1, float 2.0)
|
||||
@@ -87,13 +87,13 @@ define i32 @callee_float_on_stack(i64 %a, i64 %b, i64 %c, i64 %d, float %e) noun
|
||||
; RV32I-WITHFP-LABEL: callee_float_on_stack:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lw a0, 0(s0)
|
||||
; RV32I-WITHFP-NEXT: add a0, a6, a0
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = trunc i64 %d to i32
|
||||
@@ -106,7 +106,7 @@ define i32 @caller_float_on_stack() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_float_on_stack:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: lui a1, 264704
|
||||
; RV32I-FPELIM-NEXT: addi a0, zero, 1
|
||||
; RV32I-FPELIM-NEXT: addi a2, zero, 2
|
||||
@@ -118,15 +118,15 @@ define i32 @caller_float_on_stack() nounwind {
|
||||
; RV32I-FPELIM-NEXT: mv a5, zero
|
||||
; RV32I-FPELIM-NEXT: mv a7, zero
|
||||
; RV32I-FPELIM-NEXT: call callee_float_on_stack
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_float_on_stack:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lui a1, 264704
|
||||
; RV32I-WITHFP-NEXT: addi a0, zero, 1
|
||||
@@ -139,8 +139,8 @@ define i32 @caller_float_on_stack() nounwind {
|
||||
; RV32I-WITHFP-NEXT: mv a5, zero
|
||||
; RV32I-WITHFP-NEXT: mv a7, zero
|
||||
; RV32I-WITHFP-NEXT: call callee_float_on_stack
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call i32 @callee_float_on_stack(i64 1, i64 2, i64 3, i64 4, float 5.0)
|
||||
@@ -156,12 +156,12 @@ define float @callee_tiny_scalar_ret() nounwind {
|
||||
; RV32I-WITHFP-LABEL: callee_tiny_scalar_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: lui a0, 260096
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
ret float 1.0
|
||||
@@ -171,21 +171,21 @@ define i32 @caller_tiny_scalar_ret() nounwind {
|
||||
; RV32I-FPELIM-LABEL: caller_tiny_scalar_ret:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: call callee_tiny_scalar_ret
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: caller_tiny_scalar_ret:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32I-WITHFP-NEXT: call callee_tiny_scalar_ret
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%1 = call float @callee_tiny_scalar_ret()
|
||||
|
||||
@@ -21,12 +21,12 @@ define i32 @caller_double_in_fpr() nounwind {
|
||||
; RV32-ILP32D-LABEL: caller_double_in_fpr:
|
||||
; RV32-ILP32D: # %bb.0:
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, -16
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI1_0)
|
||||
; RV32-ILP32D-NEXT: fld fa0, %lo(.LCPI1_0)(a0)
|
||||
; RV32-ILP32D-NEXT: addi a0, zero, 1
|
||||
; RV32-ILP32D-NEXT: call callee_double_in_fpr
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, 16
|
||||
; RV32-ILP32D-NEXT: ret
|
||||
%1 = call i32 @callee_double_in_fpr(i32 1, double 2.0)
|
||||
@@ -50,7 +50,7 @@ define i32 @caller_double_in_fpr_exhausted_gprs() nounwind {
|
||||
; RV32-ILP32D-LABEL: caller_double_in_fpr_exhausted_gprs:
|
||||
; RV32-ILP32D: # %bb.0:
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, -16
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-ILP32D-NEXT: addi a1, zero, 5
|
||||
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI3_0)
|
||||
; RV32-ILP32D-NEXT: fld fa0, %lo(.LCPI3_0)(a0)
|
||||
@@ -64,7 +64,7 @@ define i32 @caller_double_in_fpr_exhausted_gprs() nounwind {
|
||||
; RV32-ILP32D-NEXT: mv a5, zero
|
||||
; RV32-ILP32D-NEXT: mv a7, zero
|
||||
; RV32-ILP32D-NEXT: call callee_double_in_fpr_exhausted_gprs
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, 16
|
||||
; RV32-ILP32D-NEXT: ret
|
||||
%1 = call i32 @callee_double_in_fpr_exhausted_gprs(
|
||||
@@ -95,7 +95,7 @@ define i32 @caller_double_in_gpr_exhausted_fprs() nounwind {
|
||||
; RV32-ILP32D-LABEL: caller_double_in_gpr_exhausted_fprs:
|
||||
; RV32-ILP32D: # %bb.0:
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, -16
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI5_0)
|
||||
; RV32-ILP32D-NEXT: fld fa0, %lo(.LCPI5_0)(a0)
|
||||
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI5_1)
|
||||
@@ -115,7 +115,7 @@ define i32 @caller_double_in_gpr_exhausted_fprs() nounwind {
|
||||
; RV32-ILP32D-NEXT: lui a1, 262688
|
||||
; RV32-ILP32D-NEXT: mv a0, zero
|
||||
; RV32-ILP32D-NEXT: call callee_double_in_gpr_exhausted_fprs
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, 16
|
||||
; RV32-ILP32D-NEXT: ret
|
||||
%1 = call i32 @callee_double_in_gpr_exhausted_fprs(
|
||||
@@ -146,7 +146,7 @@ define i32 @caller_double_in_gpr_and_stack_almost_exhausted_gprs_fprs() nounwind
|
||||
; RV32-ILP32D-LABEL: caller_double_in_gpr_and_stack_almost_exhausted_gprs_fprs:
|
||||
; RV32-ILP32D: # %bb.0:
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, -16
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-ILP32D-NEXT: lui a1, 262816
|
||||
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI7_0)
|
||||
; RV32-ILP32D-NEXT: fld fa0, %lo(.LCPI7_0)(a0)
|
||||
@@ -174,7 +174,7 @@ define i32 @caller_double_in_gpr_and_stack_almost_exhausted_gprs_fprs() nounwind
|
||||
; RV32-ILP32D-NEXT: mv a5, zero
|
||||
; RV32-ILP32D-NEXT: mv a7, zero
|
||||
; RV32-ILP32D-NEXT: call callee_double_in_gpr_and_stack_almost_exhausted_gprs_fprs
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, 16
|
||||
; RV32-ILP32D-NEXT: ret
|
||||
%1 = call i32 @callee_double_in_gpr_and_stack_almost_exhausted_gprs_fprs(
|
||||
@@ -202,7 +202,7 @@ define i32 @caller_double_on_stack_exhausted_gprs_fprs() nounwind {
|
||||
; RV32-ILP32D-LABEL: caller_double_on_stack_exhausted_gprs_fprs:
|
||||
; RV32-ILP32D: # %bb.0:
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, -16
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-ILP32D-NEXT: lui a0, 262816
|
||||
; RV32-ILP32D-NEXT: sw a0, 4(sp)
|
||||
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI9_0)
|
||||
@@ -231,7 +231,7 @@ define i32 @caller_double_on_stack_exhausted_gprs_fprs() nounwind {
|
||||
; RV32-ILP32D-NEXT: mv a5, zero
|
||||
; RV32-ILP32D-NEXT: mv a7, zero
|
||||
; RV32-ILP32D-NEXT: call callee_double_on_stack_exhausted_gprs_fprs
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, 16
|
||||
; RV32-ILP32D-NEXT: ret
|
||||
%1 = call i32 @callee_double_on_stack_exhausted_gprs_fprs(
|
||||
@@ -253,11 +253,11 @@ define i32 @caller_double_ret() nounwind {
|
||||
; RV32-ILP32D-LABEL: caller_double_ret:
|
||||
; RV32-ILP32D: # %bb.0:
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, -16
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-ILP32D-NEXT: call callee_double_ret
|
||||
; RV32-ILP32D-NEXT: fsd fa0, 0(sp)
|
||||
; RV32-ILP32D-NEXT: lw a0, 0(sp)
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp)
|
||||
; RV32-ILP32D-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-ILP32D-NEXT: addi sp, sp, 16
|
||||
; RV32-ILP32D-NEXT: ret
|
||||
%1 = call double @callee_double_ret()
|
||||
|
||||
@@ -24,12 +24,12 @@ define i32 @caller_float_in_fpr() nounwind {
|
||||
; RV32-ILP32FD-LABEL: caller_float_in_fpr:
|
||||
; RV32-ILP32FD: # %bb.0:
|
||||
; RV32-ILP32FD-NEXT: addi sp, sp, -16
|
||||
; RV32-ILP32FD-NEXT: sw ra, 12(sp)
|
||||
; RV32-ILP32FD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-ILP32FD-NEXT: lui a0, %hi(.LCPI1_0)
|
||||
; RV32-ILP32FD-NEXT: flw fa0, %lo(.LCPI1_0)(a0)
|
||||
; RV32-ILP32FD-NEXT: addi a0, zero, 1
|
||||
; RV32-ILP32FD-NEXT: call callee_float_in_fpr
|
||||
; RV32-ILP32FD-NEXT: lw ra, 12(sp)
|
||||
; RV32-ILP32FD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-ILP32FD-NEXT: addi sp, sp, 16
|
||||
; RV32-ILP32FD-NEXT: ret
|
||||
%1 = call i32 @callee_float_in_fpr(i32 1, float 2.0)
|
||||
@@ -53,7 +53,7 @@ define i32 @caller_float_in_fpr_exhausted_gprs() nounwind {
|
||||
; RV32-ILP32FD-LABEL: caller_float_in_fpr_exhausted_gprs:
|
||||
; RV32-ILP32FD: # %bb.0:
|
||||
; RV32-ILP32FD-NEXT: addi sp, sp, -16
|
||||
; RV32-ILP32FD-NEXT: sw ra, 12(sp)
|
||||
; RV32-ILP32FD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-ILP32FD-NEXT: addi a1, zero, 5
|
||||
; RV32-ILP32FD-NEXT: lui a0, %hi(.LCPI3_0)
|
||||
; RV32-ILP32FD-NEXT: flw fa0, %lo(.LCPI3_0)(a0)
|
||||
@@ -67,7 +67,7 @@ define i32 @caller_float_in_fpr_exhausted_gprs() nounwind {
|
||||
; RV32-ILP32FD-NEXT: mv a5, zero
|
||||
; RV32-ILP32FD-NEXT: mv a7, zero
|
||||
; RV32-ILP32FD-NEXT: call callee_float_in_fpr_exhausted_gprs
|
||||
; RV32-ILP32FD-NEXT: lw ra, 12(sp)
|
||||
; RV32-ILP32FD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-ILP32FD-NEXT: addi sp, sp, 16
|
||||
; RV32-ILP32FD-NEXT: ret
|
||||
%1 = call i32 @callee_float_in_fpr_exhausted_gprs(
|
||||
@@ -94,7 +94,7 @@ define i32 @caller_float_in_gpr_exhausted_fprs() nounwind {
|
||||
; RV32-ILP32FD-LABEL: caller_float_in_gpr_exhausted_fprs:
|
||||
; RV32-ILP32FD: # %bb.0:
|
||||
; RV32-ILP32FD-NEXT: addi sp, sp, -16
|
||||
; RV32-ILP32FD-NEXT: sw ra, 12(sp)
|
||||
; RV32-ILP32FD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-ILP32FD-NEXT: lui a0, %hi(.LCPI5_0)
|
||||
; RV32-ILP32FD-NEXT: flw fa0, %lo(.LCPI5_0)(a0)
|
||||
; RV32-ILP32FD-NEXT: lui a0, %hi(.LCPI5_1)
|
||||
@@ -113,7 +113,7 @@ define i32 @caller_float_in_gpr_exhausted_fprs() nounwind {
|
||||
; RV32-ILP32FD-NEXT: flw fa7, %lo(.LCPI5_7)(a0)
|
||||
; RV32-ILP32FD-NEXT: lui a0, 266496
|
||||
; RV32-ILP32FD-NEXT: call callee_float_in_gpr_exhausted_fprs
|
||||
; RV32-ILP32FD-NEXT: lw ra, 12(sp)
|
||||
; RV32-ILP32FD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-ILP32FD-NEXT: addi sp, sp, 16
|
||||
; RV32-ILP32FD-NEXT: ret
|
||||
%1 = call i32 @callee_float_in_gpr_exhausted_fprs(
|
||||
@@ -140,7 +140,7 @@ define i32 @caller_float_on_stack_exhausted_gprs_fprs() nounwind {
|
||||
; RV32-ILP32FD-LABEL: caller_float_on_stack_exhausted_gprs_fprs:
|
||||
; RV32-ILP32FD: # %bb.0:
|
||||
; RV32-ILP32FD-NEXT: addi sp, sp, -16
|
||||
; RV32-ILP32FD-NEXT: sw ra, 12(sp)
|
||||
; RV32-ILP32FD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-ILP32FD-NEXT: lui a1, 267520
|
||||
; RV32-ILP32FD-NEXT: lui a0, %hi(.LCPI7_0)
|
||||
; RV32-ILP32FD-NEXT: flw fa0, %lo(.LCPI7_0)(a0)
|
||||
@@ -168,7 +168,7 @@ define i32 @caller_float_on_stack_exhausted_gprs_fprs() nounwind {
|
||||
; RV32-ILP32FD-NEXT: mv a5, zero
|
||||
; RV32-ILP32FD-NEXT: mv a7, zero
|
||||
; RV32-ILP32FD-NEXT: call callee_float_on_stack_exhausted_gprs_fprs
|
||||
; RV32-ILP32FD-NEXT: lw ra, 12(sp)
|
||||
; RV32-ILP32FD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-ILP32FD-NEXT: addi sp, sp, 16
|
||||
; RV32-ILP32FD-NEXT: ret
|
||||
%1 = call i32 @callee_float_on_stack_exhausted_gprs_fprs(
|
||||
@@ -190,10 +190,10 @@ define i32 @caller_float_ret() nounwind {
|
||||
; RV32-ILP32FD-LABEL: caller_float_ret:
|
||||
; RV32-ILP32FD: # %bb.0:
|
||||
; RV32-ILP32FD-NEXT: addi sp, sp, -16
|
||||
; RV32-ILP32FD-NEXT: sw ra, 12(sp)
|
||||
; RV32-ILP32FD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-ILP32FD-NEXT: call callee_float_ret
|
||||
; RV32-ILP32FD-NEXT: fmv.x.w a0, fa0
|
||||
; RV32-ILP32FD-NEXT: lw ra, 12(sp)
|
||||
; RV32-ILP32FD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-ILP32FD-NEXT: addi sp, sp, 16
|
||||
; RV32-ILP32FD-NEXT: ret
|
||||
%1 = call float @callee_float_ret()
|
||||
|
||||
@@ -13,14 +13,14 @@ define i64 @callee_double_in_regs(i64 %a, double %b) nounwind {
|
||||
; RV64I-LABEL: callee_double_in_regs:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd s0, 0(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: mv a0, a1
|
||||
; RV64I-NEXT: call __fixdfdi
|
||||
; RV64I-NEXT: call __fixdfdi@plt
|
||||
; RV64I-NEXT: add a0, s0, a0
|
||||
; RV64I-NEXT: ld s0, 0(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%b_fptosi = fptosi double %b to i64
|
||||
@@ -32,12 +32,12 @@ define i64 @caller_double_in_regs() nounwind {
|
||||
; RV64I-LABEL: caller_double_in_regs:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a0, zero, 1
|
||||
; RV64I-NEXT: slli a1, a0, 62
|
||||
; RV64I-NEXT: addi a0, zero, 1
|
||||
; RV64I-NEXT: call callee_double_in_regs
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i64 @callee_double_in_regs(i64 1, double 2.0)
|
||||
@@ -57,9 +57,9 @@ define i64 @caller_double_ret() nounwind {
|
||||
; RV64I-LABEL: caller_double_ret:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call callee_double_ret
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call double @callee_double_ret()
|
||||
|
||||
@@ -31,12 +31,12 @@ define i64 @caller_i128_in_regs() nounwind {
|
||||
; RV64I-LABEL: caller_i128_in_regs:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a0, zero, 1
|
||||
; RV64I-NEXT: addi a1, zero, 2
|
||||
; RV64I-NEXT: mv a2, zero
|
||||
; RV64I-NEXT: call callee_i128_in_regs
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i64 @callee_i128_in_regs(i64 1, i128 2)
|
||||
@@ -82,7 +82,7 @@ define i32 @caller_many_scalars() nounwind {
|
||||
; RV64I-LABEL: caller_many_scalars:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -32
|
||||
; RV64I-NEXT: sd ra, 24(sp)
|
||||
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a0, zero, 8
|
||||
; RV64I-NEXT: sd a0, 8(sp)
|
||||
; RV64I-NEXT: addi a0, zero, 1
|
||||
@@ -95,7 +95,7 @@ define i32 @caller_many_scalars() nounwind {
|
||||
; RV64I-NEXT: sd zero, 0(sp)
|
||||
; RV64I-NEXT: mv a4, zero
|
||||
; RV64I-NEXT: call callee_many_scalars
|
||||
; RV64I-NEXT: ld ra, 24(sp)
|
||||
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 32
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i32 @callee_many_scalars(i8 1, i16 2, i32 3, i128 4, i32 5, i32 6, i128 7, i32 8)
|
||||
@@ -133,7 +133,7 @@ define i64 @caller_large_scalars() nounwind {
|
||||
; RV64I-LABEL: caller_large_scalars:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -80
|
||||
; RV64I-NEXT: sd ra, 72(sp)
|
||||
; RV64I-NEXT: sd ra, 72(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd zero, 24(sp)
|
||||
; RV64I-NEXT: sd zero, 16(sp)
|
||||
; RV64I-NEXT: sd zero, 8(sp)
|
||||
@@ -147,7 +147,7 @@ define i64 @caller_large_scalars() nounwind {
|
||||
; RV64I-NEXT: mv a1, sp
|
||||
; RV64I-NEXT: sd a2, 32(sp)
|
||||
; RV64I-NEXT: call callee_large_scalars
|
||||
; RV64I-NEXT: ld ra, 72(sp)
|
||||
; RV64I-NEXT: ld ra, 72(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 80
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i64 @callee_large_scalars(i256 1, i256 2)
|
||||
@@ -188,7 +188,7 @@ define i64 @caller_large_scalars_exhausted_regs() nounwind {
|
||||
; RV64I-LABEL: caller_large_scalars_exhausted_regs:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -96
|
||||
; RV64I-NEXT: sd ra, 88(sp)
|
||||
; RV64I-NEXT: sd ra, 88(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a0, sp, 16
|
||||
; RV64I-NEXT: sd a0, 8(sp)
|
||||
; RV64I-NEXT: addi a0, zero, 9
|
||||
@@ -212,7 +212,7 @@ define i64 @caller_large_scalars_exhausted_regs() nounwind {
|
||||
; RV64I-NEXT: addi a7, sp, 48
|
||||
; RV64I-NEXT: sd t0, 48(sp)
|
||||
; RV64I-NEXT: call callee_large_scalars_exhausted_regs
|
||||
; RV64I-NEXT: ld ra, 88(sp)
|
||||
; RV64I-NEXT: ld ra, 88(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 96
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i64 @callee_large_scalars_exhausted_regs(
|
||||
@@ -227,9 +227,9 @@ define i64 @caller_mixed_scalar_libcalls(i64 %a) nounwind {
|
||||
; RV64I-LABEL: caller_mixed_scalar_libcalls:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __floatditf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __floatditf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = sitofp i64 %a to fp128
|
||||
@@ -259,11 +259,11 @@ define i64 @caller_small_coerced_struct() nounwind {
|
||||
; RV64I-LABEL: caller_small_coerced_struct:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a0, zero, 1
|
||||
; RV64I-NEXT: addi a1, zero, 2
|
||||
; RV64I-NEXT: call callee_small_coerced_struct
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i64 @callee_small_coerced_struct([2 x i64] [i64 1, i64 2])
|
||||
@@ -293,7 +293,7 @@ define i64 @caller_large_struct() nounwind {
|
||||
; RV64I-LABEL: caller_large_struct:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -80
|
||||
; RV64I-NEXT: sd ra, 72(sp)
|
||||
; RV64I-NEXT: sd ra, 72(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a0, zero, 1
|
||||
; RV64I-NEXT: sd a0, 40(sp)
|
||||
; RV64I-NEXT: addi a1, zero, 2
|
||||
@@ -308,7 +308,7 @@ define i64 @caller_large_struct() nounwind {
|
||||
; RV64I-NEXT: sd a3, 32(sp)
|
||||
; RV64I-NEXT: addi a0, sp, 8
|
||||
; RV64I-NEXT: call callee_large_struct
|
||||
; RV64I-NEXT: ld ra, 72(sp)
|
||||
; RV64I-NEXT: ld ra, 72(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 80
|
||||
; RV64I-NEXT: ret
|
||||
%ls = alloca %struct.large, align 8
|
||||
@@ -359,7 +359,7 @@ define void @caller_aligned_stack() nounwind {
|
||||
; RV64I-LABEL: caller_aligned_stack:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -64
|
||||
; RV64I-NEXT: sd ra, 56(sp)
|
||||
; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a0, zero, 12
|
||||
; RV64I-NEXT: sd a0, 48(sp)
|
||||
; RV64I-NEXT: addi a0, zero, 11
|
||||
@@ -380,7 +380,7 @@ define void @caller_aligned_stack() nounwind {
|
||||
; RV64I-NEXT: sd a6, 0(sp)
|
||||
; RV64I-NEXT: mv a6, zero
|
||||
; RV64I-NEXT: call callee_aligned_stack
|
||||
; RV64I-NEXT: ld ra, 56(sp)
|
||||
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 64
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i64 @callee_aligned_stack(i64 1, i64 2, i64 3, i64 4, i64 5,
|
||||
@@ -403,13 +403,13 @@ define i64 @caller_small_scalar_ret() nounwind {
|
||||
; RV64I-LABEL: caller_small_scalar_ret:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call callee_small_scalar_ret
|
||||
; RV64I-NEXT: not a1, a1
|
||||
; RV64I-NEXT: xori a0, a0, -2
|
||||
; RV64I-NEXT: or a0, a0, a1
|
||||
; RV64I-NEXT: seqz a0, a0
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i128 @callee_small_scalar_ret()
|
||||
@@ -433,10 +433,10 @@ define i64 @caller_small_struct_ret() nounwind {
|
||||
; RV64I-LABEL: caller_small_struct_ret:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call callee_small_struct_ret
|
||||
; RV64I-NEXT: add a0, a0, a1
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call %struct.small @callee_small_struct_ret()
|
||||
@@ -467,10 +467,10 @@ define void @caller_large_scalar_ret() nounwind {
|
||||
; RV64I-LABEL: caller_large_scalar_ret:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -48
|
||||
; RV64I-NEXT: sd ra, 40(sp)
|
||||
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a0, sp
|
||||
; RV64I-NEXT: call callee_large_scalar_ret
|
||||
; RV64I-NEXT: ld ra, 40(sp)
|
||||
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 48
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i256 @callee_large_scalar_ret()
|
||||
@@ -510,13 +510,13 @@ define i64 @caller_large_struct_ret() nounwind {
|
||||
; RV64I-LABEL: caller_large_struct_ret:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -48
|
||||
; RV64I-NEXT: sd ra, 40(sp)
|
||||
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a0, sp, 8
|
||||
; RV64I-NEXT: call callee_large_struct_ret
|
||||
; RV64I-NEXT: ld a0, 8(sp)
|
||||
; RV64I-NEXT: ld a1, 32(sp)
|
||||
; RV64I-NEXT: add a0, a0, a1
|
||||
; RV64I-NEXT: ld ra, 40(sp)
|
||||
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 48
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca %struct.large
|
||||
|
||||
@@ -18,31 +18,31 @@ define i64 @callee_float_in_regs(i64 %a, float %b) nounwind {
|
||||
; RV64I-FPELIM-LABEL: callee_float_in_regs:
|
||||
; RV64I-FPELIM: # %bb.0:
|
||||
; RV64I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV64I-FPELIM-NEXT: sd ra, 8(sp)
|
||||
; RV64I-FPELIM-NEXT: sd s0, 0(sp)
|
||||
; RV64I-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-FPELIM-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-FPELIM-NEXT: mv s0, a0
|
||||
; RV64I-FPELIM-NEXT: mv a0, a1
|
||||
; RV64I-FPELIM-NEXT: call __fixsfdi
|
||||
; RV64I-FPELIM-NEXT: call __fixsfdi@plt
|
||||
; RV64I-FPELIM-NEXT: add a0, s0, a0
|
||||
; RV64I-FPELIM-NEXT: ld s0, 0(sp)
|
||||
; RV64I-FPELIM-NEXT: ld ra, 8(sp)
|
||||
; RV64I-FPELIM-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV64I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV64I-WITHFP-LABEL: callee_float_in_regs:
|
||||
; RV64I-WITHFP: # %bb.0:
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, -32
|
||||
; RV64I-WITHFP-NEXT: sd ra, 24(sp)
|
||||
; RV64I-WITHFP-NEXT: sd s0, 16(sp)
|
||||
; RV64I-WITHFP-NEXT: sd s1, 8(sp)
|
||||
; RV64I-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: addi s0, sp, 32
|
||||
; RV64I-WITHFP-NEXT: mv s1, a0
|
||||
; RV64I-WITHFP-NEXT: mv a0, a1
|
||||
; RV64I-WITHFP-NEXT: call __fixsfdi
|
||||
; RV64I-WITHFP-NEXT: call __fixsfdi@plt
|
||||
; RV64I-WITHFP-NEXT: add a0, s1, a0
|
||||
; RV64I-WITHFP-NEXT: ld s1, 8(sp)
|
||||
; RV64I-WITHFP-NEXT: ld s0, 16(sp)
|
||||
; RV64I-WITHFP-NEXT: ld ra, 24(sp)
|
||||
; RV64I-WITHFP-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, 32
|
||||
; RV64I-WITHFP-NEXT: ret
|
||||
%b_fptosi = fptosi float %b to i64
|
||||
@@ -54,25 +54,25 @@ define i64 @caller_float_in_regs() nounwind {
|
||||
; RV64I-FPELIM-LABEL: caller_float_in_regs:
|
||||
; RV64I-FPELIM: # %bb.0:
|
||||
; RV64I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV64I-FPELIM-NEXT: sd ra, 8(sp)
|
||||
; RV64I-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-FPELIM-NEXT: addi a0, zero, 1
|
||||
; RV64I-FPELIM-NEXT: lui a1, 262144
|
||||
; RV64I-FPELIM-NEXT: call callee_float_in_regs
|
||||
; RV64I-FPELIM-NEXT: ld ra, 8(sp)
|
||||
; RV64I-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV64I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV64I-WITHFP-LABEL: caller_float_in_regs:
|
||||
; RV64I-WITHFP: # %bb.0:
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV64I-WITHFP-NEXT: sd ra, 8(sp)
|
||||
; RV64I-WITHFP-NEXT: sd s0, 0(sp)
|
||||
; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV64I-WITHFP-NEXT: addi a0, zero, 1
|
||||
; RV64I-WITHFP-NEXT: lui a1, 262144
|
||||
; RV64I-WITHFP-NEXT: call callee_float_in_regs
|
||||
; RV64I-WITHFP-NEXT: ld s0, 0(sp)
|
||||
; RV64I-WITHFP-NEXT: ld ra, 8(sp)
|
||||
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV64I-WITHFP-NEXT: ret
|
||||
%1 = call i64 @callee_float_in_regs(i64 1, float 2.0)
|
||||
@@ -88,12 +88,12 @@ define i64 @callee_float_on_stack(i128 %a, i128 %b, i128 %c, i128 %d, float %e)
|
||||
; RV64I-WITHFP-LABEL: callee_float_on_stack:
|
||||
; RV64I-WITHFP: # %bb.0:
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV64I-WITHFP-NEXT: sd ra, 8(sp)
|
||||
; RV64I-WITHFP-NEXT: sd s0, 0(sp)
|
||||
; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV64I-WITHFP-NEXT: lw a0, 0(s0)
|
||||
; RV64I-WITHFP-NEXT: ld s0, 0(sp)
|
||||
; RV64I-WITHFP-NEXT: ld ra, 8(sp)
|
||||
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV64I-WITHFP-NEXT: ret
|
||||
%1 = trunc i128 %d to i64
|
||||
@@ -107,7 +107,7 @@ define i64 @caller_float_on_stack() nounwind {
|
||||
; RV64I-FPELIM-LABEL: caller_float_on_stack:
|
||||
; RV64I-FPELIM: # %bb.0:
|
||||
; RV64I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV64I-FPELIM-NEXT: sd ra, 8(sp)
|
||||
; RV64I-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-FPELIM-NEXT: lui a1, 264704
|
||||
; RV64I-FPELIM-NEXT: addi a0, zero, 1
|
||||
; RV64I-FPELIM-NEXT: addi a2, zero, 2
|
||||
@@ -119,15 +119,15 @@ define i64 @caller_float_on_stack() nounwind {
|
||||
; RV64I-FPELIM-NEXT: mv a5, zero
|
||||
; RV64I-FPELIM-NEXT: mv a7, zero
|
||||
; RV64I-FPELIM-NEXT: call callee_float_on_stack
|
||||
; RV64I-FPELIM-NEXT: ld ra, 8(sp)
|
||||
; RV64I-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV64I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV64I-WITHFP-LABEL: caller_float_on_stack:
|
||||
; RV64I-WITHFP: # %bb.0:
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, -32
|
||||
; RV64I-WITHFP-NEXT: sd ra, 24(sp)
|
||||
; RV64I-WITHFP-NEXT: sd s0, 16(sp)
|
||||
; RV64I-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: addi s0, sp, 32
|
||||
; RV64I-WITHFP-NEXT: lui a1, 264704
|
||||
; RV64I-WITHFP-NEXT: addi a0, zero, 1
|
||||
@@ -140,8 +140,8 @@ define i64 @caller_float_on_stack() nounwind {
|
||||
; RV64I-WITHFP-NEXT: mv a5, zero
|
||||
; RV64I-WITHFP-NEXT: mv a7, zero
|
||||
; RV64I-WITHFP-NEXT: call callee_float_on_stack
|
||||
; RV64I-WITHFP-NEXT: ld s0, 16(sp)
|
||||
; RV64I-WITHFP-NEXT: ld ra, 24(sp)
|
||||
; RV64I-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, 32
|
||||
; RV64I-WITHFP-NEXT: ret
|
||||
%1 = call i64 @callee_float_on_stack(i128 1, i128 2, i128 3, i128 4, float 5.0)
|
||||
@@ -157,12 +157,12 @@ define float @callee_tiny_scalar_ret() nounwind {
|
||||
; RV64I-WITHFP-LABEL: callee_tiny_scalar_ret:
|
||||
; RV64I-WITHFP: # %bb.0:
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV64I-WITHFP-NEXT: sd ra, 8(sp)
|
||||
; RV64I-WITHFP-NEXT: sd s0, 0(sp)
|
||||
; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV64I-WITHFP-NEXT: lui a0, 260096
|
||||
; RV64I-WITHFP-NEXT: ld s0, 0(sp)
|
||||
; RV64I-WITHFP-NEXT: ld ra, 8(sp)
|
||||
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV64I-WITHFP-NEXT: ret
|
||||
ret float 1.0
|
||||
@@ -175,23 +175,23 @@ define i64 @caller_tiny_scalar_ret() nounwind {
|
||||
; RV64I-FPELIM-LABEL: caller_tiny_scalar_ret:
|
||||
; RV64I-FPELIM: # %bb.0:
|
||||
; RV64I-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV64I-FPELIM-NEXT: sd ra, 8(sp)
|
||||
; RV64I-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-FPELIM-NEXT: call callee_tiny_scalar_ret
|
||||
; RV64I-FPELIM-NEXT: sext.w a0, a0
|
||||
; RV64I-FPELIM-NEXT: ld ra, 8(sp)
|
||||
; RV64I-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV64I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV64I-WITHFP-LABEL: caller_tiny_scalar_ret:
|
||||
; RV64I-WITHFP: # %bb.0:
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV64I-WITHFP-NEXT: sd ra, 8(sp)
|
||||
; RV64I-WITHFP-NEXT: sd s0, 0(sp)
|
||||
; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV64I-WITHFP-NEXT: call callee_tiny_scalar_ret
|
||||
; RV64I-WITHFP-NEXT: sext.w a0, a0
|
||||
; RV64I-WITHFP-NEXT: ld s0, 0(sp)
|
||||
; RV64I-WITHFP-NEXT: ld ra, 8(sp)
|
||||
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV64I-WITHFP-NEXT: ret
|
||||
%1 = call float @callee_tiny_scalar_ret()
|
||||
|
||||
@@ -31,7 +31,7 @@ define float @caller_onstack_f32_noop(float %a) nounwind {
|
||||
; RV32IF-LABEL: caller_onstack_f32_noop:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: sw a0, 4(sp)
|
||||
; RV32IF-NEXT: lui a1, 264704
|
||||
; RV32IF-NEXT: addi a0, zero, 1
|
||||
@@ -44,7 +44,7 @@ define float @caller_onstack_f32_noop(float %a) nounwind {
|
||||
; RV32IF-NEXT: mv a5, zero
|
||||
; RV32IF-NEXT: mv a7, zero
|
||||
; RV32IF-NEXT: call onstack_f32_noop
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
%1 = call float @onstack_f32_noop(i64 1, i64 2, i64 3, i64 4, float 5.0, float %a)
|
||||
@@ -55,7 +55,7 @@ define float @caller_onstack_f32_fadd(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: caller_onstack_f32_fadd:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV32IF-NEXT: fadd.s ft2, ft1, ft0
|
||||
@@ -71,7 +71,7 @@ define float @caller_onstack_f32_fadd(float %a, float %b) nounwind {
|
||||
; RV32IF-NEXT: mv a5, zero
|
||||
; RV32IF-NEXT: mv a7, zero
|
||||
; RV32IF-NEXT: call onstack_f32_noop
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
%1 = fadd float %a, %b
|
||||
|
||||
@@ -15,9 +15,9 @@ define void @pass_uint8_as_uint8(i8 zeroext %a) nounwind {
|
||||
; RV32I-LABEL: pass_uint8_as_uint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call receive_uint8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call receive_uint8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
call void @receive_uint8(i8 zeroext %a)
|
||||
@@ -30,9 +30,9 @@ define zeroext i8 @ret_callresult_uint8_as_uint8() nounwind {
|
||||
; RV32I-LABEL: ret_callresult_uint8_as_uint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call return_uint8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call return_uint8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = call zeroext i8 @return_uint8()
|
||||
@@ -54,11 +54,11 @@ define void @pass_uint8_as_sint8(i8 zeroext %a) nounwind {
|
||||
; RV32I-LABEL: pass_uint8_as_sint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: slli a0, a0, 24
|
||||
; RV32I-NEXT: srai a0, a0, 24
|
||||
; RV32I-NEXT: call receive_sint8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call receive_sint8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
|
||||
@@ -70,11 +70,11 @@ define signext i8 @ret_callresult_uint8_as_sint8() nounwind {
|
||||
; RV32I-LABEL: ret_callresult_uint8_as_sint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call return_uint8
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call return_uint8@plt
|
||||
; RV32I-NEXT: slli a0, a0, 24
|
||||
; RV32I-NEXT: srai a0, a0, 24
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = call zeroext i8 @return_uint8()
|
||||
@@ -95,9 +95,9 @@ define void @pass_uint8_as_anyint32(i8 zeroext %a) nounwind {
|
||||
; RV32I-LABEL: pass_uint8_as_anyint32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call receive_anyint32
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call receive_anyint32@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = zext i8 %a to i32
|
||||
@@ -109,9 +109,9 @@ define signext i32 @ret_callresult_uint8_as_anyint32() nounwind {
|
||||
; RV32I-LABEL: ret_callresult_uint8_as_anyint32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call return_uint8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call return_uint8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = call zeroext i8 @return_uint8()
|
||||
@@ -131,10 +131,10 @@ define void @pass_sint8_as_uint8(i8 signext %a) nounwind {
|
||||
; RV32I-LABEL: pass_sint8_as_uint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: andi a0, a0, 255
|
||||
; RV32I-NEXT: call receive_uint8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call receive_uint8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
call void @receive_uint8(i8 zeroext %a)
|
||||
@@ -147,10 +147,10 @@ define zeroext i8 @ret_callresult_sint8_as_uint8() nounwind {
|
||||
; RV32I-LABEL: ret_callresult_sint8_as_uint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call return_sint8
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call return_sint8@plt
|
||||
; RV32I-NEXT: andi a0, a0, 255
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = call signext i8 @return_sint8()
|
||||
@@ -168,9 +168,9 @@ define void @pass_sint8_as_sint8(i8 signext %a) nounwind {
|
||||
; RV32I-LABEL: pass_sint8_as_sint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call receive_sint8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call receive_sint8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
call void @receive_sint8(i8 signext %a)
|
||||
@@ -181,9 +181,9 @@ define signext i8 @ret_callresult_sint8_as_sint8() nounwind {
|
||||
; RV32I-LABEL: ret_callresult_sint8_as_sint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call return_sint8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call return_sint8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = call signext i8 @return_sint8()
|
||||
@@ -202,9 +202,9 @@ define void @pass_sint8_as_anyint32(i8 signext %a) nounwind {
|
||||
; RV32I-LABEL: pass_sint8_as_anyint32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call receive_anyint32
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call receive_anyint32@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = sext i8 %a to i32
|
||||
@@ -216,9 +216,9 @@ define signext i32 @ret_callresult_sint8_as_anyint32() nounwind {
|
||||
; RV32I-LABEL: ret_callresult_sint8_as_anyint32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call return_sint8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call return_sint8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = call signext i8 @return_sint8()
|
||||
@@ -239,10 +239,10 @@ define void @pass_anyint32_as_uint8(i32 signext %a) nounwind {
|
||||
; RV32I-LABEL: pass_anyint32_as_uint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: andi a0, a0, 255
|
||||
; RV32I-NEXT: call receive_uint8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call receive_uint8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = trunc i32 %a to i8
|
||||
@@ -256,10 +256,10 @@ define zeroext i8 @ret_callresult_anyint32_as_uint8() nounwind {
|
||||
; RV32I-LABEL: ret_callresult_anyint32_as_uint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call return_anyint32
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call return_anyint32@plt
|
||||
; RV32I-NEXT: andi a0, a0, 255
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = call signext i32 @return_anyint32()
|
||||
@@ -281,11 +281,11 @@ define void @pass_anyint32_as_sint8(i32 signext %a) nounwind {
|
||||
; RV32I-LABEL: pass_anyint32_as_sint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: slli a0, a0, 24
|
||||
; RV32I-NEXT: srai a0, a0, 24
|
||||
; RV32I-NEXT: call receive_sint8
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call receive_sint8@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = trunc i32 %a to i8
|
||||
@@ -297,11 +297,11 @@ define signext i8 @ret_callresult_anyint32_as_sint8() nounwind {
|
||||
; RV32I-LABEL: ret_callresult_anyint32_as_sint8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call return_anyint32
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call return_anyint32@plt
|
||||
; RV32I-NEXT: slli a0, a0, 24
|
||||
; RV32I-NEXT: srai a0, a0, 24
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = call signext i32 @return_anyint32()
|
||||
@@ -320,9 +320,9 @@ define void @pass_anyint32_as_anyint32(i32 signext %a) nounwind {
|
||||
; RV32I-LABEL: pass_anyint32_as_anyint32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call receive_anyint32
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call receive_anyint32@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
call void @receive_anyint32(i32 signext %a)
|
||||
@@ -333,9 +333,9 @@ define signext i32 @ret_callresult_anyint32_as_anyint32() nounwind {
|
||||
; RV32I-LABEL: ret_callresult_anyint32_as_anyint32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call return_anyint32
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call return_anyint32@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = call signext i32 @return_anyint32()
|
||||
|
||||
@@ -10,18 +10,18 @@ define i32 @test_call_external(i32 %a) nounwind {
|
||||
; RV32I-LABEL: test_call_external:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call external_function
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call external_function@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32I-PIC-LABEL: test_call_external:
|
||||
; RV32I-PIC: # %bb.0:
|
||||
; RV32I-PIC-NEXT: addi sp, sp, -16
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-PIC-NEXT: call external_function@plt
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-PIC-NEXT: addi sp, sp, 16
|
||||
; RV32I-PIC-NEXT: ret
|
||||
%1 = call i32 @external_function(i32 %a)
|
||||
@@ -34,18 +34,18 @@ define i32 @test_call_dso_local(i32 %a) nounwind {
|
||||
; RV32I-LABEL: test_call_dso_local:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call dso_local_function
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32I-PIC-LABEL: test_call_dso_local:
|
||||
; RV32I-PIC: # %bb.0:
|
||||
; RV32I-PIC-NEXT: addi sp, sp, -16
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-PIC-NEXT: call dso_local_function
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-PIC-NEXT: addi sp, sp, 16
|
||||
; RV32I-PIC-NEXT: ret
|
||||
%1 = call i32 @dso_local_function(i32 %a)
|
||||
@@ -70,18 +70,18 @@ define i32 @test_call_defined(i32 %a) nounwind {
|
||||
; RV32I-LABEL: test_call_defined:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call defined_function
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32I-PIC-LABEL: test_call_defined:
|
||||
; RV32I-PIC: # %bb.0:
|
||||
; RV32I-PIC-NEXT: addi sp, sp, -16
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-PIC-NEXT: call defined_function@plt
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-PIC-NEXT: addi sp, sp, 16
|
||||
; RV32I-PIC-NEXT: ret
|
||||
%1 = call i32 @defined_function(i32 %a)
|
||||
@@ -92,22 +92,22 @@ define i32 @test_call_indirect(i32 (i32)* %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: test_call_indirect:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a2, a0
|
||||
; RV32I-NEXT: mv a0, a1
|
||||
; RV32I-NEXT: jalr a2
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32I-PIC-LABEL: test_call_indirect:
|
||||
; RV32I-PIC: # %bb.0:
|
||||
; RV32I-PIC-NEXT: addi sp, sp, -16
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-PIC-NEXT: mv a2, a0
|
||||
; RV32I-PIC-NEXT: mv a0, a1
|
||||
; RV32I-PIC-NEXT: jalr a2
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-PIC-NEXT: addi sp, sp, 16
|
||||
; RV32I-PIC-NEXT: ret
|
||||
%1 = call i32 %a(i32 %b)
|
||||
@@ -135,26 +135,26 @@ define i32 @test_call_fastcc(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: test_call_fastcc:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: call fastcc_function
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32I-PIC-LABEL: test_call_fastcc:
|
||||
; RV32I-PIC: # %bb.0:
|
||||
; RV32I-PIC-NEXT: addi sp, sp, -16
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: sw s0, 8(sp)
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-PIC-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-PIC-NEXT: mv s0, a0
|
||||
; RV32I-PIC-NEXT: call fastcc_function@plt
|
||||
; RV32I-PIC-NEXT: mv a0, s0
|
||||
; RV32I-PIC-NEXT: lw s0, 8(sp)
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-PIC-NEXT: addi sp, sp, 16
|
||||
; RV32I-PIC-NEXT: ret
|
||||
%1 = call fastcc i32 @fastcc_function(i32 %a, i32 %b)
|
||||
@@ -167,8 +167,8 @@ define i32 @test_call_external_many_args(i32 %a) nounwind {
|
||||
; RV32I-LABEL: test_call_external_many_args:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: sw a0, 4(sp)
|
||||
; RV32I-NEXT: sw a0, 0(sp)
|
||||
@@ -179,18 +179,18 @@ define i32 @test_call_external_many_args(i32 %a) nounwind {
|
||||
; RV32I-NEXT: mv a5, a0
|
||||
; RV32I-NEXT: mv a6, a0
|
||||
; RV32I-NEXT: mv a7, a0
|
||||
; RV32I-NEXT: call external_many_args
|
||||
; RV32I-NEXT: call external_many_args@plt
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32I-PIC-LABEL: test_call_external_many_args:
|
||||
; RV32I-PIC: # %bb.0:
|
||||
; RV32I-PIC-NEXT: addi sp, sp, -16
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: sw s0, 8(sp)
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-PIC-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-PIC-NEXT: mv s0, a0
|
||||
; RV32I-PIC-NEXT: sw a0, 4(sp)
|
||||
; RV32I-PIC-NEXT: sw a0, 0(sp)
|
||||
@@ -203,8 +203,8 @@ define i32 @test_call_external_many_args(i32 %a) nounwind {
|
||||
; RV32I-PIC-NEXT: mv a7, a0
|
||||
; RV32I-PIC-NEXT: call external_many_args@plt
|
||||
; RV32I-PIC-NEXT: mv a0, s0
|
||||
; RV32I-PIC-NEXT: lw s0, 8(sp)
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-PIC-NEXT: addi sp, sp, 16
|
||||
; RV32I-PIC-NEXT: ret
|
||||
%1 = call i32 @external_many_args(i32 %a, i32 %a, i32 %a, i32 %a, i32 %a,
|
||||
@@ -232,7 +232,7 @@ define i32 @test_call_defined_many_args(i32 %a) nounwind {
|
||||
; RV32I-LABEL: test_call_defined_many_args:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw a0, 4(sp)
|
||||
; RV32I-NEXT: sw a0, 0(sp)
|
||||
; RV32I-NEXT: mv a1, a0
|
||||
@@ -243,14 +243,14 @@ define i32 @test_call_defined_many_args(i32 %a) nounwind {
|
||||
; RV32I-NEXT: mv a6, a0
|
||||
; RV32I-NEXT: mv a7, a0
|
||||
; RV32I-NEXT: call defined_many_args
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32I-PIC-LABEL: test_call_defined_many_args:
|
||||
; RV32I-PIC: # %bb.0:
|
||||
; RV32I-PIC-NEXT: addi sp, sp, -16
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-PIC-NEXT: sw a0, 4(sp)
|
||||
; RV32I-PIC-NEXT: sw a0, 0(sp)
|
||||
; RV32I-PIC-NEXT: mv a1, a0
|
||||
@@ -261,7 +261,7 @@ define i32 @test_call_defined_many_args(i32 %a) nounwind {
|
||||
; RV32I-PIC-NEXT: mv a6, a0
|
||||
; RV32I-PIC-NEXT: mv a7, a0
|
||||
; RV32I-PIC-NEXT: call defined_many_args@plt
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp)
|
||||
; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-PIC-NEXT: addi sp, sp, 16
|
||||
; RV32I-PIC-NEXT: ret
|
||||
%1 = call i32 @defined_many_args(i32 %a, i32 %a, i32 %a, i32 %a, i32 %a,
|
||||
|
||||
@@ -300,84 +300,84 @@ define half @fold_demote_h_s(half %a, float %b) nounwind {
|
||||
; RV32I-LABEL: fold_demote_h_s:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s0, a1
|
||||
; RV32I-NEXT: lui a1, 16
|
||||
; RV32I-NEXT: addi a1, a1, -1
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: call __gnu_h2f_ieee
|
||||
; RV32I-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV32I-NEXT: lui a1, 524288
|
||||
; RV32I-NEXT: and a2, s0, a1
|
||||
; RV32I-NEXT: addi a1, a1, -1
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: or a0, a0, a2
|
||||
; RV32I-NEXT: call __gnu_f2h_ieee
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: fold_demote_h_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd s0, 0(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s0, a1
|
||||
; RV64I-NEXT: lui a1, 16
|
||||
; RV64I-NEXT: addiw a1, a1, -1
|
||||
; RV64I-NEXT: and a0, a0, a1
|
||||
; RV64I-NEXT: call __gnu_h2f_ieee
|
||||
; RV64I-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV64I-NEXT: lui a1, 524288
|
||||
; RV64I-NEXT: and a2, s0, a1
|
||||
; RV64I-NEXT: addiw a1, a1, -1
|
||||
; RV64I-NEXT: and a0, a0, a1
|
||||
; RV64I-NEXT: or a0, a0, a2
|
||||
; RV64I-NEXT: call __gnu_f2h_ieee
|
||||
; RV64I-NEXT: ld s0, 0(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
; RV32IF-LABEL: fold_demote_h_s:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs0, 8(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs0, fa1
|
||||
; RV32IF-NEXT: call __gnu_f2h_ieee
|
||||
; RV32IF-NEXT: call __gnu_h2f_ieee
|
||||
; RV32IF-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV32IF-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV32IF-NEXT: fsgnj.s fa0, fa0, fs0
|
||||
; RV32IF-NEXT: flw fs0, 8(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV32IFD-LABEL: fold_demote_h_s:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: fsd fs0, 0(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.s fs0, fa1
|
||||
; RV32IFD-NEXT: call __gnu_f2h_ieee
|
||||
; RV32IFD-NEXT: call __gnu_h2f_ieee
|
||||
; RV32IFD-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV32IFD-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV32IFD-NEXT: fsgnj.s fa0, fa0, fs0
|
||||
; RV32IFD-NEXT: fld fs0, 0(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: fold_demote_h_s:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs0, 0(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.s fs0, fa1
|
||||
; RV64IFD-NEXT: call __gnu_f2h_ieee
|
||||
; RV64IFD-NEXT: call __gnu_h2f_ieee
|
||||
; RV64IFD-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV64IFD-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV64IFD-NEXT: fsgnj.s fa0, fa0, fs0
|
||||
; RV64IFD-NEXT: fld fs0, 0(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
;
|
||||
@@ -407,34 +407,34 @@ define half @fold_demote_h_d(half %a, double %b) nounwind {
|
||||
; RV32I-LABEL: fold_demote_h_d:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s0, a2
|
||||
; RV32I-NEXT: lui a1, 16
|
||||
; RV32I-NEXT: addi a1, a1, -1
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: call __gnu_h2f_ieee
|
||||
; RV32I-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV32I-NEXT: lui a1, 524288
|
||||
; RV32I-NEXT: and a2, s0, a1
|
||||
; RV32I-NEXT: addi a1, a1, -1
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: or a0, a0, a2
|
||||
; RV32I-NEXT: call __gnu_f2h_ieee
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: fold_demote_h_d:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd s0, 0(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s0, a1
|
||||
; RV64I-NEXT: lui a1, 16
|
||||
; RV64I-NEXT: addiw a1, a1, -1
|
||||
; RV64I-NEXT: and a0, a0, a1
|
||||
; RV64I-NEXT: call __gnu_h2f_ieee
|
||||
; RV64I-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV64I-NEXT: lui a1, 524288
|
||||
; RV64I-NEXT: addiw a1, a1, -1
|
||||
; RV64I-NEXT: and a0, a0, a1
|
||||
@@ -443,54 +443,54 @@ define half @fold_demote_h_d(half %a, double %b) nounwind {
|
||||
; RV64I-NEXT: and a1, s0, a1
|
||||
; RV64I-NEXT: srli a1, a1, 32
|
||||
; RV64I-NEXT: or a0, a0, a1
|
||||
; RV64I-NEXT: call __gnu_f2h_ieee
|
||||
; RV64I-NEXT: ld s0, 0(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
; RV32IF-LABEL: fold_demote_h_d:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw s0, 8(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: mv s0, a1
|
||||
; RV32IF-NEXT: call __gnu_f2h_ieee
|
||||
; RV32IF-NEXT: call __gnu_h2f_ieee
|
||||
; RV32IF-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV32IF-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV32IF-NEXT: fmv.w.x ft0, s0
|
||||
; RV32IF-NEXT: fsgnj.s fa0, fa0, ft0
|
||||
; RV32IF-NEXT: lw s0, 8(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV32IFD-LABEL: fold_demote_h_d:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: fsd fs0, 0(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs0, fa1
|
||||
; RV32IFD-NEXT: call __gnu_f2h_ieee
|
||||
; RV32IFD-NEXT: call __gnu_h2f_ieee
|
||||
; RV32IFD-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV32IFD-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV32IFD-NEXT: fcvt.s.d ft0, fs0
|
||||
; RV32IFD-NEXT: fsgnj.s fa0, fa0, ft0
|
||||
; RV32IFD-NEXT: fld fs0, 0(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: fold_demote_h_d:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs0, 0(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs0, fa1
|
||||
; RV64IFD-NEXT: call __gnu_f2h_ieee
|
||||
; RV64IFD-NEXT: call __gnu_h2f_ieee
|
||||
; RV64IFD-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV64IFD-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV64IFD-NEXT: fcvt.s.d ft0, fs0
|
||||
; RV64IFD-NEXT: fsgnj.s fa0, fa0, ft0
|
||||
; RV64IFD-NEXT: fld fs0, 0(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -12,9 +12,9 @@ define i32 @udiv(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: udiv:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call __udivsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call __udivsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -26,13 +26,13 @@ define i32 @udiv(i32 %a, i32 %b) nounwind {
|
||||
; RV64I-LABEL: udiv:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: slli a0, a0, 32
|
||||
; RV64I-NEXT: srli a0, a0, 32
|
||||
; RV64I-NEXT: slli a1, a1, 32
|
||||
; RV64I-NEXT: srli a1, a1, 32
|
||||
; RV64I-NEXT: call __udivdi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __udivdi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -48,10 +48,10 @@ define i32 @udiv_constant(i32 %a) nounwind {
|
||||
; RV32I-LABEL: udiv_constant:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, 5
|
||||
; RV32I-NEXT: call __udivsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __udivsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -66,12 +66,12 @@ define i32 @udiv_constant(i32 %a) nounwind {
|
||||
; RV64I-LABEL: udiv_constant:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: slli a0, a0, 32
|
||||
; RV64I-NEXT: srli a0, a0, 32
|
||||
; RV64I-NEXT: addi a1, zero, 5
|
||||
; RV64I-NEXT: call __udivdi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __udivdi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -122,27 +122,27 @@ define i64 @udiv64(i64 %a, i64 %b) nounwind {
|
||||
; RV32I-LABEL: udiv64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call __udivdi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call __udivdi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IM-LABEL: udiv64:
|
||||
; RV32IM: # %bb.0:
|
||||
; RV32IM-NEXT: addi sp, sp, -16
|
||||
; RV32IM-NEXT: sw ra, 12(sp)
|
||||
; RV32IM-NEXT: call __udivdi3
|
||||
; RV32IM-NEXT: lw ra, 12(sp)
|
||||
; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: call __udivdi3@plt
|
||||
; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: addi sp, sp, 16
|
||||
; RV32IM-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: udiv64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __udivdi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __udivdi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -158,32 +158,32 @@ define i64 @udiv64_constant(i64 %a) nounwind {
|
||||
; RV32I-LABEL: udiv64_constant:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a2, zero, 5
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __udivdi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __udivdi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IM-LABEL: udiv64_constant:
|
||||
; RV32IM: # %bb.0:
|
||||
; RV32IM-NEXT: addi sp, sp, -16
|
||||
; RV32IM-NEXT: sw ra, 12(sp)
|
||||
; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: addi a2, zero, 5
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __udivdi3
|
||||
; RV32IM-NEXT: lw ra, 12(sp)
|
||||
; RV32IM-NEXT: call __udivdi3@plt
|
||||
; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: addi sp, sp, 16
|
||||
; RV32IM-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: udiv64_constant:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a1, zero, 5
|
||||
; RV64I-NEXT: call __udivdi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __udivdi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -208,9 +208,9 @@ define i32 @sdiv(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: sdiv:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call __divsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call __divsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -222,11 +222,11 @@ define i32 @sdiv(i32 %a, i32 %b) nounwind {
|
||||
; RV64I-LABEL: sdiv:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: sext.w a1, a1
|
||||
; RV64I-NEXT: call __divdi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __divdi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -242,10 +242,10 @@ define i32 @sdiv_constant(i32 %a) nounwind {
|
||||
; RV32I-LABEL: sdiv_constant:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, 5
|
||||
; RV32I-NEXT: call __divsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __divsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -262,11 +262,11 @@ define i32 @sdiv_constant(i32 %a) nounwind {
|
||||
; RV64I-LABEL: sdiv_constant:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 5
|
||||
; RV64I-NEXT: call __divdi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __divdi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -332,27 +332,27 @@ define i64 @sdiv64(i64 %a, i64 %b) nounwind {
|
||||
; RV32I-LABEL: sdiv64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call __divdi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call __divdi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IM-LABEL: sdiv64:
|
||||
; RV32IM: # %bb.0:
|
||||
; RV32IM-NEXT: addi sp, sp, -16
|
||||
; RV32IM-NEXT: sw ra, 12(sp)
|
||||
; RV32IM-NEXT: call __divdi3
|
||||
; RV32IM-NEXT: lw ra, 12(sp)
|
||||
; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: call __divdi3@plt
|
||||
; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: addi sp, sp, 16
|
||||
; RV32IM-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: sdiv64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __divdi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __divdi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -368,32 +368,32 @@ define i64 @sdiv64_constant(i64 %a) nounwind {
|
||||
; RV32I-LABEL: sdiv64_constant:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a2, zero, 5
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __divdi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __divdi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IM-LABEL: sdiv64_constant:
|
||||
; RV32IM: # %bb.0:
|
||||
; RV32IM-NEXT: addi sp, sp, -16
|
||||
; RV32IM-NEXT: sw ra, 12(sp)
|
||||
; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: addi a2, zero, 5
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __divdi3
|
||||
; RV32IM-NEXT: lw ra, 12(sp)
|
||||
; RV32IM-NEXT: call __divdi3@plt
|
||||
; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: addi sp, sp, 16
|
||||
; RV32IM-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: sdiv64_constant:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a1, zero, 5
|
||||
; RV64I-NEXT: call __divdi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __divdi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -423,35 +423,35 @@ define i64 @sdiv64_sext_operands(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: sdiv64_sext_operands:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a2, a1
|
||||
; RV32I-NEXT: srai a1, a0, 31
|
||||
; RV32I-NEXT: srai a3, a2, 31
|
||||
; RV32I-NEXT: call __divdi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __divdi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IM-LABEL: sdiv64_sext_operands:
|
||||
; RV32IM: # %bb.0:
|
||||
; RV32IM-NEXT: addi sp, sp, -16
|
||||
; RV32IM-NEXT: sw ra, 12(sp)
|
||||
; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: mv a2, a1
|
||||
; RV32IM-NEXT: srai a1, a0, 31
|
||||
; RV32IM-NEXT: srai a3, a2, 31
|
||||
; RV32IM-NEXT: call __divdi3
|
||||
; RV32IM-NEXT: lw ra, 12(sp)
|
||||
; RV32IM-NEXT: call __divdi3@plt
|
||||
; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: addi sp, sp, 16
|
||||
; RV32IM-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: sdiv64_sext_operands:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: sext.w a1, a1
|
||||
; RV64I-NEXT: call __divdi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __divdi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -11,28 +11,28 @@ define void @br_fcmp_false(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_false:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: addi a0, zero, 1
|
||||
; RV32IFD-NEXT: bnez a0, .LBB0_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.then
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB0_2: # %if.else
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_false:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: addi a0, zero, 1
|
||||
; RV64IFD-NEXT: bnez a0, .LBB0_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.then
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB0_2: # %if.else
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp false double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.then:
|
||||
@@ -46,7 +46,7 @@ define void @br_fcmp_oeq(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_oeq:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a2, 0(sp)
|
||||
; RV32IFD-NEXT: sw a3, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -56,26 +56,26 @@ define void @br_fcmp_oeq(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: feq.d a0, ft1, ft0
|
||||
; RV32IFD-NEXT: bnez a0, .LBB1_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB1_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_oeq:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a1
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a0
|
||||
; RV64IFD-NEXT: feq.d a0, ft1, ft0
|
||||
; RV64IFD-NEXT: bnez a0, .LBB1_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB1_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp oeq double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -92,7 +92,7 @@ define void @br_fcmp_oeq_alt(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_oeq_alt:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a2, 0(sp)
|
||||
; RV32IFD-NEXT: sw a3, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -103,27 +103,27 @@ define void @br_fcmp_oeq_alt(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: xori a0, a0, 1
|
||||
; RV32IFD-NEXT: beqz a0, .LBB2_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB2_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_oeq_alt:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a1
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a0
|
||||
; RV64IFD-NEXT: feq.d a0, ft1, ft0
|
||||
; RV64IFD-NEXT: xori a0, a0, 1
|
||||
; RV64IFD-NEXT: beqz a0, .LBB2_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB2_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp oeq double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.then:
|
||||
@@ -137,7 +137,7 @@ define void @br_fcmp_ogt(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_ogt:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a0, 0(sp)
|
||||
; RV32IFD-NEXT: sw a1, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -147,26 +147,26 @@ define void @br_fcmp_ogt(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: flt.d a0, ft1, ft0
|
||||
; RV32IFD-NEXT: bnez a0, .LBB3_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB3_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_ogt:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a1
|
||||
; RV64IFD-NEXT: flt.d a0, ft1, ft0
|
||||
; RV64IFD-NEXT: bnez a0, .LBB3_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB3_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp ogt double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -180,7 +180,7 @@ define void @br_fcmp_oge(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_oge:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a0, 0(sp)
|
||||
; RV32IFD-NEXT: sw a1, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -190,26 +190,26 @@ define void @br_fcmp_oge(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: fle.d a0, ft1, ft0
|
||||
; RV32IFD-NEXT: bnez a0, .LBB4_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB4_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_oge:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a1
|
||||
; RV64IFD-NEXT: fle.d a0, ft1, ft0
|
||||
; RV64IFD-NEXT: bnez a0, .LBB4_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB4_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp oge double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -223,7 +223,7 @@ define void @br_fcmp_olt(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_olt:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a2, 0(sp)
|
||||
; RV32IFD-NEXT: sw a3, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -233,26 +233,26 @@ define void @br_fcmp_olt(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: flt.d a0, ft1, ft0
|
||||
; RV32IFD-NEXT: bnez a0, .LBB5_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB5_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_olt:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a1
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a0
|
||||
; RV64IFD-NEXT: flt.d a0, ft1, ft0
|
||||
; RV64IFD-NEXT: bnez a0, .LBB5_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB5_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp olt double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -266,7 +266,7 @@ define void @br_fcmp_ole(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_ole:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a2, 0(sp)
|
||||
; RV32IFD-NEXT: sw a3, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -276,26 +276,26 @@ define void @br_fcmp_ole(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: fle.d a0, ft1, ft0
|
||||
; RV32IFD-NEXT: bnez a0, .LBB6_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB6_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_ole:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a1
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a0
|
||||
; RV64IFD-NEXT: fle.d a0, ft1, ft0
|
||||
; RV64IFD-NEXT: bnez a0, .LBB6_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB6_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp ole double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -310,7 +310,7 @@ define void @br_fcmp_one(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_one:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a0, 0(sp)
|
||||
; RV32IFD-NEXT: sw a1, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -325,16 +325,16 @@ define void @br_fcmp_one(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: and a0, a1, a0
|
||||
; RV32IFD-NEXT: bnez a0, .LBB7_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB7_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_one:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a1
|
||||
; RV64IFD-NEXT: feq.d a0, ft1, ft1
|
||||
@@ -345,11 +345,11 @@ define void @br_fcmp_one(double %a, double %b) nounwind {
|
||||
; RV64IFD-NEXT: and a0, a1, a0
|
||||
; RV64IFD-NEXT: bnez a0, .LBB7_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB7_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp one double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -363,7 +363,7 @@ define void @br_fcmp_ord(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_ord:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a0, 0(sp)
|
||||
; RV32IFD-NEXT: sw a1, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -375,16 +375,16 @@ define void @br_fcmp_ord(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: and a0, a1, a0
|
||||
; RV32IFD-NEXT: bnez a0, .LBB8_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB8_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_ord:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a1
|
||||
; RV64IFD-NEXT: feq.d a0, ft1, ft1
|
||||
@@ -392,11 +392,11 @@ define void @br_fcmp_ord(double %a, double %b) nounwind {
|
||||
; RV64IFD-NEXT: and a0, a1, a0
|
||||
; RV64IFD-NEXT: bnez a0, .LBB8_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB8_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp ord double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -410,7 +410,7 @@ define void @br_fcmp_ueq(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_ueq:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a2, 0(sp)
|
||||
; RV32IFD-NEXT: sw a3, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -425,16 +425,16 @@ define void @br_fcmp_ueq(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: or a0, a0, a1
|
||||
; RV32IFD-NEXT: bnez a0, .LBB9_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB9_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_ueq:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a1
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a0
|
||||
; RV64IFD-NEXT: feq.d a0, ft1, ft0
|
||||
@@ -445,11 +445,11 @@ define void @br_fcmp_ueq(double %a, double %b) nounwind {
|
||||
; RV64IFD-NEXT: or a0, a0, a1
|
||||
; RV64IFD-NEXT: bnez a0, .LBB9_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB9_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp ueq double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -463,7 +463,7 @@ define void @br_fcmp_ugt(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_ugt:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a2, 0(sp)
|
||||
; RV32IFD-NEXT: sw a3, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -474,27 +474,27 @@ define void @br_fcmp_ugt(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: xori a0, a0, 1
|
||||
; RV32IFD-NEXT: bnez a0, .LBB10_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB10_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_ugt:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a1
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a0
|
||||
; RV64IFD-NEXT: fle.d a0, ft1, ft0
|
||||
; RV64IFD-NEXT: xori a0, a0, 1
|
||||
; RV64IFD-NEXT: bnez a0, .LBB10_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB10_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp ugt double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -508,7 +508,7 @@ define void @br_fcmp_uge(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_uge:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a2, 0(sp)
|
||||
; RV32IFD-NEXT: sw a3, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -519,27 +519,27 @@ define void @br_fcmp_uge(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: xori a0, a0, 1
|
||||
; RV32IFD-NEXT: bnez a0, .LBB11_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB11_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_uge:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a1
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a0
|
||||
; RV64IFD-NEXT: flt.d a0, ft1, ft0
|
||||
; RV64IFD-NEXT: xori a0, a0, 1
|
||||
; RV64IFD-NEXT: bnez a0, .LBB11_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB11_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp uge double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -553,7 +553,7 @@ define void @br_fcmp_ult(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_ult:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a0, 0(sp)
|
||||
; RV32IFD-NEXT: sw a1, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -564,27 +564,27 @@ define void @br_fcmp_ult(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: xori a0, a0, 1
|
||||
; RV32IFD-NEXT: bnez a0, .LBB12_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB12_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_ult:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a1
|
||||
; RV64IFD-NEXT: fle.d a0, ft1, ft0
|
||||
; RV64IFD-NEXT: xori a0, a0, 1
|
||||
; RV64IFD-NEXT: bnez a0, .LBB12_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB12_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp ult double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -598,7 +598,7 @@ define void @br_fcmp_ule(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_ule:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a0, 0(sp)
|
||||
; RV32IFD-NEXT: sw a1, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -609,27 +609,27 @@ define void @br_fcmp_ule(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: xori a0, a0, 1
|
||||
; RV32IFD-NEXT: bnez a0, .LBB13_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB13_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_ule:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a1
|
||||
; RV64IFD-NEXT: flt.d a0, ft1, ft0
|
||||
; RV64IFD-NEXT: xori a0, a0, 1
|
||||
; RV64IFD-NEXT: bnez a0, .LBB13_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB13_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp ule double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -643,7 +643,7 @@ define void @br_fcmp_une(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_une:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a2, 0(sp)
|
||||
; RV32IFD-NEXT: sw a3, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -654,27 +654,27 @@ define void @br_fcmp_une(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: xori a0, a0, 1
|
||||
; RV32IFD-NEXT: bnez a0, .LBB14_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB14_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_une:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a1
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a0
|
||||
; RV64IFD-NEXT: feq.d a0, ft1, ft0
|
||||
; RV64IFD-NEXT: xori a0, a0, 1
|
||||
; RV64IFD-NEXT: bnez a0, .LBB14_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB14_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp une double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -689,7 +689,7 @@ define void @br_fcmp_uno(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_uno:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a0, 0(sp)
|
||||
; RV32IFD-NEXT: sw a1, 4(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 0(sp)
|
||||
@@ -702,16 +702,16 @@ define void @br_fcmp_uno(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: seqz a0, a0
|
||||
; RV32IFD-NEXT: bnez a0, .LBB15_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB15_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_uno:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a1
|
||||
; RV64IFD-NEXT: feq.d a0, ft1, ft1
|
||||
@@ -720,11 +720,11 @@ define void @br_fcmp_uno(double %a, double %b) nounwind {
|
||||
; RV64IFD-NEXT: seqz a0, a0
|
||||
; RV64IFD-NEXT: bnez a0, .LBB15_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB15_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp uno double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -738,28 +738,28 @@ define void @br_fcmp_true(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: br_fcmp_true:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: addi a0, zero, 1
|
||||
; RV32IFD-NEXT: bnez a0, .LBB16_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
; RV32IFD-NEXT: .LBB16_2: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IFD-LABEL: br_fcmp_true:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: addi a0, zero, 1
|
||||
; RV64IFD-NEXT: bnez a0, .LBB16_2
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
; RV64IFD-NEXT: .LBB16_2: # %if.then
|
||||
; RV64IFD-NEXT: call abort
|
||||
; RV64IFD-NEXT: call abort@plt
|
||||
%1 = fcmp true double %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
|
||||
@@ -33,7 +33,7 @@ define double @caller_double_inreg() nounwind {
|
||||
; RV32IFD-LABEL: caller_double_inreg:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: lui a0, 262236
|
||||
; RV32IFD-NEXT: addi a1, a0, 655
|
||||
; RV32IFD-NEXT: lui a0, 377487
|
||||
@@ -42,7 +42,7 @@ define double @caller_double_inreg() nounwind {
|
||||
; RV32IFD-NEXT: addi a3, a2, 655
|
||||
; RV32IFD-NEXT: mv a2, a0
|
||||
; RV32IFD-NEXT: call callee_double_inreg
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
%1 = call double @callee_double_inreg(double 2.720000e+00, double 3.720000e+00)
|
||||
@@ -74,7 +74,7 @@ define double @caller_double_split_reg_stack() nounwind {
|
||||
; RV32IFD-LABEL: caller_double_split_reg_stack:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: lui a0, 262510
|
||||
; RV32IFD-NEXT: addi a2, a0, 327
|
||||
; RV32IFD-NEXT: lui a0, 262446
|
||||
@@ -89,7 +89,7 @@ define double @caller_double_split_reg_stack() nounwind {
|
||||
; RV32IFD-NEXT: mv a4, zero
|
||||
; RV32IFD-NEXT: mv a7, a5
|
||||
; RV32IFD-NEXT: call callee_double_split_reg_stack
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
%1 = call double @callee_double_split_reg_stack(i32 1, i64 2, i64 3, double 4.72, double 5.72)
|
||||
@@ -116,7 +116,7 @@ define double @caller_double_stack() nounwind {
|
||||
; RV32IFD-LABEL: caller_double_stack:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -32
|
||||
; RV32IFD-NEXT: sw ra, 28(sp)
|
||||
; RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: lui a0, 262510
|
||||
; RV32IFD-NEXT: addi a0, a0, 327
|
||||
; RV32IFD-NEXT: sw a0, 4(sp)
|
||||
@@ -136,7 +136,7 @@ define double @caller_double_stack() nounwind {
|
||||
; RV32IFD-NEXT: mv a5, zero
|
||||
; RV32IFD-NEXT: mv a7, zero
|
||||
; RV32IFD-NEXT: call callee_double_stack
|
||||
; RV32IFD-NEXT: lw ra, 28(sp)
|
||||
; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 32
|
||||
; RV32IFD-NEXT: ret
|
||||
%1 = call double @callee_double_stack(i64 1, i64 2, i64 3, i64 4, double 5.72, double 6.72)
|
||||
|
||||
@@ -136,9 +136,9 @@ define i64 @fcvt_l_d(double %a) nounwind {
|
||||
; RV32IFD-LABEL: fcvt_l_d:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call __fixdfdi
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call __fixdfdi@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
@@ -155,9 +155,9 @@ define i64 @fcvt_lu_d(double %a) nounwind {
|
||||
; RV32IFD-LABEL: fcvt_lu_d:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call __fixunsdfdi
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call __fixunsdfdi@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
@@ -203,9 +203,9 @@ define double @fcvt_d_l(i64 %a) nounwind {
|
||||
; RV32IFD-LABEL: fcvt_d_l:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call __floatdidf
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call __floatdidf@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
@@ -222,9 +222,9 @@ define double @fcvt_d_lu(i64 %a) nounwind {
|
||||
; RV32IFD-LABEL: fcvt_d_lu:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call __floatundidf
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call __floatundidf@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -6,9 +6,9 @@ define double @frem_f64(double %a, double %b) nounwind {
|
||||
; RV32ID-LABEL: frem_f64:
|
||||
; RV32ID: # %bb.0:
|
||||
; RV32ID-NEXT: addi sp, sp, -16
|
||||
; RV32ID-NEXT: sw ra, 12(sp)
|
||||
; RV32ID-NEXT: call fmod
|
||||
; RV32ID-NEXT: lw ra, 12(sp)
|
||||
; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32ID-NEXT: call fmod@plt
|
||||
; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32ID-NEXT: addi sp, sp, 16
|
||||
; RV32ID-NEXT: ret
|
||||
%1 = frem double %a, %b
|
||||
|
||||
@@ -36,19 +36,19 @@ define double @powi_f64(double %a, i32 %b) nounwind {
|
||||
; RV32IFD-LABEL: powi_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call __powidf2
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call __powidf2@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: powi_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: sext.w a1, a1
|
||||
; RV64IFD-NEXT: call __powidf2
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: call __powidf2@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.powi.f64(double %a, i32 %b)
|
||||
@@ -61,18 +61,18 @@ define double @sin_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: sin_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call sin
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call sin@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: sin_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call sin
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call sin@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.sin.f64(double %a)
|
||||
@@ -85,18 +85,18 @@ define double @cos_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: cos_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call cos
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call cos@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: cos_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call cos
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call cos@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.cos.f64(double %a)
|
||||
@@ -108,50 +108,50 @@ define double @sincos_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: sincos_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -32
|
||||
; RV32IFD-NEXT: sw ra, 28(sp)
|
||||
; RV32IFD-NEXT: sw s0, 24(sp)
|
||||
; RV32IFD-NEXT: sw s1, 20(sp)
|
||||
; RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: mv s0, a1
|
||||
; RV32IFD-NEXT: mv s1, a0
|
||||
; RV32IFD-NEXT: call sin
|
||||
; RV32IFD-NEXT: call sin@plt
|
||||
; RV32IFD-NEXT: sw a0, 8(sp)
|
||||
; RV32IFD-NEXT: sw a1, 12(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 8(sp)
|
||||
; RV32IFD-NEXT: fsd ft0, 0(sp)
|
||||
; RV32IFD-NEXT: fsd ft0, 0(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: mv a0, s1
|
||||
; RV32IFD-NEXT: mv a1, s0
|
||||
; RV32IFD-NEXT: call cos
|
||||
; RV32IFD-NEXT: call cos@plt
|
||||
; RV32IFD-NEXT: sw a0, 8(sp)
|
||||
; RV32IFD-NEXT: sw a1, 12(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 8(sp)
|
||||
; RV32IFD-NEXT: fld ft1, 0(sp)
|
||||
; RV32IFD-NEXT: fld ft1, 0(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: fadd.d ft0, ft1, ft0
|
||||
; RV32IFD-NEXT: fsd ft0, 8(sp)
|
||||
; RV32IFD-NEXT: lw a0, 8(sp)
|
||||
; RV32IFD-NEXT: lw a1, 12(sp)
|
||||
; RV32IFD-NEXT: lw s1, 20(sp)
|
||||
; RV32IFD-NEXT: lw s0, 24(sp)
|
||||
; RV32IFD-NEXT: lw ra, 28(sp)
|
||||
; RV32IFD-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 32
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: sincos_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -32
|
||||
; RV64IFD-NEXT: sd ra, 24(sp)
|
||||
; RV64IFD-NEXT: sd s0, 16(sp)
|
||||
; RV64IFD-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: mv s0, a0
|
||||
; RV64IFD-NEXT: call sin
|
||||
; RV64IFD-NEXT: call sin@plt
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
; RV64IFD-NEXT: fsd ft0, 8(sp)
|
||||
; RV64IFD-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: mv a0, s0
|
||||
; RV64IFD-NEXT: call cos
|
||||
; RV64IFD-NEXT: call cos@plt
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
; RV64IFD-NEXT: fld ft1, 8(sp)
|
||||
; RV64IFD-NEXT: fld ft1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: fadd.d ft0, ft1, ft0
|
||||
; RV64IFD-NEXT: fmv.x.d a0, ft0
|
||||
; RV64IFD-NEXT: ld s0, 16(sp)
|
||||
; RV64IFD-NEXT: ld ra, 24(sp)
|
||||
; RV64IFD-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 32
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.sin.f64(double %a)
|
||||
@@ -166,18 +166,18 @@ define double @pow_f64(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: pow_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call pow
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call pow@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: pow_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call pow
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call pow@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.pow.f64(double %a, double %b)
|
||||
@@ -190,18 +190,18 @@ define double @exp_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: exp_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call exp
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call exp@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: exp_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call exp
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call exp@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.exp.f64(double %a)
|
||||
@@ -214,18 +214,18 @@ define double @exp2_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: exp2_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call exp2
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call exp2@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: exp2_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call exp2
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call exp2@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.exp2.f64(double %a)
|
||||
@@ -238,18 +238,18 @@ define double @log_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: log_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call log
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call log@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: log_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call log
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call log@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.log.f64(double %a)
|
||||
@@ -262,18 +262,18 @@ define double @log10_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: log10_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call log10
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call log10@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: log10_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call log10
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call log10@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.log10.f64(double %a)
|
||||
@@ -286,18 +286,18 @@ define double @log2_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: log2_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call log2
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call log2@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: log2_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call log2
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call log2@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.log2.f64(double %a)
|
||||
@@ -506,18 +506,18 @@ define double @floor_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: floor_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call floor
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call floor@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: floor_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call floor
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call floor@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.floor.f64(double %a)
|
||||
@@ -530,18 +530,18 @@ define double @ceil_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: ceil_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call ceil
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call ceil@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: ceil_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call ceil
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call ceil@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.ceil.f64(double %a)
|
||||
@@ -554,18 +554,18 @@ define double @trunc_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: trunc_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call trunc
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call trunc@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: trunc_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call trunc
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call trunc@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.trunc.f64(double %a)
|
||||
@@ -578,18 +578,18 @@ define double @rint_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: rint_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call rint
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call rint@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: rint_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call rint
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call rint@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.rint.f64(double %a)
|
||||
@@ -602,18 +602,18 @@ define double @nearbyint_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: nearbyint_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call nearbyint
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call nearbyint@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: nearbyint_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call nearbyint
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call nearbyint@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.nearbyint.f64(double %a)
|
||||
@@ -626,18 +626,18 @@ define double @round_f64(double %a) nounwind {
|
||||
; RV32IFD-LABEL: round_f64:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: call round
|
||||
; RV32IFD-NEXT: lw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: call round@plt
|
||||
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: round_f64:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: call round
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call round@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = call double @llvm.round.f64(double %a)
|
||||
|
||||
@@ -158,36 +158,36 @@ define double @fld_stack(double %a) nounwind {
|
||||
; RV32IFD-LABEL: fld_stack:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -32
|
||||
; RV32IFD-NEXT: sw ra, 28(sp)
|
||||
; RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a0, 8(sp)
|
||||
; RV32IFD-NEXT: sw a1, 12(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 8(sp)
|
||||
; RV32IFD-NEXT: fsd ft0, 0(sp)
|
||||
; RV32IFD-NEXT: fsd ft0, 0(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: addi a0, sp, 16
|
||||
; RV32IFD-NEXT: call notdead
|
||||
; RV32IFD-NEXT: call notdead@plt
|
||||
; RV32IFD-NEXT: fld ft0, 16(sp)
|
||||
; RV32IFD-NEXT: fld ft1, 0(sp)
|
||||
; RV32IFD-NEXT: fld ft1, 0(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: fadd.d ft0, ft0, ft1
|
||||
; RV32IFD-NEXT: fsd ft0, 8(sp)
|
||||
; RV32IFD-NEXT: lw a0, 8(sp)
|
||||
; RV32IFD-NEXT: lw a1, 12(sp)
|
||||
; RV32IFD-NEXT: lw ra, 28(sp)
|
||||
; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 32
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: fld_stack:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -32
|
||||
; RV64IFD-NEXT: sd ra, 24(sp)
|
||||
; RV64IFD-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
; RV64IFD-NEXT: fsd ft0, 8(sp)
|
||||
; RV64IFD-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: addi a0, sp, 16
|
||||
; RV64IFD-NEXT: call notdead
|
||||
; RV64IFD-NEXT: call notdead@plt
|
||||
; RV64IFD-NEXT: fld ft0, 16(sp)
|
||||
; RV64IFD-NEXT: fld ft1, 8(sp)
|
||||
; RV64IFD-NEXT: fld ft1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: fadd.d ft0, ft0, ft1
|
||||
; RV64IFD-NEXT: fmv.x.d a0, ft0
|
||||
; RV64IFD-NEXT: ld ra, 24(sp)
|
||||
; RV64IFD-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 32
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = alloca double, align 8
|
||||
@@ -202,7 +202,7 @@ define void @fsd_stack(double %a, double %b) nounwind {
|
||||
; RV32IFD-LABEL: fsd_stack:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -32
|
||||
; RV32IFD-NEXT: sw ra, 28(sp)
|
||||
; RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a2, 8(sp)
|
||||
; RV32IFD-NEXT: sw a3, 12(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 8(sp)
|
||||
@@ -212,22 +212,22 @@ define void @fsd_stack(double %a, double %b) nounwind {
|
||||
; RV32IFD-NEXT: fadd.d ft0, ft1, ft0
|
||||
; RV32IFD-NEXT: fsd ft0, 16(sp)
|
||||
; RV32IFD-NEXT: addi a0, sp, 16
|
||||
; RV32IFD-NEXT: call notdead
|
||||
; RV32IFD-NEXT: lw ra, 28(sp)
|
||||
; RV32IFD-NEXT: call notdead@plt
|
||||
; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 32
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: fsd_stack:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a1
|
||||
; RV64IFD-NEXT: fmv.d.x ft1, a0
|
||||
; RV64IFD-NEXT: fadd.d ft0, ft1, ft0
|
||||
; RV64IFD-NEXT: fsd ft0, 0(sp)
|
||||
; RV64IFD-NEXT: mv a0, sp
|
||||
; RV64IFD-NEXT: call notdead
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: call notdead@plt
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = fadd double %a, %b ; force store from FPR64
|
||||
|
||||
@@ -16,7 +16,7 @@ define i32 @main() nounwind {
|
||||
; RV32IFD-LABEL: main:
|
||||
; RV32IFD: # %bb.0: # %entry
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: sw ra, 12(sp)
|
||||
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: lui a1, 262144
|
||||
; RV32IFD-NEXT: mv a0, zero
|
||||
; RV32IFD-NEXT: call test
|
||||
@@ -34,10 +34,10 @@ define i32 @main() nounwind {
|
||||
; RV32IFD-NEXT: and a0, a0, a1
|
||||
; RV32IFD-NEXT: bnez a0, .LBB1_2
|
||||
; RV32IFD-NEXT: # %bb.1: # %if.then
|
||||
; RV32IFD-NEXT: call abort
|
||||
; RV32IFD-NEXT: call abort@plt
|
||||
; RV32IFD-NEXT: .LBB1_2: # %if.end
|
||||
; RV32IFD-NEXT: mv a0, zero
|
||||
; RV32IFD-NEXT: call exit
|
||||
; RV32IFD-NEXT: call exit@plt
|
||||
entry:
|
||||
%call = call double @test(double 2.000000e+00)
|
||||
%cmp = fcmp olt double %call, 2.400000e-01
|
||||
|
||||
@@ -8,7 +8,7 @@ define double @func(double %d, i32 %n) nounwind {
|
||||
; RV32IFD-LABEL: func:
|
||||
; RV32IFD: # %bb.0: # %entry
|
||||
; RV32IFD-NEXT: addi sp, sp, -32
|
||||
; RV32IFD-NEXT: sw ra, 28(sp)
|
||||
; RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32IFD-NEXT: sw a0, 16(sp)
|
||||
; RV32IFD-NEXT: sw a1, 20(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 16(sp)
|
||||
@@ -18,25 +18,25 @@ define double @func(double %d, i32 %n) nounwind {
|
||||
; RV32IFD-NEXT: fsd ft0, 16(sp)
|
||||
; RV32IFD-NEXT: lw a0, 16(sp)
|
||||
; RV32IFD-NEXT: lw a1, 20(sp)
|
||||
; RV32IFD-NEXT: fsd ft0, 8(sp)
|
||||
; RV32IFD-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: call func
|
||||
; RV32IFD-NEXT: sw a0, 16(sp)
|
||||
; RV32IFD-NEXT: sw a1, 20(sp)
|
||||
; RV32IFD-NEXT: fld ft0, 16(sp)
|
||||
; RV32IFD-NEXT: fld ft1, 8(sp)
|
||||
; RV32IFD-NEXT: fld ft1, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: fadd.d ft0, ft0, ft1
|
||||
; RV32IFD-NEXT: .LBB0_2: # %return
|
||||
; RV32IFD-NEXT: fsd ft0, 16(sp)
|
||||
; RV32IFD-NEXT: lw a0, 16(sp)
|
||||
; RV32IFD-NEXT: lw a1, 20(sp)
|
||||
; RV32IFD-NEXT: lw ra, 28(sp)
|
||||
; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 32
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: func:
|
||||
; RV64IFD: # %bb.0: # %entry
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: sd ra, 8(sp)
|
||||
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: slli a2, a1, 32
|
||||
; RV64IFD-NEXT: srli a2, a2, 32
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
@@ -44,14 +44,14 @@ define double @func(double %d, i32 %n) nounwind {
|
||||
; RV64IFD-NEXT: # %bb.1: # %if.else
|
||||
; RV64IFD-NEXT: addi a1, a1, -1
|
||||
; RV64IFD-NEXT: fmv.x.d a0, ft0
|
||||
; RV64IFD-NEXT: fsd ft0, 0(sp)
|
||||
; RV64IFD-NEXT: fsd ft0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: call func
|
||||
; RV64IFD-NEXT: fmv.d.x ft0, a0
|
||||
; RV64IFD-NEXT: fld ft1, 0(sp)
|
||||
; RV64IFD-NEXT: fld ft1, 0(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: fadd.d ft0, ft0, ft1
|
||||
; RV64IFD-NEXT: .LBB0_2: # %return
|
||||
; RV64IFD-NEXT: fmv.x.d a0, ft0
|
||||
; RV64IFD-NEXT: ld ra, 8(sp)
|
||||
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
entry:
|
||||
|
||||
@@ -17,9 +17,9 @@ define void @caller(i1* %p) personality i8* bitcast (i32 (...)* @__gxx_personali
|
||||
; RV32I: # %bb.0: # %entry
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw s1, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: .cfi_offset ra, -4
|
||||
; RV32I-NEXT: .cfi_offset s0, -8
|
||||
; RV32I-NEXT: .cfi_offset s1, -12
|
||||
@@ -28,18 +28,18 @@ define void @caller(i1* %p) personality i8* bitcast (i32 (...)* @__gxx_personali
|
||||
; RV32I-NEXT: # %bb.1: # %bb2
|
||||
; RV32I-NEXT: .Ltmp0:
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: call bar
|
||||
; RV32I-NEXT: call bar@plt
|
||||
; RV32I-NEXT: .Ltmp1:
|
||||
; RV32I-NEXT: j .LBB0_3
|
||||
; RV32I-NEXT: .LBB0_2: # %bb1
|
||||
; RV32I-NEXT: .Ltmp2:
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: call foo
|
||||
; RV32I-NEXT: call foo@plt
|
||||
; RV32I-NEXT: .Ltmp3:
|
||||
; RV32I-NEXT: .LBB0_3: # %end2
|
||||
; RV32I-NEXT: lw s1, 4(sp)
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
; RV32I-NEXT: .LBB0_4: # %lpad
|
||||
@@ -48,15 +48,15 @@ define void @caller(i1* %p) personality i8* bitcast (i32 (...)* @__gxx_personali
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: mv a0, s1
|
||||
; RV32I-NEXT: call _Unwind_Resume
|
||||
; RV32I-NEXT: call _Unwind_Resume@plt
|
||||
;
|
||||
; RV64I-LABEL: caller:
|
||||
; RV64I: # %bb.0: # %entry
|
||||
; RV64I-NEXT: addi sp, sp, -32
|
||||
; RV64I-NEXT: .cfi_def_cfa_offset 32
|
||||
; RV64I-NEXT: sd ra, 24(sp)
|
||||
; RV64I-NEXT: sd s0, 16(sp)
|
||||
; RV64I-NEXT: sd s1, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: .cfi_offset ra, -8
|
||||
; RV64I-NEXT: .cfi_offset s0, -16
|
||||
; RV64I-NEXT: .cfi_offset s1, -24
|
||||
@@ -65,18 +65,18 @@ define void @caller(i1* %p) personality i8* bitcast (i32 (...)* @__gxx_personali
|
||||
; RV64I-NEXT: # %bb.1: # %bb2
|
||||
; RV64I-NEXT: .Ltmp0:
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: call bar
|
||||
; RV64I-NEXT: call bar@plt
|
||||
; RV64I-NEXT: .Ltmp1:
|
||||
; RV64I-NEXT: j .LBB0_3
|
||||
; RV64I-NEXT: .LBB0_2: # %bb1
|
||||
; RV64I-NEXT: .Ltmp2:
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: call foo
|
||||
; RV64I-NEXT: call foo@plt
|
||||
; RV64I-NEXT: .Ltmp3:
|
||||
; RV64I-NEXT: .LBB0_3: # %end2
|
||||
; RV64I-NEXT: ld s1, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 16(sp)
|
||||
; RV64I-NEXT: ld ra, 24(sp)
|
||||
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 32
|
||||
; RV64I-NEXT: ret
|
||||
; RV64I-NEXT: .LBB0_4: # %lpad
|
||||
@@ -85,7 +85,7 @@ define void @caller(i1* %p) personality i8* bitcast (i32 (...)* @__gxx_personali
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: mv a0, s1
|
||||
; RV64I-NEXT: call _Unwind_Resume
|
||||
; RV64I-NEXT: call _Unwind_Resume@plt
|
||||
entry:
|
||||
%0 = icmp eq i1* %p, null
|
||||
br i1 %0, label %bb1, label %bb2
|
||||
|
||||
@@ -17,7 +17,7 @@ define float @caller(<32 x float> %A) nounwind {
|
||||
; CHECK-LABEL: caller:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: addi sp, sp, -64
|
||||
; CHECK-NEXT: sw ra, 60(sp)
|
||||
; CHECK-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: flw fa0, 0(a0)
|
||||
; CHECK-NEXT: flw fa1, 4(a0)
|
||||
; CHECK-NEXT: flw fa2, 8(a0)
|
||||
@@ -63,7 +63,7 @@ define float @caller(<32 x float> %A) nounwind {
|
||||
; CHECK-NEXT: fsw fs1, 4(sp)
|
||||
; CHECK-NEXT: fsw fs0, 0(sp)
|
||||
; CHECK-NEXT: call callee
|
||||
; CHECK-NEXT: lw ra, 60(sp)
|
||||
; CHECK-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi sp, sp, 64
|
||||
; CHECK-NEXT: ret
|
||||
%C = call fastcc float @callee(<32 x float> %A)
|
||||
|
||||
@@ -22,8 +22,8 @@ define i32 @caller(<16 x i32> %A) nounwind {
|
||||
; RV32-LABEL: caller:
|
||||
; RV32: # %bb.0:
|
||||
; RV32-NEXT: addi sp, sp, -32
|
||||
; RV32-NEXT: sw ra, 28(sp)
|
||||
; RV32-NEXT: sw s0, 24(sp)
|
||||
; RV32-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32-NEXT: lw t0, 0(a0)
|
||||
; RV32-NEXT: lw a1, 4(a0)
|
||||
; RV32-NEXT: lw a2, 8(a0)
|
||||
@@ -45,16 +45,16 @@ define i32 @caller(<16 x i32> %A) nounwind {
|
||||
; RV32-NEXT: sw t1, 0(sp)
|
||||
; RV32-NEXT: mv a0, t0
|
||||
; RV32-NEXT: call callee
|
||||
; RV32-NEXT: lw s0, 24(sp)
|
||||
; RV32-NEXT: lw ra, 28(sp)
|
||||
; RV32-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: addi sp, sp, 32
|
||||
; RV32-NEXT: ret
|
||||
;
|
||||
; RV64-LABEL: caller:
|
||||
; RV64: # %bb.0:
|
||||
; RV64-NEXT: addi sp, sp, -48
|
||||
; RV64-NEXT: sd ra, 40(sp)
|
||||
; RV64-NEXT: sd s0, 32(sp)
|
||||
; RV64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; RV64-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
|
||||
; RV64-NEXT: ld t0, 0(a0)
|
||||
; RV64-NEXT: ld a1, 8(a0)
|
||||
; RV64-NEXT: ld a2, 16(a0)
|
||||
@@ -76,8 +76,8 @@ define i32 @caller(<16 x i32> %A) nounwind {
|
||||
; RV64-NEXT: sd t1, 0(sp)
|
||||
; RV64-NEXT: mv a0, t0
|
||||
; RV64-NEXT: call callee
|
||||
; RV64-NEXT: ld s0, 32(sp)
|
||||
; RV64-NEXT: ld ra, 40(sp)
|
||||
; RV64-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: addi sp, sp, 48
|
||||
; RV64-NEXT: ret
|
||||
%C = call fastcc i32 @callee(<16 x i32> %A)
|
||||
|
||||
@@ -66,22 +66,22 @@ define double @bitcast_double_and(double %a1, double %a2) nounwind {
|
||||
; RV32F-LABEL: bitcast_double_and:
|
||||
; RV32F: # %bb.0:
|
||||
; RV32F-NEXT: addi sp, sp, -16
|
||||
; RV32F-NEXT: sw ra, 12(sp)
|
||||
; RV32F-NEXT: sw s0, 8(sp)
|
||||
; RV32F-NEXT: sw s1, 4(sp)
|
||||
; RV32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32F-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32F-NEXT: mv s0, a1
|
||||
; RV32F-NEXT: mv s1, a0
|
||||
; RV32F-NEXT: call __adddf3
|
||||
; RV32F-NEXT: call __adddf3@plt
|
||||
; RV32F-NEXT: mv a2, a0
|
||||
; RV32F-NEXT: lui a0, 524288
|
||||
; RV32F-NEXT: addi a0, a0, -1
|
||||
; RV32F-NEXT: and a3, a1, a0
|
||||
; RV32F-NEXT: mv a0, s1
|
||||
; RV32F-NEXT: mv a1, s0
|
||||
; RV32F-NEXT: call __adddf3
|
||||
; RV32F-NEXT: lw s1, 4(sp)
|
||||
; RV32F-NEXT: lw s0, 8(sp)
|
||||
; RV32F-NEXT: lw ra, 12(sp)
|
||||
; RV32F-NEXT: call __adddf3@plt
|
||||
; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32F-NEXT: addi sp, sp, 16
|
||||
; RV32F-NEXT: ret
|
||||
;
|
||||
@@ -106,18 +106,18 @@ define double @bitcast_double_and(double %a1, double %a2) nounwind {
|
||||
; RV64F-LABEL: bitcast_double_and:
|
||||
; RV64F: # %bb.0:
|
||||
; RV64F-NEXT: addi sp, sp, -16
|
||||
; RV64F-NEXT: sd ra, 8(sp)
|
||||
; RV64F-NEXT: sd s0, 0(sp)
|
||||
; RV64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64F-NEXT: mv s0, a0
|
||||
; RV64F-NEXT: call __adddf3
|
||||
; RV64F-NEXT: call __adddf3@plt
|
||||
; RV64F-NEXT: addi a1, zero, -1
|
||||
; RV64F-NEXT: slli a1, a1, 63
|
||||
; RV64F-NEXT: addi a1, a1, -1
|
||||
; RV64F-NEXT: and a1, a0, a1
|
||||
; RV64F-NEXT: mv a0, s0
|
||||
; RV64F-NEXT: call __adddf3
|
||||
; RV64F-NEXT: ld s0, 0(sp)
|
||||
; RV64F-NEXT: ld ra, 8(sp)
|
||||
; RV64F-NEXT: call __adddf3@plt
|
||||
; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64F-NEXT: addi sp, sp, 16
|
||||
; RV64F-NEXT: ret
|
||||
;
|
||||
@@ -191,21 +191,21 @@ define double @bitcast_double_xor(double %a1, double %a2) nounwind {
|
||||
; RV32F-LABEL: bitcast_double_xor:
|
||||
; RV32F: # %bb.0:
|
||||
; RV32F-NEXT: addi sp, sp, -16
|
||||
; RV32F-NEXT: sw ra, 12(sp)
|
||||
; RV32F-NEXT: sw s0, 8(sp)
|
||||
; RV32F-NEXT: sw s1, 4(sp)
|
||||
; RV32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32F-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32F-NEXT: mv s0, a1
|
||||
; RV32F-NEXT: mv s1, a0
|
||||
; RV32F-NEXT: call __muldf3
|
||||
; RV32F-NEXT: call __muldf3@plt
|
||||
; RV32F-NEXT: mv a2, a0
|
||||
; RV32F-NEXT: lui a0, 524288
|
||||
; RV32F-NEXT: xor a3, a1, a0
|
||||
; RV32F-NEXT: mv a0, s1
|
||||
; RV32F-NEXT: mv a1, s0
|
||||
; RV32F-NEXT: call __muldf3
|
||||
; RV32F-NEXT: lw s1, 4(sp)
|
||||
; RV32F-NEXT: lw s0, 8(sp)
|
||||
; RV32F-NEXT: lw ra, 12(sp)
|
||||
; RV32F-NEXT: call __muldf3@plt
|
||||
; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32F-NEXT: addi sp, sp, 16
|
||||
; RV32F-NEXT: ret
|
||||
;
|
||||
@@ -230,17 +230,17 @@ define double @bitcast_double_xor(double %a1, double %a2) nounwind {
|
||||
; RV64F-LABEL: bitcast_double_xor:
|
||||
; RV64F: # %bb.0:
|
||||
; RV64F-NEXT: addi sp, sp, -16
|
||||
; RV64F-NEXT: sd ra, 8(sp)
|
||||
; RV64F-NEXT: sd s0, 0(sp)
|
||||
; RV64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64F-NEXT: mv s0, a0
|
||||
; RV64F-NEXT: call __muldf3
|
||||
; RV64F-NEXT: call __muldf3@plt
|
||||
; RV64F-NEXT: addi a1, zero, -1
|
||||
; RV64F-NEXT: slli a1, a1, 63
|
||||
; RV64F-NEXT: xor a1, a0, a1
|
||||
; RV64F-NEXT: mv a0, s0
|
||||
; RV64F-NEXT: call __muldf3
|
||||
; RV64F-NEXT: ld s0, 0(sp)
|
||||
; RV64F-NEXT: ld ra, 8(sp)
|
||||
; RV64F-NEXT: call __muldf3@plt
|
||||
; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64F-NEXT: addi sp, sp, 16
|
||||
; RV64F-NEXT: ret
|
||||
;
|
||||
@@ -317,21 +317,21 @@ define double @bitcast_double_or(double %a1, double %a2) nounwind {
|
||||
; RV32F-LABEL: bitcast_double_or:
|
||||
; RV32F: # %bb.0:
|
||||
; RV32F-NEXT: addi sp, sp, -16
|
||||
; RV32F-NEXT: sw ra, 12(sp)
|
||||
; RV32F-NEXT: sw s0, 8(sp)
|
||||
; RV32F-NEXT: sw s1, 4(sp)
|
||||
; RV32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32F-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32F-NEXT: mv s0, a1
|
||||
; RV32F-NEXT: mv s1, a0
|
||||
; RV32F-NEXT: call __muldf3
|
||||
; RV32F-NEXT: call __muldf3@plt
|
||||
; RV32F-NEXT: mv a2, a0
|
||||
; RV32F-NEXT: lui a0, 524288
|
||||
; RV32F-NEXT: or a3, a1, a0
|
||||
; RV32F-NEXT: mv a0, s1
|
||||
; RV32F-NEXT: mv a1, s0
|
||||
; RV32F-NEXT: call __muldf3
|
||||
; RV32F-NEXT: lw s1, 4(sp)
|
||||
; RV32F-NEXT: lw s0, 8(sp)
|
||||
; RV32F-NEXT: lw ra, 12(sp)
|
||||
; RV32F-NEXT: call __muldf3@plt
|
||||
; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32F-NEXT: addi sp, sp, 16
|
||||
; RV32F-NEXT: ret
|
||||
;
|
||||
@@ -357,17 +357,17 @@ define double @bitcast_double_or(double %a1, double %a2) nounwind {
|
||||
; RV64F-LABEL: bitcast_double_or:
|
||||
; RV64F: # %bb.0:
|
||||
; RV64F-NEXT: addi sp, sp, -16
|
||||
; RV64F-NEXT: sd ra, 8(sp)
|
||||
; RV64F-NEXT: sd s0, 0(sp)
|
||||
; RV64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64F-NEXT: mv s0, a0
|
||||
; RV64F-NEXT: call __muldf3
|
||||
; RV64F-NEXT: call __muldf3@plt
|
||||
; RV64F-NEXT: addi a1, zero, -1
|
||||
; RV64F-NEXT: slli a1, a1, 63
|
||||
; RV64F-NEXT: or a1, a0, a1
|
||||
; RV64F-NEXT: mv a0, s0
|
||||
; RV64F-NEXT: call __muldf3
|
||||
; RV64F-NEXT: ld s0, 0(sp)
|
||||
; RV64F-NEXT: ld ra, 8(sp)
|
||||
; RV64F-NEXT: call __muldf3@plt
|
||||
; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64F-NEXT: addi sp, sp, 16
|
||||
; RV64F-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -12,28 +12,28 @@ define void @br_fcmp_false(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_false:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: addi a0, zero, 1
|
||||
; RV32IF-NEXT: bnez a0, .LBB0_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.then
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB0_2: # %if.else
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_false:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: addi a0, zero, 1
|
||||
; RV64IF-NEXT: bnez a0, .LBB0_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.then
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB0_2: # %if.else
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp false float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.then:
|
||||
@@ -47,32 +47,32 @@ define void @br_fcmp_oeq(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_oeq:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV32IF-NEXT: feq.s a0, ft1, ft0
|
||||
; RV32IF-NEXT: bnez a0, .LBB1_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB1_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_oeq:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV64IF-NEXT: feq.s a0, ft1, ft0
|
||||
; RV64IF-NEXT: bnez a0, .LBB1_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB1_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp oeq float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -89,34 +89,34 @@ define void @br_fcmp_oeq_alt(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_oeq_alt:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV32IF-NEXT: feq.s a0, ft1, ft0
|
||||
; RV32IF-NEXT: xori a0, a0, 1
|
||||
; RV32IF-NEXT: beqz a0, .LBB2_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB2_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_oeq_alt:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV64IF-NEXT: feq.s a0, ft1, ft0
|
||||
; RV64IF-NEXT: xori a0, a0, 1
|
||||
; RV64IF-NEXT: beqz a0, .LBB2_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB2_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp oeq float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.then:
|
||||
@@ -130,32 +130,32 @@ define void @br_fcmp_ogt(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_ogt:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV32IF-NEXT: flt.s a0, ft1, ft0
|
||||
; RV32IF-NEXT: bnez a0, .LBB3_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB3_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_ogt:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV64IF-NEXT: flt.s a0, ft1, ft0
|
||||
; RV64IF-NEXT: bnez a0, .LBB3_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB3_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp ogt float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -169,32 +169,32 @@ define void @br_fcmp_oge(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_oge:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV32IF-NEXT: fle.s a0, ft1, ft0
|
||||
; RV32IF-NEXT: bnez a0, .LBB4_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB4_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_oge:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV64IF-NEXT: fle.s a0, ft1, ft0
|
||||
; RV64IF-NEXT: bnez a0, .LBB4_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB4_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp oge float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -208,32 +208,32 @@ define void @br_fcmp_olt(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_olt:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV32IF-NEXT: flt.s a0, ft1, ft0
|
||||
; RV32IF-NEXT: bnez a0, .LBB5_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB5_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_olt:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV64IF-NEXT: flt.s a0, ft1, ft0
|
||||
; RV64IF-NEXT: bnez a0, .LBB5_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB5_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp olt float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -247,32 +247,32 @@ define void @br_fcmp_ole(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_ole:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV32IF-NEXT: fle.s a0, ft1, ft0
|
||||
; RV32IF-NEXT: bnez a0, .LBB6_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB6_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_ole:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV64IF-NEXT: fle.s a0, ft1, ft0
|
||||
; RV64IF-NEXT: bnez a0, .LBB6_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB6_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp ole float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -287,7 +287,7 @@ define void @br_fcmp_one(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_one:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV32IF-NEXT: feq.s a0, ft1, ft1
|
||||
@@ -298,16 +298,16 @@ define void @br_fcmp_one(float %a, float %b) nounwind {
|
||||
; RV32IF-NEXT: and a0, a1, a0
|
||||
; RV32IF-NEXT: bnez a0, .LBB7_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB7_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_one:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV64IF-NEXT: feq.s a0, ft1, ft1
|
||||
@@ -318,11 +318,11 @@ define void @br_fcmp_one(float %a, float %b) nounwind {
|
||||
; RV64IF-NEXT: and a0, a1, a0
|
||||
; RV64IF-NEXT: bnez a0, .LBB7_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB7_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp one float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -336,7 +336,7 @@ define void @br_fcmp_ord(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_ord:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV32IF-NEXT: feq.s a0, ft1, ft1
|
||||
@@ -344,16 +344,16 @@ define void @br_fcmp_ord(float %a, float %b) nounwind {
|
||||
; RV32IF-NEXT: and a0, a1, a0
|
||||
; RV32IF-NEXT: bnez a0, .LBB8_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB8_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_ord:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV64IF-NEXT: feq.s a0, ft1, ft1
|
||||
@@ -361,11 +361,11 @@ define void @br_fcmp_ord(float %a, float %b) nounwind {
|
||||
; RV64IF-NEXT: and a0, a1, a0
|
||||
; RV64IF-NEXT: bnez a0, .LBB8_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB8_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp ord float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -379,7 +379,7 @@ define void @br_fcmp_ueq(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_ueq:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV32IF-NEXT: feq.s a0, ft1, ft0
|
||||
@@ -390,16 +390,16 @@ define void @br_fcmp_ueq(float %a, float %b) nounwind {
|
||||
; RV32IF-NEXT: or a0, a0, a1
|
||||
; RV32IF-NEXT: bnez a0, .LBB9_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB9_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_ueq:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV64IF-NEXT: feq.s a0, ft1, ft0
|
||||
@@ -410,11 +410,11 @@ define void @br_fcmp_ueq(float %a, float %b) nounwind {
|
||||
; RV64IF-NEXT: or a0, a0, a1
|
||||
; RV64IF-NEXT: bnez a0, .LBB9_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB9_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp ueq float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -428,34 +428,34 @@ define void @br_fcmp_ugt(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_ugt:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV32IF-NEXT: fle.s a0, ft1, ft0
|
||||
; RV32IF-NEXT: xori a0, a0, 1
|
||||
; RV32IF-NEXT: bnez a0, .LBB10_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB10_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_ugt:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV64IF-NEXT: fle.s a0, ft1, ft0
|
||||
; RV64IF-NEXT: xori a0, a0, 1
|
||||
; RV64IF-NEXT: bnez a0, .LBB10_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB10_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp ugt float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -469,34 +469,34 @@ define void @br_fcmp_uge(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_uge:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV32IF-NEXT: flt.s a0, ft1, ft0
|
||||
; RV32IF-NEXT: xori a0, a0, 1
|
||||
; RV32IF-NEXT: bnez a0, .LBB11_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB11_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_uge:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV64IF-NEXT: flt.s a0, ft1, ft0
|
||||
; RV64IF-NEXT: xori a0, a0, 1
|
||||
; RV64IF-NEXT: bnez a0, .LBB11_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB11_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp uge float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -510,34 +510,34 @@ define void @br_fcmp_ult(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_ult:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV32IF-NEXT: fle.s a0, ft1, ft0
|
||||
; RV32IF-NEXT: xori a0, a0, 1
|
||||
; RV32IF-NEXT: bnez a0, .LBB12_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB12_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_ult:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV64IF-NEXT: fle.s a0, ft1, ft0
|
||||
; RV64IF-NEXT: xori a0, a0, 1
|
||||
; RV64IF-NEXT: bnez a0, .LBB12_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB12_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp ult float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -551,34 +551,34 @@ define void @br_fcmp_ule(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_ule:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV32IF-NEXT: flt.s a0, ft1, ft0
|
||||
; RV32IF-NEXT: xori a0, a0, 1
|
||||
; RV32IF-NEXT: bnez a0, .LBB13_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB13_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_ule:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV64IF-NEXT: flt.s a0, ft1, ft0
|
||||
; RV64IF-NEXT: xori a0, a0, 1
|
||||
; RV64IF-NEXT: bnez a0, .LBB13_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB13_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp ule float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -592,34 +592,34 @@ define void @br_fcmp_une(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_une:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV32IF-NEXT: feq.s a0, ft1, ft0
|
||||
; RV32IF-NEXT: xori a0, a0, 1
|
||||
; RV32IF-NEXT: bnez a0, .LBB14_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB14_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_une:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV64IF-NEXT: feq.s a0, ft1, ft0
|
||||
; RV64IF-NEXT: xori a0, a0, 1
|
||||
; RV64IF-NEXT: bnez a0, .LBB14_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB14_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp une float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -634,7 +634,7 @@ define void @br_fcmp_uno(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_uno:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV32IF-NEXT: feq.s a0, ft1, ft1
|
||||
@@ -643,16 +643,16 @@ define void @br_fcmp_uno(float %a, float %b) nounwind {
|
||||
; RV32IF-NEXT: seqz a0, a0
|
||||
; RV32IF-NEXT: bnez a0, .LBB15_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB15_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_uno:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a1
|
||||
; RV64IF-NEXT: feq.s a0, ft1, ft1
|
||||
@@ -661,11 +661,11 @@ define void @br_fcmp_uno(float %a, float %b) nounwind {
|
||||
; RV64IF-NEXT: seqz a0, a0
|
||||
; RV64IF-NEXT: bnez a0, .LBB15_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB15_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp uno float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -679,28 +679,28 @@ define void @br_fcmp_true(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_true:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: addi a0, zero, 1
|
||||
; RV32IF-NEXT: bnez a0, .LBB16_2
|
||||
; RV32IF-NEXT: # %bb.1: # %if.else
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB16_2: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_true:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: addi a0, zero, 1
|
||||
; RV64IF-NEXT: bnez a0, .LBB16_2
|
||||
; RV64IF-NEXT: # %bb.1: # %if.else
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB16_2: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
%1 = fcmp true float %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -717,58 +717,58 @@ define i32 @br_fcmp_store_load_stack_slot(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: br_fcmp_store_load_stack_slot:
|
||||
; RV32IF: # %bb.0: # %entry
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: mv a0, zero
|
||||
; RV32IF-NEXT: call dummy
|
||||
; RV32IF-NEXT: call dummy@plt
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: fmv.w.x ft1, zero
|
||||
; RV32IF-NEXT: fsw ft1, 8(sp)
|
||||
; RV32IF-NEXT: fsw ft1, 8(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: feq.s a0, ft0, ft1
|
||||
; RV32IF-NEXT: beqz a0, .LBB17_3
|
||||
; RV32IF-NEXT: # %bb.1: # %if.end
|
||||
; RV32IF-NEXT: mv a0, zero
|
||||
; RV32IF-NEXT: call dummy
|
||||
; RV32IF-NEXT: call dummy@plt
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: flw ft1, 8(sp)
|
||||
; RV32IF-NEXT: flw ft1, 8(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: feq.s a0, ft0, ft1
|
||||
; RV32IF-NEXT: beqz a0, .LBB17_3
|
||||
; RV32IF-NEXT: # %bb.2: # %if.end4
|
||||
; RV32IF-NEXT: mv a0, zero
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
; RV32IF-NEXT: .LBB17_3: # %if.then
|
||||
; RV32IF-NEXT: call abort
|
||||
; RV32IF-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IF-LABEL: br_fcmp_store_load_stack_slot:
|
||||
; RV64IF: # %bb.0: # %entry
|
||||
; RV64IF-NEXT: addi sp, sp, -32
|
||||
; RV64IF-NEXT: sd ra, 24(sp)
|
||||
; RV64IF-NEXT: sd s0, 16(sp)
|
||||
; RV64IF-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, zero
|
||||
; RV64IF-NEXT: fsw ft0, 12(sp)
|
||||
; RV64IF-NEXT: fsw ft0, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.x.w s0, ft0
|
||||
; RV64IF-NEXT: mv a0, s0
|
||||
; RV64IF-NEXT: call dummy
|
||||
; RV64IF-NEXT: call dummy@plt
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: flw ft1, 12(sp)
|
||||
; RV64IF-NEXT: flw ft1, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: feq.s a0, ft0, ft1
|
||||
; RV64IF-NEXT: beqz a0, .LBB17_3
|
||||
; RV64IF-NEXT: # %bb.1: # %if.end
|
||||
; RV64IF-NEXT: mv a0, s0
|
||||
; RV64IF-NEXT: call dummy
|
||||
; RV64IF-NEXT: call dummy@plt
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: flw ft1, 12(sp)
|
||||
; RV64IF-NEXT: flw ft1, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: feq.s a0, ft0, ft1
|
||||
; RV64IF-NEXT: beqz a0, .LBB17_3
|
||||
; RV64IF-NEXT: # %bb.2: # %if.end4
|
||||
; RV64IF-NEXT: mv a0, zero
|
||||
; RV64IF-NEXT: ld s0, 16(sp)
|
||||
; RV64IF-NEXT: ld ra, 24(sp)
|
||||
; RV64IF-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 32
|
||||
; RV64IF-NEXT: ret
|
||||
; RV64IF-NEXT: .LBB17_3: # %if.then
|
||||
; RV64IF-NEXT: call abort
|
||||
; RV64IF-NEXT: call abort@plt
|
||||
entry:
|
||||
%call = call float @dummy(float 0.000000e+00)
|
||||
%cmp = fcmp une float %call, 0.000000e+00
|
||||
|
||||
@@ -121,9 +121,9 @@ define i64 @fcvt_l_s(float %a) nounwind {
|
||||
; RV32IF-LABEL: fcvt_l_s:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call __fixsfdi
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call __fixsfdi@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
@@ -140,9 +140,9 @@ define i64 @fcvt_lu_s(float %a) nounwind {
|
||||
; RV32IF-LABEL: fcvt_lu_s:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call __fixunssfdi
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call __fixunssfdi@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
@@ -159,9 +159,9 @@ define float @fcvt_s_l(i64 %a) nounwind {
|
||||
; RV32IF-LABEL: fcvt_s_l:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call __floatdisf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call __floatdisf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
@@ -178,9 +178,9 @@ define float @fcvt_s_lu(i64 %a) nounwind {
|
||||
; RV32IF-LABEL: fcvt_s_lu:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call __floatundisf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call __floatundisf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -6,9 +6,9 @@ define float @frem_f32(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: frem_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call fmodf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call fmodf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
%1 = frem float %a, %b
|
||||
|
||||
@@ -34,19 +34,19 @@ define float @powi_f32(float %a, i32 %b) nounwind {
|
||||
; RV32IF-LABEL: powi_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call __powisf2
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call __powisf2@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: powi_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: sext.w a1, a1
|
||||
; RV64IF-NEXT: call __powisf2
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: call __powisf2@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.powi.f32(float %a, i32 %b)
|
||||
@@ -59,18 +59,18 @@ define float @sin_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: sin_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call sinf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call sinf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: sin_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call sinf
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call sinf@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.sin.f32(float %a)
|
||||
@@ -83,18 +83,18 @@ define float @cos_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: cos_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call cosf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call cosf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: cos_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call cosf
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call cosf@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.cos.f32(float %a)
|
||||
@@ -106,40 +106,40 @@ define float @sincos_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: sincos_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw s0, 8(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: mv s0, a0
|
||||
; RV32IF-NEXT: call sinf
|
||||
; RV32IF-NEXT: call sinf@plt
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: fsw ft0, 4(sp)
|
||||
; RV32IF-NEXT: fsw ft0, 4(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: mv a0, s0
|
||||
; RV32IF-NEXT: call cosf
|
||||
; RV32IF-NEXT: call cosf@plt
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: flw ft1, 4(sp)
|
||||
; RV32IF-NEXT: flw ft1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: fadd.s ft0, ft1, ft0
|
||||
; RV32IF-NEXT: fmv.x.w a0, ft0
|
||||
; RV32IF-NEXT: lw s0, 8(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: sincos_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -32
|
||||
; RV64IF-NEXT: sd ra, 24(sp)
|
||||
; RV64IF-NEXT: sd s0, 16(sp)
|
||||
; RV64IF-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: mv s0, a0
|
||||
; RV64IF-NEXT: call sinf
|
||||
; RV64IF-NEXT: call sinf@plt
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: fsw ft0, 12(sp)
|
||||
; RV64IF-NEXT: fsw ft0, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: mv a0, s0
|
||||
; RV64IF-NEXT: call cosf
|
||||
; RV64IF-NEXT: call cosf@plt
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: flw ft1, 12(sp)
|
||||
; RV64IF-NEXT: flw ft1, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: fadd.s ft0, ft1, ft0
|
||||
; RV64IF-NEXT: fmv.x.w a0, ft0
|
||||
; RV64IF-NEXT: ld s0, 16(sp)
|
||||
; RV64IF-NEXT: ld ra, 24(sp)
|
||||
; RV64IF-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 32
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.sin.f32(float %a)
|
||||
@@ -154,18 +154,18 @@ define float @pow_f32(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: pow_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call powf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call powf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: pow_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call powf
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call powf@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.pow.f32(float %a, float %b)
|
||||
@@ -178,18 +178,18 @@ define float @exp_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: exp_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call expf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call expf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: exp_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call expf
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call expf@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.exp.f32(float %a)
|
||||
@@ -202,18 +202,18 @@ define float @exp2_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: exp2_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call exp2f
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call exp2f@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: exp2_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call exp2f
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call exp2f@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.exp2.f32(float %a)
|
||||
@@ -226,18 +226,18 @@ define float @log_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: log_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call logf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call logf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: log_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call logf
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call logf@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.log.f32(float %a)
|
||||
@@ -250,18 +250,18 @@ define float @log10_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: log10_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call log10f
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call log10f@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: log10_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call log10f
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call log10f@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.log10.f32(float %a)
|
||||
@@ -274,18 +274,18 @@ define float @log2_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: log2_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call log2f
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call log2f@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: log2_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call log2f
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call log2f@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.log2.f32(float %a)
|
||||
@@ -449,18 +449,18 @@ define float @floor_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: floor_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call floorf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call floorf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: floor_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call floorf
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call floorf@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.floor.f32(float %a)
|
||||
@@ -473,18 +473,18 @@ define float @ceil_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: ceil_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call ceilf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call ceilf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: ceil_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call ceilf
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call ceilf@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.ceil.f32(float %a)
|
||||
@@ -497,18 +497,18 @@ define float @trunc_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: trunc_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call truncf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call truncf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: trunc_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call truncf
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call truncf@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.trunc.f32(float %a)
|
||||
@@ -521,18 +521,18 @@ define float @rint_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: rint_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call rintf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call rintf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: rint_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call rintf
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call rintf@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.rint.f32(float %a)
|
||||
@@ -545,18 +545,18 @@ define float @nearbyint_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: nearbyint_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call nearbyintf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call nearbyintf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: nearbyint_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call nearbyintf
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call nearbyintf@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.nearbyint.f32(float %a)
|
||||
@@ -569,18 +569,18 @@ define float @round_f32(float %a) nounwind {
|
||||
; RV32IF-LABEL: round_f32:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: call roundf
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: call roundf@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: round_f32:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call roundf
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call roundf@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = call float @llvm.round.f32(float %a)
|
||||
|
||||
@@ -134,32 +134,32 @@ define float @flw_stack(float %a) nounwind {
|
||||
; RV32IF-LABEL: flw_stack:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV32IF-NEXT: fsw ft0, 4(sp)
|
||||
; RV32IF-NEXT: fsw ft0, 4(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: addi a0, sp, 8
|
||||
; RV32IF-NEXT: call notdead
|
||||
; RV32IF-NEXT: call notdead@plt
|
||||
; RV32IF-NEXT: flw ft0, 8(sp)
|
||||
; RV32IF-NEXT: flw ft1, 4(sp)
|
||||
; RV32IF-NEXT: flw ft1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: fadd.s ft0, ft0, ft1
|
||||
; RV32IF-NEXT: fmv.x.w a0, ft0
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: flw_stack:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a0
|
||||
; RV64IF-NEXT: fsw ft0, 0(sp)
|
||||
; RV64IF-NEXT: fsw ft0, 0(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: addi a0, sp, 4
|
||||
; RV64IF-NEXT: call notdead
|
||||
; RV64IF-NEXT: call notdead@plt
|
||||
; RV64IF-NEXT: flw ft0, 4(sp)
|
||||
; RV64IF-NEXT: flw ft1, 0(sp)
|
||||
; RV64IF-NEXT: flw ft1, 0(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: fadd.s ft0, ft0, ft1
|
||||
; RV64IF-NEXT: fmv.x.w a0, ft0
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = alloca float, align 4
|
||||
@@ -174,28 +174,28 @@ define void @fsw_stack(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: fsw_stack:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV32IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV32IF-NEXT: fadd.s ft0, ft1, ft0
|
||||
; RV32IF-NEXT: fsw ft0, 8(sp)
|
||||
; RV32IF-NEXT: addi a0, sp, 8
|
||||
; RV32IF-NEXT: call notdead
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: call notdead@plt
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: fsw_stack:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.w.x ft0, a1
|
||||
; RV64IF-NEXT: fmv.w.x ft1, a0
|
||||
; RV64IF-NEXT: fadd.s ft0, ft1, ft0
|
||||
; RV64IF-NEXT: fsw ft0, 4(sp)
|
||||
; RV64IF-NEXT: addi a0, sp, 4
|
||||
; RV64IF-NEXT: call notdead
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: call notdead@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = fadd float %a, %b ; force store from FPR32
|
||||
|
||||
@@ -12,7 +12,7 @@ define i32 @test_load_and_cmp() nounwind {
|
||||
; RV32I-LABEL: test_load_and_cmp:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -48
|
||||
; RV32I-NEXT: sw ra, 44(sp)
|
||||
; RV32I-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lui a0, %hi(x)
|
||||
; RV32I-NEXT: lw a6, %lo(x)(a0)
|
||||
; RV32I-NEXT: lw a7, %lo(x+4)(a0)
|
||||
@@ -33,9 +33,9 @@ define i32 @test_load_and_cmp() nounwind {
|
||||
; RV32I-NEXT: addi a0, sp, 24
|
||||
; RV32I-NEXT: addi a1, sp, 8
|
||||
; RV32I-NEXT: sw a6, 24(sp)
|
||||
; RV32I-NEXT: call __netf2
|
||||
; RV32I-NEXT: call __netf2@plt
|
||||
; RV32I-NEXT: snez a0, a0
|
||||
; RV32I-NEXT: lw ra, 44(sp)
|
||||
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 48
|
||||
; RV32I-NEXT: ret
|
||||
%1 = load fp128, fp128* @x, align 16
|
||||
@@ -49,7 +49,7 @@ define i32 @test_add_and_fptosi() nounwind {
|
||||
; RV32I-LABEL: test_add_and_fptosi:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -80
|
||||
; RV32I-NEXT: sw ra, 76(sp)
|
||||
; RV32I-NEXT: sw ra, 76(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lui a0, %hi(x)
|
||||
; RV32I-NEXT: lw a6, %lo(x)(a0)
|
||||
; RV32I-NEXT: lw a7, %lo(x+4)(a0)
|
||||
@@ -71,7 +71,7 @@ define i32 @test_add_and_fptosi() nounwind {
|
||||
; RV32I-NEXT: addi a1, sp, 40
|
||||
; RV32I-NEXT: addi a2, sp, 24
|
||||
; RV32I-NEXT: sw a6, 40(sp)
|
||||
; RV32I-NEXT: call __addtf3
|
||||
; RV32I-NEXT: call __addtf3@plt
|
||||
; RV32I-NEXT: lw a1, 56(sp)
|
||||
; RV32I-NEXT: lw a0, 60(sp)
|
||||
; RV32I-NEXT: lw a2, 64(sp)
|
||||
@@ -81,8 +81,8 @@ define i32 @test_add_and_fptosi() nounwind {
|
||||
; RV32I-NEXT: sw a0, 12(sp)
|
||||
; RV32I-NEXT: addi a0, sp, 8
|
||||
; RV32I-NEXT: sw a1, 8(sp)
|
||||
; RV32I-NEXT: call __fixtfsi
|
||||
; RV32I-NEXT: lw ra, 76(sp)
|
||||
; RV32I-NEXT: call __fixtfsi@plt
|
||||
; RV32I-NEXT: lw ra, 76(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 80
|
||||
; RV32I-NEXT: ret
|
||||
%1 = load fp128, fp128* @x, align 16
|
||||
|
||||
@@ -16,10 +16,10 @@ define float @test_fpextend_float(half* %p) nounwind {
|
||||
; CHECK-LABEL: test_fpextend_float:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: addi sp, sp, -16
|
||||
; CHECK-NEXT: sw ra, 12(sp)
|
||||
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lhu a0, 0(a0)
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee
|
||||
; CHECK-NEXT: lw ra, 12(sp)
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee@plt
|
||||
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi sp, sp, 16
|
||||
; CHECK-NEXT: ret
|
||||
%a = load half, half* %p
|
||||
@@ -31,11 +31,11 @@ define double @test_fpextend_double(half* %p) nounwind {
|
||||
; CHECK-LABEL: test_fpextend_double:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: addi sp, sp, -16
|
||||
; CHECK-NEXT: sw ra, 12(sp)
|
||||
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lhu a0, 0(a0)
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee@plt
|
||||
; CHECK-NEXT: fcvt.d.s fa0, fa0
|
||||
; CHECK-NEXT: lw ra, 12(sp)
|
||||
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi sp, sp, 16
|
||||
; CHECK-NEXT: ret
|
||||
%a = load half, half* %p
|
||||
@@ -47,13 +47,13 @@ define void @test_fptrunc_float(float %f, half* %p) nounwind {
|
||||
; CHECK-LABEL: test_fptrunc_float:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: addi sp, sp, -16
|
||||
; CHECK-NEXT: sw ra, 12(sp)
|
||||
; CHECK-NEXT: sw s0, 8(sp)
|
||||
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: mv s0, a0
|
||||
; CHECK-NEXT: call __gnu_f2h_ieee
|
||||
; CHECK-NEXT: call __gnu_f2h_ieee@plt
|
||||
; CHECK-NEXT: sh a0, 0(s0)
|
||||
; CHECK-NEXT: lw s0, 8(sp)
|
||||
; CHECK-NEXT: lw ra, 12(sp)
|
||||
; CHECK-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi sp, sp, 16
|
||||
; CHECK-NEXT: ret
|
||||
%a = fptrunc float %f to half
|
||||
@@ -65,13 +65,13 @@ define void @test_fptrunc_double(double %d, half* %p) nounwind {
|
||||
; CHECK-LABEL: test_fptrunc_double:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: addi sp, sp, -16
|
||||
; CHECK-NEXT: sw ra, 12(sp)
|
||||
; CHECK-NEXT: sw s0, 8(sp)
|
||||
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: mv s0, a0
|
||||
; CHECK-NEXT: call __truncdfhf2
|
||||
; CHECK-NEXT: call __truncdfhf2@plt
|
||||
; CHECK-NEXT: sh a0, 0(s0)
|
||||
; CHECK-NEXT: lw s0, 8(sp)
|
||||
; CHECK-NEXT: lw ra, 12(sp)
|
||||
; CHECK-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi sp, sp, 16
|
||||
; CHECK-NEXT: ret
|
||||
%a = fptrunc double %d to half
|
||||
@@ -83,24 +83,24 @@ define void @test_fadd(half* %p, half* %q) nounwind {
|
||||
; CHECK-LABEL: test_fadd:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: addi sp, sp, -32
|
||||
; CHECK-NEXT: sw ra, 28(sp)
|
||||
; CHECK-NEXT: sw s0, 24(sp)
|
||||
; CHECK-NEXT: sw s1, 20(sp)
|
||||
; CHECK-NEXT: fsd fs0, 8(sp)
|
||||
; CHECK-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
|
||||
; CHECK-NEXT: mv s0, a1
|
||||
; CHECK-NEXT: mv s1, a0
|
||||
; CHECK-NEXT: lhu a0, 0(a0)
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee@plt
|
||||
; CHECK-NEXT: fmv.s fs0, fa0
|
||||
; CHECK-NEXT: lhu a0, 0(s0)
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee@plt
|
||||
; CHECK-NEXT: fadd.s fa0, fs0, fa0
|
||||
; CHECK-NEXT: call __gnu_f2h_ieee
|
||||
; CHECK-NEXT: call __gnu_f2h_ieee@plt
|
||||
; CHECK-NEXT: sh a0, 0(s1)
|
||||
; CHECK-NEXT: fld fs0, 8(sp)
|
||||
; CHECK-NEXT: lw s1, 20(sp)
|
||||
; CHECK-NEXT: lw s0, 24(sp)
|
||||
; CHECK-NEXT: lw ra, 28(sp)
|
||||
; CHECK-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
|
||||
; CHECK-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi sp, sp, 32
|
||||
; CHECK-NEXT: ret
|
||||
%a = load half, half* %p
|
||||
@@ -114,24 +114,24 @@ define void @test_fmul(half* %p, half* %q) nounwind {
|
||||
; CHECK-LABEL: test_fmul:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: addi sp, sp, -32
|
||||
; CHECK-NEXT: sw ra, 28(sp)
|
||||
; CHECK-NEXT: sw s0, 24(sp)
|
||||
; CHECK-NEXT: sw s1, 20(sp)
|
||||
; CHECK-NEXT: fsd fs0, 8(sp)
|
||||
; CHECK-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
|
||||
; CHECK-NEXT: mv s0, a1
|
||||
; CHECK-NEXT: mv s1, a0
|
||||
; CHECK-NEXT: lhu a0, 0(a0)
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee@plt
|
||||
; CHECK-NEXT: fmv.s fs0, fa0
|
||||
; CHECK-NEXT: lhu a0, 0(s0)
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee
|
||||
; CHECK-NEXT: call __gnu_h2f_ieee@plt
|
||||
; CHECK-NEXT: fmul.s fa0, fs0, fa0
|
||||
; CHECK-NEXT: call __gnu_f2h_ieee
|
||||
; CHECK-NEXT: call __gnu_f2h_ieee@plt
|
||||
; CHECK-NEXT: sh a0, 0(s1)
|
||||
; CHECK-NEXT: fld fs0, 8(sp)
|
||||
; CHECK-NEXT: lw s1, 20(sp)
|
||||
; CHECK-NEXT: lw s0, 24(sp)
|
||||
; CHECK-NEXT: lw ra, 28(sp)
|
||||
; CHECK-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
|
||||
; CHECK-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi sp, sp, 32
|
||||
; CHECK-NEXT: ret
|
||||
%a = load half, half* %p
|
||||
|
||||
@@ -19,14 +19,14 @@ define void @trivial() {
|
||||
; RV32-WITHFP: # %bb.0:
|
||||
; RV32-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32-WITHFP-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV32-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32-WITHFP-NEXT: .cfi_offset ra, -4
|
||||
; RV32-WITHFP-NEXT: .cfi_offset s0, -8
|
||||
; RV32-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV32-WITHFP-NEXT: .cfi_def_cfa s0, 0
|
||||
; RV32-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32-WITHFP-NEXT: ret
|
||||
;
|
||||
@@ -34,14 +34,14 @@ define void @trivial() {
|
||||
; RV64-WITHFP: # %bb.0:
|
||||
; RV64-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV64-WITHFP-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV64-WITHFP-NEXT: sd ra, 8(sp)
|
||||
; RV64-WITHFP-NEXT: sd s0, 0(sp)
|
||||
; RV64-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64-WITHFP-NEXT: .cfi_offset ra, -8
|
||||
; RV64-WITHFP-NEXT: .cfi_offset s0, -16
|
||||
; RV64-WITHFP-NEXT: addi s0, sp, 16
|
||||
; RV64-WITHFP-NEXT: .cfi_def_cfa s0, 0
|
||||
; RV64-WITHFP-NEXT: ld s0, 0(sp)
|
||||
; RV64-WITHFP-NEXT: ld ra, 8(sp)
|
||||
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV64-WITHFP-NEXT: ret
|
||||
ret void
|
||||
@@ -52,8 +52,8 @@ define void @stack_alloc(i32 signext %size) {
|
||||
; RV32: # %bb.0: # %entry
|
||||
; RV32-NEXT: addi sp, sp, -16
|
||||
; RV32-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV32-NEXT: sw ra, 12(sp)
|
||||
; RV32-NEXT: sw s0, 8(sp)
|
||||
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32-NEXT: .cfi_offset ra, -4
|
||||
; RV32-NEXT: .cfi_offset s0, -8
|
||||
; RV32-NEXT: addi s0, sp, 16
|
||||
@@ -62,10 +62,10 @@ define void @stack_alloc(i32 signext %size) {
|
||||
; RV32-NEXT: andi a0, a0, -16
|
||||
; RV32-NEXT: sub a0, sp, a0
|
||||
; RV32-NEXT: mv sp, a0
|
||||
; RV32-NEXT: call callee_with_args
|
||||
; RV32-NEXT: call callee_with_args@plt
|
||||
; RV32-NEXT: addi sp, s0, -16
|
||||
; RV32-NEXT: lw s0, 8(sp)
|
||||
; RV32-NEXT: lw ra, 12(sp)
|
||||
; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: addi sp, sp, 16
|
||||
; RV32-NEXT: ret
|
||||
;
|
||||
@@ -73,8 +73,8 @@ define void @stack_alloc(i32 signext %size) {
|
||||
; RV64: # %bb.0: # %entry
|
||||
; RV64-NEXT: addi sp, sp, -16
|
||||
; RV64-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV64-NEXT: sd ra, 8(sp)
|
||||
; RV64-NEXT: sd s0, 0(sp)
|
||||
; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64-NEXT: .cfi_offset ra, -8
|
||||
; RV64-NEXT: .cfi_offset s0, -16
|
||||
; RV64-NEXT: addi s0, sp, 16
|
||||
@@ -88,10 +88,10 @@ define void @stack_alloc(i32 signext %size) {
|
||||
; RV64-NEXT: and a0, a0, a1
|
||||
; RV64-NEXT: sub a0, sp, a0
|
||||
; RV64-NEXT: mv sp, a0
|
||||
; RV64-NEXT: call callee_with_args
|
||||
; RV64-NEXT: call callee_with_args@plt
|
||||
; RV64-NEXT: addi sp, s0, -16
|
||||
; RV64-NEXT: ld s0, 0(sp)
|
||||
; RV64-NEXT: ld ra, 8(sp)
|
||||
; RV64-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: addi sp, sp, 16
|
||||
; RV64-NEXT: ret
|
||||
;
|
||||
@@ -99,8 +99,8 @@ define void @stack_alloc(i32 signext %size) {
|
||||
; RV32-WITHFP: # %bb.0: # %entry
|
||||
; RV32-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32-WITHFP-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV32-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32-WITHFP-NEXT: .cfi_offset ra, -4
|
||||
; RV32-WITHFP-NEXT: .cfi_offset s0, -8
|
||||
; RV32-WITHFP-NEXT: addi s0, sp, 16
|
||||
@@ -109,10 +109,10 @@ define void @stack_alloc(i32 signext %size) {
|
||||
; RV32-WITHFP-NEXT: andi a0, a0, -16
|
||||
; RV32-WITHFP-NEXT: sub a0, sp, a0
|
||||
; RV32-WITHFP-NEXT: mv sp, a0
|
||||
; RV32-WITHFP-NEXT: call callee_with_args
|
||||
; RV32-WITHFP-NEXT: call callee_with_args@plt
|
||||
; RV32-WITHFP-NEXT: addi sp, s0, -16
|
||||
; RV32-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32-WITHFP-NEXT: ret
|
||||
;
|
||||
@@ -120,8 +120,8 @@ define void @stack_alloc(i32 signext %size) {
|
||||
; RV64-WITHFP: # %bb.0: # %entry
|
||||
; RV64-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV64-WITHFP-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV64-WITHFP-NEXT: sd ra, 8(sp)
|
||||
; RV64-WITHFP-NEXT: sd s0, 0(sp)
|
||||
; RV64-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64-WITHFP-NEXT: .cfi_offset ra, -8
|
||||
; RV64-WITHFP-NEXT: .cfi_offset s0, -16
|
||||
; RV64-WITHFP-NEXT: addi s0, sp, 16
|
||||
@@ -135,10 +135,10 @@ define void @stack_alloc(i32 signext %size) {
|
||||
; RV64-WITHFP-NEXT: and a0, a0, a1
|
||||
; RV64-WITHFP-NEXT: sub a0, sp, a0
|
||||
; RV64-WITHFP-NEXT: mv sp, a0
|
||||
; RV64-WITHFP-NEXT: call callee_with_args
|
||||
; RV64-WITHFP-NEXT: call callee_with_args@plt
|
||||
; RV64-WITHFP-NEXT: addi sp, s0, -16
|
||||
; RV64-WITHFP-NEXT: ld s0, 0(sp)
|
||||
; RV64-WITHFP-NEXT: ld ra, 8(sp)
|
||||
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV64-WITHFP-NEXT: ret
|
||||
entry:
|
||||
@@ -152,17 +152,17 @@ define void @branch_and_tail_call(i1 %a) {
|
||||
; RV32: # %bb.0:
|
||||
; RV32-NEXT: addi sp, sp, -16
|
||||
; RV32-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV32-NEXT: sw ra, 12(sp)
|
||||
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-NEXT: .cfi_offset ra, -4
|
||||
; RV32-NEXT: andi a0, a0, 1
|
||||
; RV32-NEXT: beqz a0, .LBB2_2
|
||||
; RV32-NEXT: # %bb.1: # %blue_pill
|
||||
; RV32-NEXT: lw ra, 12(sp)
|
||||
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: addi sp, sp, 16
|
||||
; RV32-NEXT: tail callee1
|
||||
; RV32-NEXT: tail callee1@plt
|
||||
; RV32-NEXT: .LBB2_2: # %red_pill
|
||||
; RV32-NEXT: call callee2
|
||||
; RV32-NEXT: lw ra, 12(sp)
|
||||
; RV32-NEXT: call callee2@plt
|
||||
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: addi sp, sp, 16
|
||||
; RV32-NEXT: ret
|
||||
;
|
||||
@@ -170,17 +170,17 @@ define void @branch_and_tail_call(i1 %a) {
|
||||
; RV64: # %bb.0:
|
||||
; RV64-NEXT: addi sp, sp, -16
|
||||
; RV64-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV64-NEXT: sd ra, 8(sp)
|
||||
; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64-NEXT: .cfi_offset ra, -8
|
||||
; RV64-NEXT: andi a0, a0, 1
|
||||
; RV64-NEXT: beqz a0, .LBB2_2
|
||||
; RV64-NEXT: # %bb.1: # %blue_pill
|
||||
; RV64-NEXT: ld ra, 8(sp)
|
||||
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: addi sp, sp, 16
|
||||
; RV64-NEXT: tail callee1
|
||||
; RV64-NEXT: tail callee1@plt
|
||||
; RV64-NEXT: .LBB2_2: # %red_pill
|
||||
; RV64-NEXT: call callee2
|
||||
; RV64-NEXT: ld ra, 8(sp)
|
||||
; RV64-NEXT: call callee2@plt
|
||||
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: addi sp, sp, 16
|
||||
; RV64-NEXT: ret
|
||||
;
|
||||
@@ -188,8 +188,8 @@ define void @branch_and_tail_call(i1 %a) {
|
||||
; RV32-WITHFP: # %bb.0:
|
||||
; RV32-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV32-WITHFP-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV32-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; RV32-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; RV32-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32-WITHFP-NEXT: .cfi_offset ra, -4
|
||||
; RV32-WITHFP-NEXT: .cfi_offset s0, -8
|
||||
; RV32-WITHFP-NEXT: addi s0, sp, 16
|
||||
@@ -197,14 +197,14 @@ define void @branch_and_tail_call(i1 %a) {
|
||||
; RV32-WITHFP-NEXT: andi a0, a0, 1
|
||||
; RV32-WITHFP-NEXT: beqz a0, .LBB2_2
|
||||
; RV32-WITHFP-NEXT: # %bb.1: # %blue_pill
|
||||
; RV32-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32-WITHFP-NEXT: tail callee1
|
||||
; RV32-WITHFP-NEXT: tail callee1@plt
|
||||
; RV32-WITHFP-NEXT: .LBB2_2: # %red_pill
|
||||
; RV32-WITHFP-NEXT: call callee2
|
||||
; RV32-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; RV32-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; RV32-WITHFP-NEXT: call callee2@plt
|
||||
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV32-WITHFP-NEXT: ret
|
||||
;
|
||||
@@ -212,8 +212,8 @@ define void @branch_and_tail_call(i1 %a) {
|
||||
; RV64-WITHFP: # %bb.0:
|
||||
; RV64-WITHFP-NEXT: addi sp, sp, -16
|
||||
; RV64-WITHFP-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV64-WITHFP-NEXT: sd ra, 8(sp)
|
||||
; RV64-WITHFP-NEXT: sd s0, 0(sp)
|
||||
; RV64-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64-WITHFP-NEXT: .cfi_offset ra, -8
|
||||
; RV64-WITHFP-NEXT: .cfi_offset s0, -16
|
||||
; RV64-WITHFP-NEXT: addi s0, sp, 16
|
||||
@@ -221,14 +221,14 @@ define void @branch_and_tail_call(i1 %a) {
|
||||
; RV64-WITHFP-NEXT: andi a0, a0, 1
|
||||
; RV64-WITHFP-NEXT: beqz a0, .LBB2_2
|
||||
; RV64-WITHFP-NEXT: # %bb.1: # %blue_pill
|
||||
; RV64-WITHFP-NEXT: ld s0, 0(sp)
|
||||
; RV64-WITHFP-NEXT: ld ra, 8(sp)
|
||||
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV64-WITHFP-NEXT: tail callee1
|
||||
; RV64-WITHFP-NEXT: tail callee1@plt
|
||||
; RV64-WITHFP-NEXT: .LBB2_2: # %red_pill
|
||||
; RV64-WITHFP-NEXT: call callee2
|
||||
; RV64-WITHFP-NEXT: ld s0, 0(sp)
|
||||
; RV64-WITHFP-NEXT: ld ra, 8(sp)
|
||||
; RV64-WITHFP-NEXT: call callee2@plt
|
||||
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-WITHFP-NEXT: addi sp, sp, 16
|
||||
; RV64-WITHFP-NEXT: ret
|
||||
br i1 %a, label %blue_pill, label %red_pill
|
||||
|
||||
@@ -10,24 +10,24 @@ define i32 @test() nounwind {
|
||||
; RV32I-FPELIM-LABEL: test:
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -32
|
||||
; RV32I-FPELIM-NEXT: sw ra, 28(sp)
|
||||
; RV32I-FPELIM-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: sw zero, 24(sp)
|
||||
; RV32I-FPELIM-NEXT: sw zero, 20(sp)
|
||||
; RV32I-FPELIM-NEXT: sw zero, 16(sp)
|
||||
; RV32I-FPELIM-NEXT: sw zero, 12(sp)
|
||||
; RV32I-FPELIM-NEXT: sw zero, 8(sp)
|
||||
; RV32I-FPELIM-NEXT: addi a0, sp, 12
|
||||
; RV32I-FPELIM-NEXT: call test1
|
||||
; RV32I-FPELIM-NEXT: call test1@plt
|
||||
; RV32I-FPELIM-NEXT: mv a0, zero
|
||||
; RV32I-FPELIM-NEXT: lw ra, 28(sp)
|
||||
; RV32I-FPELIM-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 32
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
; RV32I-WITHFP-LABEL: test:
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -32
|
||||
; RV32I-WITHFP-NEXT: sw ra, 28(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 24(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 32
|
||||
; RV32I-WITHFP-NEXT: sw zero, -16(s0)
|
||||
; RV32I-WITHFP-NEXT: sw zero, -20(s0)
|
||||
@@ -35,10 +35,10 @@ define i32 @test() nounwind {
|
||||
; RV32I-WITHFP-NEXT: sw zero, -28(s0)
|
||||
; RV32I-WITHFP-NEXT: sw zero, -32(s0)
|
||||
; RV32I-WITHFP-NEXT: addi a0, s0, -28
|
||||
; RV32I-WITHFP-NEXT: call test1
|
||||
; RV32I-WITHFP-NEXT: call test1@plt
|
||||
; RV32I-WITHFP-NEXT: mv a0, zero
|
||||
; RV32I-WITHFP-NEXT: lw s0, 24(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 28(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 32
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%key = alloca %struct.key_t, align 4
|
||||
|
||||
@@ -12,24 +12,24 @@ define i8* @test_frameaddress_0() nounwind {
|
||||
; RV32I-LABEL: test_frameaddress_0:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: test_frameaddress_0:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd s0, 0(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 16
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: ld s0, 0(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i8* @llvm.frameaddress(i32 0)
|
||||
@@ -40,26 +40,26 @@ define i8* @test_frameaddress_2() nounwind {
|
||||
; RV32I-LABEL: test_frameaddress_2:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: lw a0, -8(s0)
|
||||
; RV32I-NEXT: lw a0, -8(a0)
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: test_frameaddress_2:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd s0, 0(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 16
|
||||
; RV64I-NEXT: ld a0, -16(s0)
|
||||
; RV64I-NEXT: ld a0, -16(a0)
|
||||
; RV64I-NEXT: ld s0, 0(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i8* @llvm.frameaddress(i32 2)
|
||||
@@ -70,32 +70,32 @@ define i8* @test_frameaddress_3_alloca() nounwind {
|
||||
; RV32I-LABEL: test_frameaddress_3_alloca:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -112
|
||||
; RV32I-NEXT: sw ra, 108(sp)
|
||||
; RV32I-NEXT: sw s0, 104(sp)
|
||||
; RV32I-NEXT: sw ra, 108(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 104(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 112
|
||||
; RV32I-NEXT: addi a0, s0, -108
|
||||
; RV32I-NEXT: call notdead
|
||||
; RV32I-NEXT: call notdead@plt
|
||||
; RV32I-NEXT: lw a0, -8(s0)
|
||||
; RV32I-NEXT: lw a0, -8(a0)
|
||||
; RV32I-NEXT: lw a0, -8(a0)
|
||||
; RV32I-NEXT: lw s0, 104(sp)
|
||||
; RV32I-NEXT: lw ra, 108(sp)
|
||||
; RV32I-NEXT: lw s0, 104(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 108(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 112
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: test_frameaddress_3_alloca:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -128
|
||||
; RV64I-NEXT: sd ra, 120(sp)
|
||||
; RV64I-NEXT: sd s0, 112(sp)
|
||||
; RV64I-NEXT: sd ra, 120(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 112(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 128
|
||||
; RV64I-NEXT: addi a0, s0, -116
|
||||
; RV64I-NEXT: call notdead
|
||||
; RV64I-NEXT: call notdead@plt
|
||||
; RV64I-NEXT: ld a0, -16(s0)
|
||||
; RV64I-NEXT: ld a0, -16(a0)
|
||||
; RV64I-NEXT: ld a0, -16(a0)
|
||||
; RV64I-NEXT: ld s0, 112(sp)
|
||||
; RV64I-NEXT: ld ra, 120(sp)
|
||||
; RV64I-NEXT: ld s0, 112(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 120(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 128
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca [100 x i8]
|
||||
@@ -123,28 +123,28 @@ define i8* @test_returnaddress_2() nounwind {
|
||||
; RV32I-LABEL: test_returnaddress_2:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: lw a0, -8(s0)
|
||||
; RV32I-NEXT: lw a0, -8(a0)
|
||||
; RV32I-NEXT: lw a0, -4(a0)
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: test_returnaddress_2:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd s0, 0(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 16
|
||||
; RV64I-NEXT: ld a0, -16(s0)
|
||||
; RV64I-NEXT: ld a0, -16(a0)
|
||||
; RV64I-NEXT: ld a0, -8(a0)
|
||||
; RV64I-NEXT: ld s0, 0(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call i8* @llvm.returnaddress(i32 2)
|
||||
|
||||
@@ -78,7 +78,7 @@ define ghccc void @foo() nounwind {
|
||||
; CHECK-NEXT: lw s2, %lo(sp)(a0)
|
||||
; CHECK-NEXT: lui a0, %hi(base)
|
||||
; CHECK-NEXT: lw s1, %lo(base)(a0)
|
||||
; CHECK-NEXT: tail bar
|
||||
; CHECK-NEXT: tail bar@plt
|
||||
entry:
|
||||
%0 = load double, double* @d6
|
||||
%1 = load double, double* @d5
|
||||
|
||||
@@ -78,7 +78,7 @@ define ghccc void @foo() nounwind {
|
||||
; CHECK-NEXT: ld s2, %lo(sp)(a0)
|
||||
; CHECK-NEXT: lui a0, %hi(base)
|
||||
; CHECK-NEXT: ld s1, %lo(base)(a0)
|
||||
; CHECK-NEXT: tail bar
|
||||
; CHECK-NEXT: tail bar@plt
|
||||
entry:
|
||||
%0 = load double, double* @d6
|
||||
%1 = load double, double* @d5
|
||||
|
||||
@@ -82,13 +82,13 @@ define half @fcopysign_fneg(half %a, half %b) nounwind {
|
||||
; RV32I-LABEL: fcopysign_fneg:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s0, a1
|
||||
; RV32I-NEXT: lui a1, 16
|
||||
; RV32I-NEXT: addi a1, a1, -1
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: call __gnu_h2f_ieee
|
||||
; RV32I-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV32I-NEXT: not a1, s0
|
||||
; RV32I-NEXT: lui a2, 524288
|
||||
; RV32I-NEXT: addi a2, a2, -1
|
||||
@@ -97,9 +97,9 @@ define half @fcopysign_fneg(half %a, half %b) nounwind {
|
||||
; RV32I-NEXT: and a1, a1, a2
|
||||
; RV32I-NEXT: slli a1, a1, 16
|
||||
; RV32I-NEXT: or a0, a0, a1
|
||||
; RV32I-NEXT: call __gnu_f2h_ieee
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -111,13 +111,13 @@ define half @fcopysign_fneg(half %a, half %b) nounwind {
|
||||
; RV64I-LABEL: fcopysign_fneg:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd s0, 0(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s0, a1
|
||||
; RV64I-NEXT: lui a1, 16
|
||||
; RV64I-NEXT: addiw a1, a1, -1
|
||||
; RV64I-NEXT: and a0, a0, a1
|
||||
; RV64I-NEXT: call __gnu_h2f_ieee
|
||||
; RV64I-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV64I-NEXT: not a1, s0
|
||||
; RV64I-NEXT: lui a2, 524288
|
||||
; RV64I-NEXT: addiw a2, a2, -1
|
||||
@@ -129,9 +129,9 @@ define half @fcopysign_fneg(half %a, half %b) nounwind {
|
||||
; RV64I-NEXT: and a1, a1, a2
|
||||
; RV64I-NEXT: slli a1, a1, 16
|
||||
; RV64I-NEXT: or a0, a0, a1
|
||||
; RV64I-NEXT: call __gnu_f2h_ieee
|
||||
; RV64I-NEXT: ld s0, 0(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -12,28 +12,28 @@ define void @br_fcmp_false(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_false:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: addi a0, zero, 1
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB0_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.then
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB0_2: # %if.else
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_false:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: addi a0, zero, 1
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB0_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.then
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB0_2: # %if.else
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp false half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.then:
|
||||
@@ -47,28 +47,28 @@ define void @br_fcmp_oeq(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_oeq:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: feq.h a0, fa0, fa1
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB1_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB1_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_oeq:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: feq.h a0, fa0, fa1
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB1_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB1_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp oeq half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -85,30 +85,30 @@ define void @br_fcmp_oeq_alt(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_oeq_alt:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: feq.h a0, fa0, fa1
|
||||
; RV32IZFH-NEXT: xori a0, a0, 1
|
||||
; RV32IZFH-NEXT: beqz a0, .LBB2_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB2_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_oeq_alt:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: feq.h a0, fa0, fa1
|
||||
; RV64IZFH-NEXT: xori a0, a0, 1
|
||||
; RV64IZFH-NEXT: beqz a0, .LBB2_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB2_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp oeq half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.then:
|
||||
@@ -122,28 +122,28 @@ define void @br_fcmp_ogt(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_ogt:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: flt.h a0, fa1, fa0
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB3_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB3_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_ogt:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: flt.h a0, fa1, fa0
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB3_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB3_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp ogt half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -157,28 +157,28 @@ define void @br_fcmp_oge(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_oge:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: fle.h a0, fa1, fa0
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB4_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB4_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_oge:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: fle.h a0, fa1, fa0
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB4_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB4_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp oge half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -192,28 +192,28 @@ define void @br_fcmp_olt(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_olt:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: flt.h a0, fa0, fa1
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB5_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB5_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_olt:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: flt.h a0, fa0, fa1
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB5_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB5_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp olt half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -227,28 +227,28 @@ define void @br_fcmp_ole(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_ole:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: fle.h a0, fa0, fa1
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB6_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB6_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_ole:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: fle.h a0, fa0, fa1
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB6_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB6_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp ole half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -263,7 +263,7 @@ define void @br_fcmp_one(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_one:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: feq.h a0, fa1, fa1
|
||||
; RV32IZFH-NEXT: feq.h a1, fa0, fa0
|
||||
; RV32IZFH-NEXT: and a0, a1, a0
|
||||
@@ -272,16 +272,16 @@ define void @br_fcmp_one(half %a, half %b) nounwind {
|
||||
; RV32IZFH-NEXT: and a0, a1, a0
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB7_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB7_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_one:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: feq.h a0, fa1, fa1
|
||||
; RV64IZFH-NEXT: feq.h a1, fa0, fa0
|
||||
; RV64IZFH-NEXT: and a0, a1, a0
|
||||
@@ -290,11 +290,11 @@ define void @br_fcmp_one(half %a, half %b) nounwind {
|
||||
; RV64IZFH-NEXT: and a0, a1, a0
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB7_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB7_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp one half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -308,32 +308,32 @@ define void @br_fcmp_ord(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_ord:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: feq.h a0, fa1, fa1
|
||||
; RV32IZFH-NEXT: feq.h a1, fa0, fa0
|
||||
; RV32IZFH-NEXT: and a0, a1, a0
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB8_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB8_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_ord:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: feq.h a0, fa1, fa1
|
||||
; RV64IZFH-NEXT: feq.h a1, fa0, fa0
|
||||
; RV64IZFH-NEXT: and a0, a1, a0
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB8_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB8_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp ord half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -347,7 +347,7 @@ define void @br_fcmp_ueq(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_ueq:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: feq.h a0, fa0, fa1
|
||||
; RV32IZFH-NEXT: feq.h a1, fa1, fa1
|
||||
; RV32IZFH-NEXT: feq.h a2, fa0, fa0
|
||||
@@ -356,16 +356,16 @@ define void @br_fcmp_ueq(half %a, half %b) nounwind {
|
||||
; RV32IZFH-NEXT: or a0, a0, a1
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB9_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB9_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_ueq:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: feq.h a0, fa0, fa1
|
||||
; RV64IZFH-NEXT: feq.h a1, fa1, fa1
|
||||
; RV64IZFH-NEXT: feq.h a2, fa0, fa0
|
||||
@@ -374,11 +374,11 @@ define void @br_fcmp_ueq(half %a, half %b) nounwind {
|
||||
; RV64IZFH-NEXT: or a0, a0, a1
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB9_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB9_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp ueq half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -392,30 +392,30 @@ define void @br_fcmp_ugt(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_ugt:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: fle.h a0, fa0, fa1
|
||||
; RV32IZFH-NEXT: xori a0, a0, 1
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB10_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB10_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_ugt:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: fle.h a0, fa0, fa1
|
||||
; RV64IZFH-NEXT: xori a0, a0, 1
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB10_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB10_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp ugt half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -429,30 +429,30 @@ define void @br_fcmp_uge(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_uge:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: flt.h a0, fa0, fa1
|
||||
; RV32IZFH-NEXT: xori a0, a0, 1
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB11_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB11_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_uge:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: flt.h a0, fa0, fa1
|
||||
; RV64IZFH-NEXT: xori a0, a0, 1
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB11_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB11_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp uge half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -466,30 +466,30 @@ define void @br_fcmp_ult(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_ult:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: fle.h a0, fa1, fa0
|
||||
; RV32IZFH-NEXT: xori a0, a0, 1
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB12_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB12_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_ult:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: fle.h a0, fa1, fa0
|
||||
; RV64IZFH-NEXT: xori a0, a0, 1
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB12_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB12_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp ult half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -503,30 +503,30 @@ define void @br_fcmp_ule(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_ule:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: flt.h a0, fa1, fa0
|
||||
; RV32IZFH-NEXT: xori a0, a0, 1
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB13_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB13_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_ule:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: flt.h a0, fa1, fa0
|
||||
; RV64IZFH-NEXT: xori a0, a0, 1
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB13_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB13_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp ule half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -540,30 +540,30 @@ define void @br_fcmp_une(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_une:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: feq.h a0, fa0, fa1
|
||||
; RV32IZFH-NEXT: xori a0, a0, 1
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB14_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB14_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_une:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: feq.h a0, fa0, fa1
|
||||
; RV64IZFH-NEXT: xori a0, a0, 1
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB14_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB14_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp une half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -578,34 +578,34 @@ define void @br_fcmp_uno(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_uno:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: feq.h a0, fa1, fa1
|
||||
; RV32IZFH-NEXT: feq.h a1, fa0, fa0
|
||||
; RV32IZFH-NEXT: and a0, a1, a0
|
||||
; RV32IZFH-NEXT: seqz a0, a0
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB15_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB15_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_uno:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: feq.h a0, fa1, fa1
|
||||
; RV64IZFH-NEXT: feq.h a1, fa0, fa0
|
||||
; RV64IZFH-NEXT: and a0, a1, a0
|
||||
; RV64IZFH-NEXT: seqz a0, a0
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB15_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB15_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp uno half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
@@ -619,28 +619,28 @@ define void @br_fcmp_true(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: br_fcmp_true:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: addi a0, zero, 1
|
||||
; RV32IZFH-NEXT: bnez a0, .LBB16_2
|
||||
; RV32IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
; RV32IZFH-NEXT: .LBB16_2: # %if.then
|
||||
; RV32IZFH-NEXT: call abort
|
||||
; RV32IZFH-NEXT: call abort@plt
|
||||
;
|
||||
; RV64IZFH-LABEL: br_fcmp_true:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: addi a0, zero, 1
|
||||
; RV64IZFH-NEXT: bnez a0, .LBB16_2
|
||||
; RV64IZFH-NEXT: # %bb.1: # %if.else
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
; RV64IZFH-NEXT: .LBB16_2: # %if.then
|
||||
; RV64IZFH-NEXT: call abort
|
||||
; RV64IZFH-NEXT: call abort@plt
|
||||
%1 = fcmp true half %a, %b
|
||||
br i1 %1, label %if.then, label %if.else
|
||||
if.else:
|
||||
|
||||
@@ -108,18 +108,18 @@ define i64 @fcvt_l_h(half %a) nounwind {
|
||||
; RV32IZFH-LABEL: fcvt_l_h:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: call __fixhfdi
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: call __fixhfdi@plt
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
;
|
||||
; RV32IDZFH-LABEL: fcvt_l_h:
|
||||
; RV32IDZFH: # %bb.0:
|
||||
; RV32IDZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IDZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IDZFH-NEXT: call __fixhfdi
|
||||
; RV32IDZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IDZFH-NEXT: call __fixhfdi@plt
|
||||
; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IDZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IDZFH-NEXT: ret
|
||||
;
|
||||
@@ -140,18 +140,18 @@ define i64 @fcvt_lu_h(half %a) nounwind {
|
||||
; RV32IZFH-LABEL: fcvt_lu_h:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: call __fixunshfdi
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: call __fixunshfdi@plt
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
;
|
||||
; RV32IDZFH-LABEL: fcvt_lu_h:
|
||||
; RV32IDZFH: # %bb.0:
|
||||
; RV32IDZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IDZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IDZFH-NEXT: call __fixunshfdi
|
||||
; RV32IDZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IDZFH-NEXT: call __fixunshfdi@plt
|
||||
; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IDZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IDZFH-NEXT: ret
|
||||
;
|
||||
@@ -288,18 +288,18 @@ define half @fcvt_h_l(i64 %a) nounwind {
|
||||
; RV32IZFH-LABEL: fcvt_h_l:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: call __floatdihf
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: call __floatdihf@plt
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
;
|
||||
; RV32IDZFH-LABEL: fcvt_h_l:
|
||||
; RV32IDZFH: # %bb.0:
|
||||
; RV32IDZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IDZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IDZFH-NEXT: call __floatdihf
|
||||
; RV32IDZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IDZFH-NEXT: call __floatdihf@plt
|
||||
; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IDZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IDZFH-NEXT: ret
|
||||
;
|
||||
@@ -320,18 +320,18 @@ define half @fcvt_h_lu(i64 %a) nounwind {
|
||||
; RV32IZFH-LABEL: fcvt_h_lu:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: call __floatundihf
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: call __floatundihf@plt
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
;
|
||||
; RV32IDZFH-LABEL: fcvt_h_lu:
|
||||
; RV32IDZFH: # %bb.0:
|
||||
; RV32IDZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IDZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IDZFH-NEXT: call __floatundihf
|
||||
; RV32IDZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IDZFH-NEXT: call __floatundihf@plt
|
||||
; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IDZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IDZFH-NEXT: ret
|
||||
;
|
||||
@@ -400,9 +400,9 @@ define half @fcvt_h_d(double %a) nounwind {
|
||||
; RV32IZFH-LABEL: fcvt_h_d:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: call __truncdfhf2
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: call __truncdfhf2@plt
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
;
|
||||
@@ -414,9 +414,9 @@ define half @fcvt_h_d(double %a) nounwind {
|
||||
; RV64IZFH-LABEL: fcvt_h_d:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: call __truncdfhf2
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: call __truncdfhf2@plt
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
;
|
||||
@@ -432,10 +432,10 @@ define double @fcvt_d_h(half %a) nounwind {
|
||||
; RV32IZFH-LABEL: fcvt_d_h:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
|
||||
; RV32IZFH-NEXT: call __extendsfdf2
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: call __extendsfdf2@plt
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
;
|
||||
@@ -447,10 +447,10 @@ define double @fcvt_d_h(half %a) nounwind {
|
||||
; RV64IZFH-LABEL: fcvt_d_h:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: fcvt.s.h fa0, fa0
|
||||
; RV64IZFH-NEXT: call __extendsfdf2
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: call __extendsfdf2@plt
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -118,30 +118,30 @@ define half @flh_stack(half %a) nounwind {
|
||||
; RV32IZFH-LABEL: flh_stack:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: fsw fs0, 8(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: fmv.h fs0, fa0
|
||||
; RV32IZFH-NEXT: addi a0, sp, 4
|
||||
; RV32IZFH-NEXT: call notdead
|
||||
; RV32IZFH-NEXT: call notdead@plt
|
||||
; RV32IZFH-NEXT: flh ft0, 4(sp)
|
||||
; RV32IZFH-NEXT: fadd.h fa0, ft0, fs0
|
||||
; RV32IZFH-NEXT: flw fs0, 8(sp)
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
;
|
||||
; RV64IZFH-LABEL: flh_stack:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: fsw fs0, 4(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
|
||||
; RV64IZFH-NEXT: fmv.h fs0, fa0
|
||||
; RV64IZFH-NEXT: mv a0, sp
|
||||
; RV64IZFH-NEXT: call notdead
|
||||
; RV64IZFH-NEXT: call notdead@plt
|
||||
; RV64IZFH-NEXT: flh ft0, 0(sp)
|
||||
; RV64IZFH-NEXT: fadd.h fa0, ft0, fs0
|
||||
; RV64IZFH-NEXT: flw fs0, 4(sp)
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
%1 = alloca half, align 4
|
||||
@@ -156,24 +156,24 @@ define void @fsh_stack(half %a, half %b) nounwind {
|
||||
; RV32IZFH-LABEL: fsh_stack:
|
||||
; RV32IZFH: # %bb.0:
|
||||
; RV32IZFH-NEXT: addi sp, sp, -16
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IZFH-NEXT: fadd.h ft0, fa0, fa1
|
||||
; RV32IZFH-NEXT: fsh ft0, 8(sp)
|
||||
; RV32IZFH-NEXT: addi a0, sp, 8
|
||||
; RV32IZFH-NEXT: call notdead
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp)
|
||||
; RV32IZFH-NEXT: call notdead@plt
|
||||
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IZFH-NEXT: addi sp, sp, 16
|
||||
; RV32IZFH-NEXT: ret
|
||||
;
|
||||
; RV64IZFH-LABEL: fsh_stack:
|
||||
; RV64IZFH: # %bb.0:
|
||||
; RV64IZFH-NEXT: addi sp, sp, -16
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp)
|
||||
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IZFH-NEXT: fadd.h ft0, fa0, fa1
|
||||
; RV64IZFH-NEXT: fsh ft0, 4(sp)
|
||||
; RV64IZFH-NEXT: addi a0, sp, 4
|
||||
; RV64IZFH-NEXT: call notdead
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp)
|
||||
; RV64IZFH-NEXT: call notdead@plt
|
||||
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IZFH-NEXT: addi sp, sp, 16
|
||||
; RV64IZFH-NEXT: ret
|
||||
%1 = fadd half %a, %b ; force store from FPR16
|
||||
|
||||
@@ -128,18 +128,18 @@ define dso_local i32 @load_half() nounwind {
|
||||
; CHECK-LABEL: load_half:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: addi sp, sp, -16
|
||||
; CHECK-NEXT: sw ra, 12(sp)
|
||||
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lui a0, %hi(foo+8)
|
||||
; CHECK-NEXT: lhu a0, %lo(foo+8)(a0)
|
||||
; CHECK-NEXT: addi a1, zero, 140
|
||||
; CHECK-NEXT: bne a0, a1, .LBB7_2
|
||||
; CHECK-NEXT: # %bb.1: # %if.end
|
||||
; CHECK-NEXT: mv a0, zero
|
||||
; CHECK-NEXT: lw ra, 12(sp)
|
||||
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi sp, sp, 16
|
||||
; CHECK-NEXT: ret
|
||||
; CHECK-NEXT: .LBB7_2: # %if.then
|
||||
; CHECK-NEXT: call abort
|
||||
; CHECK-NEXT: call abort@plt
|
||||
entry:
|
||||
%0 = load i16, i16* getelementptr inbounds ([6 x i16], [6 x i16]* @foo, i32 0, i32 4), align 2
|
||||
%cmp = icmp eq i16 %0, 140
|
||||
|
||||
@@ -59,24 +59,24 @@ define i32 @explicit_register_x1(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x1:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv ra, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, ra, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x1:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv ra, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, ra, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x1}"(i32 %a)
|
||||
@@ -88,24 +88,24 @@ define i32 @explicit_register_ra(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_ra:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv ra, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, ra, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_ra:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv ra, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, ra, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{ra}"(i32 %a)
|
||||
@@ -157,24 +157,24 @@ define i32 @explicit_register_x3(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x3:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw gp, 12(sp)
|
||||
; RV32I-NEXT: sw gp, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv gp, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, gp, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw gp, 12(sp)
|
||||
; RV32I-NEXT: lw gp, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x3:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd gp, 8(sp)
|
||||
; RV64I-NEXT: sd gp, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv gp, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, gp, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld gp, 8(sp)
|
||||
; RV64I-NEXT: ld gp, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x3}"(i32 %a)
|
||||
@@ -186,24 +186,24 @@ define i32 @explicit_register_gp(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_gp:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw gp, 12(sp)
|
||||
; RV32I-NEXT: sw gp, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv gp, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, gp, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw gp, 12(sp)
|
||||
; RV32I-NEXT: lw gp, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_gp:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd gp, 8(sp)
|
||||
; RV64I-NEXT: sd gp, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv gp, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, gp, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld gp, 8(sp)
|
||||
; RV64I-NEXT: ld gp, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{gp}"(i32 %a)
|
||||
@@ -215,24 +215,24 @@ define i32 @explicit_register_x4(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x4:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw tp, 12(sp)
|
||||
; RV32I-NEXT: sw tp, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv tp, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, tp, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw tp, 12(sp)
|
||||
; RV32I-NEXT: lw tp, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x4:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd tp, 8(sp)
|
||||
; RV64I-NEXT: sd tp, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv tp, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, tp, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld tp, 8(sp)
|
||||
; RV64I-NEXT: ld tp, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x4}"(i32 %a)
|
||||
@@ -244,24 +244,24 @@ define i32 @explicit_register_tp(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_tp:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw tp, 12(sp)
|
||||
; RV32I-NEXT: sw tp, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv tp, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, tp, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw tp, 12(sp)
|
||||
; RV32I-NEXT: lw tp, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_tp:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd tp, 8(sp)
|
||||
; RV64I-NEXT: sd tp, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv tp, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, tp, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld tp, 8(sp)
|
||||
; RV64I-NEXT: ld tp, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{tp}"(i32 %a)
|
||||
@@ -393,24 +393,24 @@ define i32 @explicit_register_x8(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s0, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s0, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s0, 12(sp)
|
||||
; RV32I-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x8:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s0, 8(sp)
|
||||
; RV64I-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s0, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s0, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x8}"(i32 %a)
|
||||
@@ -422,24 +422,24 @@ define i32 @explicit_register_s0(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s0:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s0, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s0, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s0, 12(sp)
|
||||
; RV32I-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s0:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s0, 8(sp)
|
||||
; RV64I-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s0, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s0, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s0}"(i32 %a)
|
||||
@@ -451,24 +451,24 @@ define i32 @explicit_register_fp(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_fp:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s0, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s0, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s0, 12(sp)
|
||||
; RV32I-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_fp:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s0, 8(sp)
|
||||
; RV64I-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s0, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s0, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{fp}"(i32 %a)
|
||||
@@ -480,24 +480,24 @@ define i32 @explicit_register_x9(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x9:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s1, 12(sp)
|
||||
; RV32I-NEXT: sw s1, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s1, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s1, 12(sp)
|
||||
; RV32I-NEXT: lw s1, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x9:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s1, 8(sp)
|
||||
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s1, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s1, 8(sp)
|
||||
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x9}"(i32 %a)
|
||||
@@ -509,24 +509,24 @@ define i32 @explicit_register_s1(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s1:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s1, 12(sp)
|
||||
; RV32I-NEXT: sw s1, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s1, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s1, 12(sp)
|
||||
; RV32I-NEXT: lw s1, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s1:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s1, 8(sp)
|
||||
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s1, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s1, 8(sp)
|
||||
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s1}"(i32 %a)
|
||||
@@ -854,24 +854,24 @@ define i32 @explicit_register_x18(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x18:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s2, 12(sp)
|
||||
; RV32I-NEXT: sw s2, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s2, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s2, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s2, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x18:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s2, 8(sp)
|
||||
; RV64I-NEXT: sd s2, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s2, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s2, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s2, 8(sp)
|
||||
; RV64I-NEXT: ld s2, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x18}"(i32 %a)
|
||||
@@ -883,24 +883,24 @@ define i32 @explicit_register_s2(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s2:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s2, 12(sp)
|
||||
; RV32I-NEXT: sw s2, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s2, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s2, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s2, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s2:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s2, 8(sp)
|
||||
; RV64I-NEXT: sd s2, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s2, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s2, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s2, 8(sp)
|
||||
; RV64I-NEXT: ld s2, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s2}"(i32 %a)
|
||||
@@ -912,24 +912,24 @@ define i32 @explicit_register_x19(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x19:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s3, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s3, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x19:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s3, 8(sp)
|
||||
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s3, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s3, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s3, 8(sp)
|
||||
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x19}"(i32 %a)
|
||||
@@ -941,24 +941,24 @@ define i32 @explicit_register_s3(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s3:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s3, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s3, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s3:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s3, 8(sp)
|
||||
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s3, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s3, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s3, 8(sp)
|
||||
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s3}"(i32 %a)
|
||||
@@ -970,24 +970,24 @@ define i32 @explicit_register_x20(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x20:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s4, 12(sp)
|
||||
; RV32I-NEXT: sw s4, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s4, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s4, 12(sp)
|
||||
; RV32I-NEXT: lw s4, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x20:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s4, 8(sp)
|
||||
; RV64I-NEXT: sd s4, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s4, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s4, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s4, 8(sp)
|
||||
; RV64I-NEXT: ld s4, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x20}"(i32 %a)
|
||||
@@ -999,24 +999,24 @@ define i32 @explicit_register_s4(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s4:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s4, 12(sp)
|
||||
; RV32I-NEXT: sw s4, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s4, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s4, 12(sp)
|
||||
; RV32I-NEXT: lw s4, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s4:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s4, 8(sp)
|
||||
; RV64I-NEXT: sd s4, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s4, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s4, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s4, 8(sp)
|
||||
; RV64I-NEXT: ld s4, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s4}"(i32 %a)
|
||||
@@ -1028,24 +1028,24 @@ define i32 @explicit_register_x21(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x21:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s5, 12(sp)
|
||||
; RV32I-NEXT: sw s5, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s5, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s5, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s5, 12(sp)
|
||||
; RV32I-NEXT: lw s5, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x21:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s5, 8(sp)
|
||||
; RV64I-NEXT: sd s5, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s5, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s5, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s5, 8(sp)
|
||||
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x21}"(i32 %a)
|
||||
@@ -1057,24 +1057,24 @@ define i32 @explicit_register_s5(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s5:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s5, 12(sp)
|
||||
; RV32I-NEXT: sw s5, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s5, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s5, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s5, 12(sp)
|
||||
; RV32I-NEXT: lw s5, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s5:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s5, 8(sp)
|
||||
; RV64I-NEXT: sd s5, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s5, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s5, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s5, 8(sp)
|
||||
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s5}"(i32 %a)
|
||||
@@ -1086,24 +1086,24 @@ define i32 @explicit_register_x22(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x22:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s6, 12(sp)
|
||||
; RV32I-NEXT: sw s6, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s6, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s6, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s6, 12(sp)
|
||||
; RV32I-NEXT: lw s6, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x22:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s6, 8(sp)
|
||||
; RV64I-NEXT: sd s6, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s6, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s6, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s6, 8(sp)
|
||||
; RV64I-NEXT: ld s6, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x22}"(i32 %a)
|
||||
@@ -1115,24 +1115,24 @@ define i32 @explicit_register_s6(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s6:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s6, 12(sp)
|
||||
; RV32I-NEXT: sw s6, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s6, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s6, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s6, 12(sp)
|
||||
; RV32I-NEXT: lw s6, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s6:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s6, 8(sp)
|
||||
; RV64I-NEXT: sd s6, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s6, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s6, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s6, 8(sp)
|
||||
; RV64I-NEXT: ld s6, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s6}"(i32 %a)
|
||||
@@ -1144,24 +1144,24 @@ define i32 @explicit_register_x23(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x23:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s7, 12(sp)
|
||||
; RV32I-NEXT: sw s7, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s7, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s7, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s7, 12(sp)
|
||||
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x23:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s7, 8(sp)
|
||||
; RV64I-NEXT: sd s7, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s7, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s7, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s7, 8(sp)
|
||||
; RV64I-NEXT: ld s7, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x23}"(i32 %a)
|
||||
@@ -1173,24 +1173,24 @@ define i32 @explicit_register_s7(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s7:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s7, 12(sp)
|
||||
; RV32I-NEXT: sw s7, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s7, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s7, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s7, 12(sp)
|
||||
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s7:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s7, 8(sp)
|
||||
; RV64I-NEXT: sd s7, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s7, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s7, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s7, 8(sp)
|
||||
; RV64I-NEXT: ld s7, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s7}"(i32 %a)
|
||||
@@ -1202,24 +1202,24 @@ define i32 @explicit_register_x24(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x24:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s8, 12(sp)
|
||||
; RV32I-NEXT: sw s8, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s8, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s8, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s8, 12(sp)
|
||||
; RV32I-NEXT: lw s8, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x24:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s8, 8(sp)
|
||||
; RV64I-NEXT: sd s8, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s8, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s8, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s8, 8(sp)
|
||||
; RV64I-NEXT: ld s8, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x24}"(i32 %a)
|
||||
@@ -1231,24 +1231,24 @@ define i32 @explicit_register_s8(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s8:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s8, 12(sp)
|
||||
; RV32I-NEXT: sw s8, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s8, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s8, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s8, 12(sp)
|
||||
; RV32I-NEXT: lw s8, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s8:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s8, 8(sp)
|
||||
; RV64I-NEXT: sd s8, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s8, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s8, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s8, 8(sp)
|
||||
; RV64I-NEXT: ld s8, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s8}"(i32 %a)
|
||||
@@ -1260,24 +1260,24 @@ define i32 @explicit_register_x25(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x25:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s9, 12(sp)
|
||||
; RV32I-NEXT: sw s9, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s9, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s9, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s9, 12(sp)
|
||||
; RV32I-NEXT: lw s9, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x25:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s9, 8(sp)
|
||||
; RV64I-NEXT: sd s9, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s9, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s9, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s9, 8(sp)
|
||||
; RV64I-NEXT: ld s9, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x25}"(i32 %a)
|
||||
@@ -1289,24 +1289,24 @@ define i32 @explicit_register_s9(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s9:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s9, 12(sp)
|
||||
; RV32I-NEXT: sw s9, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s9, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s9, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s9, 12(sp)
|
||||
; RV32I-NEXT: lw s9, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s9:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s9, 8(sp)
|
||||
; RV64I-NEXT: sd s9, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s9, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s9, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s9, 8(sp)
|
||||
; RV64I-NEXT: ld s9, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s9}"(i32 %a)
|
||||
@@ -1318,24 +1318,24 @@ define i32 @explicit_register_x26(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x26:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s10, 12(sp)
|
||||
; RV32I-NEXT: sw s10, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s10, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s10, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s10, 12(sp)
|
||||
; RV32I-NEXT: lw s10, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x26:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s10, 8(sp)
|
||||
; RV64I-NEXT: sd s10, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s10, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s10, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s10, 8(sp)
|
||||
; RV64I-NEXT: ld s10, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x26}"(i32 %a)
|
||||
@@ -1347,24 +1347,24 @@ define i32 @explicit_register_s10(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s10:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s10, 12(sp)
|
||||
; RV32I-NEXT: sw s10, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s10, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s10, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s10, 12(sp)
|
||||
; RV32I-NEXT: lw s10, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s10:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s10, 8(sp)
|
||||
; RV64I-NEXT: sd s10, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s10, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s10, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s10, 8(sp)
|
||||
; RV64I-NEXT: ld s10, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s10}"(i32 %a)
|
||||
@@ -1376,24 +1376,24 @@ define i32 @explicit_register_x27(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_x27:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s11, 12(sp)
|
||||
; RV32I-NEXT: sw s11, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s11, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s11, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s11, 12(sp)
|
||||
; RV32I-NEXT: lw s11, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_x27:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s11, 8(sp)
|
||||
; RV64I-NEXT: sd s11, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s11, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s11, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s11, 8(sp)
|
||||
; RV64I-NEXT: ld s11, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{x27}"(i32 %a)
|
||||
@@ -1405,24 +1405,24 @@ define i32 @explicit_register_s11(i32 %a) nounwind {
|
||||
; RV32I-LABEL: explicit_register_s11:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw s11, 12(sp)
|
||||
; RV32I-NEXT: sw s11, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s11, a0
|
||||
; RV32I-NEXT: #APP
|
||||
; RV32I-NEXT: addi a0, s11, 0
|
||||
; RV32I-NEXT: #NO_APP
|
||||
; RV32I-NEXT: lw s11, 12(sp)
|
||||
; RV32I-NEXT: lw s11, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: explicit_register_s11:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd s11, 8(sp)
|
||||
; RV64I-NEXT: sd s11, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s11, a0
|
||||
; RV64I-NEXT: #APP
|
||||
; RV64I-NEXT: addi a0, s11, 0
|
||||
; RV64I-NEXT: #NO_APP
|
||||
; RV64I-NEXT: ld s11, 8(sp)
|
||||
; RV64I-NEXT: ld s11, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = tail call i32 asm "addi $0, $1, 0", "=r,{s11}"(i32 %a)
|
||||
|
||||
@@ -341,24 +341,24 @@ define i32 @explicit_register_f8(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f8:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs0, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs0, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs0
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs0, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f8:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs0, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs0, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs0
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs0, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f8}"(double %a)
|
||||
@@ -370,24 +370,24 @@ define i32 @explicit_register_fs0(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs0:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs0, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs0, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs0
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs0, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs0:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs0, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs0, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs0
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs0, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs0}"(double %a)
|
||||
@@ -399,24 +399,24 @@ define i32 @explicit_register_f9(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f9:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs1, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs1, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs1
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs1, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f9:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs1, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs1, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs1
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs1, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f9}"(double %a)
|
||||
@@ -428,24 +428,24 @@ define i32 @explicit_register_fs1(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs1:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs1, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs1, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs1
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs1, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs1:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs1, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs1, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs1
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs1, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs1}"(double %a)
|
||||
@@ -773,24 +773,24 @@ define i32 @explicit_register_f18(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f18:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs2, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs2, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs2, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs2
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs2, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs2, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f18:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs2, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs2, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs2, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs2
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs2, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs2, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f18}"(double %a)
|
||||
@@ -802,24 +802,24 @@ define i32 @explicit_register_fs2(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs2:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs2, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs2, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs2, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs2
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs2, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs2, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs2:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs2, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs2, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs2, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs2
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs2, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs2, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs2}"(double %a)
|
||||
@@ -831,24 +831,24 @@ define i32 @explicit_register_f19(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f19:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs3, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs3, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs3
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs3, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs3, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f19:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs3, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs3, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs3
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs3, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs3, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f19}"(double %a)
|
||||
@@ -860,24 +860,24 @@ define i32 @explicit_register_fs3(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs3:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs3, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs3, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs3
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs3, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs3, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs3:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs3, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs3, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs3
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs3, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs3, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs3}"(double %a)
|
||||
@@ -889,24 +889,24 @@ define i32 @explicit_register_f20(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f20:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs4, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs4, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs4, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs4
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs4, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs4, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f20:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs4, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs4, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs4, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs4
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs4, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs4, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f20}"(double %a)
|
||||
@@ -918,24 +918,24 @@ define i32 @explicit_register_fs4(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs4:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs4, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs4, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs4, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs4
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs4, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs4, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs4:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs4, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs4, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs4, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs4
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs4, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs4, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs4}"(double %a)
|
||||
@@ -947,24 +947,24 @@ define i32 @explicit_register_f21(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f21:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs5, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs5, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs5, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs5
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs5, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs5, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f21:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs5, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs5, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs5, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs5
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs5, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs5, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f21}"(double %a)
|
||||
@@ -976,24 +976,24 @@ define i32 @explicit_register_fs5(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs5:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs5, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs5, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs5, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs5
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs5, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs5, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs5:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs5, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs5, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs5, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs5
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs5, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs5, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs5}"(double %a)
|
||||
@@ -1005,24 +1005,24 @@ define i32 @explicit_register_f22(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f22:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs6, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs6, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs6, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs6
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs6, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs6, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f22:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs6, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs6, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs6, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs6
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs6, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs6, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f22}"(double %a)
|
||||
@@ -1034,24 +1034,24 @@ define i32 @explicit_register_fs6(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs6:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs6, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs6, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs6, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs6
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs6, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs6, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs6:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs6, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs6, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs6, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs6
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs6, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs6, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs6}"(double %a)
|
||||
@@ -1063,24 +1063,24 @@ define i32 @explicit_register_f23(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f23:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs7, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs7, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs7, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs7
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs7, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs7, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f23:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs7, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs7, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs7, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs7
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs7, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs7, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f23}"(double %a)
|
||||
@@ -1092,24 +1092,24 @@ define i32 @explicit_register_fs7(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs7:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs7, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs7, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs7, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs7
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs7, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs7, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs7:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs7, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs7, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs7, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs7
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs7, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs7, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs7}"(double %a)
|
||||
@@ -1121,24 +1121,24 @@ define i32 @explicit_register_f24(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f24:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs8, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs8, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs8, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs8
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs8, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs8, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f24:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs8, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs8, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs8, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs8
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs8, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs8, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f24}"(double %a)
|
||||
@@ -1150,24 +1150,24 @@ define i32 @explicit_register_fs8(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs8:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs8, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs8, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs8, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs8
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs8, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs8, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs8:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs8, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs8, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs8, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs8
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs8, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs8, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs8}"(double %a)
|
||||
@@ -1179,24 +1179,24 @@ define i32 @explicit_register_f25(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f25:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs9, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs9, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs9, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs9
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs9, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs9, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f25:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs9, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs9, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs9, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs9
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs9, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs9, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f25}"(double %a)
|
||||
@@ -1208,24 +1208,24 @@ define i32 @explicit_register_fs9(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs9:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs9, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs9, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs9, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs9
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs9, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs9, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs9:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs9, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs9, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs9, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs9
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs9, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs9, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs9}"(double %a)
|
||||
@@ -1237,24 +1237,24 @@ define i32 @explicit_register_f26(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f26:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs10, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs10, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs10
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs10, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f26:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs10, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs10, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs10
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs10, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f26}"(double %a)
|
||||
@@ -1266,24 +1266,24 @@ define i32 @explicit_register_fs10(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs10:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs10, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs10, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs10
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs10, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs10:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs10, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs10, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs10
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs10, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs10}"(double %a)
|
||||
@@ -1295,24 +1295,24 @@ define i32 @explicit_register_f27(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_f27:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs11, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs11, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs11
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs11, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_f27:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs11, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs11, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs11
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs11, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f27}"(double %a)
|
||||
@@ -1324,24 +1324,24 @@ define i32 @explicit_register_fs11(double %a) nounwind {
|
||||
; RV32IFD-LABEL: explicit_register_fs11:
|
||||
; RV32IFD: # %bb.0:
|
||||
; RV32IFD-NEXT: addi sp, sp, -16
|
||||
; RV32IFD-NEXT: fsd fs11, 8(sp)
|
||||
; RV32IFD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill
|
||||
; RV32IFD-NEXT: fmv.d fs11, fa0
|
||||
; RV32IFD-NEXT: #APP
|
||||
; RV32IFD-NEXT: fcvt.w.d a0, fs11
|
||||
; RV32IFD-NEXT: #NO_APP
|
||||
; RV32IFD-NEXT: fld fs11, 8(sp)
|
||||
; RV32IFD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
|
||||
; RV32IFD-NEXT: addi sp, sp, 16
|
||||
; RV32IFD-NEXT: ret
|
||||
;
|
||||
; RV64IFD-LABEL: explicit_register_fs11:
|
||||
; RV64IFD: # %bb.0:
|
||||
; RV64IFD-NEXT: addi sp, sp, -16
|
||||
; RV64IFD-NEXT: fsd fs11, 8(sp)
|
||||
; RV64IFD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IFD-NEXT: fmv.d fs11, fa0
|
||||
; RV64IFD-NEXT: #APP
|
||||
; RV64IFD-NEXT: fcvt.w.d a0, fs11
|
||||
; RV64IFD-NEXT: #NO_APP
|
||||
; RV64IFD-NEXT: fld fs11, 8(sp)
|
||||
; RV64IFD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IFD-NEXT: addi sp, sp, 16
|
||||
; RV64IFD-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs11}"(double %a)
|
||||
|
||||
@@ -341,24 +341,24 @@ define i32 @explicit_register_f8(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f8:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs0, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs0, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs0, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs0
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs0, 12(sp)
|
||||
; RV32IF-NEXT: flw fs0, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f8:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs0, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs0, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs0, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs0
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs0, 12(sp)
|
||||
; RV64IF-NEXT: flw fs0, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f8}"(float %a)
|
||||
@@ -370,24 +370,24 @@ define i32 @explicit_register_fs0(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs0:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs0, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs0, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs0, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs0
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs0, 12(sp)
|
||||
; RV32IF-NEXT: flw fs0, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs0:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs0, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs0, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs0, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs0
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs0, 12(sp)
|
||||
; RV64IF-NEXT: flw fs0, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs0}"(float %a)
|
||||
@@ -399,24 +399,24 @@ define i32 @explicit_register_f9(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f9:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs1, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs1, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs1, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs1
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs1, 12(sp)
|
||||
; RV32IF-NEXT: flw fs1, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f9:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs1, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs1, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs1, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs1
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs1, 12(sp)
|
||||
; RV64IF-NEXT: flw fs1, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f9}"(float %a)
|
||||
@@ -428,24 +428,24 @@ define i32 @explicit_register_fs1(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs1:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs1, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs1, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs1, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs1
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs1, 12(sp)
|
||||
; RV32IF-NEXT: flw fs1, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs1:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs1, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs1, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs1, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs1
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs1, 12(sp)
|
||||
; RV64IF-NEXT: flw fs1, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs1}"(float %a)
|
||||
@@ -773,24 +773,24 @@ define i32 @explicit_register_f18(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f18:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs2, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs2, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs2, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs2
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs2, 12(sp)
|
||||
; RV32IF-NEXT: flw fs2, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f18:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs2, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs2, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs2, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs2
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs2, 12(sp)
|
||||
; RV64IF-NEXT: flw fs2, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f18}"(float %a)
|
||||
@@ -802,24 +802,24 @@ define i32 @explicit_register_fs2(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs2:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs2, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs2, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs2, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs2
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs2, 12(sp)
|
||||
; RV32IF-NEXT: flw fs2, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs2:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs2, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs2, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs2, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs2
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs2, 12(sp)
|
||||
; RV64IF-NEXT: flw fs2, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs2}"(float %a)
|
||||
@@ -831,24 +831,24 @@ define i32 @explicit_register_f19(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f19:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs3, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs3, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs3
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs3, 12(sp)
|
||||
; RV32IF-NEXT: flw fs3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f19:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs3, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs3, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs3, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs3
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs3, 12(sp)
|
||||
; RV64IF-NEXT: flw fs3, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f19}"(float %a)
|
||||
@@ -860,24 +860,24 @@ define i32 @explicit_register_fs3(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs3:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs3, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs3, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs3
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs3, 12(sp)
|
||||
; RV32IF-NEXT: flw fs3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs3:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs3, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs3, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs3, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs3
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs3, 12(sp)
|
||||
; RV64IF-NEXT: flw fs3, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs3}"(float %a)
|
||||
@@ -889,24 +889,24 @@ define i32 @explicit_register_f20(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f20:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs4, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs4, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs4, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs4
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs4, 12(sp)
|
||||
; RV32IF-NEXT: flw fs4, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f20:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs4, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs4, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs4, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs4
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs4, 12(sp)
|
||||
; RV64IF-NEXT: flw fs4, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f20}"(float %a)
|
||||
@@ -918,24 +918,24 @@ define i32 @explicit_register_fs4(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs4:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs4, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs4, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs4, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs4
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs4, 12(sp)
|
||||
; RV32IF-NEXT: flw fs4, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs4:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs4, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs4, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs4, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs4
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs4, 12(sp)
|
||||
; RV64IF-NEXT: flw fs4, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs4}"(float %a)
|
||||
@@ -947,24 +947,24 @@ define i32 @explicit_register_f21(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f21:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs5, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs5, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs5, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs5
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs5, 12(sp)
|
||||
; RV32IF-NEXT: flw fs5, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f21:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs5, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs5, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs5, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs5
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs5, 12(sp)
|
||||
; RV64IF-NEXT: flw fs5, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f21}"(float %a)
|
||||
@@ -976,24 +976,24 @@ define i32 @explicit_register_fs5(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs5:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs5, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs5, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs5, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs5
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs5, 12(sp)
|
||||
; RV32IF-NEXT: flw fs5, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs5:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs5, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs5, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs5, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs5
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs5, 12(sp)
|
||||
; RV64IF-NEXT: flw fs5, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs5}"(float %a)
|
||||
@@ -1005,24 +1005,24 @@ define i32 @explicit_register_f22(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f22:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs6, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs6, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs6, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs6
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs6, 12(sp)
|
||||
; RV32IF-NEXT: flw fs6, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f22:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs6, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs6, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs6, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs6
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs6, 12(sp)
|
||||
; RV64IF-NEXT: flw fs6, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f22}"(float %a)
|
||||
@@ -1034,24 +1034,24 @@ define i32 @explicit_register_fs6(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs6:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs6, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs6, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs6, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs6
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs6, 12(sp)
|
||||
; RV32IF-NEXT: flw fs6, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs6:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs6, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs6, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs6, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs6
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs6, 12(sp)
|
||||
; RV64IF-NEXT: flw fs6, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs6}"(float %a)
|
||||
@@ -1063,24 +1063,24 @@ define i32 @explicit_register_f23(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f23:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs7, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs7, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs7, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs7
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs7, 12(sp)
|
||||
; RV32IF-NEXT: flw fs7, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f23:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs7, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs7, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs7, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs7
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs7, 12(sp)
|
||||
; RV64IF-NEXT: flw fs7, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f23}"(float %a)
|
||||
@@ -1092,24 +1092,24 @@ define i32 @explicit_register_fs7(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs7:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs7, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs7, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs7, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs7
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs7, 12(sp)
|
||||
; RV32IF-NEXT: flw fs7, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs7:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs7, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs7, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs7, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs7
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs7, 12(sp)
|
||||
; RV64IF-NEXT: flw fs7, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs7}"(float %a)
|
||||
@@ -1121,24 +1121,24 @@ define i32 @explicit_register_f24(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f24:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs8, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs8, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs8, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs8
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs8, 12(sp)
|
||||
; RV32IF-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f24:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs8, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs8, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs8, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs8
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs8, 12(sp)
|
||||
; RV64IF-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f24}"(float %a)
|
||||
@@ -1150,24 +1150,24 @@ define i32 @explicit_register_fs8(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs8:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs8, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs8, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs8, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs8
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs8, 12(sp)
|
||||
; RV32IF-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs8:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs8, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs8, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs8, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs8
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs8, 12(sp)
|
||||
; RV64IF-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs8}"(float %a)
|
||||
@@ -1179,24 +1179,24 @@ define i32 @explicit_register_f25(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f25:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs9, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs9, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs9, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs9
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs9, 12(sp)
|
||||
; RV32IF-NEXT: flw fs9, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f25:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs9, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs9, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs9, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs9
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs9, 12(sp)
|
||||
; RV64IF-NEXT: flw fs9, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f25}"(float %a)
|
||||
@@ -1208,24 +1208,24 @@ define i32 @explicit_register_fs9(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs9:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs9, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs9, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs9, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs9
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs9, 12(sp)
|
||||
; RV32IF-NEXT: flw fs9, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs9:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs9, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs9, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs9, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs9
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs9, 12(sp)
|
||||
; RV64IF-NEXT: flw fs9, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs9}"(float %a)
|
||||
@@ -1237,24 +1237,24 @@ define i32 @explicit_register_f26(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f26:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs10, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs10, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs10, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs10
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs10, 12(sp)
|
||||
; RV32IF-NEXT: flw fs10, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f26:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs10, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs10, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs10, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs10
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs10, 12(sp)
|
||||
; RV64IF-NEXT: flw fs10, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f26}"(float %a)
|
||||
@@ -1266,24 +1266,24 @@ define i32 @explicit_register_fs10(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs10:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs10, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs10, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs10, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs10
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs10, 12(sp)
|
||||
; RV32IF-NEXT: flw fs10, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs10:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs10, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs10, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs10, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs10
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs10, 12(sp)
|
||||
; RV64IF-NEXT: flw fs10, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs10}"(float %a)
|
||||
@@ -1295,24 +1295,24 @@ define i32 @explicit_register_f27(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_f27:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs11, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs11, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs11, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs11
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs11, 12(sp)
|
||||
; RV32IF-NEXT: flw fs11, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_f27:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs11, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs11, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs11, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs11
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs11, 12(sp)
|
||||
; RV64IF-NEXT: flw fs11, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{f27}"(float %a)
|
||||
@@ -1324,24 +1324,24 @@ define i32 @explicit_register_fs11(float %a) nounwind {
|
||||
; RV32IF-LABEL: explicit_register_fs11:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: fsw fs11, 12(sp)
|
||||
; RV32IF-NEXT: fsw fs11, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: fmv.s fs11, fa0
|
||||
; RV32IF-NEXT: #APP
|
||||
; RV32IF-NEXT: fcvt.w.s a0, fs11
|
||||
; RV32IF-NEXT: #NO_APP
|
||||
; RV32IF-NEXT: flw fs11, 12(sp)
|
||||
; RV32IF-NEXT: flw fs11, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: explicit_register_fs11:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: fsw fs11, 12(sp)
|
||||
; RV64IF-NEXT: fsw fs11, 12(sp) # 4-byte Folded Spill
|
||||
; RV64IF-NEXT: fmv.s fs11, fa0
|
||||
; RV64IF-NEXT: #APP
|
||||
; RV64IF-NEXT: fcvt.w.s a0, fs11
|
||||
; RV64IF-NEXT: #NO_APP
|
||||
; RV64IF-NEXT: flw fs11, 12(sp)
|
||||
; RV64IF-NEXT: flw fs11, 12(sp) # 4-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = tail call i32 asm "fcvt.w.s $0, $1", "=r,{fs11}"(float %a)
|
||||
|
||||
@@ -14,50 +14,50 @@ define dso_local void @handler() nounwind {
|
||||
; CHECK-RV32-LABEL: handler:
|
||||
; CHECK-RV32: # %bb.0: # %entry
|
||||
; CHECK-RV32-NEXT: addi sp, sp, -16
|
||||
; CHECK-RV32-NEXT: sw ra, 12(sp)
|
||||
; CHECK-RV32-NEXT: sw s0, 8(sp)
|
||||
; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; CHECK-RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; CHECK-RV32-NEXT: lui a0, 2
|
||||
; CHECK-RV32-NEXT: addi a0, a0, 4
|
||||
; CHECK-RV32-NEXT: call read
|
||||
; CHECK-RV32-NEXT: call read@plt
|
||||
; CHECK-RV32-NEXT: mv s0, a0
|
||||
; CHECK-RV32-NEXT: call callee
|
||||
; CHECK-RV32-NEXT: call callee@plt
|
||||
; CHECK-RV32-NEXT: mv a0, s0
|
||||
; CHECK-RV32-NEXT: lw s0, 8(sp)
|
||||
; CHECK-RV32-NEXT: lw ra, 12(sp)
|
||||
; CHECK-RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; CHECK-RV32-NEXT: addi sp, sp, 16
|
||||
; CHECK-RV32-NEXT: tail write
|
||||
; CHECK-RV32-NEXT: tail write@plt
|
||||
;
|
||||
; CHECK-RV32-F-LABEL: handler:
|
||||
; CHECK-RV32-F: # %bb.0: # %entry
|
||||
; CHECK-RV32-F-NEXT: addi sp, sp, -16
|
||||
; CHECK-RV32-F-NEXT: sw ra, 12(sp)
|
||||
; CHECK-RV32-F-NEXT: sw s0, 8(sp)
|
||||
; CHECK-RV32-F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; CHECK-RV32-F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; CHECK-RV32-F-NEXT: lui a0, 2
|
||||
; CHECK-RV32-F-NEXT: addi a0, a0, 4
|
||||
; CHECK-RV32-F-NEXT: call read
|
||||
; CHECK-RV32-F-NEXT: call read@plt
|
||||
; CHECK-RV32-F-NEXT: mv s0, a0
|
||||
; CHECK-RV32-F-NEXT: call callee
|
||||
; CHECK-RV32-F-NEXT: call callee@plt
|
||||
; CHECK-RV32-F-NEXT: mv a0, s0
|
||||
; CHECK-RV32-F-NEXT: lw s0, 8(sp)
|
||||
; CHECK-RV32-F-NEXT: lw ra, 12(sp)
|
||||
; CHECK-RV32-F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; CHECK-RV32-F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; CHECK-RV32-F-NEXT: addi sp, sp, 16
|
||||
; CHECK-RV32-F-NEXT: tail write
|
||||
; CHECK-RV32-F-NEXT: tail write@plt
|
||||
;
|
||||
; CHECK-RV32-FD-LABEL: handler:
|
||||
; CHECK-RV32-FD: # %bb.0: # %entry
|
||||
; CHECK-RV32-FD-NEXT: addi sp, sp, -16
|
||||
; CHECK-RV32-FD-NEXT: sw ra, 12(sp)
|
||||
; CHECK-RV32-FD-NEXT: sw s0, 8(sp)
|
||||
; CHECK-RV32-FD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; CHECK-RV32-FD-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; CHECK-RV32-FD-NEXT: lui a0, 2
|
||||
; CHECK-RV32-FD-NEXT: addi a0, a0, 4
|
||||
; CHECK-RV32-FD-NEXT: call read
|
||||
; CHECK-RV32-FD-NEXT: call read@plt
|
||||
; CHECK-RV32-FD-NEXT: mv s0, a0
|
||||
; CHECK-RV32-FD-NEXT: call callee
|
||||
; CHECK-RV32-FD-NEXT: call callee@plt
|
||||
; CHECK-RV32-FD-NEXT: mv a0, s0
|
||||
; CHECK-RV32-FD-NEXT: lw s0, 8(sp)
|
||||
; CHECK-RV32-FD-NEXT: lw ra, 12(sp)
|
||||
; CHECK-RV32-FD-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; CHECK-RV32-FD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; CHECK-RV32-FD-NEXT: addi sp, sp, 16
|
||||
; CHECK-RV32-FD-NEXT: tail write
|
||||
; CHECK-RV32-FD-NEXT: tail write@plt
|
||||
entry:
|
||||
%call = tail call i32 @read(i32 8196)
|
||||
tail call void bitcast (void (...)* @callee to void ()*)()
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -22,8 +22,8 @@ define void @test() {
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -2032
|
||||
; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032
|
||||
; RV32I-WITHFP-NEXT: sw ra, 2028(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 2024(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: .cfi_offset ra, -4
|
||||
; RV32I-WITHFP-NEXT: .cfi_offset s0, -8
|
||||
; RV32I-WITHFP-NEXT: addi s0, sp, 2032
|
||||
@@ -34,8 +34,8 @@ define void @test() {
|
||||
; RV32I-WITHFP-NEXT: lui a0, 74565
|
||||
; RV32I-WITHFP-NEXT: addi a0, a0, -352
|
||||
; RV32I-WITHFP-NEXT: add sp, sp, a0
|
||||
; RV32I-WITHFP-NEXT: lw s0, 2024(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 2028(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 2032
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%tmp = alloca [ 305419896 x i8 ] , align 4
|
||||
@@ -50,8 +50,8 @@ define void @test_emergency_spill_slot(i32 %a) {
|
||||
; RV32I-FPELIM: # %bb.0:
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, -2032
|
||||
; RV32I-FPELIM-NEXT: .cfi_def_cfa_offset 2032
|
||||
; RV32I-FPELIM-NEXT: sw s0, 2028(sp)
|
||||
; RV32I-FPELIM-NEXT: sw s1, 2024(sp)
|
||||
; RV32I-FPELIM-NEXT: sw s0, 2028(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: sw s1, 2024(sp) # 4-byte Folded Spill
|
||||
; RV32I-FPELIM-NEXT: .cfi_offset s0, -4
|
||||
; RV32I-FPELIM-NEXT: .cfi_offset s1, -8
|
||||
; RV32I-FPELIM-NEXT: lui a1, 97
|
||||
@@ -74,8 +74,8 @@ define void @test_emergency_spill_slot(i32 %a) {
|
||||
; RV32I-FPELIM-NEXT: lui a0, 97
|
||||
; RV32I-FPELIM-NEXT: addi a0, a0, 672
|
||||
; RV32I-FPELIM-NEXT: add sp, sp, a0
|
||||
; RV32I-FPELIM-NEXT: lw s1, 2024(sp)
|
||||
; RV32I-FPELIM-NEXT: lw s0, 2028(sp)
|
||||
; RV32I-FPELIM-NEXT: lw s1, 2024(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: lw s0, 2028(sp) # 4-byte Folded Reload
|
||||
; RV32I-FPELIM-NEXT: addi sp, sp, 2032
|
||||
; RV32I-FPELIM-NEXT: ret
|
||||
;
|
||||
@@ -83,10 +83,10 @@ define void @test_emergency_spill_slot(i32 %a) {
|
||||
; RV32I-WITHFP: # %bb.0:
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, -2032
|
||||
; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032
|
||||
; RV32I-WITHFP-NEXT: sw ra, 2028(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s0, 2024(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s1, 2020(sp)
|
||||
; RV32I-WITHFP-NEXT: sw s2, 2016(sp)
|
||||
; RV32I-WITHFP-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s1, 2020(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: sw s2, 2016(sp) # 4-byte Folded Spill
|
||||
; RV32I-WITHFP-NEXT: .cfi_offset ra, -4
|
||||
; RV32I-WITHFP-NEXT: .cfi_offset s0, -8
|
||||
; RV32I-WITHFP-NEXT: .cfi_offset s1, -12
|
||||
@@ -115,10 +115,10 @@ define void @test_emergency_spill_slot(i32 %a) {
|
||||
; RV32I-WITHFP-NEXT: lui a0, 97
|
||||
; RV32I-WITHFP-NEXT: addi a0, a0, 688
|
||||
; RV32I-WITHFP-NEXT: add sp, sp, a0
|
||||
; RV32I-WITHFP-NEXT: lw s2, 2016(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s1, 2020(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s0, 2024(sp)
|
||||
; RV32I-WITHFP-NEXT: lw ra, 2028(sp)
|
||||
; RV32I-WITHFP-NEXT: lw s2, 2016(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw s1, 2020(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
|
||||
; RV32I-WITHFP-NEXT: addi sp, sp, 2032
|
||||
; RV32I-WITHFP-NEXT: ret
|
||||
%data = alloca [ 100000 x i32 ] , align 4
|
||||
|
||||
@@ -12,10 +12,10 @@ define signext i32 @square(i32 %a) nounwind {
|
||||
; RV32I-LABEL: square:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a1, a0
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -27,11 +27,11 @@ define signext i32 @square(i32 %a) nounwind {
|
||||
; RV64I-LABEL: square:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a1, a0
|
||||
; RV64I-NEXT: call __muldi3
|
||||
; RV64I-NEXT: call __muldi3@plt
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -47,9 +47,9 @@ define signext i32 @mul(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: mul:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -61,10 +61,10 @@ define signext i32 @mul(i32 %a, i32 %b) nounwind {
|
||||
; RV64I-LABEL: mul:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __muldi3
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __muldi3@plt
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -132,9 +132,9 @@ define i64 @mul64(i64 %a, i64 %b) nounwind {
|
||||
; RV32I-LABEL: mul64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call __muldi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call __muldi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -151,9 +151,9 @@ define i64 @mul64(i64 %a, i64 %b) nounwind {
|
||||
; RV64I-LABEL: mul64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __muldi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __muldi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -207,13 +207,13 @@ define i32 @mulhs(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: mulhs:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a2, a1
|
||||
; RV32I-NEXT: srai a1, a0, 31
|
||||
; RV32I-NEXT: srai a3, a2, 31
|
||||
; RV32I-NEXT: call __muldi3
|
||||
; RV32I-NEXT: call __muldi3@plt
|
||||
; RV32I-NEXT: mv a0, a1
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -225,12 +225,12 @@ define i32 @mulhs(i32 %a, i32 %b) nounwind {
|
||||
; RV64I-LABEL: mulhs:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: sext.w a1, a1
|
||||
; RV64I-NEXT: call __muldi3
|
||||
; RV64I-NEXT: call __muldi3@plt
|
||||
; RV64I-NEXT: srli a0, a0, 32
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -253,13 +253,13 @@ define zeroext i32 @mulhu(i32 zeroext %a, i32 zeroext %b) nounwind {
|
||||
; RV32I-LABEL: mulhu:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a2, a1
|
||||
; RV32I-NEXT: mv a1, zero
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __muldi3
|
||||
; RV32I-NEXT: call __muldi3@plt
|
||||
; RV32I-NEXT: mv a0, a1
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -271,10 +271,10 @@ define zeroext i32 @mulhu(i32 zeroext %a, i32 zeroext %b) nounwind {
|
||||
; RV64I-LABEL: mulhu:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __muldi3
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __muldi3@plt
|
||||
; RV64I-NEXT: srli a0, a0, 32
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -12,9 +12,9 @@ define i32 @urem(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: urem:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -26,13 +26,13 @@ define i32 @urem(i32 %a, i32 %b) nounwind {
|
||||
; RV64I-LABEL: urem:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: slli a0, a0, 32
|
||||
; RV64I-NEXT: srli a0, a0, 32
|
||||
; RV64I-NEXT: slli a1, a1, 32
|
||||
; RV64I-NEXT: srli a1, a1, 32
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -48,9 +48,9 @@ define i32 @srem(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: srem:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -62,11 +62,11 @@ define i32 @srem(i32 %a, i32 %b) nounwind {
|
||||
; RV64I-LABEL: srem:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: sext.w a1, a1
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -24,19 +24,19 @@ define i32 @test() nounwind {
|
||||
; RV32I-LABEL: test:
|
||||
; RV32I: # %bb.0: # %entry
|
||||
; RV32I-NEXT: addi sp, sp, -64
|
||||
; RV32I-NEXT: sw ra, 60(sp)
|
||||
; RV32I-NEXT: sw s0, 56(sp)
|
||||
; RV32I-NEXT: sw s1, 52(sp)
|
||||
; RV32I-NEXT: sw s2, 48(sp)
|
||||
; RV32I-NEXT: sw s3, 44(sp)
|
||||
; RV32I-NEXT: sw s4, 40(sp)
|
||||
; RV32I-NEXT: sw s5, 36(sp)
|
||||
; RV32I-NEXT: sw s6, 32(sp)
|
||||
; RV32I-NEXT: sw s7, 28(sp)
|
||||
; RV32I-NEXT: sw s8, 24(sp)
|
||||
; RV32I-NEXT: sw s9, 20(sp)
|
||||
; RV32I-NEXT: sw s10, 16(sp)
|
||||
; RV32I-NEXT: sw s11, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 52(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 48(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 40(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 36(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s6, 32(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s7, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s8, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s9, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s10, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s11, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lui s6, %hi(a)
|
||||
; RV32I-NEXT: lw a0, %lo(a)(s6)
|
||||
; RV32I-NEXT: beqz a0, .LBB0_11
|
||||
@@ -70,7 +70,7 @@ define i32 @test() nounwind {
|
||||
; RV32I-NEXT: lw a3, %lo(d)(s1)
|
||||
; RV32I-NEXT: lw a4, %lo(e)(s0)
|
||||
; RV32I-NEXT: addi a5, zero, 32
|
||||
; RV32I-NEXT: call foo
|
||||
; RV32I-NEXT: call foo@plt
|
||||
; RV32I-NEXT: .LBB0_5: # %if.end
|
||||
; RV32I-NEXT: # in Loop: Header=BB0_3 Depth=1
|
||||
; RV32I-NEXT: lw a0, %lo(k)(s3)
|
||||
@@ -83,7 +83,7 @@ define i32 @test() nounwind {
|
||||
; RV32I-NEXT: lw a3, %lo(e)(s0)
|
||||
; RV32I-NEXT: lw a4, %lo(f)(s7)
|
||||
; RV32I-NEXT: addi a5, zero, 64
|
||||
; RV32I-NEXT: call foo
|
||||
; RV32I-NEXT: call foo@plt
|
||||
; RV32I-NEXT: .LBB0_7: # %if.end5
|
||||
; RV32I-NEXT: # in Loop: Header=BB0_3 Depth=1
|
||||
; RV32I-NEXT: lw a0, %lo(j)(s4)
|
||||
@@ -96,7 +96,7 @@ define i32 @test() nounwind {
|
||||
; RV32I-NEXT: lw a3, %lo(f)(s7)
|
||||
; RV32I-NEXT: lw a4, %lo(g)(s8)
|
||||
; RV32I-NEXT: addi a5, zero, 32
|
||||
; RV32I-NEXT: call foo
|
||||
; RV32I-NEXT: call foo@plt
|
||||
; RV32I-NEXT: .LBB0_9: # %if.end9
|
||||
; RV32I-NEXT: # in Loop: Header=BB0_3 Depth=1
|
||||
; RV32I-NEXT: lw a0, %lo(i)(s5)
|
||||
@@ -109,23 +109,23 @@ define i32 @test() nounwind {
|
||||
; RV32I-NEXT: lw a3, %lo(g)(s8)
|
||||
; RV32I-NEXT: lw a4, %lo(h)(s9)
|
||||
; RV32I-NEXT: addi a5, zero, 32
|
||||
; RV32I-NEXT: call foo
|
||||
; RV32I-NEXT: call foo@plt
|
||||
; RV32I-NEXT: j .LBB0_2
|
||||
; RV32I-NEXT: .LBB0_11: # %for.end
|
||||
; RV32I-NEXT: addi a0, zero, 1
|
||||
; RV32I-NEXT: lw s11, 12(sp)
|
||||
; RV32I-NEXT: lw s10, 16(sp)
|
||||
; RV32I-NEXT: lw s9, 20(sp)
|
||||
; RV32I-NEXT: lw s8, 24(sp)
|
||||
; RV32I-NEXT: lw s7, 28(sp)
|
||||
; RV32I-NEXT: lw s6, 32(sp)
|
||||
; RV32I-NEXT: lw s5, 36(sp)
|
||||
; RV32I-NEXT: lw s4, 40(sp)
|
||||
; RV32I-NEXT: lw s3, 44(sp)
|
||||
; RV32I-NEXT: lw s2, 48(sp)
|
||||
; RV32I-NEXT: lw s1, 52(sp)
|
||||
; RV32I-NEXT: lw s0, 56(sp)
|
||||
; RV32I-NEXT: lw ra, 60(sp)
|
||||
; RV32I-NEXT: lw s11, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s10, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s9, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s8, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s7, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s6, 32(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s5, 36(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 40(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 48(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 52(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 64
|
||||
; RV32I-NEXT: ret
|
||||
entry:
|
||||
|
||||
@@ -318,7 +318,7 @@ define i32 @ctlz_i32(i32 %a) nounwind {
|
||||
; RV32I-LABEL: ctlz_i32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: beqz a0, .LBB8_2
|
||||
; RV32I-NEXT: # %bb.1: # %cond.false
|
||||
; RV32I-NEXT: srli a1, a0, 1
|
||||
@@ -350,13 +350,13 @@ define i32 @ctlz_i32(i32 %a) nounwind {
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi a1, a1, 257
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: j .LBB8_3
|
||||
; RV32I-NEXT: .LBB8_2:
|
||||
; RV32I-NEXT: addi a0, zero, 32
|
||||
; RV32I-NEXT: .LBB8_3: # %cond.end
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -379,14 +379,14 @@ define i64 @ctlz_i64(i64 %a) nounwind {
|
||||
; RV32I-LABEL: ctlz_i64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw s4, 8(sp)
|
||||
; RV32I-NEXT: sw s5, 4(sp)
|
||||
; RV32I-NEXT: sw s6, 0(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s3, a1
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: srli a0, a1, 1
|
||||
@@ -419,7 +419,7 @@ define i64 @ctlz_i64(i64 %a) nounwind {
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi s0, a1, 257
|
||||
; RV32I-NEXT: mv a1, s0
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: mv s2, a0
|
||||
; RV32I-NEXT: srli a0, s4, 1
|
||||
; RV32I-NEXT: or a0, s4, a0
|
||||
@@ -443,7 +443,7 @@ define i64 @ctlz_i64(i64 %a) nounwind {
|
||||
; RV32I-NEXT: add a0, a0, a1
|
||||
; RV32I-NEXT: and a0, a0, s6
|
||||
; RV32I-NEXT: mv a1, s0
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: bnez s3, .LBB9_2
|
||||
; RV32I-NEXT: # %bb.1:
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
@@ -453,14 +453,14 @@ define i64 @ctlz_i64(i64 %a) nounwind {
|
||||
; RV32I-NEXT: srli a0, s2, 24
|
||||
; RV32I-NEXT: .LBB9_3:
|
||||
; RV32I-NEXT: mv a1, zero
|
||||
; RV32I-NEXT: lw s6, 0(sp)
|
||||
; RV32I-NEXT: lw s5, 4(sp)
|
||||
; RV32I-NEXT: lw s4, 8(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -499,7 +499,7 @@ define i32 @cttz_i32(i32 %a) nounwind {
|
||||
; RV32I-LABEL: cttz_i32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: beqz a0, .LBB10_2
|
||||
; RV32I-NEXT: # %bb.1: # %cond.false
|
||||
; RV32I-NEXT: addi a1, a0, -1
|
||||
@@ -523,13 +523,13 @@ define i32 @cttz_i32(i32 %a) nounwind {
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi a1, a1, 257
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: j .LBB10_3
|
||||
; RV32I-NEXT: .LBB10_2:
|
||||
; RV32I-NEXT: addi a0, zero, 32
|
||||
; RV32I-NEXT: .LBB10_3: # %cond.end
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -552,14 +552,14 @@ define i64 @cttz_i64(i64 %a) nounwind {
|
||||
; RV32I-LABEL: cttz_i64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw s4, 8(sp)
|
||||
; RV32I-NEXT: sw s5, 4(sp)
|
||||
; RV32I-NEXT: sw s6, 0(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s3, a1
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: addi a0, a0, -1
|
||||
@@ -584,7 +584,7 @@ define i64 @cttz_i64(i64 %a) nounwind {
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi s1, a1, 257
|
||||
; RV32I-NEXT: mv a1, s1
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: mv s2, a0
|
||||
; RV32I-NEXT: addi a0, s3, -1
|
||||
; RV32I-NEXT: not a1, s3
|
||||
@@ -600,7 +600,7 @@ define i64 @cttz_i64(i64 %a) nounwind {
|
||||
; RV32I-NEXT: add a0, a0, a1
|
||||
; RV32I-NEXT: and a0, a0, s6
|
||||
; RV32I-NEXT: mv a1, s1
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: bnez s4, .LBB11_2
|
||||
; RV32I-NEXT: # %bb.1:
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
@@ -610,14 +610,14 @@ define i64 @cttz_i64(i64 %a) nounwind {
|
||||
; RV32I-NEXT: srli a0, s2, 24
|
||||
; RV32I-NEXT: .LBB11_3:
|
||||
; RV32I-NEXT: mv a1, zero
|
||||
; RV32I-NEXT: lw s6, 0(sp)
|
||||
; RV32I-NEXT: lw s5, 4(sp)
|
||||
; RV32I-NEXT: lw s4, 8(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -656,7 +656,7 @@ define i32 @ctpop_i32(i32 %a) nounwind {
|
||||
; RV32I-LABEL: ctpop_i32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: srli a1, a0, 1
|
||||
; RV32I-NEXT: lui a2, 349525
|
||||
; RV32I-NEXT: addi a2, a2, 1365
|
||||
@@ -675,9 +675,9 @@ define i32 @ctpop_i32(i32 %a) nounwind {
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi a1, a1, 257
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -700,13 +700,13 @@ define i64 @ctpop_i64(i64 %a) nounwind {
|
||||
; RV32I-LABEL: ctpop_i64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw s4, 8(sp)
|
||||
; RV32I-NEXT: sw s5, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s2, a0
|
||||
; RV32I-NEXT: srli a0, a1, 1
|
||||
; RV32I-NEXT: lui a2, 349525
|
||||
@@ -727,7 +727,7 @@ define i64 @ctpop_i64(i64 %a) nounwind {
|
||||
; RV32I-NEXT: lui a1, 4112
|
||||
; RV32I-NEXT: addi s1, a1, 257
|
||||
; RV32I-NEXT: mv a1, s1
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli s5, a0, 24
|
||||
; RV32I-NEXT: srli a0, s2, 1
|
||||
; RV32I-NEXT: and a0, a0, s3
|
||||
@@ -740,17 +740,17 @@ define i64 @ctpop_i64(i64 %a) nounwind {
|
||||
; RV32I-NEXT: add a0, a0, a1
|
||||
; RV32I-NEXT: and a0, a0, s4
|
||||
; RV32I-NEXT: mv a1, s1
|
||||
; RV32I-NEXT: call __mulsi3
|
||||
; RV32I-NEXT: call __mulsi3@plt
|
||||
; RV32I-NEXT: srli a0, a0, 24
|
||||
; RV32I-NEXT: add a0, a0, s5
|
||||
; RV32I-NEXT: mv a1, zero
|
||||
; RV32I-NEXT: lw s5, 4(sp)
|
||||
; RV32I-NEXT: lw s4, 8(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -15,28 +15,28 @@ define float @float_test(float %a, float %b) nounwind {
|
||||
; RV32IF-LABEL: float_test:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw s0, 8(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: mv s0, a1
|
||||
; RV32IF-NEXT: call __addsf3
|
||||
; RV32IF-NEXT: call __addsf3@plt
|
||||
; RV32IF-NEXT: mv a1, s0
|
||||
; RV32IF-NEXT: call __divsf3
|
||||
; RV32IF-NEXT: lw s0, 8(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: call __divsf3@plt
|
||||
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: float_test:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd s0, 0(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: mv s0, a1
|
||||
; RV64IF-NEXT: call __addsf3
|
||||
; RV64IF-NEXT: call __addsf3@plt
|
||||
; RV64IF-NEXT: mv a1, s0
|
||||
; RV64IF-NEXT: call __divsf3
|
||||
; RV64IF-NEXT: ld s0, 0(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: call __divsf3@plt
|
||||
; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = fadd float %a, %b
|
||||
@@ -48,32 +48,32 @@ define double @double_test(double %a, double %b) nounwind {
|
||||
; RV32IF-LABEL: double_test:
|
||||
; RV32IF: # %bb.0:
|
||||
; RV32IF-NEXT: addi sp, sp, -16
|
||||
; RV32IF-NEXT: sw ra, 12(sp)
|
||||
; RV32IF-NEXT: sw s0, 8(sp)
|
||||
; RV32IF-NEXT: sw s1, 4(sp)
|
||||
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32IF-NEXT: mv s0, a3
|
||||
; RV32IF-NEXT: mv s1, a2
|
||||
; RV32IF-NEXT: call __adddf3
|
||||
; RV32IF-NEXT: call __adddf3@plt
|
||||
; RV32IF-NEXT: mv a2, s1
|
||||
; RV32IF-NEXT: mv a3, s0
|
||||
; RV32IF-NEXT: call __divdf3
|
||||
; RV32IF-NEXT: lw s1, 4(sp)
|
||||
; RV32IF-NEXT: lw s0, 8(sp)
|
||||
; RV32IF-NEXT: lw ra, 12(sp)
|
||||
; RV32IF-NEXT: call __divdf3@plt
|
||||
; RV32IF-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IF-NEXT: addi sp, sp, 16
|
||||
; RV32IF-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: double_test:
|
||||
; RV64IF: # %bb.0:
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: sd s0, 0(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: mv s0, a1
|
||||
; RV64IF-NEXT: call __adddf3
|
||||
; RV64IF-NEXT: call __adddf3@plt
|
||||
; RV64IF-NEXT: mv a1, s0
|
||||
; RV64IF-NEXT: call __divdf3
|
||||
; RV64IF-NEXT: ld s0, 0(sp)
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: call __divdf3@plt
|
||||
; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
%1 = fadd double %a, %b
|
||||
|
||||
@@ -13,58 +13,58 @@ define half @half_test(half %a, half %b) nounwind {
|
||||
; RV32I-LABEL: half_test:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw s1, 4(sp)
|
||||
; RV32I-NEXT: sw s2, 0(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s2, a1
|
||||
; RV32I-NEXT: lui a1, 16
|
||||
; RV32I-NEXT: addi s0, a1, -1
|
||||
; RV32I-NEXT: and a0, a0, s0
|
||||
; RV32I-NEXT: call __gnu_h2f_ieee
|
||||
; RV32I-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: and a0, s2, s0
|
||||
; RV32I-NEXT: call __gnu_h2f_ieee
|
||||
; RV32I-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: mv a0, s1
|
||||
; RV32I-NEXT: mv a1, s0
|
||||
; RV32I-NEXT: call __addsf3
|
||||
; RV32I-NEXT: call __addsf3@plt
|
||||
; RV32I-NEXT: mv a1, s0
|
||||
; RV32I-NEXT: call __divsf3
|
||||
; RV32I-NEXT: call __gnu_f2h_ieee
|
||||
; RV32I-NEXT: lw s2, 0(sp)
|
||||
; RV32I-NEXT: lw s1, 4(sp)
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __divsf3@plt
|
||||
; RV32I-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: half_test:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -32
|
||||
; RV64I-NEXT: sd ra, 24(sp)
|
||||
; RV64I-NEXT: sd s0, 16(sp)
|
||||
; RV64I-NEXT: sd s1, 8(sp)
|
||||
; RV64I-NEXT: sd s2, 0(sp)
|
||||
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s2, a1
|
||||
; RV64I-NEXT: lui a1, 16
|
||||
; RV64I-NEXT: addiw s0, a1, -1
|
||||
; RV64I-NEXT: and a0, a0, s0
|
||||
; RV64I-NEXT: call __gnu_h2f_ieee
|
||||
; RV64I-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: and a0, s2, s0
|
||||
; RV64I-NEXT: call __gnu_h2f_ieee
|
||||
; RV64I-NEXT: call __gnu_h2f_ieee@plt
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: mv a0, s1
|
||||
; RV64I-NEXT: mv a1, s0
|
||||
; RV64I-NEXT: call __addsf3
|
||||
; RV64I-NEXT: call __addsf3@plt
|
||||
; RV64I-NEXT: mv a1, s0
|
||||
; RV64I-NEXT: call __divsf3
|
||||
; RV64I-NEXT: call __gnu_f2h_ieee
|
||||
; RV64I-NEXT: ld s2, 0(sp)
|
||||
; RV64I-NEXT: ld s1, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 16(sp)
|
||||
; RV64I-NEXT: ld ra, 24(sp)
|
||||
; RV64I-NEXT: call __divsf3@plt
|
||||
; RV64I-NEXT: call __gnu_f2h_ieee@plt
|
||||
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 32
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fadd half %a, %b
|
||||
|
||||
@@ -8,20 +8,20 @@ define void @foo() nounwind {
|
||||
; CHECK-LABEL: foo:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: addi sp, sp, -2032
|
||||
; CHECK-NEXT: sd ra, 2024(sp)
|
||||
; CHECK-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
|
||||
; CHECK-NEXT: lui a0, 95
|
||||
; CHECK-NEXT: addiw a0, a0, 1505
|
||||
; CHECK-NEXT: slli a0, a0, 13
|
||||
; CHECK-NEXT: addi a0, a0, -2000
|
||||
; CHECK-NEXT: sub sp, sp, a0
|
||||
; CHECK-NEXT: addi a0, sp, 16
|
||||
; CHECK-NEXT: call baz
|
||||
; CHECK-NEXT: call baz@plt
|
||||
; CHECK-NEXT: lui a0, 95
|
||||
; CHECK-NEXT: addiw a0, a0, 1505
|
||||
; CHECK-NEXT: slli a0, a0, 13
|
||||
; CHECK-NEXT: addi a0, a0, -2000
|
||||
; CHECK-NEXT: add sp, sp, a0
|
||||
; CHECK-NEXT: ld ra, 2024(sp)
|
||||
; CHECK-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
|
||||
; CHECK-NEXT: addi sp, sp, 2032
|
||||
; CHECK-NEXT: ret
|
||||
entry:
|
||||
|
||||
@@ -222,7 +222,7 @@ define signext i32 @ctlz_i32(i32 signext %a) nounwind {
|
||||
; RV64I-LABEL: ctlz_i32:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: beqz a0, .LBB9_2
|
||||
; RV64I-NEXT: # %bb.1: # %cond.false
|
||||
; RV64I-NEXT: srliw a1, a0, 1
|
||||
@@ -280,14 +280,14 @@ define signext i32 @ctlz_i32(i32 signext %a) nounwind {
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: slli a1, a1, 16
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: call __muldi3
|
||||
; RV64I-NEXT: call __muldi3@plt
|
||||
; RV64I-NEXT: srli a0, a0, 56
|
||||
; RV64I-NEXT: addi a0, a0, -32
|
||||
; RV64I-NEXT: j .LBB9_3
|
||||
; RV64I-NEXT: .LBB9_2:
|
||||
; RV64I-NEXT: addi a0, zero, 32
|
||||
; RV64I-NEXT: .LBB9_3: # %cond.end
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -310,7 +310,7 @@ define i64 @ctlz_i64(i64 %a) nounwind {
|
||||
; RV64I-LABEL: ctlz_i64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: beqz a0, .LBB10_2
|
||||
; RV64I-NEXT: # %bb.1: # %cond.false
|
||||
; RV64I-NEXT: srli a1, a0, 1
|
||||
@@ -366,13 +366,13 @@ define i64 @ctlz_i64(i64 %a) nounwind {
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: slli a1, a1, 16
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: call __muldi3
|
||||
; RV64I-NEXT: call __muldi3@plt
|
||||
; RV64I-NEXT: srli a0, a0, 56
|
||||
; RV64I-NEXT: j .LBB10_3
|
||||
; RV64I-NEXT: .LBB10_2:
|
||||
; RV64I-NEXT: addi a0, zero, 64
|
||||
; RV64I-NEXT: .LBB10_3: # %cond.end
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -395,7 +395,7 @@ define signext i32 @cttz_i32(i32 signext %a) nounwind {
|
||||
; RV64I-LABEL: cttz_i32:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: beqz a0, .LBB11_2
|
||||
; RV64I-NEXT: # %bb.1: # %cond.false
|
||||
; RV64I-NEXT: addi a1, a0, -1
|
||||
@@ -441,13 +441,13 @@ define signext i32 @cttz_i32(i32 signext %a) nounwind {
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: slli a1, a1, 16
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: call __muldi3
|
||||
; RV64I-NEXT: call __muldi3@plt
|
||||
; RV64I-NEXT: srli a0, a0, 56
|
||||
; RV64I-NEXT: j .LBB11_3
|
||||
; RV64I-NEXT: .LBB11_2:
|
||||
; RV64I-NEXT: addi a0, zero, 32
|
||||
; RV64I-NEXT: .LBB11_3: # %cond.end
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -470,7 +470,7 @@ define i64 @cttz_i64(i64 %a) nounwind {
|
||||
; RV64I-LABEL: cttz_i64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: beqz a0, .LBB12_2
|
||||
; RV64I-NEXT: # %bb.1: # %cond.false
|
||||
; RV64I-NEXT: addi a1, a0, -1
|
||||
@@ -516,13 +516,13 @@ define i64 @cttz_i64(i64 %a) nounwind {
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: slli a1, a1, 16
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: call __muldi3
|
||||
; RV64I-NEXT: call __muldi3@plt
|
||||
; RV64I-NEXT: srli a0, a0, 56
|
||||
; RV64I-NEXT: j .LBB12_3
|
||||
; RV64I-NEXT: .LBB12_2:
|
||||
; RV64I-NEXT: addi a0, zero, 64
|
||||
; RV64I-NEXT: .LBB12_3: # %cond.end
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -545,7 +545,7 @@ define signext i32 @ctpop_i32(i32 signext %a) nounwind {
|
||||
; RV64I-LABEL: ctpop_i32:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: slli a1, a0, 32
|
||||
; RV64I-NEXT: srli a1, a1, 32
|
||||
; RV64I-NEXT: srliw a0, a0, 1
|
||||
@@ -582,9 +582,9 @@ define signext i32 @ctpop_i32(i32 signext %a) nounwind {
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: slli a1, a1, 16
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: call __muldi3
|
||||
; RV64I-NEXT: call __muldi3@plt
|
||||
; RV64I-NEXT: srli a0, a0, 56
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -607,7 +607,7 @@ define i64 @ctpop_i64(i64 %a) nounwind {
|
||||
; RV64I-LABEL: ctpop_i64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: srli a1, a0, 1
|
||||
; RV64I-NEXT: lui a2, 21845
|
||||
; RV64I-NEXT: addiw a2, a2, 1365
|
||||
@@ -648,9 +648,9 @@ define i64 @ctpop_i64(i64 %a) nounwind {
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: slli a1, a1, 16
|
||||
; RV64I-NEXT: addi a1, a1, 257
|
||||
; RV64I-NEXT: call __muldi3
|
||||
; RV64I-NEXT: call __muldi3@plt
|
||||
; RV64I-NEXT: srli a0, a0, 56
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -9,25 +9,25 @@ define i64 @complex_float_add(i64 %a.coerce, i64 %b.coerce) nounwind {
|
||||
; CHECK-LABEL: complex_float_add:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: addi sp, sp, -32
|
||||
; CHECK-NEXT: sd ra, 24(sp)
|
||||
; CHECK-NEXT: sd s0, 16(sp)
|
||||
; CHECK-NEXT: sd s1, 8(sp)
|
||||
; CHECK-NEXT: sd s2, 0(sp)
|
||||
; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; CHECK-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; CHECK-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
|
||||
; CHECK-NEXT: srli s2, a0, 32
|
||||
; CHECK-NEXT: srli s1, a1, 32
|
||||
; CHECK-NEXT: call __addsf3
|
||||
; CHECK-NEXT: call __addsf3@plt
|
||||
; CHECK-NEXT: mv s0, a0
|
||||
; CHECK-NEXT: mv a0, s2
|
||||
; CHECK-NEXT: mv a1, s1
|
||||
; CHECK-NEXT: call __addsf3
|
||||
; CHECK-NEXT: call __addsf3@plt
|
||||
; CHECK-NEXT: slli a0, a0, 32
|
||||
; CHECK-NEXT: slli a1, s0, 32
|
||||
; CHECK-NEXT: srli a1, a1, 32
|
||||
; CHECK-NEXT: or a0, a0, a1
|
||||
; CHECK-NEXT: ld s2, 0(sp)
|
||||
; CHECK-NEXT: ld s1, 8(sp)
|
||||
; CHECK-NEXT: ld s0, 16(sp)
|
||||
; CHECK-NEXT: ld ra, 24(sp)
|
||||
; CHECK-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
|
||||
; CHECK-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; CHECK-NEXT: addi sp, sp, 32
|
||||
; CHECK-NEXT: ret
|
||||
entry:
|
||||
|
||||
@@ -11,18 +11,18 @@ define i32 @fp64_to_ui32(double %a) nounwind {
|
||||
; RV64I-LABEL: fp64_to_ui32:
|
||||
; RV64I: # %bb.0: # %entry
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixunsdfsi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixunsdfsi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: fp64_to_ui32:
|
||||
; RV64IF: # %bb.0: # %entry
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call __fixunsdfsi
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call __fixunsdfsi@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
entry:
|
||||
@@ -34,18 +34,18 @@ define i32 @fp64_to_si32(double %a) nounwind {
|
||||
; RV64I-LABEL: fp64_to_si32:
|
||||
; RV64I: # %bb.0: # %entry
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixdfsi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixdfsi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: fp64_to_si32:
|
||||
; RV64IF: # %bb.0: # %entry
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call __fixdfsi
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call __fixdfsi@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
entry:
|
||||
@@ -62,18 +62,18 @@ define i32 @strict_fp64_to_ui32(double %a) nounwind strictfp {
|
||||
; RV64I-LABEL: strict_fp64_to_ui32:
|
||||
; RV64I: # %bb.0: # %entry
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixunsdfsi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixunsdfsi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: strict_fp64_to_ui32:
|
||||
; RV64IF: # %bb.0: # %entry
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call __fixunsdfsi
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call __fixunsdfsi@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
entry:
|
||||
@@ -85,18 +85,18 @@ define i32 @struct_fp64_to_si32(double %a) nounwind strictfp {
|
||||
; RV64I-LABEL: struct_fp64_to_si32:
|
||||
; RV64I: # %bb.0: # %entry
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixdfsi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixdfsi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
; RV64IF-LABEL: struct_fp64_to_si32:
|
||||
; RV64IF: # %bb.0: # %entry
|
||||
; RV64IF-NEXT: addi sp, sp, -16
|
||||
; RV64IF-NEXT: sd ra, 8(sp)
|
||||
; RV64IF-NEXT: call __fixdfsi
|
||||
; RV64IF-NEXT: ld ra, 8(sp)
|
||||
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64IF-NEXT: call __fixdfsi@plt
|
||||
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64IF-NEXT: addi sp, sp, 16
|
||||
; RV64IF-NEXT: ret
|
||||
entry:
|
||||
|
||||
@@ -11,9 +11,9 @@ define float @fadd_s(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fadd_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __addsf3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __addsf3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fadd float %a, %b
|
||||
@@ -24,9 +24,9 @@ define float @fsub_s(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fsub_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __subsf3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __subsf3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fsub float %a, %b
|
||||
@@ -37,9 +37,9 @@ define float @fmul_s(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fmul_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __mulsf3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __mulsf3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fmul float %a, %b
|
||||
@@ -50,9 +50,9 @@ define float @fdiv_s(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fdiv_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __divsf3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __divsf3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fdiv float %a, %b
|
||||
@@ -63,10 +63,10 @@ define i32 @feq_s(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: feq_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __eqsf2
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __eqsf2@plt
|
||||
; RV64I-NEXT: seqz a0, a0
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fcmp oeq float %a, %b
|
||||
@@ -78,11 +78,11 @@ define i32 @flt_s(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: flt_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __ltsf2
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __ltsf2@plt
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: slti a0, a0, 0
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fcmp olt float %a, %b
|
||||
@@ -94,11 +94,11 @@ define i32 @fle_s(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fle_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __lesf2
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __lesf2@plt
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: slti a0, a0, 1
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fcmp ole float %a, %b
|
||||
@@ -110,11 +110,11 @@ define i32 @fcmp_ogt(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fcmp_ogt:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __gtsf2
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __gtsf2@plt
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: sgtz a0, a0
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fcmp ogt float %a, %b
|
||||
@@ -126,12 +126,12 @@ define i32 @fcmp_oge(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fcmp_oge:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __gesf2
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __gesf2@plt
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: addi a1, zero, -1
|
||||
; RV64I-NEXT: slt a0, a1, a0
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fcmp oge float %a, %b
|
||||
@@ -143,10 +143,10 @@ define i32 @fcmp_ord(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fcmp_ord:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __unordsf2
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __unordsf2@plt
|
||||
; RV64I-NEXT: seqz a0, a0
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fcmp ord float %a, %b
|
||||
@@ -158,10 +158,10 @@ define i32 @fcmp_une(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fcmp_une:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __nesf2
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __nesf2@plt
|
||||
; RV64I-NEXT: snez a0, a0
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fcmp une float %a, %b
|
||||
@@ -173,9 +173,9 @@ define i32 @fcvt_w_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fcvt_w_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixsfsi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixsfsi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fptosi float %a to i32
|
||||
@@ -186,9 +186,9 @@ define i32 @fcvt_wu_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fcvt_wu_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixunssfsi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixunssfsi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fptoui float %a to i32
|
||||
@@ -199,10 +199,10 @@ define float @fcvt_s_w(i32 %a) nounwind {
|
||||
; RV64I-LABEL: fcvt_s_w:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: call __floatsisf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __floatsisf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = sitofp i32 %a to float
|
||||
@@ -213,11 +213,11 @@ define float @fcvt_s_wu(i32 %a) nounwind {
|
||||
; RV64I-LABEL: fcvt_s_wu:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: slli a0, a0, 32
|
||||
; RV64I-NEXT: srli a0, a0, 32
|
||||
; RV64I-NEXT: call __floatunsisf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __floatunsisf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = uitofp i32 %a to float
|
||||
@@ -228,9 +228,9 @@ define i64 @fcvt_l_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fcvt_l_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixsfdi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixsfdi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fptosi float %a to i64
|
||||
@@ -241,9 +241,9 @@ define i64 @fcvt_lu_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fcvt_lu_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixunssfdi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixunssfdi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = fptoui float %a to i64
|
||||
@@ -254,9 +254,9 @@ define float @fcvt_s_l(i64 %a) nounwind {
|
||||
; RV64I-LABEL: fcvt_s_l:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __floatdisf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __floatdisf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = sitofp i64 %a to float
|
||||
@@ -267,9 +267,9 @@ define float @fcvt_s_lu(i64 %a) nounwind {
|
||||
; RV64I-LABEL: fcvt_s_lu:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __floatundisf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __floatundisf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = uitofp i64 %a to float
|
||||
@@ -282,9 +282,9 @@ define float @fsqrt_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fsqrt_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call sqrtf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call sqrtf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.sqrt.f32(float %a)
|
||||
@@ -312,9 +312,9 @@ define float @fmin_s(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fmin_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call fminf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call fminf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.minnum.f32(float %a, float %b)
|
||||
@@ -327,9 +327,9 @@ define float @fmax_s(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fmax_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call fmaxf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call fmaxf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.maxnum.f32(float %a, float %b)
|
||||
@@ -343,9 +343,9 @@ define float @fmadd_s(float %a, float %b, float %c) nounwind {
|
||||
; RV64I-LABEL: fmadd_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call fmaf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call fmaf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.fma.f32(float %a, float %b, float %c)
|
||||
@@ -356,22 +356,22 @@ define float @fmsub_s(float %a, float %b, float %c) nounwind {
|
||||
; RV64I-LABEL: fmsub_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -32
|
||||
; RV64I-NEXT: sd ra, 24(sp)
|
||||
; RV64I-NEXT: sd s0, 16(sp)
|
||||
; RV64I-NEXT: sd s1, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s0, a1
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: mv a0, a2
|
||||
; RV64I-NEXT: mv a1, zero
|
||||
; RV64I-NEXT: call __addsf3
|
||||
; RV64I-NEXT: call __addsf3@plt
|
||||
; RV64I-NEXT: lui a1, 524288
|
||||
; RV64I-NEXT: xor a2, a0, a1
|
||||
; RV64I-NEXT: mv a0, s1
|
||||
; RV64I-NEXT: mv a1, s0
|
||||
; RV64I-NEXT: call fmaf
|
||||
; RV64I-NEXT: ld s1, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 16(sp)
|
||||
; RV64I-NEXT: ld ra, 24(sp)
|
||||
; RV64I-NEXT: call fmaf@plt
|
||||
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 32
|
||||
; RV64I-NEXT: ret
|
||||
%c_ = fadd float 0.0, %c ; avoid negation using xor
|
||||
@@ -384,28 +384,28 @@ define float @fnmadd_s(float %a, float %b, float %c) nounwind {
|
||||
; RV64I-LABEL: fnmadd_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -32
|
||||
; RV64I-NEXT: sd ra, 24(sp)
|
||||
; RV64I-NEXT: sd s0, 16(sp)
|
||||
; RV64I-NEXT: sd s1, 8(sp)
|
||||
; RV64I-NEXT: sd s2, 0(sp)
|
||||
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s0, a2
|
||||
; RV64I-NEXT: mv s2, a1
|
||||
; RV64I-NEXT: mv a1, zero
|
||||
; RV64I-NEXT: call __addsf3
|
||||
; RV64I-NEXT: call __addsf3@plt
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: mv a1, zero
|
||||
; RV64I-NEXT: call __addsf3
|
||||
; RV64I-NEXT: call __addsf3@plt
|
||||
; RV64I-NEXT: lui a2, 524288
|
||||
; RV64I-NEXT: xor a1, s1, a2
|
||||
; RV64I-NEXT: xor a2, a0, a2
|
||||
; RV64I-NEXT: mv a0, a1
|
||||
; RV64I-NEXT: mv a1, s2
|
||||
; RV64I-NEXT: call fmaf
|
||||
; RV64I-NEXT: ld s2, 0(sp)
|
||||
; RV64I-NEXT: ld s1, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 16(sp)
|
||||
; RV64I-NEXT: ld ra, 24(sp)
|
||||
; RV64I-NEXT: call fmaf@plt
|
||||
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 32
|
||||
; RV64I-NEXT: ret
|
||||
%a_ = fadd float 0.0, %a
|
||||
@@ -420,21 +420,21 @@ define float @fnmsub_s(float %a, float %b, float %c) nounwind {
|
||||
; RV64I-LABEL: fnmsub_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -32
|
||||
; RV64I-NEXT: sd ra, 24(sp)
|
||||
; RV64I-NEXT: sd s0, 16(sp)
|
||||
; RV64I-NEXT: sd s1, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s0, a2
|
||||
; RV64I-NEXT: mv s1, a1
|
||||
; RV64I-NEXT: mv a1, zero
|
||||
; RV64I-NEXT: call __addsf3
|
||||
; RV64I-NEXT: call __addsf3@plt
|
||||
; RV64I-NEXT: lui a1, 524288
|
||||
; RV64I-NEXT: xor a0, a0, a1
|
||||
; RV64I-NEXT: mv a1, s1
|
||||
; RV64I-NEXT: mv a2, s0
|
||||
; RV64I-NEXT: call fmaf
|
||||
; RV64I-NEXT: ld s1, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 16(sp)
|
||||
; RV64I-NEXT: ld ra, 24(sp)
|
||||
; RV64I-NEXT: call fmaf@plt
|
||||
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 32
|
||||
; RV64I-NEXT: ret
|
||||
%a_ = fadd float 0.0, %a
|
||||
@@ -449,9 +449,9 @@ define float @fceil_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fceil_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call ceilf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call ceilf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.ceil.f32(float %a)
|
||||
@@ -464,9 +464,9 @@ define float @fcos_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fcos_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call cosf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call cosf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.cos.f32(float %a)
|
||||
@@ -479,9 +479,9 @@ define float @fsin_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fsin_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call sinf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call sinf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.sin.f32(float %a)
|
||||
@@ -494,9 +494,9 @@ define float @fexp_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fexp_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call expf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call expf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.exp.f32(float %a)
|
||||
@@ -509,9 +509,9 @@ define float @fexp2_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fexp2_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call exp2f
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call exp2f@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.exp2.f32(float %a)
|
||||
@@ -524,9 +524,9 @@ define float @ffloor_s(float %a) nounwind {
|
||||
; RV64I-LABEL: ffloor_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call floorf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call floorf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.floor.f32(float %a)
|
||||
@@ -539,9 +539,9 @@ define float @fflog_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fflog_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call llvm.flog.f32
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call llvm.flog.f32@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.flog.f32(float %a)
|
||||
@@ -554,9 +554,9 @@ define float @fflog2_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fflog2_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call llvm.flog2.f32
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call llvm.flog2.f32@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.flog2.f32(float %a)
|
||||
@@ -569,9 +569,9 @@ define float @fflog10_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fflog10_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call llvm.flog10.f32
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call llvm.flog10.f32@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.flog10.f32(float %a)
|
||||
@@ -584,9 +584,9 @@ define float @fnearbyint_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fnearbyint_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call llvm.fnearbyint.f32
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call llvm.fnearbyint.f32@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.fnearbyint.f32(float %a)
|
||||
@@ -599,9 +599,9 @@ define float @fround_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fround_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call roundf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call roundf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.round.f32(float %a)
|
||||
@@ -614,9 +614,9 @@ define float @fpround_s(float %a) nounwind {
|
||||
; RV64I-LABEL: fpround_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call llvm.fpround.f32
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call llvm.fpround.f32@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.fpround.f32(float %a)
|
||||
@@ -629,9 +629,9 @@ define float @frint_s(float %a) nounwind {
|
||||
; RV64I-LABEL: frint_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call rintf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call rintf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.rint.f32(float %a)
|
||||
@@ -644,9 +644,9 @@ define float @frem_s(float %a) nounwind {
|
||||
; RV64I-LABEL: frem_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call llvm.rem.f32
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call llvm.rem.f32@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.rem.f32(float %a)
|
||||
@@ -659,9 +659,9 @@ define float @fpow_s(float %a, float %b) nounwind {
|
||||
; RV64I-LABEL: fpow_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call powf
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call powf@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.pow.f32(float %a, float %b)
|
||||
@@ -674,11 +674,11 @@ define float @fpowi_s(float %a, i32 %b) nounwind {
|
||||
; RV64I-LABEL: fpowi_s:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: slli a1, a1, 32
|
||||
; RV64I-NEXT: srli a1, a1, 32
|
||||
; RV64I-NEXT: call __powisf2
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __powisf2@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = call float @llvm.powi.f32(float %a, i32 %b)
|
||||
@@ -689,9 +689,9 @@ define double @fp_ext(float %a) nounwind {
|
||||
; RV64I-LABEL: fp_ext:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __extendsfdf2
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __extendsfdf2@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%conv = fpext float %a to double
|
||||
@@ -702,9 +702,9 @@ define float @fp_trunc(double %a) nounwind {
|
||||
; RV64I-LABEL: fp_trunc:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __truncdfsf2
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __truncdfsf2@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%conv = fptrunc double %a to float
|
||||
@@ -715,9 +715,9 @@ define i32 @fp32_to_ui32(float %a) nounwind {
|
||||
; RV64I-LABEL: fp32_to_ui32:
|
||||
; RV64I: # %bb.0: # %entry
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixunssfsi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixunssfsi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
entry:
|
||||
@@ -729,9 +729,9 @@ define i32 @fp32_to_si32(float %a) nounwind {
|
||||
; RV64I-LABEL: fp32_to_si32:
|
||||
; RV64I: # %bb.0: # %entry
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixsfsi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixsfsi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
entry:
|
||||
@@ -748,9 +748,9 @@ define i32 @strict_fp32_to_ui32(float %a) nounwind strictfp {
|
||||
; RV64I-LABEL: strict_fp32_to_ui32:
|
||||
; RV64I: # %bb.0: # %entry
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixunssfsi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixunssfsi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
entry:
|
||||
@@ -762,9 +762,9 @@ define i32 @strict_fp32_to_si32(float %a) nounwind strictfp {
|
||||
; RV64I-LABEL: strict_fp32_to_si32:
|
||||
; RV64I: # %bb.0: # %entry
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: call __fixsfsi
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: call __fixsfsi@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
entry:
|
||||
|
||||
@@ -39,34 +39,34 @@ define signext i32 @if_of_and(i1 zeroext %a, i1 zeroext %b) nounwind {
|
||||
; RV32I-LABEL: if_of_and:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: and a0, a0, a1
|
||||
; RV32I-NEXT: addi a1, zero, 1
|
||||
; RV32I-NEXT: bne a0, a1, .LBB1_2
|
||||
; RV32I-NEXT: # %bb.1: # %if.then
|
||||
; RV32I-NEXT: call both
|
||||
; RV32I-NEXT: call both@plt
|
||||
; RV32I-NEXT: j .LBB1_3
|
||||
; RV32I-NEXT: .LBB1_2: # %if.else
|
||||
; RV32I-NEXT: call neither
|
||||
; RV32I-NEXT: call neither@plt
|
||||
; RV32I-NEXT: .LBB1_3: # %if.end
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: if_of_and:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: and a0, a0, a1
|
||||
; RV64I-NEXT: addi a1, zero, 1
|
||||
; RV64I-NEXT: bne a0, a1, .LBB1_2
|
||||
; RV64I-NEXT: # %bb.1: # %if.then
|
||||
; RV64I-NEXT: call both
|
||||
; RV64I-NEXT: call both@plt
|
||||
; RV64I-NEXT: j .LBB1_3
|
||||
; RV64I-NEXT: .LBB1_2: # %if.else
|
||||
; RV64I-NEXT: call neither
|
||||
; RV64I-NEXT: call neither@plt
|
||||
; RV64I-NEXT: .LBB1_3: # %if.end
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = and i1 %a, %b
|
||||
|
||||
@@ -39,34 +39,34 @@ define signext i32 @if_of_or(i1 zeroext %a, i1 zeroext %b) nounwind {
|
||||
; RV32I-LABEL: if_of_or:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: or a0, a0, a1
|
||||
; RV32I-NEXT: addi a1, zero, 1
|
||||
; RV32I-NEXT: bne a0, a1, .LBB1_2
|
||||
; RV32I-NEXT: # %bb.1: # %if.then
|
||||
; RV32I-NEXT: call either
|
||||
; RV32I-NEXT: call either@plt
|
||||
; RV32I-NEXT: j .LBB1_3
|
||||
; RV32I-NEXT: .LBB1_2: # %if.else
|
||||
; RV32I-NEXT: call neither
|
||||
; RV32I-NEXT: call neither@plt
|
||||
; RV32I-NEXT: .LBB1_3: # %if.end
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: if_of_or:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: or a0, a0, a1
|
||||
; RV64I-NEXT: addi a1, zero, 1
|
||||
; RV64I-NEXT: bne a0, a1, .LBB1_2
|
||||
; RV64I-NEXT: # %bb.1: # %if.then
|
||||
; RV64I-NEXT: call either
|
||||
; RV64I-NEXT: call either@plt
|
||||
; RV64I-NEXT: j .LBB1_3
|
||||
; RV64I-NEXT: .LBB1_2: # %if.else
|
||||
; RV64I-NEXT: call neither
|
||||
; RV64I-NEXT: call neither@plt
|
||||
; RV64I-NEXT: .LBB1_3: # %if.end
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = or i1 %a, %b
|
||||
|
||||
@@ -20,11 +20,11 @@ declare void @foo()
|
||||
define void @f2() shadowcallstack {
|
||||
; RV32-LABEL: f2:
|
||||
; RV32: # %bb.0:
|
||||
; RV32-NEXT: tail foo
|
||||
; RV32-NEXT: tail foo@plt
|
||||
;
|
||||
; RV64-LABEL: f2:
|
||||
; RV64: # %bb.0:
|
||||
; RV64-NEXT: tail foo
|
||||
; RV64-NEXT: tail foo@plt
|
||||
tail call void @foo()
|
||||
ret void
|
||||
}
|
||||
@@ -38,10 +38,10 @@ define i32 @f3() shadowcallstack {
|
||||
; RV32-NEXT: addi s2, s2, 4
|
||||
; RV32-NEXT: addi sp, sp, -16
|
||||
; RV32-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV32-NEXT: sw ra, 12(sp)
|
||||
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-NEXT: .cfi_offset ra, -4
|
||||
; RV32-NEXT: call bar
|
||||
; RV32-NEXT: lw ra, 12(sp)
|
||||
; RV32-NEXT: call bar@plt
|
||||
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: addi sp, sp, 16
|
||||
; RV32-NEXT: lw ra, -4(s2)
|
||||
; RV32-NEXT: addi s2, s2, -4
|
||||
@@ -53,10 +53,10 @@ define i32 @f3() shadowcallstack {
|
||||
; RV64-NEXT: addi s2, s2, 8
|
||||
; RV64-NEXT: addi sp, sp, -16
|
||||
; RV64-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV64-NEXT: sd ra, 8(sp)
|
||||
; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64-NEXT: .cfi_offset ra, -8
|
||||
; RV64-NEXT: call bar
|
||||
; RV64-NEXT: ld ra, 8(sp)
|
||||
; RV64-NEXT: call bar@plt
|
||||
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: addi sp, sp, 16
|
||||
; RV64-NEXT: ld ra, -8(s2)
|
||||
; RV64-NEXT: addi s2, s2, -8
|
||||
@@ -73,28 +73,28 @@ define i32 @f4() shadowcallstack {
|
||||
; RV32-NEXT: addi s2, s2, 4
|
||||
; RV32-NEXT: addi sp, sp, -16
|
||||
; RV32-NEXT: .cfi_def_cfa_offset 16
|
||||
; RV32-NEXT: sw ra, 12(sp)
|
||||
; RV32-NEXT: sw s0, 8(sp)
|
||||
; RV32-NEXT: sw s1, 4(sp)
|
||||
; RV32-NEXT: sw s3, 0(sp)
|
||||
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32-NEXT: sw s3, 0(sp) # 4-byte Folded Spill
|
||||
; RV32-NEXT: .cfi_offset ra, -4
|
||||
; RV32-NEXT: .cfi_offset s0, -8
|
||||
; RV32-NEXT: .cfi_offset s1, -12
|
||||
; RV32-NEXT: .cfi_offset s3, -16
|
||||
; RV32-NEXT: call bar
|
||||
; RV32-NEXT: call bar@plt
|
||||
; RV32-NEXT: mv s3, a0
|
||||
; RV32-NEXT: call bar
|
||||
; RV32-NEXT: call bar@plt
|
||||
; RV32-NEXT: mv s1, a0
|
||||
; RV32-NEXT: call bar
|
||||
; RV32-NEXT: call bar@plt
|
||||
; RV32-NEXT: mv s0, a0
|
||||
; RV32-NEXT: call bar
|
||||
; RV32-NEXT: call bar@plt
|
||||
; RV32-NEXT: add a1, s3, s1
|
||||
; RV32-NEXT: add a0, s0, a0
|
||||
; RV32-NEXT: add a0, a1, a0
|
||||
; RV32-NEXT: lw s3, 0(sp)
|
||||
; RV32-NEXT: lw s1, 4(sp)
|
||||
; RV32-NEXT: lw s0, 8(sp)
|
||||
; RV32-NEXT: lw ra, 12(sp)
|
||||
; RV32-NEXT: lw s3, 0(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: addi sp, sp, 16
|
||||
; RV32-NEXT: lw ra, -4(s2)
|
||||
; RV32-NEXT: addi s2, s2, -4
|
||||
@@ -106,28 +106,28 @@ define i32 @f4() shadowcallstack {
|
||||
; RV64-NEXT: addi s2, s2, 8
|
||||
; RV64-NEXT: addi sp, sp, -32
|
||||
; RV64-NEXT: .cfi_def_cfa_offset 32
|
||||
; RV64-NEXT: sd ra, 24(sp)
|
||||
; RV64-NEXT: sd s0, 16(sp)
|
||||
; RV64-NEXT: sd s1, 8(sp)
|
||||
; RV64-NEXT: sd s3, 0(sp)
|
||||
; RV64-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64-NEXT: sd s3, 0(sp) # 8-byte Folded Spill
|
||||
; RV64-NEXT: .cfi_offset ra, -8
|
||||
; RV64-NEXT: .cfi_offset s0, -16
|
||||
; RV64-NEXT: .cfi_offset s1, -24
|
||||
; RV64-NEXT: .cfi_offset s3, -32
|
||||
; RV64-NEXT: call bar
|
||||
; RV64-NEXT: call bar@plt
|
||||
; RV64-NEXT: mv s3, a0
|
||||
; RV64-NEXT: call bar
|
||||
; RV64-NEXT: call bar@plt
|
||||
; RV64-NEXT: mv s1, a0
|
||||
; RV64-NEXT: call bar
|
||||
; RV64-NEXT: call bar@plt
|
||||
; RV64-NEXT: mv s0, a0
|
||||
; RV64-NEXT: call bar
|
||||
; RV64-NEXT: call bar@plt
|
||||
; RV64-NEXT: add a1, s3, s1
|
||||
; RV64-NEXT: add a0, s0, a0
|
||||
; RV64-NEXT: addw a0, a1, a0
|
||||
; RV64-NEXT: ld s3, 0(sp)
|
||||
; RV64-NEXT: ld s1, 8(sp)
|
||||
; RV64-NEXT: ld s0, 16(sp)
|
||||
; RV64-NEXT: ld ra, 24(sp)
|
||||
; RV64-NEXT: ld s3, 0(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: addi sp, sp, 32
|
||||
; RV64-NEXT: ld ra, -8(s2)
|
||||
; RV64-NEXT: addi s2, s2, -8
|
||||
@@ -148,9 +148,9 @@ define i32 @f5() shadowcallstack nounwind {
|
||||
; RV32-NEXT: sw ra, 0(s2)
|
||||
; RV32-NEXT: addi s2, s2, 4
|
||||
; RV32-NEXT: addi sp, sp, -16
|
||||
; RV32-NEXT: sw ra, 12(sp)
|
||||
; RV32-NEXT: call bar
|
||||
; RV32-NEXT: lw ra, 12(sp)
|
||||
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-NEXT: call bar@plt
|
||||
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-NEXT: addi sp, sp, 16
|
||||
; RV32-NEXT: lw ra, -4(s2)
|
||||
; RV32-NEXT: addi s2, s2, -4
|
||||
@@ -161,9 +161,9 @@ define i32 @f5() shadowcallstack nounwind {
|
||||
; RV64-NEXT: sd ra, 0(s2)
|
||||
; RV64-NEXT: addi s2, s2, 8
|
||||
; RV64-NEXT: addi sp, sp, -16
|
||||
; RV64-NEXT: sd ra, 8(sp)
|
||||
; RV64-NEXT: call bar
|
||||
; RV64-NEXT: ld ra, 8(sp)
|
||||
; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64-NEXT: call bar@plt
|
||||
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-NEXT: addi sp, sp, 16
|
||||
; RV64-NEXT: ld ra, -8(s2)
|
||||
; RV64-NEXT: addi s2, s2, -8
|
||||
|
||||
@@ -38,9 +38,9 @@ define i64 @lshr64_minsize(i64 %a, i64 %b) minsize nounwind {
|
||||
; RV32I-LABEL: lshr64_minsize:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call __lshrdi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call __lshrdi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -83,9 +83,9 @@ define i64 @ashr64_minsize(i64 %a, i64 %b) minsize nounwind {
|
||||
; RV32I-LABEL: ashr64_minsize:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call __ashrdi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call __ashrdi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -128,9 +128,9 @@ define i64 @shl64_minsize(i64 %a, i64 %b) minsize nounwind {
|
||||
; RV32I-LABEL: shl64_minsize:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: call __ashldi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: call __ashldi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -146,8 +146,8 @@ define i128 @lshr128(i128 %a, i128 %b) nounwind {
|
||||
; RV32I-LABEL: lshr128:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -48
|
||||
; RV32I-NEXT: sw ra, 44(sp)
|
||||
; RV32I-NEXT: sw s0, 40(sp)
|
||||
; RV32I-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lw a2, 0(a2)
|
||||
; RV32I-NEXT: lw a3, 0(a1)
|
||||
; RV32I-NEXT: lw a4, 4(a1)
|
||||
@@ -160,7 +160,7 @@ define i128 @lshr128(i128 %a, i128 %b) nounwind {
|
||||
; RV32I-NEXT: addi a0, sp, 24
|
||||
; RV32I-NEXT: addi a1, sp, 8
|
||||
; RV32I-NEXT: sw a3, 8(sp)
|
||||
; RV32I-NEXT: call __lshrti3
|
||||
; RV32I-NEXT: call __lshrti3@plt
|
||||
; RV32I-NEXT: lw a0, 36(sp)
|
||||
; RV32I-NEXT: lw a1, 32(sp)
|
||||
; RV32I-NEXT: lw a2, 28(sp)
|
||||
@@ -169,8 +169,8 @@ define i128 @lshr128(i128 %a, i128 %b) nounwind {
|
||||
; RV32I-NEXT: sw a1, 8(s0)
|
||||
; RV32I-NEXT: sw a2, 4(s0)
|
||||
; RV32I-NEXT: sw a3, 0(s0)
|
||||
; RV32I-NEXT: lw s0, 40(sp)
|
||||
; RV32I-NEXT: lw ra, 44(sp)
|
||||
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 48
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -199,8 +199,8 @@ define i128 @ashr128(i128 %a, i128 %b) nounwind {
|
||||
; RV32I-LABEL: ashr128:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -48
|
||||
; RV32I-NEXT: sw ra, 44(sp)
|
||||
; RV32I-NEXT: sw s0, 40(sp)
|
||||
; RV32I-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lw a2, 0(a2)
|
||||
; RV32I-NEXT: lw a3, 0(a1)
|
||||
; RV32I-NEXT: lw a4, 4(a1)
|
||||
@@ -213,7 +213,7 @@ define i128 @ashr128(i128 %a, i128 %b) nounwind {
|
||||
; RV32I-NEXT: addi a0, sp, 24
|
||||
; RV32I-NEXT: addi a1, sp, 8
|
||||
; RV32I-NEXT: sw a3, 8(sp)
|
||||
; RV32I-NEXT: call __ashrti3
|
||||
; RV32I-NEXT: call __ashrti3@plt
|
||||
; RV32I-NEXT: lw a0, 36(sp)
|
||||
; RV32I-NEXT: lw a1, 32(sp)
|
||||
; RV32I-NEXT: lw a2, 28(sp)
|
||||
@@ -222,8 +222,8 @@ define i128 @ashr128(i128 %a, i128 %b) nounwind {
|
||||
; RV32I-NEXT: sw a1, 8(s0)
|
||||
; RV32I-NEXT: sw a2, 4(s0)
|
||||
; RV32I-NEXT: sw a3, 0(s0)
|
||||
; RV32I-NEXT: lw s0, 40(sp)
|
||||
; RV32I-NEXT: lw ra, 44(sp)
|
||||
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 48
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -252,8 +252,8 @@ define i128 @shl128(i128 %a, i128 %b) nounwind {
|
||||
; RV32I-LABEL: shl128:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -48
|
||||
; RV32I-NEXT: sw ra, 44(sp)
|
||||
; RV32I-NEXT: sw s0, 40(sp)
|
||||
; RV32I-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lw a2, 0(a2)
|
||||
; RV32I-NEXT: lw a3, 0(a1)
|
||||
; RV32I-NEXT: lw a4, 4(a1)
|
||||
@@ -266,7 +266,7 @@ define i128 @shl128(i128 %a, i128 %b) nounwind {
|
||||
; RV32I-NEXT: addi a0, sp, 24
|
||||
; RV32I-NEXT: addi a1, sp, 8
|
||||
; RV32I-NEXT: sw a3, 8(sp)
|
||||
; RV32I-NEXT: call __ashlti3
|
||||
; RV32I-NEXT: call __ashlti3@plt
|
||||
; RV32I-NEXT: lw a0, 36(sp)
|
||||
; RV32I-NEXT: lw a1, 32(sp)
|
||||
; RV32I-NEXT: lw a2, 28(sp)
|
||||
@@ -275,8 +275,8 @@ define i128 @shl128(i128 %a, i128 %b) nounwind {
|
||||
; RV32I-NEXT: sw a1, 8(s0)
|
||||
; RV32I-NEXT: sw a2, 4(s0)
|
||||
; RV32I-NEXT: sw a3, 0(s0)
|
||||
; RV32I-NEXT: lw s0, 40(sp)
|
||||
; RV32I-NEXT: lw ra, 44(sp)
|
||||
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 48
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -11,15 +11,15 @@ define void @eliminate_restore(i32 %n) nounwind {
|
||||
; RV32I-NOSW-LABEL: eliminate_restore:
|
||||
; RV32I-NOSW: # %bb.0:
|
||||
; RV32I-NOSW-NEXT: addi sp, sp, -16
|
||||
; RV32I-NOSW-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NOSW-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NOSW-NEXT: addi a1, zero, 32
|
||||
; RV32I-NOSW-NEXT: bgeu a1, a0, .LBB0_2
|
||||
; RV32I-NOSW-NEXT: # %bb.1: # %if.end
|
||||
; RV32I-NOSW-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NOSW-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NOSW-NEXT: addi sp, sp, 16
|
||||
; RV32I-NOSW-NEXT: ret
|
||||
; RV32I-NOSW-NEXT: .LBB0_2: # %if.then
|
||||
; RV32I-NOSW-NEXT: call abort
|
||||
; RV32I-NOSW-NEXT: call abort@plt
|
||||
;
|
||||
; RV32I-SW-LABEL: eliminate_restore:
|
||||
; RV32I-SW: # %bb.0:
|
||||
@@ -29,8 +29,8 @@ define void @eliminate_restore(i32 %n) nounwind {
|
||||
; RV32I-SW-NEXT: ret
|
||||
; RV32I-SW-NEXT: .LBB0_2: # %if.then
|
||||
; RV32I-SW-NEXT: addi sp, sp, -16
|
||||
; RV32I-SW-NEXT: sw ra, 12(sp)
|
||||
; RV32I-SW-NEXT: call abort
|
||||
; RV32I-SW-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-SW-NEXT: call abort@plt
|
||||
;
|
||||
; RV32I-SW-SR-LABEL: eliminate_restore:
|
||||
; RV32I-SW-SR: # %bb.0:
|
||||
@@ -40,7 +40,7 @@ define void @eliminate_restore(i32 %n) nounwind {
|
||||
; RV32I-SW-SR-NEXT: ret
|
||||
; RV32I-SW-SR-NEXT: .LBB0_2: # %if.then
|
||||
; RV32I-SW-SR-NEXT: call t0, __riscv_save_0
|
||||
; RV32I-SW-SR-NEXT: call abort
|
||||
; RV32I-SW-SR-NEXT: call abort@plt
|
||||
%cmp = icmp ule i32 %n, 32
|
||||
br i1 %cmp, label %if.then, label %if.end
|
||||
|
||||
@@ -58,8 +58,8 @@ define void @conditional_alloca(i32 %n) nounwind {
|
||||
; RV32I-NOSW-LABEL: conditional_alloca:
|
||||
; RV32I-NOSW: # %bb.0:
|
||||
; RV32I-NOSW-NEXT: addi sp, sp, -16
|
||||
; RV32I-NOSW-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NOSW-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NOSW-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NOSW-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NOSW-NEXT: addi s0, sp, 16
|
||||
; RV32I-NOSW-NEXT: addi a1, zero, 32
|
||||
; RV32I-NOSW-NEXT: bltu a1, a0, .LBB1_2
|
||||
@@ -68,11 +68,11 @@ define void @conditional_alloca(i32 %n) nounwind {
|
||||
; RV32I-NOSW-NEXT: andi a0, a0, -16
|
||||
; RV32I-NOSW-NEXT: sub a0, sp, a0
|
||||
; RV32I-NOSW-NEXT: mv sp, a0
|
||||
; RV32I-NOSW-NEXT: call notdead
|
||||
; RV32I-NOSW-NEXT: call notdead@plt
|
||||
; RV32I-NOSW-NEXT: .LBB1_2: # %if.end
|
||||
; RV32I-NOSW-NEXT: addi sp, s0, -16
|
||||
; RV32I-NOSW-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NOSW-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NOSW-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NOSW-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NOSW-NEXT: addi sp, sp, 16
|
||||
; RV32I-NOSW-NEXT: ret
|
||||
;
|
||||
@@ -82,17 +82,17 @@ define void @conditional_alloca(i32 %n) nounwind {
|
||||
; RV32I-SW-NEXT: bltu a1, a0, .LBB1_2
|
||||
; RV32I-SW-NEXT: # %bb.1: # %if.then
|
||||
; RV32I-SW-NEXT: addi sp, sp, -16
|
||||
; RV32I-SW-NEXT: sw ra, 12(sp)
|
||||
; RV32I-SW-NEXT: sw s0, 8(sp)
|
||||
; RV32I-SW-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-SW-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-SW-NEXT: addi s0, sp, 16
|
||||
; RV32I-SW-NEXT: addi a0, a0, 15
|
||||
; RV32I-SW-NEXT: andi a0, a0, -16
|
||||
; RV32I-SW-NEXT: sub a0, sp, a0
|
||||
; RV32I-SW-NEXT: mv sp, a0
|
||||
; RV32I-SW-NEXT: call notdead
|
||||
; RV32I-SW-NEXT: call notdead@plt
|
||||
; RV32I-SW-NEXT: addi sp, s0, -16
|
||||
; RV32I-SW-NEXT: lw s0, 8(sp)
|
||||
; RV32I-SW-NEXT: lw ra, 12(sp)
|
||||
; RV32I-SW-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-SW-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-SW-NEXT: addi sp, sp, 16
|
||||
; RV32I-SW-NEXT: .LBB1_2: # %if.end
|
||||
; RV32I-SW-NEXT: ret
|
||||
@@ -108,7 +108,7 @@ define void @conditional_alloca(i32 %n) nounwind {
|
||||
; RV32I-SW-SR-NEXT: andi a0, a0, -16
|
||||
; RV32I-SW-SR-NEXT: sub a0, sp, a0
|
||||
; RV32I-SW-SR-NEXT: mv sp, a0
|
||||
; RV32I-SW-SR-NEXT: call notdead
|
||||
; RV32I-SW-SR-NEXT: call notdead@plt
|
||||
; RV32I-SW-SR-NEXT: addi sp, s0, -16
|
||||
; RV32I-SW-SR-NEXT: tail __riscv_restore_1
|
||||
; RV32I-SW-SR-NEXT: .LBB1_2: # %if.end
|
||||
|
||||
@@ -7,13 +7,13 @@ define i32 @SplitSP() nounwind {
|
||||
; RV32I-LABEL: SplitSP:
|
||||
; RV32I: # %bb.0: # %entry
|
||||
; RV32I-NEXT: addi sp, sp, -2032
|
||||
; RV32I-NEXT: sw ra, 2028(sp)
|
||||
; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: addi a0, sp, 16
|
||||
; RV32I-NEXT: call foo
|
||||
; RV32I-NEXT: call foo@plt
|
||||
; RV32I-NEXT: mv a0, zero
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: lw ra, 2028(sp)
|
||||
; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 2032
|
||||
; RV32I-NEXT: ret
|
||||
entry:
|
||||
@@ -28,11 +28,11 @@ define i32 @NoSplitSP() nounwind {
|
||||
; RV32I-LABEL: NoSplitSP:
|
||||
; RV32I: # %bb.0: # %entry
|
||||
; RV32I-NEXT: addi sp, sp, -2032
|
||||
; RV32I-NEXT: sw ra, 2028(sp)
|
||||
; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a0, sp, 4
|
||||
; RV32I-NEXT: call foo
|
||||
; RV32I-NEXT: call foo@plt
|
||||
; RV32I-NEXT: mv a0, zero
|
||||
; RV32I-NEXT: lw ra, 2028(sp)
|
||||
; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 2032
|
||||
; RV32I-NEXT: ret
|
||||
entry:
|
||||
|
||||
@@ -12,10 +12,10 @@ define i32 @fold_srem_positive_odd(i32 %x) nounwind {
|
||||
; RV32I-LABEL: fold_srem_positive_odd:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -36,11 +36,11 @@ define i32 @fold_srem_positive_odd(i32 %x) nounwind {
|
||||
; RV64I-LABEL: fold_srem_positive_odd:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -73,10 +73,10 @@ define i32 @fold_srem_positive_even(i32 %x) nounwind {
|
||||
; RV32I-LABEL: fold_srem_positive_even:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, 1060
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -96,11 +96,11 @@ define i32 @fold_srem_positive_even(i32 %x) nounwind {
|
||||
; RV64I-LABEL: fold_srem_positive_even:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 1060
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -130,10 +130,10 @@ define i32 @fold_srem_negative_odd(i32 %x) nounwind {
|
||||
; RV32I-LABEL: fold_srem_negative_odd:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, -723
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -153,11 +153,11 @@ define i32 @fold_srem_negative_odd(i32 %x) nounwind {
|
||||
; RV64I-LABEL: fold_srem_negative_odd:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: addi a1, zero, -723
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -190,11 +190,11 @@ define i32 @fold_srem_negative_even(i32 %x) nounwind {
|
||||
; RV32I-LABEL: fold_srem_negative_even:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lui a1, 1048570
|
||||
; RV32I-NEXT: addi a1, a1, 1595
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -215,12 +215,12 @@ define i32 @fold_srem_negative_even(i32 %x) nounwind {
|
||||
; RV64I-LABEL: fold_srem_negative_even:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sext.w a0, a0
|
||||
; RV64I-NEXT: lui a1, 1048570
|
||||
; RV64I-NEXT: addiw a1, a1, 1595
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -254,20 +254,20 @@ define i32 @combine_srem_sdiv(i32 %x) nounwind {
|
||||
; RV32I-LABEL: combine_srem_sdiv:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw s1, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: call __divsi3
|
||||
; RV32I-NEXT: call __divsi3@plt
|
||||
; RV32I-NEXT: add a0, s1, a0
|
||||
; RV32I-NEXT: lw s1, 4(sp)
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -289,21 +289,21 @@ define i32 @combine_srem_sdiv(i32 %x) nounwind {
|
||||
; RV64I-LABEL: combine_srem_sdiv:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -32
|
||||
; RV64I-NEXT: sd ra, 24(sp)
|
||||
; RV64I-NEXT: sd s0, 16(sp)
|
||||
; RV64I-NEXT: sd s1, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sext.w s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: call __divdi3
|
||||
; RV64I-NEXT: call __divdi3@plt
|
||||
; RV64I-NEXT: addw a0, s1, a0
|
||||
; RV64I-NEXT: ld s1, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 16(sp)
|
||||
; RV64I-NEXT: ld ra, 24(sp)
|
||||
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 32
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -451,32 +451,32 @@ define i64 @dont_fold_srem_i64(i64 %x) nounwind {
|
||||
; RV32I-LABEL: dont_fold_srem_i64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a2, zero, 98
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __moddi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __moddi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IM-LABEL: dont_fold_srem_i64:
|
||||
; RV32IM: # %bb.0:
|
||||
; RV32IM-NEXT: addi sp, sp, -16
|
||||
; RV32IM-NEXT: sw ra, 12(sp)
|
||||
; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: addi a2, zero, 98
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __moddi3
|
||||
; RV32IM-NEXT: lw ra, 12(sp)
|
||||
; RV32IM-NEXT: call __moddi3@plt
|
||||
; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: addi sp, sp, 16
|
||||
; RV32IM-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: dont_fold_srem_i64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a1, zero, 98
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -12,13 +12,13 @@ define <4 x i16> @fold_srem_vec_1(<4 x i16> %x) nounwind {
|
||||
; RV32I-LABEL: fold_srem_vec_1:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw s4, 8(sp)
|
||||
; RV32I-NEXT: sw s5, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lh s2, 12(a1)
|
||||
; RV32I-NEXT: lh s3, 8(a1)
|
||||
; RV32I-NEXT: lh s0, 4(a1)
|
||||
@@ -26,30 +26,30 @@ define <4 x i16> @fold_srem_vec_1(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, a2
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: addi a1, zero, -124
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s5, a0
|
||||
; RV32I-NEXT: addi a1, zero, 98
|
||||
; RV32I-NEXT: mv a0, s3
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: addi a1, zero, -1003
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: sh a0, 6(s1)
|
||||
; RV32I-NEXT: sh s0, 4(s1)
|
||||
; RV32I-NEXT: sh s5, 2(s1)
|
||||
; RV32I-NEXT: sh s4, 0(s1)
|
||||
; RV32I-NEXT: lw s5, 4(sp)
|
||||
; RV32I-NEXT: lw s4, 8(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -106,13 +106,13 @@ define <4 x i16> @fold_srem_vec_1(<4 x i16> %x) nounwind {
|
||||
; RV64I-LABEL: fold_srem_vec_1:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -64
|
||||
; RV64I-NEXT: sd ra, 56(sp)
|
||||
; RV64I-NEXT: sd s0, 48(sp)
|
||||
; RV64I-NEXT: sd s1, 40(sp)
|
||||
; RV64I-NEXT: sd s2, 32(sp)
|
||||
; RV64I-NEXT: sd s3, 24(sp)
|
||||
; RV64I-NEXT: sd s4, 16(sp)
|
||||
; RV64I-NEXT: sd s5, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s4, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s5, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: lh s2, 24(a1)
|
||||
; RV64I-NEXT: lh s3, 16(a1)
|
||||
; RV64I-NEXT: lh s0, 8(a1)
|
||||
@@ -120,30 +120,30 @@ define <4 x i16> @fold_srem_vec_1(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, a2
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s4, a0
|
||||
; RV64I-NEXT: addi a1, zero, -124
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s5, a0
|
||||
; RV64I-NEXT: addi a1, zero, 98
|
||||
; RV64I-NEXT: mv a0, s3
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, -1003
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: sh a0, 6(s1)
|
||||
; RV64I-NEXT: sh s0, 4(s1)
|
||||
; RV64I-NEXT: sh s5, 2(s1)
|
||||
; RV64I-NEXT: sh s4, 0(s1)
|
||||
; RV64I-NEXT: ld s5, 8(sp)
|
||||
; RV64I-NEXT: ld s4, 16(sp)
|
||||
; RV64I-NEXT: ld s3, 24(sp)
|
||||
; RV64I-NEXT: ld s2, 32(sp)
|
||||
; RV64I-NEXT: ld s1, 40(sp)
|
||||
; RV64I-NEXT: ld s0, 48(sp)
|
||||
; RV64I-NEXT: ld ra, 56(sp)
|
||||
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 64
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -228,13 +228,13 @@ define <4 x i16> @fold_srem_vec_2(<4 x i16> %x) nounwind {
|
||||
; RV32I-LABEL: fold_srem_vec_2:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw s4, 8(sp)
|
||||
; RV32I-NEXT: sw s5, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lh s2, 12(a1)
|
||||
; RV32I-NEXT: lh s3, 8(a1)
|
||||
; RV32I-NEXT: lh s0, 4(a1)
|
||||
@@ -242,30 +242,30 @@ define <4 x i16> @fold_srem_vec_2(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, a2
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s5, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s3
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: sh a0, 6(s1)
|
||||
; RV32I-NEXT: sh s0, 4(s1)
|
||||
; RV32I-NEXT: sh s5, 2(s1)
|
||||
; RV32I-NEXT: sh s4, 0(s1)
|
||||
; RV32I-NEXT: lw s5, 4(sp)
|
||||
; RV32I-NEXT: lw s4, 8(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -315,13 +315,13 @@ define <4 x i16> @fold_srem_vec_2(<4 x i16> %x) nounwind {
|
||||
; RV64I-LABEL: fold_srem_vec_2:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -64
|
||||
; RV64I-NEXT: sd ra, 56(sp)
|
||||
; RV64I-NEXT: sd s0, 48(sp)
|
||||
; RV64I-NEXT: sd s1, 40(sp)
|
||||
; RV64I-NEXT: sd s2, 32(sp)
|
||||
; RV64I-NEXT: sd s3, 24(sp)
|
||||
; RV64I-NEXT: sd s4, 16(sp)
|
||||
; RV64I-NEXT: sd s5, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s4, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s5, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: lh s2, 24(a1)
|
||||
; RV64I-NEXT: lh s3, 16(a1)
|
||||
; RV64I-NEXT: lh s0, 8(a1)
|
||||
@@ -329,30 +329,30 @@ define <4 x i16> @fold_srem_vec_2(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, a2
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s4, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s5, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s3
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: sh a0, 6(s1)
|
||||
; RV64I-NEXT: sh s0, 4(s1)
|
||||
; RV64I-NEXT: sh s5, 2(s1)
|
||||
; RV64I-NEXT: sh s4, 0(s1)
|
||||
; RV64I-NEXT: ld s5, 8(sp)
|
||||
; RV64I-NEXT: ld s4, 16(sp)
|
||||
; RV64I-NEXT: ld s3, 24(sp)
|
||||
; RV64I-NEXT: ld s2, 32(sp)
|
||||
; RV64I-NEXT: ld s1, 40(sp)
|
||||
; RV64I-NEXT: ld s0, 48(sp)
|
||||
; RV64I-NEXT: ld ra, 56(sp)
|
||||
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 64
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -414,17 +414,17 @@ define <4 x i16> @combine_srem_sdiv(<4 x i16> %x) nounwind {
|
||||
; RV32I-LABEL: combine_srem_sdiv:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -48
|
||||
; RV32I-NEXT: sw ra, 44(sp)
|
||||
; RV32I-NEXT: sw s0, 40(sp)
|
||||
; RV32I-NEXT: sw s1, 36(sp)
|
||||
; RV32I-NEXT: sw s2, 32(sp)
|
||||
; RV32I-NEXT: sw s3, 28(sp)
|
||||
; RV32I-NEXT: sw s4, 24(sp)
|
||||
; RV32I-NEXT: sw s5, 20(sp)
|
||||
; RV32I-NEXT: sw s6, 16(sp)
|
||||
; RV32I-NEXT: sw s7, 12(sp)
|
||||
; RV32I-NEXT: sw s8, 8(sp)
|
||||
; RV32I-NEXT: sw s9, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s6, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s7, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s8, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s9, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lh s2, 0(a1)
|
||||
; RV32I-NEXT: lh s3, 4(a1)
|
||||
; RV32I-NEXT: lh s4, 8(a1)
|
||||
@@ -432,35 +432,35 @@ define <4 x i16> @combine_srem_sdiv(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s1
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s5, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s4
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s6, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s3
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s7, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s8, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s1
|
||||
; RV32I-NEXT: call __divsi3
|
||||
; RV32I-NEXT: call __divsi3@plt
|
||||
; RV32I-NEXT: mv s9, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s4
|
||||
; RV32I-NEXT: call __divsi3
|
||||
; RV32I-NEXT: call __divsi3@plt
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s3
|
||||
; RV32I-NEXT: call __divsi3
|
||||
; RV32I-NEXT: call __divsi3@plt
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: call __divsi3
|
||||
; RV32I-NEXT: call __divsi3@plt
|
||||
; RV32I-NEXT: add a0, s8, a0
|
||||
; RV32I-NEXT: add a1, s7, s1
|
||||
; RV32I-NEXT: add a2, s6, s4
|
||||
@@ -469,17 +469,17 @@ define <4 x i16> @combine_srem_sdiv(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: sh a2, 4(s0)
|
||||
; RV32I-NEXT: sh a1, 2(s0)
|
||||
; RV32I-NEXT: sh a0, 0(s0)
|
||||
; RV32I-NEXT: lw s9, 4(sp)
|
||||
; RV32I-NEXT: lw s8, 8(sp)
|
||||
; RV32I-NEXT: lw s7, 12(sp)
|
||||
; RV32I-NEXT: lw s6, 16(sp)
|
||||
; RV32I-NEXT: lw s5, 20(sp)
|
||||
; RV32I-NEXT: lw s4, 24(sp)
|
||||
; RV32I-NEXT: lw s3, 28(sp)
|
||||
; RV32I-NEXT: lw s2, 32(sp)
|
||||
; RV32I-NEXT: lw s1, 36(sp)
|
||||
; RV32I-NEXT: lw s0, 40(sp)
|
||||
; RV32I-NEXT: lw ra, 44(sp)
|
||||
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 48
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -533,17 +533,17 @@ define <4 x i16> @combine_srem_sdiv(<4 x i16> %x) nounwind {
|
||||
; RV64I-LABEL: combine_srem_sdiv:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -96
|
||||
; RV64I-NEXT: sd ra, 88(sp)
|
||||
; RV64I-NEXT: sd s0, 80(sp)
|
||||
; RV64I-NEXT: sd s1, 72(sp)
|
||||
; RV64I-NEXT: sd s2, 64(sp)
|
||||
; RV64I-NEXT: sd s3, 56(sp)
|
||||
; RV64I-NEXT: sd s4, 48(sp)
|
||||
; RV64I-NEXT: sd s5, 40(sp)
|
||||
; RV64I-NEXT: sd s6, 32(sp)
|
||||
; RV64I-NEXT: sd s7, 24(sp)
|
||||
; RV64I-NEXT: sd s8, 16(sp)
|
||||
; RV64I-NEXT: sd s9, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 88(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 80(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 72(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 64(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 56(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s4, 48(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s5, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s6, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s7, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s8, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s9, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: lh s2, 0(a1)
|
||||
; RV64I-NEXT: lh s3, 8(a1)
|
||||
; RV64I-NEXT: lh s4, 16(a1)
|
||||
@@ -551,35 +551,35 @@ define <4 x i16> @combine_srem_sdiv(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s1
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s5, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s4
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s6, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s3
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s7, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s8, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s1
|
||||
; RV64I-NEXT: call __divdi3
|
||||
; RV64I-NEXT: call __divdi3@plt
|
||||
; RV64I-NEXT: mv s9, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s4
|
||||
; RV64I-NEXT: call __divdi3
|
||||
; RV64I-NEXT: call __divdi3@plt
|
||||
; RV64I-NEXT: mv s4, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s3
|
||||
; RV64I-NEXT: call __divdi3
|
||||
; RV64I-NEXT: call __divdi3@plt
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __divdi3
|
||||
; RV64I-NEXT: call __divdi3@plt
|
||||
; RV64I-NEXT: add a0, s8, a0
|
||||
; RV64I-NEXT: add a1, s7, s1
|
||||
; RV64I-NEXT: add a2, s6, s4
|
||||
@@ -588,17 +588,17 @@ define <4 x i16> @combine_srem_sdiv(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: sh a2, 4(s0)
|
||||
; RV64I-NEXT: sh a1, 2(s0)
|
||||
; RV64I-NEXT: sh a0, 0(s0)
|
||||
; RV64I-NEXT: ld s9, 8(sp)
|
||||
; RV64I-NEXT: ld s8, 16(sp)
|
||||
; RV64I-NEXT: ld s7, 24(sp)
|
||||
; RV64I-NEXT: ld s6, 32(sp)
|
||||
; RV64I-NEXT: ld s5, 40(sp)
|
||||
; RV64I-NEXT: ld s4, 48(sp)
|
||||
; RV64I-NEXT: ld s3, 56(sp)
|
||||
; RV64I-NEXT: ld s2, 64(sp)
|
||||
; RV64I-NEXT: ld s1, 72(sp)
|
||||
; RV64I-NEXT: ld s0, 80(sp)
|
||||
; RV64I-NEXT: ld ra, 88(sp)
|
||||
; RV64I-NEXT: ld s9, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s8, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s7, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s6, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s5, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s4, 48(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s3, 56(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 64(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 72(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 80(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 88(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 96
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -665,11 +665,11 @@ define <4 x i16> @dont_fold_srem_power_of_two(<4 x i16> %x) nounwind {
|
||||
; RV32I-LABEL: dont_fold_srem_power_of_two:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: lh a2, 0(a1)
|
||||
; RV32I-NEXT: lh a0, 12(a1)
|
||||
@@ -692,16 +692,16 @@ define <4 x i16> @dont_fold_srem_power_of_two(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: and a1, a1, a2
|
||||
; RV32I-NEXT: sub s1, a3, a1
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: sh a0, 6(s0)
|
||||
; RV32I-NEXT: sh s1, 4(s0)
|
||||
; RV32I-NEXT: sh s3, 2(s0)
|
||||
; RV32I-NEXT: sh s2, 0(s0)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -746,11 +746,11 @@ define <4 x i16> @dont_fold_srem_power_of_two(<4 x i16> %x) nounwind {
|
||||
; RV64I-LABEL: dont_fold_srem_power_of_two:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -48
|
||||
; RV64I-NEXT: sd ra, 40(sp)
|
||||
; RV64I-NEXT: sd s0, 32(sp)
|
||||
; RV64I-NEXT: sd s1, 24(sp)
|
||||
; RV64I-NEXT: sd s2, 16(sp)
|
||||
; RV64I-NEXT: sd s3, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: lh a2, 0(a1)
|
||||
; RV64I-NEXT: lh a0, 24(a1)
|
||||
@@ -773,16 +773,16 @@ define <4 x i16> @dont_fold_srem_power_of_two(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: and a1, a1, a2
|
||||
; RV64I-NEXT: sub s1, a3, a1
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: sh a0, 6(s0)
|
||||
; RV64I-NEXT: sh s1, 4(s0)
|
||||
; RV64I-NEXT: sh s3, 2(s0)
|
||||
; RV64I-NEXT: sh s2, 0(s0)
|
||||
; RV64I-NEXT: ld s3, 8(sp)
|
||||
; RV64I-NEXT: ld s2, 16(sp)
|
||||
; RV64I-NEXT: ld s1, 24(sp)
|
||||
; RV64I-NEXT: ld s0, 32(sp)
|
||||
; RV64I-NEXT: ld ra, 40(sp)
|
||||
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 48
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -838,36 +838,36 @@ define <4 x i16> @dont_fold_srem_one(<4 x i16> %x) nounwind {
|
||||
; RV32I-LABEL: dont_fold_srem_one:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lh s2, 12(a1)
|
||||
; RV32I-NEXT: lh s1, 8(a1)
|
||||
; RV32I-NEXT: lh a2, 4(a1)
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: addi a1, zero, 654
|
||||
; RV32I-NEXT: mv a0, a2
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s3, a0
|
||||
; RV32I-NEXT: addi a1, zero, 23
|
||||
; RV32I-NEXT: mv a0, s1
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: lui a0, 1
|
||||
; RV32I-NEXT: addi a1, a0, 1327
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: sh zero, 0(s0)
|
||||
; RV32I-NEXT: sh a0, 6(s0)
|
||||
; RV32I-NEXT: sh s1, 4(s0)
|
||||
; RV32I-NEXT: sh s3, 2(s0)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -915,36 +915,36 @@ define <4 x i16> @dont_fold_srem_one(<4 x i16> %x) nounwind {
|
||||
; RV64I-LABEL: dont_fold_srem_one:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -48
|
||||
; RV64I-NEXT: sd ra, 40(sp)
|
||||
; RV64I-NEXT: sd s0, 32(sp)
|
||||
; RV64I-NEXT: sd s1, 24(sp)
|
||||
; RV64I-NEXT: sd s2, 16(sp)
|
||||
; RV64I-NEXT: sd s3, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: lh s2, 24(a1)
|
||||
; RV64I-NEXT: lh s1, 16(a1)
|
||||
; RV64I-NEXT: lh a2, 8(a1)
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 654
|
||||
; RV64I-NEXT: mv a0, a2
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s3, a0
|
||||
; RV64I-NEXT: addi a1, zero, 23
|
||||
; RV64I-NEXT: mv a0, s1
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: lui a0, 1
|
||||
; RV64I-NEXT: addiw a1, a0, 1327
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: sh zero, 0(s0)
|
||||
; RV64I-NEXT: sh a0, 6(s0)
|
||||
; RV64I-NEXT: sh s1, 4(s0)
|
||||
; RV64I-NEXT: sh s3, 2(s0)
|
||||
; RV64I-NEXT: ld s3, 8(sp)
|
||||
; RV64I-NEXT: ld s2, 16(sp)
|
||||
; RV64I-NEXT: ld s1, 24(sp)
|
||||
; RV64I-NEXT: ld s0, 32(sp)
|
||||
; RV64I-NEXT: ld ra, 40(sp)
|
||||
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 48
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -1014,11 +1014,11 @@ define <4 x i16> @dont_fold_urem_i16_smax(<4 x i16> %x) nounwind {
|
||||
; RV32I-LABEL: dont_fold_urem_i16_smax:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lh a2, 4(a1)
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: lh s2, 12(a1)
|
||||
@@ -1029,21 +1029,21 @@ define <4 x i16> @dont_fold_urem_i16_smax(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: and a1, a1, a3
|
||||
; RV32I-NEXT: sub s3, a2, a1
|
||||
; RV32I-NEXT: addi a1, zero, 23
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: lui a0, 1
|
||||
; RV32I-NEXT: addi a1, a0, 1327
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: call __modsi3
|
||||
; RV32I-NEXT: call __modsi3@plt
|
||||
; RV32I-NEXT: sh zero, 0(s0)
|
||||
; RV32I-NEXT: sh a0, 6(s0)
|
||||
; RV32I-NEXT: sh s1, 4(s0)
|
||||
; RV32I-NEXT: sh s3, 2(s0)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -1086,11 +1086,11 @@ define <4 x i16> @dont_fold_urem_i16_smax(<4 x i16> %x) nounwind {
|
||||
; RV64I-LABEL: dont_fold_urem_i16_smax:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -48
|
||||
; RV64I-NEXT: sd ra, 40(sp)
|
||||
; RV64I-NEXT: sd s0, 32(sp)
|
||||
; RV64I-NEXT: sd s1, 24(sp)
|
||||
; RV64I-NEXT: sd s2, 16(sp)
|
||||
; RV64I-NEXT: sd s3, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: lh a2, 8(a1)
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: lh s2, 24(a1)
|
||||
@@ -1101,21 +1101,21 @@ define <4 x i16> @dont_fold_urem_i16_smax(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: and a1, a1, a3
|
||||
; RV64I-NEXT: sub s3, a2, a1
|
||||
; RV64I-NEXT: addi a1, zero, 23
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: lui a0, 1
|
||||
; RV64I-NEXT: addiw a1, a0, 1327
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: sh zero, 0(s0)
|
||||
; RV64I-NEXT: sh a0, 6(s0)
|
||||
; RV64I-NEXT: sh s1, 4(s0)
|
||||
; RV64I-NEXT: sh s3, 2(s0)
|
||||
; RV64I-NEXT: ld s3, 8(sp)
|
||||
; RV64I-NEXT: ld s2, 16(sp)
|
||||
; RV64I-NEXT: ld s1, 24(sp)
|
||||
; RV64I-NEXT: ld s0, 32(sp)
|
||||
; RV64I-NEXT: ld ra, 40(sp)
|
||||
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 48
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -1175,17 +1175,17 @@ define <4 x i64> @dont_fold_srem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32I-LABEL: dont_fold_srem_i64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -48
|
||||
; RV32I-NEXT: sw ra, 44(sp)
|
||||
; RV32I-NEXT: sw s0, 40(sp)
|
||||
; RV32I-NEXT: sw s1, 36(sp)
|
||||
; RV32I-NEXT: sw s2, 32(sp)
|
||||
; RV32I-NEXT: sw s3, 28(sp)
|
||||
; RV32I-NEXT: sw s4, 24(sp)
|
||||
; RV32I-NEXT: sw s5, 20(sp)
|
||||
; RV32I-NEXT: sw s6, 16(sp)
|
||||
; RV32I-NEXT: sw s7, 12(sp)
|
||||
; RV32I-NEXT: sw s8, 8(sp)
|
||||
; RV32I-NEXT: sw s9, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s6, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s7, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s8, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s9, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lw s2, 24(a1)
|
||||
; RV32I-NEXT: lw s3, 28(a1)
|
||||
; RV32I-NEXT: lw s4, 16(a1)
|
||||
@@ -1198,21 +1198,21 @@ define <4 x i64> @dont_fold_srem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32I-NEXT: addi a2, zero, 1
|
||||
; RV32I-NEXT: mv a0, a3
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __moddi3
|
||||
; RV32I-NEXT: call __moddi3@plt
|
||||
; RV32I-NEXT: mv s7, a0
|
||||
; RV32I-NEXT: mv s8, a1
|
||||
; RV32I-NEXT: addi a2, zero, 654
|
||||
; RV32I-NEXT: mv a0, s6
|
||||
; RV32I-NEXT: mv a1, s1
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __moddi3
|
||||
; RV32I-NEXT: call __moddi3@plt
|
||||
; RV32I-NEXT: mv s6, a0
|
||||
; RV32I-NEXT: mv s9, a1
|
||||
; RV32I-NEXT: addi a2, zero, 23
|
||||
; RV32I-NEXT: mv a0, s4
|
||||
; RV32I-NEXT: mv a1, s5
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __moddi3
|
||||
; RV32I-NEXT: call __moddi3@plt
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: mv s1, a1
|
||||
; RV32I-NEXT: lui a0, 1
|
||||
@@ -1220,7 +1220,7 @@ define <4 x i64> @dont_fold_srem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: mv a1, s3
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __moddi3
|
||||
; RV32I-NEXT: call __moddi3@plt
|
||||
; RV32I-NEXT: sw a1, 28(s0)
|
||||
; RV32I-NEXT: sw a0, 24(s0)
|
||||
; RV32I-NEXT: sw s1, 20(s0)
|
||||
@@ -1229,34 +1229,34 @@ define <4 x i64> @dont_fold_srem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32I-NEXT: sw s6, 8(s0)
|
||||
; RV32I-NEXT: sw s8, 4(s0)
|
||||
; RV32I-NEXT: sw s7, 0(s0)
|
||||
; RV32I-NEXT: lw s9, 4(sp)
|
||||
; RV32I-NEXT: lw s8, 8(sp)
|
||||
; RV32I-NEXT: lw s7, 12(sp)
|
||||
; RV32I-NEXT: lw s6, 16(sp)
|
||||
; RV32I-NEXT: lw s5, 20(sp)
|
||||
; RV32I-NEXT: lw s4, 24(sp)
|
||||
; RV32I-NEXT: lw s3, 28(sp)
|
||||
; RV32I-NEXT: lw s2, 32(sp)
|
||||
; RV32I-NEXT: lw s1, 36(sp)
|
||||
; RV32I-NEXT: lw s0, 40(sp)
|
||||
; RV32I-NEXT: lw ra, 44(sp)
|
||||
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 48
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IM-LABEL: dont_fold_srem_i64:
|
||||
; RV32IM: # %bb.0:
|
||||
; RV32IM-NEXT: addi sp, sp, -48
|
||||
; RV32IM-NEXT: sw ra, 44(sp)
|
||||
; RV32IM-NEXT: sw s0, 40(sp)
|
||||
; RV32IM-NEXT: sw s1, 36(sp)
|
||||
; RV32IM-NEXT: sw s2, 32(sp)
|
||||
; RV32IM-NEXT: sw s3, 28(sp)
|
||||
; RV32IM-NEXT: sw s4, 24(sp)
|
||||
; RV32IM-NEXT: sw s5, 20(sp)
|
||||
; RV32IM-NEXT: sw s6, 16(sp)
|
||||
; RV32IM-NEXT: sw s7, 12(sp)
|
||||
; RV32IM-NEXT: sw s8, 8(sp)
|
||||
; RV32IM-NEXT: sw s9, 4(sp)
|
||||
; RV32IM-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s4, 24(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s5, 20(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s6, 16(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s7, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s8, 8(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s9, 4(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: lw s2, 24(a1)
|
||||
; RV32IM-NEXT: lw s3, 28(a1)
|
||||
; RV32IM-NEXT: lw s4, 16(a1)
|
||||
@@ -1269,21 +1269,21 @@ define <4 x i64> @dont_fold_srem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32IM-NEXT: addi a2, zero, 1
|
||||
; RV32IM-NEXT: mv a0, a3
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __moddi3
|
||||
; RV32IM-NEXT: call __moddi3@plt
|
||||
; RV32IM-NEXT: mv s7, a0
|
||||
; RV32IM-NEXT: mv s8, a1
|
||||
; RV32IM-NEXT: addi a2, zero, 654
|
||||
; RV32IM-NEXT: mv a0, s6
|
||||
; RV32IM-NEXT: mv a1, s1
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __moddi3
|
||||
; RV32IM-NEXT: call __moddi3@plt
|
||||
; RV32IM-NEXT: mv s6, a0
|
||||
; RV32IM-NEXT: mv s9, a1
|
||||
; RV32IM-NEXT: addi a2, zero, 23
|
||||
; RV32IM-NEXT: mv a0, s4
|
||||
; RV32IM-NEXT: mv a1, s5
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __moddi3
|
||||
; RV32IM-NEXT: call __moddi3@plt
|
||||
; RV32IM-NEXT: mv s4, a0
|
||||
; RV32IM-NEXT: mv s1, a1
|
||||
; RV32IM-NEXT: lui a0, 1
|
||||
@@ -1291,7 +1291,7 @@ define <4 x i64> @dont_fold_srem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32IM-NEXT: mv a0, s2
|
||||
; RV32IM-NEXT: mv a1, s3
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __moddi3
|
||||
; RV32IM-NEXT: call __moddi3@plt
|
||||
; RV32IM-NEXT: sw a1, 28(s0)
|
||||
; RV32IM-NEXT: sw a0, 24(s0)
|
||||
; RV32IM-NEXT: sw s1, 20(s0)
|
||||
@@ -1300,53 +1300,53 @@ define <4 x i64> @dont_fold_srem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32IM-NEXT: sw s6, 8(s0)
|
||||
; RV32IM-NEXT: sw s8, 4(s0)
|
||||
; RV32IM-NEXT: sw s7, 0(s0)
|
||||
; RV32IM-NEXT: lw s9, 4(sp)
|
||||
; RV32IM-NEXT: lw s8, 8(sp)
|
||||
; RV32IM-NEXT: lw s7, 12(sp)
|
||||
; RV32IM-NEXT: lw s6, 16(sp)
|
||||
; RV32IM-NEXT: lw s5, 20(sp)
|
||||
; RV32IM-NEXT: lw s4, 24(sp)
|
||||
; RV32IM-NEXT: lw s3, 28(sp)
|
||||
; RV32IM-NEXT: lw s2, 32(sp)
|
||||
; RV32IM-NEXT: lw s1, 36(sp)
|
||||
; RV32IM-NEXT: lw s0, 40(sp)
|
||||
; RV32IM-NEXT: lw ra, 44(sp)
|
||||
; RV32IM-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: addi sp, sp, 48
|
||||
; RV32IM-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: dont_fold_srem_i64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -48
|
||||
; RV64I-NEXT: sd ra, 40(sp)
|
||||
; RV64I-NEXT: sd s0, 32(sp)
|
||||
; RV64I-NEXT: sd s1, 24(sp)
|
||||
; RV64I-NEXT: sd s2, 16(sp)
|
||||
; RV64I-NEXT: sd s3, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: ld s2, 24(a1)
|
||||
; RV64I-NEXT: ld s1, 16(a1)
|
||||
; RV64I-NEXT: ld a2, 8(a1)
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 654
|
||||
; RV64I-NEXT: mv a0, a2
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s3, a0
|
||||
; RV64I-NEXT: addi a1, zero, 23
|
||||
; RV64I-NEXT: mv a0, s1
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: lui a0, 1
|
||||
; RV64I-NEXT: addiw a1, a0, 1327
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __moddi3
|
||||
; RV64I-NEXT: call __moddi3@plt
|
||||
; RV64I-NEXT: sd zero, 0(s0)
|
||||
; RV64I-NEXT: sd a0, 24(s0)
|
||||
; RV64I-NEXT: sd s1, 16(s0)
|
||||
; RV64I-NEXT: sd s3, 8(s0)
|
||||
; RV64I-NEXT: ld s3, 8(sp)
|
||||
; RV64I-NEXT: ld s2, 16(sp)
|
||||
; RV64I-NEXT: ld s1, 24(sp)
|
||||
; RV64I-NEXT: ld s0, 32(sp)
|
||||
; RV64I-NEXT: ld ra, 40(sp)
|
||||
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 48
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -11,9 +11,9 @@ define void @caller(i32 %n) {
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -128
|
||||
; RV32I-NEXT: .cfi_def_cfa_offset 128
|
||||
; RV32I-NEXT: sw ra, 124(sp)
|
||||
; RV32I-NEXT: sw s0, 120(sp)
|
||||
; RV32I-NEXT: sw s1, 116(sp)
|
||||
; RV32I-NEXT: sw ra, 124(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 120(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 116(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: .cfi_offset ra, -4
|
||||
; RV32I-NEXT: .cfi_offset s0, -8
|
||||
; RV32I-NEXT: .cfi_offset s1, -12
|
||||
@@ -26,11 +26,11 @@ define void @caller(i32 %n) {
|
||||
; RV32I-NEXT: sub a0, sp, a0
|
||||
; RV32I-NEXT: mv sp, a0
|
||||
; RV32I-NEXT: addi a1, s1, 64
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: addi sp, s0, -128
|
||||
; RV32I-NEXT: lw s1, 116(sp)
|
||||
; RV32I-NEXT: lw s0, 120(sp)
|
||||
; RV32I-NEXT: lw ra, 124(sp)
|
||||
; RV32I-NEXT: lw s1, 116(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 120(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 124(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 128
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -38,9 +38,9 @@ define void @caller(i32 %n) {
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -128
|
||||
; RV64I-NEXT: .cfi_def_cfa_offset 128
|
||||
; RV64I-NEXT: sd ra, 120(sp)
|
||||
; RV64I-NEXT: sd s0, 112(sp)
|
||||
; RV64I-NEXT: sd s1, 104(sp)
|
||||
; RV64I-NEXT: sd ra, 120(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 112(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 104(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: .cfi_offset ra, -8
|
||||
; RV64I-NEXT: .cfi_offset s0, -16
|
||||
; RV64I-NEXT: .cfi_offset s1, -24
|
||||
@@ -58,11 +58,11 @@ define void @caller(i32 %n) {
|
||||
; RV64I-NEXT: sub a0, sp, a0
|
||||
; RV64I-NEXT: mv sp, a0
|
||||
; RV64I-NEXT: addi a1, s1, 64
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: addi sp, s0, -128
|
||||
; RV64I-NEXT: ld s1, 104(sp)
|
||||
; RV64I-NEXT: ld s0, 112(sp)
|
||||
; RV64I-NEXT: ld ra, 120(sp)
|
||||
; RV64I-NEXT: ld s1, 104(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 112(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 120(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 128
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, i32 %n
|
||||
|
||||
@@ -10,30 +10,30 @@ define void @caller32() nounwind {
|
||||
; RV32I-LABEL: caller32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -64
|
||||
; RV32I-NEXT: sw ra, 60(sp)
|
||||
; RV32I-NEXT: sw s0, 56(sp)
|
||||
; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 64
|
||||
; RV32I-NEXT: andi sp, sp, -32
|
||||
; RV32I-NEXT: addi a0, sp, 32
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: addi sp, s0, -64
|
||||
; RV32I-NEXT: lw s0, 56(sp)
|
||||
; RV32I-NEXT: lw ra, 60(sp)
|
||||
; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 64
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller32:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -64
|
||||
; RV64I-NEXT: sd ra, 56(sp)
|
||||
; RV64I-NEXT: sd s0, 48(sp)
|
||||
; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 64
|
||||
; RV64I-NEXT: andi sp, sp, -32
|
||||
; RV64I-NEXT: addi a0, sp, 32
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: addi sp, s0, -64
|
||||
; RV64I-NEXT: ld s0, 48(sp)
|
||||
; RV64I-NEXT: ld ra, 56(sp)
|
||||
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 64
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 32
|
||||
@@ -45,20 +45,20 @@ define void @caller_no_realign32() nounwind "no-realign-stack" {
|
||||
; RV32I-LABEL: caller_no_realign32:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a0, sp
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller_no_realign32:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a0, sp
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 32
|
||||
@@ -70,30 +70,30 @@ define void @caller64() nounwind {
|
||||
; RV32I-LABEL: caller64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -128
|
||||
; RV32I-NEXT: sw ra, 124(sp)
|
||||
; RV32I-NEXT: sw s0, 120(sp)
|
||||
; RV32I-NEXT: sw ra, 124(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 120(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 128
|
||||
; RV32I-NEXT: andi sp, sp, -64
|
||||
; RV32I-NEXT: addi a0, sp, 64
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: addi sp, s0, -128
|
||||
; RV32I-NEXT: lw s0, 120(sp)
|
||||
; RV32I-NEXT: lw ra, 124(sp)
|
||||
; RV32I-NEXT: lw s0, 120(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 124(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 128
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -128
|
||||
; RV64I-NEXT: sd ra, 120(sp)
|
||||
; RV64I-NEXT: sd s0, 112(sp)
|
||||
; RV64I-NEXT: sd ra, 120(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 112(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 128
|
||||
; RV64I-NEXT: andi sp, sp, -64
|
||||
; RV64I-NEXT: addi a0, sp, 64
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: addi sp, s0, -128
|
||||
; RV64I-NEXT: ld s0, 112(sp)
|
||||
; RV64I-NEXT: ld ra, 120(sp)
|
||||
; RV64I-NEXT: ld s0, 112(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 120(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 128
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 64
|
||||
@@ -105,20 +105,20 @@ define void @caller_no_realign64() nounwind "no-realign-stack" {
|
||||
; RV32I-LABEL: caller_no_realign64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a0, sp
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller_no_realign64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a0, sp
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 64
|
||||
@@ -130,30 +130,30 @@ define void @caller128() nounwind {
|
||||
; RV32I-LABEL: caller128:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -256
|
||||
; RV32I-NEXT: sw ra, 252(sp)
|
||||
; RV32I-NEXT: sw s0, 248(sp)
|
||||
; RV32I-NEXT: sw ra, 252(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 248(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 256
|
||||
; RV32I-NEXT: andi sp, sp, -128
|
||||
; RV32I-NEXT: addi a0, sp, 128
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: addi sp, s0, -256
|
||||
; RV32I-NEXT: lw s0, 248(sp)
|
||||
; RV32I-NEXT: lw ra, 252(sp)
|
||||
; RV32I-NEXT: lw s0, 248(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 252(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 256
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller128:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -256
|
||||
; RV64I-NEXT: sd ra, 248(sp)
|
||||
; RV64I-NEXT: sd s0, 240(sp)
|
||||
; RV64I-NEXT: sd ra, 248(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 240(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 256
|
||||
; RV64I-NEXT: andi sp, sp, -128
|
||||
; RV64I-NEXT: addi a0, sp, 128
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: addi sp, s0, -256
|
||||
; RV64I-NEXT: ld s0, 240(sp)
|
||||
; RV64I-NEXT: ld ra, 248(sp)
|
||||
; RV64I-NEXT: ld s0, 240(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 248(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 256
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 128
|
||||
@@ -165,20 +165,20 @@ define void @caller_no_realign128() nounwind "no-realign-stack" {
|
||||
; RV32I-LABEL: caller_no_realign128:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a0, sp
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller_no_realign128:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a0, sp
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 128
|
||||
@@ -190,30 +190,30 @@ define void @caller256() nounwind {
|
||||
; RV32I-LABEL: caller256:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -512
|
||||
; RV32I-NEXT: sw ra, 508(sp)
|
||||
; RV32I-NEXT: sw s0, 504(sp)
|
||||
; RV32I-NEXT: sw ra, 508(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 504(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 512
|
||||
; RV32I-NEXT: andi sp, sp, -256
|
||||
; RV32I-NEXT: addi a0, sp, 256
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: addi sp, s0, -512
|
||||
; RV32I-NEXT: lw s0, 504(sp)
|
||||
; RV32I-NEXT: lw ra, 508(sp)
|
||||
; RV32I-NEXT: lw s0, 504(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 508(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 512
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller256:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -512
|
||||
; RV64I-NEXT: sd ra, 504(sp)
|
||||
; RV64I-NEXT: sd s0, 496(sp)
|
||||
; RV64I-NEXT: sd ra, 504(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 496(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 512
|
||||
; RV64I-NEXT: andi sp, sp, -256
|
||||
; RV64I-NEXT: addi a0, sp, 256
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: addi sp, s0, -512
|
||||
; RV64I-NEXT: ld s0, 496(sp)
|
||||
; RV64I-NEXT: ld ra, 504(sp)
|
||||
; RV64I-NEXT: ld s0, 496(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 504(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 512
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 256
|
||||
@@ -225,20 +225,20 @@ define void @caller_no_realign256() nounwind "no-realign-stack" {
|
||||
; RV32I-LABEL: caller_no_realign256:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a0, sp
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller_no_realign256:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a0, sp
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 256
|
||||
@@ -250,30 +250,30 @@ define void @caller512() nounwind {
|
||||
; RV32I-LABEL: caller512:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -1536
|
||||
; RV32I-NEXT: sw ra, 1532(sp)
|
||||
; RV32I-NEXT: sw s0, 1528(sp)
|
||||
; RV32I-NEXT: sw ra, 1532(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 1528(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 1536
|
||||
; RV32I-NEXT: andi sp, sp, -512
|
||||
; RV32I-NEXT: addi a0, sp, 1024
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: addi sp, s0, -1536
|
||||
; RV32I-NEXT: lw s0, 1528(sp)
|
||||
; RV32I-NEXT: lw ra, 1532(sp)
|
||||
; RV32I-NEXT: lw s0, 1528(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 1532(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 1536
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller512:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -1536
|
||||
; RV64I-NEXT: sd ra, 1528(sp)
|
||||
; RV64I-NEXT: sd s0, 1520(sp)
|
||||
; RV64I-NEXT: sd ra, 1528(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 1520(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 1536
|
||||
; RV64I-NEXT: andi sp, sp, -512
|
||||
; RV64I-NEXT: addi a0, sp, 1024
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: addi sp, s0, -1536
|
||||
; RV64I-NEXT: ld s0, 1520(sp)
|
||||
; RV64I-NEXT: ld ra, 1528(sp)
|
||||
; RV64I-NEXT: ld s0, 1520(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 1528(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 1536
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 512
|
||||
@@ -285,20 +285,20 @@ define void @caller_no_realign512() nounwind "no-realign-stack" {
|
||||
; RV32I-LABEL: caller_no_realign512:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a0, sp
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller_no_realign512:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a0, sp
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 512
|
||||
@@ -310,8 +310,8 @@ define void @caller1024() nounwind {
|
||||
; RV32I-LABEL: caller1024:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -2032
|
||||
; RV32I-NEXT: sw ra, 2028(sp)
|
||||
; RV32I-NEXT: sw s0, 2024(sp)
|
||||
; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 2032
|
||||
; RV32I-NEXT: addi sp, sp, -1040
|
||||
; RV32I-NEXT: andi sp, sp, -1024
|
||||
@@ -319,21 +319,21 @@ define void @caller1024() nounwind {
|
||||
; RV32I-NEXT: addi a0, a0, -2048
|
||||
; RV32I-NEXT: add a0, sp, a0
|
||||
; RV32I-NEXT: mv a0, a0
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: lui a0, 1
|
||||
; RV32I-NEXT: addi a0, a0, -1024
|
||||
; RV32I-NEXT: sub sp, s0, a0
|
||||
; RV32I-NEXT: addi sp, sp, 1040
|
||||
; RV32I-NEXT: lw s0, 2024(sp)
|
||||
; RV32I-NEXT: lw ra, 2028(sp)
|
||||
; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 2032
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller1024:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -2032
|
||||
; RV64I-NEXT: sd ra, 2024(sp)
|
||||
; RV64I-NEXT: sd s0, 2016(sp)
|
||||
; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 2032
|
||||
; RV64I-NEXT: addi sp, sp, -1040
|
||||
; RV64I-NEXT: andi sp, sp, -1024
|
||||
@@ -341,13 +341,13 @@ define void @caller1024() nounwind {
|
||||
; RV64I-NEXT: addiw a0, a0, -2048
|
||||
; RV64I-NEXT: add a0, sp, a0
|
||||
; RV64I-NEXT: mv a0, a0
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: lui a0, 1
|
||||
; RV64I-NEXT: addiw a0, a0, -1024
|
||||
; RV64I-NEXT: sub sp, s0, a0
|
||||
; RV64I-NEXT: addi sp, sp, 1040
|
||||
; RV64I-NEXT: ld s0, 2016(sp)
|
||||
; RV64I-NEXT: ld ra, 2024(sp)
|
||||
; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 2032
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 1024
|
||||
@@ -359,20 +359,20 @@ define void @caller_no_realign1024() nounwind "no-realign-stack" {
|
||||
; RV32I-LABEL: caller_no_realign1024:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a0, sp
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller_no_realign1024:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a0, sp
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 1024
|
||||
@@ -384,8 +384,8 @@ define void @caller2048() nounwind {
|
||||
; RV32I-LABEL: caller2048:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -2032
|
||||
; RV32I-NEXT: sw ra, 2028(sp)
|
||||
; RV32I-NEXT: sw s0, 2024(sp)
|
||||
; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 2032
|
||||
; RV32I-NEXT: lui a0, 1
|
||||
; RV32I-NEXT: addi a0, a0, 16
|
||||
@@ -394,23 +394,23 @@ define void @caller2048() nounwind {
|
||||
; RV32I-NEXT: lui a0, 1
|
||||
; RV32I-NEXT: add a0, sp, a0
|
||||
; RV32I-NEXT: mv a0, a0
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: lui a0, 2
|
||||
; RV32I-NEXT: addi a0, a0, -2048
|
||||
; RV32I-NEXT: sub sp, s0, a0
|
||||
; RV32I-NEXT: lui a0, 1
|
||||
; RV32I-NEXT: addi a0, a0, 16
|
||||
; RV32I-NEXT: add sp, sp, a0
|
||||
; RV32I-NEXT: lw s0, 2024(sp)
|
||||
; RV32I-NEXT: lw ra, 2028(sp)
|
||||
; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 2032
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller2048:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -2032
|
||||
; RV64I-NEXT: sd ra, 2024(sp)
|
||||
; RV64I-NEXT: sd s0, 2016(sp)
|
||||
; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 2032
|
||||
; RV64I-NEXT: lui a0, 1
|
||||
; RV64I-NEXT: addiw a0, a0, 16
|
||||
@@ -419,15 +419,15 @@ define void @caller2048() nounwind {
|
||||
; RV64I-NEXT: lui a0, 1
|
||||
; RV64I-NEXT: add a0, sp, a0
|
||||
; RV64I-NEXT: mv a0, a0
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: lui a0, 2
|
||||
; RV64I-NEXT: addiw a0, a0, -2048
|
||||
; RV64I-NEXT: sub sp, s0, a0
|
||||
; RV64I-NEXT: lui a0, 1
|
||||
; RV64I-NEXT: addiw a0, a0, 16
|
||||
; RV64I-NEXT: add sp, sp, a0
|
||||
; RV64I-NEXT: ld s0, 2016(sp)
|
||||
; RV64I-NEXT: ld ra, 2024(sp)
|
||||
; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 2032
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 2048
|
||||
@@ -439,20 +439,20 @@ define void @caller_no_realign2048() nounwind "no-realign-stack" {
|
||||
; RV32I-LABEL: caller_no_realign2048:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a0, sp
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller_no_realign2048:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a0, sp
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 2048
|
||||
@@ -464,8 +464,8 @@ define void @caller4096() nounwind {
|
||||
; RV32I-LABEL: caller4096:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -2032
|
||||
; RV32I-NEXT: sw ra, 2028(sp)
|
||||
; RV32I-NEXT: sw s0, 2024(sp)
|
||||
; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi s0, sp, 2032
|
||||
; RV32I-NEXT: lui a0, 3
|
||||
; RV32I-NEXT: addi a0, a0, -2032
|
||||
@@ -475,22 +475,22 @@ define void @caller4096() nounwind {
|
||||
; RV32I-NEXT: lui a0, 2
|
||||
; RV32I-NEXT: add a0, sp, a0
|
||||
; RV32I-NEXT: mv a0, a0
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: lui a0, 3
|
||||
; RV32I-NEXT: sub sp, s0, a0
|
||||
; RV32I-NEXT: lui a0, 3
|
||||
; RV32I-NEXT: addi a0, a0, -2032
|
||||
; RV32I-NEXT: add sp, sp, a0
|
||||
; RV32I-NEXT: lw s0, 2024(sp)
|
||||
; RV32I-NEXT: lw ra, 2028(sp)
|
||||
; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 2032
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller4096:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -2032
|
||||
; RV64I-NEXT: sd ra, 2024(sp)
|
||||
; RV64I-NEXT: sd s0, 2016(sp)
|
||||
; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi s0, sp, 2032
|
||||
; RV64I-NEXT: lui a0, 3
|
||||
; RV64I-NEXT: addiw a0, a0, -2032
|
||||
@@ -500,14 +500,14 @@ define void @caller4096() nounwind {
|
||||
; RV64I-NEXT: lui a0, 2
|
||||
; RV64I-NEXT: add a0, sp, a0
|
||||
; RV64I-NEXT: mv a0, a0
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: lui a0, 3
|
||||
; RV64I-NEXT: sub sp, s0, a0
|
||||
; RV64I-NEXT: lui a0, 3
|
||||
; RV64I-NEXT: addiw a0, a0, -2032
|
||||
; RV64I-NEXT: add sp, sp, a0
|
||||
; RV64I-NEXT: ld s0, 2016(sp)
|
||||
; RV64I-NEXT: ld ra, 2024(sp)
|
||||
; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 2032
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 4096
|
||||
@@ -519,20 +519,20 @@ define void @caller_no_realign4096() nounwind "no-realign-stack" {
|
||||
; RV32I-LABEL: caller_no_realign4096:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv a0, sp
|
||||
; RV32I-NEXT: call callee
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call callee@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: caller_no_realign4096:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: mv a0, sp
|
||||
; RV64I-NEXT: call callee
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call callee@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
%1 = alloca i8, align 4096
|
||||
|
||||
@@ -15,19 +15,19 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-LABEL: main:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: addi sp, sp, -688
|
||||
; CHECK-NEXT: sw ra, 684(sp)
|
||||
; CHECK-NEXT: sw s0, 680(sp)
|
||||
; CHECK-NEXT: sw s1, 676(sp)
|
||||
; CHECK-NEXT: sw s2, 672(sp)
|
||||
; CHECK-NEXT: sw s3, 668(sp)
|
||||
; CHECK-NEXT: sw s4, 664(sp)
|
||||
; CHECK-NEXT: sw s5, 660(sp)
|
||||
; CHECK-NEXT: sw s6, 656(sp)
|
||||
; CHECK-NEXT: sw s7, 652(sp)
|
||||
; CHECK-NEXT: sw s8, 648(sp)
|
||||
; CHECK-NEXT: sw s9, 644(sp)
|
||||
; CHECK-NEXT: sw s10, 640(sp)
|
||||
; CHECK-NEXT: sw s11, 636(sp)
|
||||
; CHECK-NEXT: sw ra, 684(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s0, 680(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s1, 676(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s2, 672(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s3, 668(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s4, 664(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s5, 660(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s6, 656(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s7, 652(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s8, 648(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s9, 644(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s10, 640(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s11, 636(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lui a0, %hi(U)
|
||||
; CHECK-NEXT: lw s6, %lo(U)(a0)
|
||||
; CHECK-NEXT: lw s7, %lo(U+4)(a0)
|
||||
@@ -44,7 +44,7 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: addi a1, sp, 600
|
||||
; CHECK-NEXT: addi a2, sp, 584
|
||||
; CHECK-NEXT: sw s6, 584(sp)
|
||||
; CHECK-NEXT: call __subtf3
|
||||
; CHECK-NEXT: call __subtf3@plt
|
||||
; CHECK-NEXT: lw s3, 616(sp)
|
||||
; CHECK-NEXT: lw s4, 620(sp)
|
||||
; CHECK-NEXT: lw s9, 624(sp)
|
||||
@@ -60,15 +60,15 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: addi a1, sp, 552
|
||||
; CHECK-NEXT: addi a2, sp, 536
|
||||
; CHECK-NEXT: sw s3, 552(sp)
|
||||
; CHECK-NEXT: call __subtf3
|
||||
; CHECK-NEXT: call __subtf3@plt
|
||||
; CHECK-NEXT: lw a0, 568(sp)
|
||||
; CHECK-NEXT: sw a0, 40(sp)
|
||||
; CHECK-NEXT: sw a0, 40(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lw a0, 572(sp)
|
||||
; CHECK-NEXT: sw a0, 32(sp)
|
||||
; CHECK-NEXT: sw a0, 32(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lw a0, 576(sp)
|
||||
; CHECK-NEXT: sw a0, 24(sp)
|
||||
; CHECK-NEXT: sw a0, 24(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lw a0, 580(sp)
|
||||
; CHECK-NEXT: sw a0, 16(sp)
|
||||
; CHECK-NEXT: sw a0, 16(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw zero, 500(sp)
|
||||
; CHECK-NEXT: sw zero, 496(sp)
|
||||
; CHECK-NEXT: sw zero, 492(sp)
|
||||
@@ -80,21 +80,21 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: addi a1, sp, 504
|
||||
; CHECK-NEXT: addi a2, sp, 488
|
||||
; CHECK-NEXT: sw s6, 504(sp)
|
||||
; CHECK-NEXT: call __addtf3
|
||||
; CHECK-NEXT: call __addtf3@plt
|
||||
; CHECK-NEXT: lw s2, 520(sp)
|
||||
; CHECK-NEXT: lw s10, 524(sp)
|
||||
; CHECK-NEXT: lw s5, 528(sp)
|
||||
; CHECK-NEXT: lw s1, 532(sp)
|
||||
; CHECK-NEXT: sw s1, 8(sp)
|
||||
; CHECK-NEXT: sw s1, 8(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lui a0, %hi(Y1)
|
||||
; CHECK-NEXT: lw a1, %lo(Y1)(a0)
|
||||
; CHECK-NEXT: sw a1, 48(sp)
|
||||
; CHECK-NEXT: sw a1, 48(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lw a2, %lo(Y1+4)(a0)
|
||||
; CHECK-NEXT: sw a2, 52(sp)
|
||||
; CHECK-NEXT: sw a2, 52(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lw a3, %lo(Y1+8)(a0)
|
||||
; CHECK-NEXT: sw a3, 4(sp)
|
||||
; CHECK-NEXT: sw a3, 4(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lw a0, %lo(Y1+12)(a0)
|
||||
; CHECK-NEXT: sw a0, 0(sp)
|
||||
; CHECK-NEXT: sw a0, 0(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw a0, 308(sp)
|
||||
; CHECK-NEXT: sw a3, 304(sp)
|
||||
; CHECK-NEXT: sw a2, 300(sp)
|
||||
@@ -106,15 +106,15 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: addi a1, sp, 312
|
||||
; CHECK-NEXT: addi a2, sp, 296
|
||||
; CHECK-NEXT: sw s3, 312(sp)
|
||||
; CHECK-NEXT: call __multf3
|
||||
; CHECK-NEXT: call __multf3@plt
|
||||
; CHECK-NEXT: lw a0, 328(sp)
|
||||
; CHECK-NEXT: sw a0, 44(sp)
|
||||
; CHECK-NEXT: sw a0, 44(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lw a0, 332(sp)
|
||||
; CHECK-NEXT: sw a0, 36(sp)
|
||||
; CHECK-NEXT: sw a0, 36(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lw a0, 336(sp)
|
||||
; CHECK-NEXT: sw a0, 28(sp)
|
||||
; CHECK-NEXT: sw a0, 28(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lw a0, 340(sp)
|
||||
; CHECK-NEXT: sw a0, 20(sp)
|
||||
; CHECK-NEXT: sw a0, 20(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: sw s0, 468(sp)
|
||||
; CHECK-NEXT: sw s8, 464(sp)
|
||||
; CHECK-NEXT: sw s7, 460(sp)
|
||||
@@ -126,7 +126,7 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: addi a1, sp, 456
|
||||
; CHECK-NEXT: addi a2, sp, 440
|
||||
; CHECK-NEXT: sw s2, 440(sp)
|
||||
; CHECK-NEXT: call __addtf3
|
||||
; CHECK-NEXT: call __addtf3@plt
|
||||
; CHECK-NEXT: lw a3, 472(sp)
|
||||
; CHECK-NEXT: lw a0, 476(sp)
|
||||
; CHECK-NEXT: lw a1, 480(sp)
|
||||
@@ -142,7 +142,7 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: addi a1, sp, 408
|
||||
; CHECK-NEXT: addi a2, sp, 392
|
||||
; CHECK-NEXT: sw a3, 392(sp)
|
||||
; CHECK-NEXT: call __subtf3
|
||||
; CHECK-NEXT: call __subtf3@plt
|
||||
; CHECK-NEXT: lw a0, 424(sp)
|
||||
; CHECK-NEXT: lw a1, 436(sp)
|
||||
; CHECK-NEXT: lw a2, 432(sp)
|
||||
@@ -152,28 +152,28 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: sw a2, %lo(X+8)(a4)
|
||||
; CHECK-NEXT: sw a3, %lo(X+4)(a4)
|
||||
; CHECK-NEXT: sw a0, %lo(X)(a4)
|
||||
; CHECK-NEXT: lw s8, 0(sp)
|
||||
; CHECK-NEXT: lw s8, 0(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw s8, 212(sp)
|
||||
; CHECK-NEXT: lw s7, 4(sp)
|
||||
; CHECK-NEXT: lw s7, 4(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw s7, 208(sp)
|
||||
; CHECK-NEXT: lw a0, 52(sp)
|
||||
; CHECK-NEXT: lw a0, 52(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw a0, 204(sp)
|
||||
; CHECK-NEXT: lw a0, 48(sp)
|
||||
; CHECK-NEXT: lw a0, 48(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw a0, 200(sp)
|
||||
; CHECK-NEXT: lw s6, 16(sp)
|
||||
; CHECK-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw s6, 228(sp)
|
||||
; CHECK-NEXT: lw s4, 24(sp)
|
||||
; CHECK-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw s4, 224(sp)
|
||||
; CHECK-NEXT: lw s0, 32(sp)
|
||||
; CHECK-NEXT: lw s0, 32(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw s0, 220(sp)
|
||||
; CHECK-NEXT: addi a0, sp, 232
|
||||
; CHECK-NEXT: addi a1, sp, 216
|
||||
; CHECK-NEXT: addi a2, sp, 200
|
||||
; CHECK-NEXT: lw s1, 40(sp)
|
||||
; CHECK-NEXT: lw s1, 40(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw s1, 216(sp)
|
||||
; CHECK-NEXT: call __multf3
|
||||
; CHECK-NEXT: call __multf3@plt
|
||||
; CHECK-NEXT: lw a0, 232(sp)
|
||||
; CHECK-NEXT: sw a0, 12(sp)
|
||||
; CHECK-NEXT: sw a0, 12(sp) # 4-byte Folded Spill
|
||||
; CHECK-NEXT: lw s3, 236(sp)
|
||||
; CHECK-NEXT: lw s9, 240(sp)
|
||||
; CHECK-NEXT: lw s11, 244(sp)
|
||||
@@ -181,7 +181,7 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: sw zero, 352(sp)
|
||||
; CHECK-NEXT: sw zero, 348(sp)
|
||||
; CHECK-NEXT: sw zero, 344(sp)
|
||||
; CHECK-NEXT: lw a0, 8(sp)
|
||||
; CHECK-NEXT: lw a0, 8(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw a0, 372(sp)
|
||||
; CHECK-NEXT: sw s5, 368(sp)
|
||||
; CHECK-NEXT: sw s10, 364(sp)
|
||||
@@ -189,7 +189,7 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: addi a1, sp, 360
|
||||
; CHECK-NEXT: addi a2, sp, 344
|
||||
; CHECK-NEXT: sw s2, 360(sp)
|
||||
; CHECK-NEXT: call __multf3
|
||||
; CHECK-NEXT: call __multf3@plt
|
||||
; CHECK-NEXT: lw a0, 376(sp)
|
||||
; CHECK-NEXT: lw a1, 388(sp)
|
||||
; CHECK-NEXT: lw a2, 384(sp)
|
||||
@@ -203,18 +203,18 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: sw s4, 256(sp)
|
||||
; CHECK-NEXT: sw s0, 252(sp)
|
||||
; CHECK-NEXT: sw s1, 248(sp)
|
||||
; CHECK-NEXT: lw a0, 20(sp)
|
||||
; CHECK-NEXT: lw a0, 20(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw a0, 276(sp)
|
||||
; CHECK-NEXT: lw a0, 28(sp)
|
||||
; CHECK-NEXT: lw a0, 28(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw a0, 272(sp)
|
||||
; CHECK-NEXT: lw a0, 36(sp)
|
||||
; CHECK-NEXT: lw a0, 36(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw a0, 268(sp)
|
||||
; CHECK-NEXT: addi a0, sp, 280
|
||||
; CHECK-NEXT: addi a1, sp, 264
|
||||
; CHECK-NEXT: addi a2, sp, 248
|
||||
; CHECK-NEXT: lw a3, 44(sp)
|
||||
; CHECK-NEXT: lw a3, 44(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw a3, 264(sp)
|
||||
; CHECK-NEXT: call __subtf3
|
||||
; CHECK-NEXT: call __subtf3@plt
|
||||
; CHECK-NEXT: lw a0, 280(sp)
|
||||
; CHECK-NEXT: lw a1, 292(sp)
|
||||
; CHECK-NEXT: lw a2, 288(sp)
|
||||
@@ -234,9 +234,9 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: addi a0, sp, 184
|
||||
; CHECK-NEXT: addi a1, sp, 168
|
||||
; CHECK-NEXT: addi a2, sp, 152
|
||||
; CHECK-NEXT: lw a3, 12(sp)
|
||||
; CHECK-NEXT: lw a3, 12(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw a3, 168(sp)
|
||||
; CHECK-NEXT: call __addtf3
|
||||
; CHECK-NEXT: call __addtf3@plt
|
||||
; CHECK-NEXT: lw a0, 184(sp)
|
||||
; CHECK-NEXT: lw a1, 196(sp)
|
||||
; CHECK-NEXT: lw a2, 192(sp)
|
||||
@@ -252,14 +252,14 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: sw zero, 104(sp)
|
||||
; CHECK-NEXT: sw s8, 132(sp)
|
||||
; CHECK-NEXT: sw s7, 128(sp)
|
||||
; CHECK-NEXT: lw a0, 52(sp)
|
||||
; CHECK-NEXT: lw a0, 52(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw a0, 124(sp)
|
||||
; CHECK-NEXT: addi a0, sp, 136
|
||||
; CHECK-NEXT: addi a1, sp, 120
|
||||
; CHECK-NEXT: addi a2, sp, 104
|
||||
; CHECK-NEXT: lw a3, 48(sp)
|
||||
; CHECK-NEXT: lw a3, 48(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: sw a3, 120(sp)
|
||||
; CHECK-NEXT: call __multf3
|
||||
; CHECK-NEXT: call __multf3@plt
|
||||
; CHECK-NEXT: lw a3, 136(sp)
|
||||
; CHECK-NEXT: lw a0, 140(sp)
|
||||
; CHECK-NEXT: lw a1, 144(sp)
|
||||
@@ -276,7 +276,7 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: addi a1, sp, 72
|
||||
; CHECK-NEXT: addi a2, sp, 56
|
||||
; CHECK-NEXT: sw a3, 72(sp)
|
||||
; CHECK-NEXT: call __addtf3
|
||||
; CHECK-NEXT: call __addtf3@plt
|
||||
; CHECK-NEXT: lw a0, 96(sp)
|
||||
; CHECK-NEXT: lw a1, 100(sp)
|
||||
; CHECK-NEXT: lw a2, 88(sp)
|
||||
@@ -286,19 +286,19 @@ define void @main() local_unnamed_addr nounwind {
|
||||
; CHECK-NEXT: sw a1, %lo(Y1+12)(a4)
|
||||
; CHECK-NEXT: sw a2, %lo(Y1)(a4)
|
||||
; CHECK-NEXT: sw a3, %lo(Y1+4)(a4)
|
||||
; CHECK-NEXT: lw s11, 636(sp)
|
||||
; CHECK-NEXT: lw s10, 640(sp)
|
||||
; CHECK-NEXT: lw s9, 644(sp)
|
||||
; CHECK-NEXT: lw s8, 648(sp)
|
||||
; CHECK-NEXT: lw s7, 652(sp)
|
||||
; CHECK-NEXT: lw s6, 656(sp)
|
||||
; CHECK-NEXT: lw s5, 660(sp)
|
||||
; CHECK-NEXT: lw s4, 664(sp)
|
||||
; CHECK-NEXT: lw s3, 668(sp)
|
||||
; CHECK-NEXT: lw s2, 672(sp)
|
||||
; CHECK-NEXT: lw s1, 676(sp)
|
||||
; CHECK-NEXT: lw s0, 680(sp)
|
||||
; CHECK-NEXT: lw ra, 684(sp)
|
||||
; CHECK-NEXT: lw s11, 636(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s10, 640(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s9, 644(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s8, 648(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s7, 652(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s6, 656(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s5, 660(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s4, 664(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s3, 668(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s2, 672(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s1, 676(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw s0, 680(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: lw ra, 684(sp) # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi sp, sp, 688
|
||||
; CHECK-NEXT: ret
|
||||
%1 = load fp128, fp128* @U, align 16
|
||||
|
||||
@@ -22,26 +22,26 @@ define i32* @f1() nounwind {
|
||||
; RV32-PIC-LABEL: f1:
|
||||
; RV32-PIC: # %bb.0: # %entry
|
||||
; RV32-PIC-NEXT: addi sp, sp, -16
|
||||
; RV32-PIC-NEXT: sw ra, 12(sp)
|
||||
; RV32-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-PIC-NEXT: .LBB0_1: # %entry
|
||||
; RV32-PIC-NEXT: # Label of block must be emitted
|
||||
; RV32-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(unspecified)
|
||||
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB0_1)
|
||||
; RV32-PIC-NEXT: call __tls_get_addr@plt
|
||||
; RV32-PIC-NEXT: lw ra, 12(sp)
|
||||
; RV32-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-PIC-NEXT: addi sp, sp, 16
|
||||
; RV32-PIC-NEXT: ret
|
||||
;
|
||||
; RV64-PIC-LABEL: f1:
|
||||
; RV64-PIC: # %bb.0: # %entry
|
||||
; RV64-PIC-NEXT: addi sp, sp, -16
|
||||
; RV64-PIC-NEXT: sd ra, 8(sp)
|
||||
; RV64-PIC-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64-PIC-NEXT: .LBB0_1: # %entry
|
||||
; RV64-PIC-NEXT: # Label of block must be emitted
|
||||
; RV64-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(unspecified)
|
||||
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB0_1)
|
||||
; RV64-PIC-NEXT: call __tls_get_addr@plt
|
||||
; RV64-PIC-NEXT: ld ra, 8(sp)
|
||||
; RV64-PIC-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-PIC-NEXT: addi sp, sp, 16
|
||||
; RV64-PIC-NEXT: ret
|
||||
;
|
||||
@@ -73,26 +73,26 @@ define i32* @f2() nounwind {
|
||||
; RV32-PIC-LABEL: f2:
|
||||
; RV32-PIC: # %bb.0: # %entry
|
||||
; RV32-PIC-NEXT: addi sp, sp, -16
|
||||
; RV32-PIC-NEXT: sw ra, 12(sp)
|
||||
; RV32-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32-PIC-NEXT: .LBB1_1: # %entry
|
||||
; RV32-PIC-NEXT: # Label of block must be emitted
|
||||
; RV32-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(ld)
|
||||
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
|
||||
; RV32-PIC-NEXT: call __tls_get_addr@plt
|
||||
; RV32-PIC-NEXT: lw ra, 12(sp)
|
||||
; RV32-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32-PIC-NEXT: addi sp, sp, 16
|
||||
; RV32-PIC-NEXT: ret
|
||||
;
|
||||
; RV64-PIC-LABEL: f2:
|
||||
; RV64-PIC: # %bb.0: # %entry
|
||||
; RV64-PIC-NEXT: addi sp, sp, -16
|
||||
; RV64-PIC-NEXT: sd ra, 8(sp)
|
||||
; RV64-PIC-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64-PIC-NEXT: .LBB1_1: # %entry
|
||||
; RV64-PIC-NEXT: # Label of block must be emitted
|
||||
; RV64-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(ld)
|
||||
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
|
||||
; RV64-PIC-NEXT: call __tls_get_addr@plt
|
||||
; RV64-PIC-NEXT: ld ra, 8(sp)
|
||||
; RV64-PIC-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64-PIC-NEXT: addi sp, sp, 16
|
||||
; RV64-PIC-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -5,16 +5,16 @@ define { i128, i8 } @muloti_test(i128 %l, i128 %r) #0 {
|
||||
; RISCV32-LABEL: muloti_test:
|
||||
; RISCV32: # %bb.0: # %start
|
||||
; RISCV32-NEXT: addi sp, sp, -96
|
||||
; RISCV32-NEXT: sw ra, 92(sp)
|
||||
; RISCV32-NEXT: sw s0, 88(sp)
|
||||
; RISCV32-NEXT: sw s1, 84(sp)
|
||||
; RISCV32-NEXT: sw s2, 80(sp)
|
||||
; RISCV32-NEXT: sw s3, 76(sp)
|
||||
; RISCV32-NEXT: sw s4, 72(sp)
|
||||
; RISCV32-NEXT: sw s5, 68(sp)
|
||||
; RISCV32-NEXT: sw s6, 64(sp)
|
||||
; RISCV32-NEXT: sw s7, 60(sp)
|
||||
; RISCV32-NEXT: sw s8, 56(sp)
|
||||
; RISCV32-NEXT: sw ra, 92(sp) # 4-byte Folded Spill
|
||||
; RISCV32-NEXT: sw s0, 88(sp) # 4-byte Folded Spill
|
||||
; RISCV32-NEXT: sw s1, 84(sp) # 4-byte Folded Spill
|
||||
; RISCV32-NEXT: sw s2, 80(sp) # 4-byte Folded Spill
|
||||
; RISCV32-NEXT: sw s3, 76(sp) # 4-byte Folded Spill
|
||||
; RISCV32-NEXT: sw s4, 72(sp) # 4-byte Folded Spill
|
||||
; RISCV32-NEXT: sw s5, 68(sp) # 4-byte Folded Spill
|
||||
; RISCV32-NEXT: sw s6, 64(sp) # 4-byte Folded Spill
|
||||
; RISCV32-NEXT: sw s7, 60(sp) # 4-byte Folded Spill
|
||||
; RISCV32-NEXT: sw s8, 56(sp) # 4-byte Folded Spill
|
||||
; RISCV32-NEXT: lw s2, 12(a1)
|
||||
; RISCV32-NEXT: lw s6, 8(a1)
|
||||
; RISCV32-NEXT: lw s3, 12(a2)
|
||||
@@ -35,7 +35,7 @@ define { i128, i8 } @muloti_test(i128 %l, i128 %r) #0 {
|
||||
; RISCV32-NEXT: addi a1, sp, 24
|
||||
; RISCV32-NEXT: addi a2, sp, 8
|
||||
; RISCV32-NEXT: sw s0, 24(sp)
|
||||
; RISCV32-NEXT: call __multi3
|
||||
; RISCV32-NEXT: call __multi3@plt
|
||||
; RISCV32-NEXT: mul a0, s8, s7
|
||||
; RISCV32-NEXT: mul a1, s3, s0
|
||||
; RISCV32-NEXT: add a0, a1, a0
|
||||
@@ -100,16 +100,16 @@ define { i128, i8 } @muloti_test(i128 %l, i128 %r) #0 {
|
||||
; RISCV32-NEXT: sw a6, 8(s4)
|
||||
; RISCV32-NEXT: sw a7, 12(s4)
|
||||
; RISCV32-NEXT: sb a0, 16(s4)
|
||||
; RISCV32-NEXT: lw s8, 56(sp)
|
||||
; RISCV32-NEXT: lw s7, 60(sp)
|
||||
; RISCV32-NEXT: lw s6, 64(sp)
|
||||
; RISCV32-NEXT: lw s5, 68(sp)
|
||||
; RISCV32-NEXT: lw s4, 72(sp)
|
||||
; RISCV32-NEXT: lw s3, 76(sp)
|
||||
; RISCV32-NEXT: lw s2, 80(sp)
|
||||
; RISCV32-NEXT: lw s1, 84(sp)
|
||||
; RISCV32-NEXT: lw s0, 88(sp)
|
||||
; RISCV32-NEXT: lw ra, 92(sp)
|
||||
; RISCV32-NEXT: lw s8, 56(sp) # 4-byte Folded Reload
|
||||
; RISCV32-NEXT: lw s7, 60(sp) # 4-byte Folded Reload
|
||||
; RISCV32-NEXT: lw s6, 64(sp) # 4-byte Folded Reload
|
||||
; RISCV32-NEXT: lw s5, 68(sp) # 4-byte Folded Reload
|
||||
; RISCV32-NEXT: lw s4, 72(sp) # 4-byte Folded Reload
|
||||
; RISCV32-NEXT: lw s3, 76(sp) # 4-byte Folded Reload
|
||||
; RISCV32-NEXT: lw s2, 80(sp) # 4-byte Folded Reload
|
||||
; RISCV32-NEXT: lw s1, 84(sp) # 4-byte Folded Reload
|
||||
; RISCV32-NEXT: lw s0, 88(sp) # 4-byte Folded Reload
|
||||
; RISCV32-NEXT: lw ra, 92(sp) # 4-byte Folded Reload
|
||||
; RISCV32-NEXT: addi sp, sp, 96
|
||||
; RISCV32-NEXT: ret
|
||||
start:
|
||||
|
||||
@@ -12,10 +12,10 @@ define i32 @fold_urem_positive_odd(i32 %x) nounwind {
|
||||
; RV32I-LABEL: fold_urem_positive_odd:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -36,12 +36,12 @@ define i32 @fold_urem_positive_odd(i32 %x) nounwind {
|
||||
; RV64I-LABEL: fold_urem_positive_odd:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: slli a0, a0, 32
|
||||
; RV64I-NEXT: srli a0, a0, 32
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -75,10 +75,10 @@ define i32 @fold_urem_positive_even(i32 %x) nounwind {
|
||||
; RV32I-LABEL: fold_urem_positive_even:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a1, zero, 1060
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -96,12 +96,12 @@ define i32 @fold_urem_positive_even(i32 %x) nounwind {
|
||||
; RV64I-LABEL: fold_urem_positive_even:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: slli a0, a0, 32
|
||||
; RV64I-NEXT: srli a0, a0, 32
|
||||
; RV64I-NEXT: addi a1, zero, 1060
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -133,20 +133,20 @@ define i32 @combine_urem_udiv(i32 %x) nounwind {
|
||||
; RV32I-LABEL: combine_urem_udiv:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: sw s1, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: call __udivsi3
|
||||
; RV32I-NEXT: call __udivsi3@plt
|
||||
; RV32I-NEXT: add a0, s1, a0
|
||||
; RV32I-NEXT: lw s1, 4(sp)
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -168,22 +168,22 @@ define i32 @combine_urem_udiv(i32 %x) nounwind {
|
||||
; RV64I-LABEL: combine_urem_udiv:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -32
|
||||
; RV64I-NEXT: sd ra, 24(sp)
|
||||
; RV64I-NEXT: sd s0, 16(sp)
|
||||
; RV64I-NEXT: sd s1, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: slli a0, a0, 32
|
||||
; RV64I-NEXT: srli s0, a0, 32
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: call __udivdi3
|
||||
; RV64I-NEXT: call __udivdi3@plt
|
||||
; RV64I-NEXT: add a0, s1, a0
|
||||
; RV64I-NEXT: ld s1, 8(sp)
|
||||
; RV64I-NEXT: ld s0, 16(sp)
|
||||
; RV64I-NEXT: ld ra, 24(sp)
|
||||
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 32
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -249,32 +249,32 @@ define i64 @dont_fold_urem_i64(i64 %x) nounwind {
|
||||
; RV32I-LABEL: dont_fold_urem_i64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: addi a2, zero, 98
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __umoddi3
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: call __umoddi3@plt
|
||||
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IM-LABEL: dont_fold_urem_i64:
|
||||
; RV32IM: # %bb.0:
|
||||
; RV32IM-NEXT: addi sp, sp, -16
|
||||
; RV32IM-NEXT: sw ra, 12(sp)
|
||||
; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: addi a2, zero, 98
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __umoddi3
|
||||
; RV32IM-NEXT: lw ra, 12(sp)
|
||||
; RV32IM-NEXT: call __umoddi3@plt
|
||||
; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: addi sp, sp, 16
|
||||
; RV32IM-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: dont_fold_urem_i64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -16
|
||||
; RV64I-NEXT: sd ra, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: addi a1, zero, 98
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: ld ra, 8(sp)
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 16
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -13,13 +13,13 @@ define <4 x i16> @fold_urem_vec_1(<4 x i16> %x) nounwind {
|
||||
; RV32I-LABEL: fold_urem_vec_1:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw s4, 8(sp)
|
||||
; RV32I-NEXT: sw s5, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lhu s2, 12(a1)
|
||||
; RV32I-NEXT: lhu s3, 8(a1)
|
||||
; RV32I-NEXT: lhu s0, 4(a1)
|
||||
@@ -27,30 +27,30 @@ define <4 x i16> @fold_urem_vec_1(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, a2
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: addi a1, zero, 124
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s5, a0
|
||||
; RV32I-NEXT: addi a1, zero, 98
|
||||
; RV32I-NEXT: mv a0, s3
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: addi a1, zero, 1003
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: sh a0, 6(s1)
|
||||
; RV32I-NEXT: sh s0, 4(s1)
|
||||
; RV32I-NEXT: sh s5, 2(s1)
|
||||
; RV32I-NEXT: sh s4, 0(s1)
|
||||
; RV32I-NEXT: lw s5, 4(sp)
|
||||
; RV32I-NEXT: lw s4, 8(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -101,13 +101,13 @@ define <4 x i16> @fold_urem_vec_1(<4 x i16> %x) nounwind {
|
||||
; RV64I-LABEL: fold_urem_vec_1:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -64
|
||||
; RV64I-NEXT: sd ra, 56(sp)
|
||||
; RV64I-NEXT: sd s0, 48(sp)
|
||||
; RV64I-NEXT: sd s1, 40(sp)
|
||||
; RV64I-NEXT: sd s2, 32(sp)
|
||||
; RV64I-NEXT: sd s3, 24(sp)
|
||||
; RV64I-NEXT: sd s4, 16(sp)
|
||||
; RV64I-NEXT: sd s5, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s4, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s5, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: lhu s2, 24(a1)
|
||||
; RV64I-NEXT: lhu s3, 16(a1)
|
||||
; RV64I-NEXT: lhu s0, 8(a1)
|
||||
@@ -115,30 +115,30 @@ define <4 x i16> @fold_urem_vec_1(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, a2
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s4, a0
|
||||
; RV64I-NEXT: addi a1, zero, 124
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s5, a0
|
||||
; RV64I-NEXT: addi a1, zero, 98
|
||||
; RV64I-NEXT: mv a0, s3
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 1003
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: sh a0, 6(s1)
|
||||
; RV64I-NEXT: sh s0, 4(s1)
|
||||
; RV64I-NEXT: sh s5, 2(s1)
|
||||
; RV64I-NEXT: sh s4, 0(s1)
|
||||
; RV64I-NEXT: ld s5, 8(sp)
|
||||
; RV64I-NEXT: ld s4, 16(sp)
|
||||
; RV64I-NEXT: ld s3, 24(sp)
|
||||
; RV64I-NEXT: ld s2, 32(sp)
|
||||
; RV64I-NEXT: ld s1, 40(sp)
|
||||
; RV64I-NEXT: ld s0, 48(sp)
|
||||
; RV64I-NEXT: ld ra, 56(sp)
|
||||
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 64
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -218,13 +218,13 @@ define <4 x i16> @fold_urem_vec_2(<4 x i16> %x) nounwind {
|
||||
; RV32I-LABEL: fold_urem_vec_2:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw s4, 8(sp)
|
||||
; RV32I-NEXT: sw s5, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lhu s2, 12(a1)
|
||||
; RV32I-NEXT: lhu s3, 8(a1)
|
||||
; RV32I-NEXT: lhu s0, 4(a1)
|
||||
@@ -232,30 +232,30 @@ define <4 x i16> @fold_urem_vec_2(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, a2
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s0
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s5, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s3
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: sh a0, 6(s1)
|
||||
; RV32I-NEXT: sh s0, 4(s1)
|
||||
; RV32I-NEXT: sh s5, 2(s1)
|
||||
; RV32I-NEXT: sh s4, 0(s1)
|
||||
; RV32I-NEXT: lw s5, 4(sp)
|
||||
; RV32I-NEXT: lw s4, 8(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -305,13 +305,13 @@ define <4 x i16> @fold_urem_vec_2(<4 x i16> %x) nounwind {
|
||||
; RV64I-LABEL: fold_urem_vec_2:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -64
|
||||
; RV64I-NEXT: sd ra, 56(sp)
|
||||
; RV64I-NEXT: sd s0, 48(sp)
|
||||
; RV64I-NEXT: sd s1, 40(sp)
|
||||
; RV64I-NEXT: sd s2, 32(sp)
|
||||
; RV64I-NEXT: sd s3, 24(sp)
|
||||
; RV64I-NEXT: sd s4, 16(sp)
|
||||
; RV64I-NEXT: sd s5, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s4, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s5, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: lhu s2, 24(a1)
|
||||
; RV64I-NEXT: lhu s3, 16(a1)
|
||||
; RV64I-NEXT: lhu s0, 8(a1)
|
||||
@@ -319,30 +319,30 @@ define <4 x i16> @fold_urem_vec_2(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, a2
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s4, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s0
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s5, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s3
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: sh a0, 6(s1)
|
||||
; RV64I-NEXT: sh s0, 4(s1)
|
||||
; RV64I-NEXT: sh s5, 2(s1)
|
||||
; RV64I-NEXT: sh s4, 0(s1)
|
||||
; RV64I-NEXT: ld s5, 8(sp)
|
||||
; RV64I-NEXT: ld s4, 16(sp)
|
||||
; RV64I-NEXT: ld s3, 24(sp)
|
||||
; RV64I-NEXT: ld s2, 32(sp)
|
||||
; RV64I-NEXT: ld s1, 40(sp)
|
||||
; RV64I-NEXT: ld s0, 48(sp)
|
||||
; RV64I-NEXT: ld ra, 56(sp)
|
||||
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 64
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -404,17 +404,17 @@ define <4 x i16> @combine_urem_udiv(<4 x i16> %x) nounwind {
|
||||
; RV32I-LABEL: combine_urem_udiv:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -48
|
||||
; RV32I-NEXT: sw ra, 44(sp)
|
||||
; RV32I-NEXT: sw s0, 40(sp)
|
||||
; RV32I-NEXT: sw s1, 36(sp)
|
||||
; RV32I-NEXT: sw s2, 32(sp)
|
||||
; RV32I-NEXT: sw s3, 28(sp)
|
||||
; RV32I-NEXT: sw s4, 24(sp)
|
||||
; RV32I-NEXT: sw s5, 20(sp)
|
||||
; RV32I-NEXT: sw s6, 16(sp)
|
||||
; RV32I-NEXT: sw s7, 12(sp)
|
||||
; RV32I-NEXT: sw s8, 8(sp)
|
||||
; RV32I-NEXT: sw s9, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s6, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s7, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s8, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s9, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lhu s2, 0(a1)
|
||||
; RV32I-NEXT: lhu s3, 4(a1)
|
||||
; RV32I-NEXT: lhu s4, 8(a1)
|
||||
@@ -422,35 +422,35 @@ define <4 x i16> @combine_urem_udiv(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s1
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s5, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s4
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s6, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s3
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s7, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s8, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s1
|
||||
; RV32I-NEXT: call __udivsi3
|
||||
; RV32I-NEXT: call __udivsi3@plt
|
||||
; RV32I-NEXT: mv s9, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s4
|
||||
; RV32I-NEXT: call __udivsi3
|
||||
; RV32I-NEXT: call __udivsi3@plt
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s3
|
||||
; RV32I-NEXT: call __udivsi3
|
||||
; RV32I-NEXT: call __udivsi3@plt
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: call __udivsi3
|
||||
; RV32I-NEXT: call __udivsi3@plt
|
||||
; RV32I-NEXT: add a0, s8, a0
|
||||
; RV32I-NEXT: add a1, s7, s1
|
||||
; RV32I-NEXT: add a2, s6, s4
|
||||
@@ -459,17 +459,17 @@ define <4 x i16> @combine_urem_udiv(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: sh a2, 4(s0)
|
||||
; RV32I-NEXT: sh a1, 2(s0)
|
||||
; RV32I-NEXT: sh a0, 0(s0)
|
||||
; RV32I-NEXT: lw s9, 4(sp)
|
||||
; RV32I-NEXT: lw s8, 8(sp)
|
||||
; RV32I-NEXT: lw s7, 12(sp)
|
||||
; RV32I-NEXT: lw s6, 16(sp)
|
||||
; RV32I-NEXT: lw s5, 20(sp)
|
||||
; RV32I-NEXT: lw s4, 24(sp)
|
||||
; RV32I-NEXT: lw s3, 28(sp)
|
||||
; RV32I-NEXT: lw s2, 32(sp)
|
||||
; RV32I-NEXT: lw s1, 36(sp)
|
||||
; RV32I-NEXT: lw s0, 40(sp)
|
||||
; RV32I-NEXT: lw ra, 44(sp)
|
||||
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 48
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -523,17 +523,17 @@ define <4 x i16> @combine_urem_udiv(<4 x i16> %x) nounwind {
|
||||
; RV64I-LABEL: combine_urem_udiv:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -96
|
||||
; RV64I-NEXT: sd ra, 88(sp)
|
||||
; RV64I-NEXT: sd s0, 80(sp)
|
||||
; RV64I-NEXT: sd s1, 72(sp)
|
||||
; RV64I-NEXT: sd s2, 64(sp)
|
||||
; RV64I-NEXT: sd s3, 56(sp)
|
||||
; RV64I-NEXT: sd s4, 48(sp)
|
||||
; RV64I-NEXT: sd s5, 40(sp)
|
||||
; RV64I-NEXT: sd s6, 32(sp)
|
||||
; RV64I-NEXT: sd s7, 24(sp)
|
||||
; RV64I-NEXT: sd s8, 16(sp)
|
||||
; RV64I-NEXT: sd s9, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 88(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 80(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 72(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 64(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 56(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s4, 48(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s5, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s6, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s7, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s8, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s9, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: lhu s2, 0(a1)
|
||||
; RV64I-NEXT: lhu s3, 8(a1)
|
||||
; RV64I-NEXT: lhu s4, 16(a1)
|
||||
@@ -541,35 +541,35 @@ define <4 x i16> @combine_urem_udiv(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s1
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s5, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s4
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s6, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s3
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s7, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s8, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s1
|
||||
; RV64I-NEXT: call __udivdi3
|
||||
; RV64I-NEXT: call __udivdi3@plt
|
||||
; RV64I-NEXT: mv s9, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s4
|
||||
; RV64I-NEXT: call __udivdi3
|
||||
; RV64I-NEXT: call __udivdi3@plt
|
||||
; RV64I-NEXT: mv s4, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s3
|
||||
; RV64I-NEXT: call __udivdi3
|
||||
; RV64I-NEXT: call __udivdi3@plt
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __udivdi3
|
||||
; RV64I-NEXT: call __udivdi3@plt
|
||||
; RV64I-NEXT: add a0, s8, a0
|
||||
; RV64I-NEXT: add a1, s7, s1
|
||||
; RV64I-NEXT: add a2, s6, s4
|
||||
@@ -578,17 +578,17 @@ define <4 x i16> @combine_urem_udiv(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: sh a2, 4(s0)
|
||||
; RV64I-NEXT: sh a1, 2(s0)
|
||||
; RV64I-NEXT: sh a0, 0(s0)
|
||||
; RV64I-NEXT: ld s9, 8(sp)
|
||||
; RV64I-NEXT: ld s8, 16(sp)
|
||||
; RV64I-NEXT: ld s7, 24(sp)
|
||||
; RV64I-NEXT: ld s6, 32(sp)
|
||||
; RV64I-NEXT: ld s5, 40(sp)
|
||||
; RV64I-NEXT: ld s4, 48(sp)
|
||||
; RV64I-NEXT: ld s3, 56(sp)
|
||||
; RV64I-NEXT: ld s2, 64(sp)
|
||||
; RV64I-NEXT: ld s1, 72(sp)
|
||||
; RV64I-NEXT: ld s0, 80(sp)
|
||||
; RV64I-NEXT: ld ra, 88(sp)
|
||||
; RV64I-NEXT: ld s9, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s8, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s7, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s6, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s5, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s4, 48(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s3, 56(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 64(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 72(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 80(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 88(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 96
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -655,11 +655,11 @@ define <4 x i16> @dont_fold_urem_power_of_two(<4 x i16> %x) nounwind {
|
||||
; RV32I-LABEL: dont_fold_urem_power_of_two:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lhu s2, 8(a1)
|
||||
; RV32I-NEXT: lhu s3, 4(a1)
|
||||
; RV32I-NEXT: lhu s1, 0(a1)
|
||||
@@ -667,7 +667,7 @@ define <4 x i16> @dont_fold_urem_power_of_two(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: addi a1, zero, 95
|
||||
; RV32I-NEXT: mv a0, a2
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: andi a1, s1, 63
|
||||
; RV32I-NEXT: andi a2, s3, 31
|
||||
; RV32I-NEXT: andi a3, s2, 7
|
||||
@@ -675,11 +675,11 @@ define <4 x i16> @dont_fold_urem_power_of_two(<4 x i16> %x) nounwind {
|
||||
; RV32I-NEXT: sh a3, 4(s0)
|
||||
; RV32I-NEXT: sh a2, 2(s0)
|
||||
; RV32I-NEXT: sh a1, 0(s0)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -711,11 +711,11 @@ define <4 x i16> @dont_fold_urem_power_of_two(<4 x i16> %x) nounwind {
|
||||
; RV64I-LABEL: dont_fold_urem_power_of_two:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -48
|
||||
; RV64I-NEXT: sd ra, 40(sp)
|
||||
; RV64I-NEXT: sd s0, 32(sp)
|
||||
; RV64I-NEXT: sd s1, 24(sp)
|
||||
; RV64I-NEXT: sd s2, 16(sp)
|
||||
; RV64I-NEXT: sd s3, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: lhu s2, 16(a1)
|
||||
; RV64I-NEXT: lhu s3, 8(a1)
|
||||
; RV64I-NEXT: lhu s1, 0(a1)
|
||||
@@ -723,7 +723,7 @@ define <4 x i16> @dont_fold_urem_power_of_two(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 95
|
||||
; RV64I-NEXT: mv a0, a2
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: andi a1, s1, 63
|
||||
; RV64I-NEXT: andi a2, s3, 31
|
||||
; RV64I-NEXT: andi a3, s2, 7
|
||||
@@ -731,11 +731,11 @@ define <4 x i16> @dont_fold_urem_power_of_two(<4 x i16> %x) nounwind {
|
||||
; RV64I-NEXT: sh a3, 4(s0)
|
||||
; RV64I-NEXT: sh a2, 2(s0)
|
||||
; RV64I-NEXT: sh a1, 0(s0)
|
||||
; RV64I-NEXT: ld s3, 8(sp)
|
||||
; RV64I-NEXT: ld s2, 16(sp)
|
||||
; RV64I-NEXT: ld s1, 24(sp)
|
||||
; RV64I-NEXT: ld s0, 32(sp)
|
||||
; RV64I-NEXT: ld ra, 40(sp)
|
||||
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 48
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -778,36 +778,36 @@ define <4 x i16> @dont_fold_urem_one(<4 x i16> %x) nounwind {
|
||||
; RV32I-LABEL: dont_fold_urem_one:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -32
|
||||
; RV32I-NEXT: sw ra, 28(sp)
|
||||
; RV32I-NEXT: sw s0, 24(sp)
|
||||
; RV32I-NEXT: sw s1, 20(sp)
|
||||
; RV32I-NEXT: sw s2, 16(sp)
|
||||
; RV32I-NEXT: sw s3, 12(sp)
|
||||
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lhu s2, 12(a1)
|
||||
; RV32I-NEXT: lhu s1, 8(a1)
|
||||
; RV32I-NEXT: lhu a2, 4(a1)
|
||||
; RV32I-NEXT: mv s0, a0
|
||||
; RV32I-NEXT: addi a1, zero, 654
|
||||
; RV32I-NEXT: mv a0, a2
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s3, a0
|
||||
; RV32I-NEXT: addi a1, zero, 23
|
||||
; RV32I-NEXT: mv a0, s1
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: mv s1, a0
|
||||
; RV32I-NEXT: lui a0, 1
|
||||
; RV32I-NEXT: addi a1, a0, 1327
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: call __umodsi3
|
||||
; RV32I-NEXT: call __umodsi3@plt
|
||||
; RV32I-NEXT: sh zero, 0(s0)
|
||||
; RV32I-NEXT: sh a0, 6(s0)
|
||||
; RV32I-NEXT: sh s1, 4(s0)
|
||||
; RV32I-NEXT: sh s3, 2(s0)
|
||||
; RV32I-NEXT: lw s3, 12(sp)
|
||||
; RV32I-NEXT: lw s2, 16(sp)
|
||||
; RV32I-NEXT: lw s1, 20(sp)
|
||||
; RV32I-NEXT: lw s0, 24(sp)
|
||||
; RV32I-NEXT: lw ra, 28(sp)
|
||||
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 32
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
@@ -848,36 +848,36 @@ define <4 x i16> @dont_fold_urem_one(<4 x i16> %x) nounwind {
|
||||
; RV64I-LABEL: dont_fold_urem_one:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -48
|
||||
; RV64I-NEXT: sd ra, 40(sp)
|
||||
; RV64I-NEXT: sd s0, 32(sp)
|
||||
; RV64I-NEXT: sd s1, 24(sp)
|
||||
; RV64I-NEXT: sd s2, 16(sp)
|
||||
; RV64I-NEXT: sd s3, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: lhu s2, 24(a1)
|
||||
; RV64I-NEXT: lhu s1, 16(a1)
|
||||
; RV64I-NEXT: lhu a2, 8(a1)
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 654
|
||||
; RV64I-NEXT: mv a0, a2
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s3, a0
|
||||
; RV64I-NEXT: addi a1, zero, 23
|
||||
; RV64I-NEXT: mv a0, s1
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: lui a0, 1
|
||||
; RV64I-NEXT: addiw a1, a0, 1327
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: sh zero, 0(s0)
|
||||
; RV64I-NEXT: sh a0, 6(s0)
|
||||
; RV64I-NEXT: sh s1, 4(s0)
|
||||
; RV64I-NEXT: sh s3, 2(s0)
|
||||
; RV64I-NEXT: ld s3, 8(sp)
|
||||
; RV64I-NEXT: ld s2, 16(sp)
|
||||
; RV64I-NEXT: ld s1, 24(sp)
|
||||
; RV64I-NEXT: ld s0, 32(sp)
|
||||
; RV64I-NEXT: ld ra, 40(sp)
|
||||
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 48
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
@@ -953,17 +953,17 @@ define <4 x i64> @dont_fold_urem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32I-LABEL: dont_fold_urem_i64:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -48
|
||||
; RV32I-NEXT: sw ra, 44(sp)
|
||||
; RV32I-NEXT: sw s0, 40(sp)
|
||||
; RV32I-NEXT: sw s1, 36(sp)
|
||||
; RV32I-NEXT: sw s2, 32(sp)
|
||||
; RV32I-NEXT: sw s3, 28(sp)
|
||||
; RV32I-NEXT: sw s4, 24(sp)
|
||||
; RV32I-NEXT: sw s5, 20(sp)
|
||||
; RV32I-NEXT: sw s6, 16(sp)
|
||||
; RV32I-NEXT: sw s7, 12(sp)
|
||||
; RV32I-NEXT: sw s8, 8(sp)
|
||||
; RV32I-NEXT: sw s9, 4(sp)
|
||||
; RV32I-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s4, 24(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s5, 20(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s6, 16(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s7, 12(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s8, 8(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: sw s9, 4(sp) # 4-byte Folded Spill
|
||||
; RV32I-NEXT: lw s2, 24(a1)
|
||||
; RV32I-NEXT: lw s3, 28(a1)
|
||||
; RV32I-NEXT: lw s4, 16(a1)
|
||||
@@ -976,21 +976,21 @@ define <4 x i64> @dont_fold_urem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32I-NEXT: addi a2, zero, 1
|
||||
; RV32I-NEXT: mv a0, a3
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __umoddi3
|
||||
; RV32I-NEXT: call __umoddi3@plt
|
||||
; RV32I-NEXT: mv s7, a0
|
||||
; RV32I-NEXT: mv s8, a1
|
||||
; RV32I-NEXT: addi a2, zero, 654
|
||||
; RV32I-NEXT: mv a0, s6
|
||||
; RV32I-NEXT: mv a1, s1
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __umoddi3
|
||||
; RV32I-NEXT: call __umoddi3@plt
|
||||
; RV32I-NEXT: mv s6, a0
|
||||
; RV32I-NEXT: mv s9, a1
|
||||
; RV32I-NEXT: addi a2, zero, 23
|
||||
; RV32I-NEXT: mv a0, s4
|
||||
; RV32I-NEXT: mv a1, s5
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __umoddi3
|
||||
; RV32I-NEXT: call __umoddi3@plt
|
||||
; RV32I-NEXT: mv s4, a0
|
||||
; RV32I-NEXT: mv s1, a1
|
||||
; RV32I-NEXT: lui a0, 1
|
||||
@@ -998,7 +998,7 @@ define <4 x i64> @dont_fold_urem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32I-NEXT: mv a0, s2
|
||||
; RV32I-NEXT: mv a1, s3
|
||||
; RV32I-NEXT: mv a3, zero
|
||||
; RV32I-NEXT: call __umoddi3
|
||||
; RV32I-NEXT: call __umoddi3@plt
|
||||
; RV32I-NEXT: sw a1, 28(s0)
|
||||
; RV32I-NEXT: sw a0, 24(s0)
|
||||
; RV32I-NEXT: sw s1, 20(s0)
|
||||
@@ -1007,34 +1007,34 @@ define <4 x i64> @dont_fold_urem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32I-NEXT: sw s6, 8(s0)
|
||||
; RV32I-NEXT: sw s8, 4(s0)
|
||||
; RV32I-NEXT: sw s7, 0(s0)
|
||||
; RV32I-NEXT: lw s9, 4(sp)
|
||||
; RV32I-NEXT: lw s8, 8(sp)
|
||||
; RV32I-NEXT: lw s7, 12(sp)
|
||||
; RV32I-NEXT: lw s6, 16(sp)
|
||||
; RV32I-NEXT: lw s5, 20(sp)
|
||||
; RV32I-NEXT: lw s4, 24(sp)
|
||||
; RV32I-NEXT: lw s3, 28(sp)
|
||||
; RV32I-NEXT: lw s2, 32(sp)
|
||||
; RV32I-NEXT: lw s1, 36(sp)
|
||||
; RV32I-NEXT: lw s0, 40(sp)
|
||||
; RV32I-NEXT: lw ra, 44(sp)
|
||||
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32I-NEXT: addi sp, sp, 48
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32IM-LABEL: dont_fold_urem_i64:
|
||||
; RV32IM: # %bb.0:
|
||||
; RV32IM-NEXT: addi sp, sp, -48
|
||||
; RV32IM-NEXT: sw ra, 44(sp)
|
||||
; RV32IM-NEXT: sw s0, 40(sp)
|
||||
; RV32IM-NEXT: sw s1, 36(sp)
|
||||
; RV32IM-NEXT: sw s2, 32(sp)
|
||||
; RV32IM-NEXT: sw s3, 28(sp)
|
||||
; RV32IM-NEXT: sw s4, 24(sp)
|
||||
; RV32IM-NEXT: sw s5, 20(sp)
|
||||
; RV32IM-NEXT: sw s6, 16(sp)
|
||||
; RV32IM-NEXT: sw s7, 12(sp)
|
||||
; RV32IM-NEXT: sw s8, 8(sp)
|
||||
; RV32IM-NEXT: sw s9, 4(sp)
|
||||
; RV32IM-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s4, 24(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s5, 20(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s6, 16(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s7, 12(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s8, 8(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: sw s9, 4(sp) # 4-byte Folded Spill
|
||||
; RV32IM-NEXT: lw s2, 24(a1)
|
||||
; RV32IM-NEXT: lw s3, 28(a1)
|
||||
; RV32IM-NEXT: lw s4, 16(a1)
|
||||
@@ -1047,21 +1047,21 @@ define <4 x i64> @dont_fold_urem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32IM-NEXT: addi a2, zero, 1
|
||||
; RV32IM-NEXT: mv a0, a3
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __umoddi3
|
||||
; RV32IM-NEXT: call __umoddi3@plt
|
||||
; RV32IM-NEXT: mv s7, a0
|
||||
; RV32IM-NEXT: mv s8, a1
|
||||
; RV32IM-NEXT: addi a2, zero, 654
|
||||
; RV32IM-NEXT: mv a0, s6
|
||||
; RV32IM-NEXT: mv a1, s1
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __umoddi3
|
||||
; RV32IM-NEXT: call __umoddi3@plt
|
||||
; RV32IM-NEXT: mv s6, a0
|
||||
; RV32IM-NEXT: mv s9, a1
|
||||
; RV32IM-NEXT: addi a2, zero, 23
|
||||
; RV32IM-NEXT: mv a0, s4
|
||||
; RV32IM-NEXT: mv a1, s5
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __umoddi3
|
||||
; RV32IM-NEXT: call __umoddi3@plt
|
||||
; RV32IM-NEXT: mv s4, a0
|
||||
; RV32IM-NEXT: mv s1, a1
|
||||
; RV32IM-NEXT: lui a0, 1
|
||||
@@ -1069,7 +1069,7 @@ define <4 x i64> @dont_fold_urem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32IM-NEXT: mv a0, s2
|
||||
; RV32IM-NEXT: mv a1, s3
|
||||
; RV32IM-NEXT: mv a3, zero
|
||||
; RV32IM-NEXT: call __umoddi3
|
||||
; RV32IM-NEXT: call __umoddi3@plt
|
||||
; RV32IM-NEXT: sw a1, 28(s0)
|
||||
; RV32IM-NEXT: sw a0, 24(s0)
|
||||
; RV32IM-NEXT: sw s1, 20(s0)
|
||||
@@ -1078,53 +1078,53 @@ define <4 x i64> @dont_fold_urem_i64(<4 x i64> %x) nounwind {
|
||||
; RV32IM-NEXT: sw s6, 8(s0)
|
||||
; RV32IM-NEXT: sw s8, 4(s0)
|
||||
; RV32IM-NEXT: sw s7, 0(s0)
|
||||
; RV32IM-NEXT: lw s9, 4(sp)
|
||||
; RV32IM-NEXT: lw s8, 8(sp)
|
||||
; RV32IM-NEXT: lw s7, 12(sp)
|
||||
; RV32IM-NEXT: lw s6, 16(sp)
|
||||
; RV32IM-NEXT: lw s5, 20(sp)
|
||||
; RV32IM-NEXT: lw s4, 24(sp)
|
||||
; RV32IM-NEXT: lw s3, 28(sp)
|
||||
; RV32IM-NEXT: lw s2, 32(sp)
|
||||
; RV32IM-NEXT: lw s1, 36(sp)
|
||||
; RV32IM-NEXT: lw s0, 40(sp)
|
||||
; RV32IM-NEXT: lw ra, 44(sp)
|
||||
; RV32IM-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
|
||||
; RV32IM-NEXT: addi sp, sp, 48
|
||||
; RV32IM-NEXT: ret
|
||||
;
|
||||
; RV64I-LABEL: dont_fold_urem_i64:
|
||||
; RV64I: # %bb.0:
|
||||
; RV64I-NEXT: addi sp, sp, -48
|
||||
; RV64I-NEXT: sd ra, 40(sp)
|
||||
; RV64I-NEXT: sd s0, 32(sp)
|
||||
; RV64I-NEXT: sd s1, 24(sp)
|
||||
; RV64I-NEXT: sd s2, 16(sp)
|
||||
; RV64I-NEXT: sd s3, 8(sp)
|
||||
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
|
||||
; RV64I-NEXT: ld s2, 24(a1)
|
||||
; RV64I-NEXT: ld s1, 16(a1)
|
||||
; RV64I-NEXT: ld a2, 8(a1)
|
||||
; RV64I-NEXT: mv s0, a0
|
||||
; RV64I-NEXT: addi a1, zero, 654
|
||||
; RV64I-NEXT: mv a0, a2
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s3, a0
|
||||
; RV64I-NEXT: addi a1, zero, 23
|
||||
; RV64I-NEXT: mv a0, s1
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: mv s1, a0
|
||||
; RV64I-NEXT: lui a0, 1
|
||||
; RV64I-NEXT: addiw a1, a0, 1327
|
||||
; RV64I-NEXT: mv a0, s2
|
||||
; RV64I-NEXT: call __umoddi3
|
||||
; RV64I-NEXT: call __umoddi3@plt
|
||||
; RV64I-NEXT: sd zero, 0(s0)
|
||||
; RV64I-NEXT: sd a0, 24(s0)
|
||||
; RV64I-NEXT: sd s1, 16(s0)
|
||||
; RV64I-NEXT: sd s3, 8(s0)
|
||||
; RV64I-NEXT: ld s3, 8(sp)
|
||||
; RV64I-NEXT: ld s2, 16(sp)
|
||||
; RV64I-NEXT: ld s1, 24(sp)
|
||||
; RV64I-NEXT: ld s0, 32(sp)
|
||||
; RV64I-NEXT: ld ra, 40(sp)
|
||||
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; RV64I-NEXT: addi sp, sp, 48
|
||||
; RV64I-NEXT: ret
|
||||
;
|
||||
|
||||
@@ -59,8 +59,8 @@ define i32 @va1(i8* %fmt, ...) {
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa_offset 48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset ra, -36
|
||||
; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset s0, -40
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
|
||||
@@ -75,8 +75,8 @@ define i32 @va1(i8* %fmt, ...) {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
@@ -119,8 +119,8 @@ define i32 @va1(i8* %fmt, ...) {
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa_offset 96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset ra, -72
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset s0, -80
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
|
||||
@@ -136,8 +136,8 @@ define i32 @va1(i8* %fmt, ...) {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ori a0, a0, 4
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%va = alloca i8*, align 4
|
||||
@@ -172,8 +172,8 @@ define i32 @va1_va_arg(i8* %fmt, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
|
||||
@@ -185,8 +185,8 @@ define i32 @va1_va_arg(i8* %fmt, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
@@ -226,8 +226,8 @@ define i32 @va1_va_arg(i8* %fmt, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
|
||||
@@ -240,8 +240,8 @@ define i32 @va1_va_arg(i8* %fmt, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 8
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%va = alloca i8*, align 4
|
||||
@@ -258,9 +258,9 @@ define i32 @va1_va_arg_alloca(i8* %fmt, ...) nounwind {
|
||||
; ILP32-ILP32F-FPELIM-LABEL: va1_va_arg_alloca:
|
||||
; ILP32-ILP32F-FPELIM: # %bb.0:
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw s1, 4(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi s0, sp, 16
|
||||
; ILP32-ILP32F-FPELIM-NEXT: mv s1, a1
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(s0)
|
||||
@@ -276,21 +276,21 @@ define i32 @va1_va_arg_alloca(i8* %fmt, ...) nounwind {
|
||||
; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -16
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sub a0, sp, a0
|
||||
; ILP32-ILP32F-FPELIM-NEXT: mv sp, a0
|
||||
; ILP32-ILP32F-FPELIM-NEXT: call notdead
|
||||
; ILP32-ILP32F-FPELIM-NEXT: call notdead@plt
|
||||
; ILP32-ILP32F-FPELIM-NEXT: mv a0, s1
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, s0, -16
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw s1, 4(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
|
||||
; ILP32-ILP32F-FPELIM-NEXT: ret
|
||||
;
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg_alloca:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s1, 4(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: mv s1, a1
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
|
||||
@@ -306,21 +306,21 @@ define i32 @va1_va_arg_alloca(i8* %fmt, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sub a0, sp, a0
|
||||
; ILP32-ILP32F-WITHFP-NEXT: mv sp, a0
|
||||
; ILP32-ILP32F-WITHFP-NEXT: call notdead
|
||||
; ILP32-ILP32F-WITHFP-NEXT: call notdead@plt
|
||||
; ILP32-ILP32F-WITHFP-NEXT: mv a0, s1
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, s0, -16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s1, 4(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg_alloca:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s1, 4(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi s0, sp, 16
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv s1, a1
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 28(s0)
|
||||
@@ -336,21 +336,21 @@ define i32 @va1_va_arg_alloca(i8* %fmt, ...) nounwind {
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -16
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub a0, sp, a0
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv sp, a0
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead@plt
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, s1
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, s0, -16
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s1, 4(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-FPELIM-LABEL: va1_va_arg_alloca:
|
||||
; LP64-LP64F-LP64D-FPELIM: # %bb.0:
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd s1, 8(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi s0, sp, 32
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: mv s1, a1
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(s0)
|
||||
@@ -372,21 +372,21 @@ define i32 @va1_va_arg_alloca(i8* %fmt, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: and a0, a0, a1
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sub a0, sp, a0
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: mv sp, a0
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead@plt
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, s1
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, s0, -32
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s1, 8(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg_alloca:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 8(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: mv s1, a1
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
|
||||
@@ -408,12 +408,12 @@ define i32 @va1_va_arg_alloca(i8* %fmt, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a1
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sub a0, sp, a0
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: mv sp, a0
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead@plt
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s1
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, s0, -32
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 8(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%va = alloca i8*, align 4
|
||||
@@ -431,66 +431,66 @@ define void @va1_caller() nounwind {
|
||||
; ILP32-ILP32F-FPELIM-LABEL: va1_caller:
|
||||
; ILP32-ILP32F-FPELIM: # %bb.0:
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lui a3, 261888
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi a4, zero, 2
|
||||
; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero
|
||||
; ILP32-ILP32F-FPELIM-NEXT: call va1
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
|
||||
; ILP32-ILP32F-FPELIM-NEXT: ret
|
||||
;
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va1_caller:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a4, zero, 2
|
||||
; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero
|
||||
; ILP32-ILP32F-WITHFP-NEXT: call va1
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_caller:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, zero, 2
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va1
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-FPELIM-LABEL: va1_caller:
|
||||
; LP64-LP64F-LP64D-FPELIM: # %bb.0:
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1023
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 52
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, zero, 2
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: call va1
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va1_caller:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1023
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, zero, 2
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: call va1
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%1 = call i32 (i8*, ...) @va1(i8* undef, double 1.0, i32 2)
|
||||
@@ -524,8 +524,8 @@ define i64 @va2(i8 *%fmt, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va2:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
|
||||
@@ -541,8 +541,8 @@ define i64 @va2(i8 *%fmt, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a1)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ori a1, a1, 4
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a1)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
@@ -595,8 +595,8 @@ define i64 @va2(i8 *%fmt, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va2:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
|
||||
@@ -618,8 +618,8 @@ define i64 @va2(i8 *%fmt, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, -8
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a1
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%va = alloca i8*, align 4
|
||||
@@ -664,8 +664,8 @@ define i64 @va2_va_arg(i8 *%fmt, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va2_va_arg:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
|
||||
@@ -682,8 +682,8 @@ define i64 @va2_va_arg(i8 *%fmt, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, 8
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a2)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
@@ -728,8 +728,8 @@ define i64 @va2_va_arg(i8 *%fmt, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va2_va_arg:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
|
||||
@@ -742,8 +742,8 @@ define i64 @va2_va_arg(i8 *%fmt, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 8
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%va = alloca i8*, align 4
|
||||
@@ -759,61 +759,61 @@ define void @va2_caller() nounwind {
|
||||
; ILP32-ILP32F-FPELIM-LABEL: va2_caller:
|
||||
; ILP32-ILP32F-FPELIM: # %bb.0:
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lui a3, 261888
|
||||
; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero
|
||||
; ILP32-ILP32F-FPELIM-NEXT: call va2
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
|
||||
; ILP32-ILP32F-FPELIM-NEXT: ret
|
||||
;
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va2_caller:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888
|
||||
; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero
|
||||
; ILP32-ILP32F-WITHFP-NEXT: call va2
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_caller:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va2
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-FPELIM-LABEL: va2_caller:
|
||||
; LP64-LP64F-LP64D-FPELIM: # %bb.0:
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1023
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 52
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: call va2
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va2_caller:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1023
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: call va2
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%1 = call i64 (i8*, ...) @va2(i8* undef, double 1.000000e+00)
|
||||
@@ -849,8 +849,8 @@ define i64 @va3(i32 %a, i64 %b, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va3:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 24
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a7, 20(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a5, 12(s0)
|
||||
@@ -868,8 +868,8 @@ define i64 @va3(i32 %a, i64 %b, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1
|
||||
; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a4
|
||||
; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
@@ -924,8 +924,8 @@ define i64 @va3(i32 %a, i64 %b, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va3:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -80
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 40(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0)
|
||||
@@ -947,8 +947,8 @@ define i64 @va3(i32 %a, i64 %b, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a2
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a0
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%va = alloca i8*, align 4
|
||||
@@ -996,8 +996,8 @@ define i64 @va3_va_arg(i32 %a, i64 %b, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va3_va_arg:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 24
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a7, 20(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a6, 16(s0)
|
||||
@@ -1016,8 +1016,8 @@ define i64 @va3_va_arg(i32 %a, i64 %b, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1
|
||||
; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a3
|
||||
; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
@@ -1063,8 +1063,8 @@ define i64 @va3_va_arg(i32 %a, i64 %b, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va3_va_arg:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -80
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 40(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0)
|
||||
@@ -1076,8 +1076,8 @@ define i64 @va3_va_arg(i32 %a, i64 %b, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ori a3, a0, 8
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a2
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -24(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%va = alloca i8*, align 4
|
||||
@@ -1094,22 +1094,22 @@ define void @va3_caller() nounwind {
|
||||
; ILP32-ILP32F-FPELIM-LABEL: va3_caller:
|
||||
; ILP32-ILP32F-FPELIM: # %bb.0:
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 2
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi a1, zero, 1111
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lui a5, 262144
|
||||
; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero
|
||||
; ILP32-ILP32F-FPELIM-NEXT: mv a4, zero
|
||||
; ILP32-ILP32F-FPELIM-NEXT: call va3
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
|
||||
; ILP32-ILP32F-FPELIM-NEXT: ret
|
||||
;
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va3_caller:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 2
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a1, zero, 1111
|
||||
@@ -1117,51 +1117,51 @@ define void @va3_caller() nounwind {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero
|
||||
; ILP32-ILP32F-WITHFP-NEXT: mv a4, zero
|
||||
; ILP32-ILP32F-WITHFP-NEXT: call va3
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_caller:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 2
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, zero, 1111
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a5, 262144
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a4, zero
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va3
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-FPELIM-LABEL: va3_caller:
|
||||
; LP64-LP64F-LP64D-FPELIM: # %bb.0:
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a0, 62
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 2
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 1111
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: call va3
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va3_caller:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a0, 62
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 2
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 1111
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: call va3
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%1 = call i64 (i32, i64, ...) @va3(i32 2, i64 1111, double 2.000000e+00)
|
||||
@@ -1174,8 +1174,8 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
|
||||
; ILP32-ILP32F-FPELIM-LABEL: va4_va_copy:
|
||||
; ILP32-ILP32F-FPELIM: # %bb.0:
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-FPELIM-NEXT: mv s0, a1
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
|
||||
@@ -1187,7 +1187,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 24
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw a0, 4(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw a0, 0(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: call notdead
|
||||
; ILP32-ILP32F-FPELIM-NEXT: call notdead@plt
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw a0, 4(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 3
|
||||
; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4
|
||||
@@ -1207,17 +1207,17 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
|
||||
; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, s0
|
||||
; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, a2
|
||||
; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a0
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
|
||||
; ILP32-ILP32F-FPELIM-NEXT: ret
|
||||
;
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va4_va_copy:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 28(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 24(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s1, 20(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 32
|
||||
; ILP32-ILP32F-WITHFP-NEXT: mv s1, a1
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
|
||||
@@ -1230,7 +1230,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 8
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a0, -16(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a0, -20(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: call notdead
|
||||
; ILP32-ILP32F-WITHFP-NEXT: call notdead@plt
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw a0, -16(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 3
|
||||
; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4
|
||||
@@ -1250,17 +1250,17 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, s1
|
||||
; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, a2
|
||||
; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a0
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s1, 20(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 24(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 28(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va4_va_copy:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv s0, a1
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
|
||||
@@ -1272,7 +1272,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 24
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 4(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 0(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead@plt
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 4(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 3
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4
|
||||
@@ -1292,16 +1292,16 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, s0
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, a2
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a0
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-FPELIM-LABEL: va4_va_copy:
|
||||
; LP64-LP64F-LP64D-FPELIM: # %bb.0:
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: mv s0, a1
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 88(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 80(sp)
|
||||
@@ -1314,7 +1314,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 8
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 0(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead@plt
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 8(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 3
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4
|
||||
@@ -1334,17 +1334,17 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: add a1, a1, s0
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: add a1, a1, a2
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addw a0, a1, a0
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va4_va_copy:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -112
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 48
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: mv s1, a1
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
|
||||
@@ -1358,7 +1358,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 8
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -32(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -40(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead@plt
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, -32(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 3
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4
|
||||
@@ -1378,9 +1378,9 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: add a1, a1, s1
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: add a1, a1, a2
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addw a0, a1, a0
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 112
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%vargs = alloca i8*, align 4
|
||||
@@ -1413,7 +1413,7 @@ define void @va5_aligned_stack_caller() nounwind {
|
||||
; ILP32-ILP32F-FPELIM-LABEL: va5_aligned_stack_caller:
|
||||
; ILP32-ILP32F-FPELIM: # %bb.0:
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -64
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 60(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 17
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw a0, 24(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 16
|
||||
@@ -1448,16 +1448,16 @@ define void @va5_aligned_stack_caller() nounwind {
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi a4, zero, 13
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi a7, zero, 4
|
||||
; ILP32-ILP32F-FPELIM-NEXT: sw a5, 32(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: call va5_aligned_stack_callee
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 60(sp)
|
||||
; ILP32-ILP32F-FPELIM-NEXT: call va5_aligned_stack_callee@plt
|
||||
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 64
|
||||
; ILP32-ILP32F-FPELIM-NEXT: ret
|
||||
;
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va5_aligned_stack_caller:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 60(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 56(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 64
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 17
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a0, 24(sp)
|
||||
@@ -1493,16 +1493,16 @@ define void @va5_aligned_stack_caller() nounwind {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a4, zero, 13
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a7, zero, 4
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a5, -32(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: call va5_aligned_stack_callee
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 56(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 60(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: call va5_aligned_stack_callee@plt
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va5_aligned_stack_caller:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -64
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 60(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 262236
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 655
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 12(sp)
|
||||
@@ -1537,15 +1537,15 @@ define void @va5_aligned_stack_caller() nounwind {
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, zero, 13
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a7, zero, 4
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 32(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va5_aligned_stack_callee
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 60(sp)
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va5_aligned_stack_callee@plt
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 64
|
||||
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-FPELIM-LABEL: va5_aligned_stack_caller:
|
||||
; LP64-LP64F-LP64D-FPELIM: # %bb.0:
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -48
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 40(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 17
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 24(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 16
|
||||
@@ -1586,16 +1586,16 @@ define void @va5_aligned_stack_caller() nounwind {
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a5, zero, 13
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a7, zero, 14
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: sd t0, 0(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: call va5_aligned_stack_callee
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 40(sp)
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: call va5_aligned_stack_callee@plt
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 48
|
||||
; LP64-LP64F-LP64D-FPELIM-NEXT: ret
|
||||
;
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va5_aligned_stack_caller:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -48
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 48
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 17
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 24(sp)
|
||||
@@ -1637,9 +1637,9 @@ define void @va5_aligned_stack_caller() nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a5, zero, 13
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a7, zero, 14
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd t0, 0(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: call va5_aligned_stack_callee
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: call va5_aligned_stack_callee@plt
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 48
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%1 = call i32 (i32, ...) @va5_aligned_stack_callee(i32 1, i32 11,
|
||||
@@ -1672,8 +1672,8 @@ define i32 @va6_no_fixed_args(...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-LABEL: va6_no_fixed_args:
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
|
||||
@@ -1685,8 +1685,8 @@ define i32 @va6_no_fixed_args(...) nounwind {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a0, 0(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 4
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
@@ -1726,8 +1726,8 @@ define i32 @va6_no_fixed_args(...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-LABEL: va6_no_fixed_args:
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
|
||||
@@ -1740,8 +1740,8 @@ define i32 @va6_no_fixed_args(...) nounwind {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: mv a1, s0
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ori a1, a1, 8
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%va = alloca i8*, align 4
|
||||
@@ -1804,8 +1804,8 @@ define i32 @va_large_stack(i8* %fmt, ...) {
|
||||
; ILP32-ILP32F-WITHFP: # %bb.0:
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -2032
|
||||
; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa_offset 2032
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 1996(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 1992(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 1996(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 1992(sp) # 4-byte Folded Spill
|
||||
; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset ra, -36
|
||||
; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset s0, -40
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 2000
|
||||
@@ -1829,8 +1829,8 @@ define i32 @va_large_stack(i8* %fmt, ...) {
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lui a1, 24414
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, -1728
|
||||
; ILP32-ILP32F-WITHFP-NEXT: add sp, sp, a1
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 1992(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 1996(sp)
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 1992(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 1996(sp) # 4-byte Folded Reload
|
||||
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 2032
|
||||
; ILP32-ILP32F-WITHFP-NEXT: ret
|
||||
;
|
||||
@@ -1932,8 +1932,8 @@ define i32 @va_large_stack(i8* %fmt, ...) {
|
||||
; LP64-LP64F-LP64D-WITHFP: # %bb.0:
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -2032
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa_offset 2032
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 1960(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 1952(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 1960(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 1952(sp) # 8-byte Folded Spill
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset ra, -72
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset s0, -80
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 1968
|
||||
@@ -1958,8 +1958,8 @@ define i32 @va_large_stack(i8* %fmt, ...) {
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 24414
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -1680
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: add sp, sp, a1
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 1952(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 1960(sp)
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 1952(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 1960(sp) # 8-byte Folded Reload
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 2032
|
||||
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
|
||||
%large = alloca [ 100000000 x i8 ]
|
||||
|
||||
Reference in New Issue
Block a user