mirror of
https://github.com/intel/llvm.git
synced 2026-01-13 11:02:04 +08:00
[InstSimplify] Add poison propagation for trivially vectorizable intrinsics (#149243)
Fixes https://github.com/llvm/llvm-project/issues/146769 Test cases added to `llvm/test/Transforms/InstSimplify/fold-intrinsics.ll`
This commit is contained in:
Jasmine Tang
GitHub
@@ -7912,6 +7912,8 @@ bool llvm::intrinsicPropagatesPoison(Intrinsic::ID IID) {
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case Intrinsic::ushl_sat:
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case Intrinsic::smul_fix:
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case Intrinsic::smul_fix_sat:
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case Intrinsic::umul_fix:
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case Intrinsic::umul_fix_sat:
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case Intrinsic::pow:
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case Intrinsic::powi:
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case Intrinsic::sin:
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@@ -7928,6 +7930,22 @@ bool llvm::intrinsicPropagatesPoison(Intrinsic::ID IID) {
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case Intrinsic::atan2:
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case Intrinsic::canonicalize:
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case Intrinsic::sqrt:
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case Intrinsic::exp:
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case Intrinsic::exp2:
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case Intrinsic::exp10:
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case Intrinsic::log:
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case Intrinsic::log2:
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case Intrinsic::log10:
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case Intrinsic::modf:
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case Intrinsic::floor:
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case Intrinsic::ceil:
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case Intrinsic::trunc:
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case Intrinsic::rint:
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case Intrinsic::nearbyint:
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case Intrinsic::round:
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case Intrinsic::roundeven:
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case Intrinsic::lrint:
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case Intrinsic::llrint:
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return true;
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default:
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return false;
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@@ -5213,121 +5213,15 @@ define float @v_exp_f32_dynamic_mode(float %in) #1 {
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}
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define float @v_exp_f32_undef() {
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; VI-SDAG-LABEL: v_exp_f32_undef:
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; VI-SDAG: ; %bb.0:
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; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; VI-SDAG-NEXT: v_rndne_f32_e32 v0, 0
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; VI-SDAG-NEXT: s_mov_b32 s4, 0x7fc00000
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; VI-SDAG-NEXT: v_add_f32_e64 v1, -v0, s4
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; VI-SDAG-NEXT: v_exp_f32_e32 v1, v1
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; VI-SDAG-NEXT: v_cvt_i32_f32_e32 v0, v0
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; VI-SDAG-NEXT: v_ldexp_f32 v0, v1, v0
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; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
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; GCN-LABEL: v_exp_f32_undef:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: s_setpc_b64 s[30:31]
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;
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; VI-GISEL-LABEL: v_exp_f32_undef:
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; VI-GISEL: ; %bb.0:
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; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; VI-GISEL-NEXT: v_sub_f32_e64 v0, s4, 0
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; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3fb8a000
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; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x39a3b295
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; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x39a3b295, v0
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; VI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3fb8a000, v0
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; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0, v1
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; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v3
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; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0, v2
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; VI-GISEL-NEXT: v_add_f32_e32 v0, v2, v0
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; VI-GISEL-NEXT: v_rndne_f32_e32 v2, v1
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; VI-GISEL-NEXT: v_sub_f32_e32 v1, v1, v2
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; VI-GISEL-NEXT: v_add_f32_e32 v0, v1, v0
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; VI-GISEL-NEXT: v_cvt_i32_f32_e32 v1, v2
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; VI-GISEL-NEXT: v_exp_f32_e32 v0, v0
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; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
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; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v1
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; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2ce8ed0
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; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v1
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; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x42b17218
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; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, 0, vcc
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; VI-GISEL-NEXT: v_cmp_gt_f32_e32 vcc, s4, v1
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; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
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; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX900-SDAG-LABEL: v_exp_f32_undef:
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; GFX900-SDAG: ; %bb.0:
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; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, 0x3fb8aa3b
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; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0xffc00000
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; GFX900-SDAG-NEXT: v_fma_f32 v0, s4, v0, v1
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; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x32a5705f
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; GFX900-SDAG-NEXT: v_fma_f32 v0, s4, v1, v0
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; GFX900-SDAG-NEXT: v_rndne_f32_e32 v1, 0x7fc00000
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; GFX900-SDAG-NEXT: v_sub_f32_e32 v2, 0x7fc00000, v1
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; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v2, v0
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; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v0
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; GFX900-SDAG-NEXT: v_cvt_i32_f32_e32 v1, v1
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; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v1
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; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX900-GISEL-LABEL: v_exp_f32_undef:
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; GFX900-GISEL: ; %bb.0:
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; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX900-GISEL-NEXT: v_mov_b32_e32 v0, 0x3fb8aa3b
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; GFX900-GISEL-NEXT: v_mul_f32_e32 v1, s4, v0
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; GFX900-GISEL-NEXT: v_fma_f32 v0, s4, v0, -v1
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; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x32a5705f
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; GFX900-GISEL-NEXT: v_fma_f32 v0, s4, v2, v0
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; GFX900-GISEL-NEXT: v_rndne_f32_e32 v2, v1
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; GFX900-GISEL-NEXT: v_sub_f32_e32 v1, v1, v2
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; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v1, v0
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; GFX900-GISEL-NEXT: v_cvt_i32_f32_e32 v1, v2
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; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v0
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; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
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; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v1
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; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2ce8ed0
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; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v1
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; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x42b17218
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; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, 0, vcc
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; GFX900-GISEL-NEXT: v_cmp_gt_f32_e32 vcc, s4, v1
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; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
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; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
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;
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; SI-SDAG-LABEL: v_exp_f32_undef:
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; SI-SDAG: ; %bb.0:
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; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; SI-SDAG-NEXT: v_mov_b32_e32 v0, 0x3fb8aa3b
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; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0xffc00000
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; SI-SDAG-NEXT: v_fma_f32 v0, s4, v0, v1
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; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x32a5705f
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; SI-SDAG-NEXT: v_fma_f32 v0, s4, v1, v0
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; SI-SDAG-NEXT: v_rndne_f32_e32 v1, 0x7fc00000
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; SI-SDAG-NEXT: v_sub_f32_e32 v2, 0x7fc00000, v1
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; SI-SDAG-NEXT: v_add_f32_e32 v0, v2, v0
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; SI-SDAG-NEXT: v_exp_f32_e32 v0, v0
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; SI-SDAG-NEXT: v_cvt_i32_f32_e32 v1, v1
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; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v1
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; SI-SDAG-NEXT: s_setpc_b64 s[30:31]
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;
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; SI-GISEL-LABEL: v_exp_f32_undef:
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; SI-GISEL: ; %bb.0:
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; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; SI-GISEL-NEXT: v_mov_b32_e32 v0, 0x3fb8aa3b
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; SI-GISEL-NEXT: v_mul_f32_e32 v1, s4, v0
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; SI-GISEL-NEXT: v_fma_f32 v0, s4, v0, -v1
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; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x32a5705f
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; SI-GISEL-NEXT: v_fma_f32 v0, s4, v2, v0
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; SI-GISEL-NEXT: v_rndne_f32_e32 v2, v1
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; SI-GISEL-NEXT: v_sub_f32_e32 v1, v1, v2
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; SI-GISEL-NEXT: v_add_f32_e32 v0, v1, v0
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; SI-GISEL-NEXT: v_cvt_i32_f32_e32 v1, v2
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; SI-GISEL-NEXT: v_exp_f32_e32 v0, v0
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; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
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; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v1
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; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2ce8ed0
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; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v1
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; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x42b17218
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; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, 0, vcc
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; SI-GISEL-NEXT: v_cmp_gt_f32_e32 vcc, s4, v1
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; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
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; SI-GISEL-NEXT: s_setpc_b64 s[30:31]
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; SI-LABEL: v_exp_f32_undef:
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; SI: ; %bb.0:
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; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; SI-NEXT: s_setpc_b64 s[30:31]
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;
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; R600-LABEL: v_exp_f32_undef:
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; R600: ; %bb.0:
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@@ -5291,121 +5291,15 @@ define float @v_exp10_f32_dynamic_mode(float %in) #1 {
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}
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define float @v_exp10_f32_undef() {
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; VI-SDAG-LABEL: v_exp10_f32_undef:
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; VI-SDAG: ; %bb.0:
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; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; VI-SDAG-NEXT: v_rndne_f32_e32 v0, 0
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; VI-SDAG-NEXT: s_mov_b32 s4, 0x7fc00000
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; VI-SDAG-NEXT: v_add_f32_e64 v1, -v0, s4
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; VI-SDAG-NEXT: v_exp_f32_e32 v1, v1
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; VI-SDAG-NEXT: v_cvt_i32_f32_e32 v0, v0
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; VI-SDAG-NEXT: v_ldexp_f32 v0, v1, v0
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; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
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; GCN-LABEL: v_exp10_f32_undef:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: s_setpc_b64 s[30:31]
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;
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; VI-GISEL-LABEL: v_exp10_f32_undef:
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; VI-GISEL: ; %bb.0:
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; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; VI-GISEL-NEXT: v_sub_f32_e64 v0, s4, 0
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; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x40549000
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; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x3a2784bc
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; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3a2784bc, v0
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; VI-GISEL-NEXT: v_mul_f32_e32 v0, 0x40549000, v0
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; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0, v1
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; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v3
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; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0, v2
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; VI-GISEL-NEXT: v_add_f32_e32 v0, v2, v0
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; VI-GISEL-NEXT: v_rndne_f32_e32 v2, v1
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; VI-GISEL-NEXT: v_sub_f32_e32 v1, v1, v2
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; VI-GISEL-NEXT: v_add_f32_e32 v0, v1, v0
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; VI-GISEL-NEXT: v_cvt_i32_f32_e32 v1, v2
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; VI-GISEL-NEXT: v_exp_f32_e32 v0, v0
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; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
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; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v1
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; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc23369f4
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; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v1
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; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x421a209b
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; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, 0, vcc
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; VI-GISEL-NEXT: v_cmp_gt_f32_e32 vcc, s4, v1
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; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
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; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX900-SDAG-LABEL: v_exp10_f32_undef:
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; GFX900-SDAG: ; %bb.0:
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; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, 0x40549a78
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; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0xffc00000
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; GFX900-SDAG-NEXT: v_fma_f32 v0, s4, v0, v1
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; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x33979a37
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; GFX900-SDAG-NEXT: v_fma_f32 v0, s4, v1, v0
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; GFX900-SDAG-NEXT: v_rndne_f32_e32 v1, 0x7fc00000
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; GFX900-SDAG-NEXT: v_sub_f32_e32 v2, 0x7fc00000, v1
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; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v2, v0
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; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v0
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; GFX900-SDAG-NEXT: v_cvt_i32_f32_e32 v1, v1
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; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v1
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; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX900-GISEL-LABEL: v_exp10_f32_undef:
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; GFX900-GISEL: ; %bb.0:
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; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX900-GISEL-NEXT: v_mov_b32_e32 v0, 0x40549a78
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; GFX900-GISEL-NEXT: v_mul_f32_e32 v1, s4, v0
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; GFX900-GISEL-NEXT: v_fma_f32 v0, s4, v0, -v1
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; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x33979a37
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; GFX900-GISEL-NEXT: v_fma_f32 v0, s4, v2, v0
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; GFX900-GISEL-NEXT: v_rndne_f32_e32 v2, v1
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; GFX900-GISEL-NEXT: v_sub_f32_e32 v1, v1, v2
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; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v1, v0
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; GFX900-GISEL-NEXT: v_cvt_i32_f32_e32 v1, v2
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; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v0
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; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
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; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v1
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; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc23369f4
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; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v1
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; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x421a209b
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; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, 0, vcc
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; GFX900-GISEL-NEXT: v_cmp_gt_f32_e32 vcc, s4, v1
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; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
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; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
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;
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; SI-SDAG-LABEL: v_exp10_f32_undef:
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; SI-SDAG: ; %bb.0:
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; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; SI-SDAG-NEXT: v_mov_b32_e32 v0, 0x40549a78
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; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0xffc00000
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; SI-SDAG-NEXT: v_fma_f32 v0, s4, v0, v1
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; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x33979a37
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; SI-SDAG-NEXT: v_fma_f32 v0, s4, v1, v0
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; SI-SDAG-NEXT: v_rndne_f32_e32 v1, 0x7fc00000
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; SI-SDAG-NEXT: v_sub_f32_e32 v2, 0x7fc00000, v1
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; SI-SDAG-NEXT: v_add_f32_e32 v0, v2, v0
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; SI-SDAG-NEXT: v_exp_f32_e32 v0, v0
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; SI-SDAG-NEXT: v_cvt_i32_f32_e32 v1, v1
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; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v1
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; SI-SDAG-NEXT: s_setpc_b64 s[30:31]
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;
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; SI-GISEL-LABEL: v_exp10_f32_undef:
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; SI-GISEL: ; %bb.0:
|
||||
; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v0, 0x40549a78
|
||||
; SI-GISEL-NEXT: v_mul_f32_e32 v1, s4, v0
|
||||
; SI-GISEL-NEXT: v_fma_f32 v0, s4, v0, -v1
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x33979a37
|
||||
; SI-GISEL-NEXT: v_fma_f32 v0, s4, v2, v0
|
||||
; SI-GISEL-NEXT: v_rndne_f32_e32 v2, v1
|
||||
; SI-GISEL-NEXT: v_sub_f32_e32 v1, v1, v2
|
||||
; SI-GISEL-NEXT: v_add_f32_e32 v0, v1, v0
|
||||
; SI-GISEL-NEXT: v_cvt_i32_f32_e32 v1, v2
|
||||
; SI-GISEL-NEXT: v_exp_f32_e32 v0, v0
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
|
||||
; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v1
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc23369f4
|
||||
; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v1
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x421a209b
|
||||
; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, 0, vcc
|
||||
; SI-GISEL-NEXT: v_cmp_gt_f32_e32 vcc, s4, v1
|
||||
; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
|
||||
; SI-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
; SI-LABEL: v_exp10_f32_undef:
|
||||
; SI: ; %bb.0:
|
||||
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; SI-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; R600-LABEL: v_exp10_f32_undef:
|
||||
; R600: ; %bb.0:
|
||||
|
||||
@@ -2783,56 +2783,10 @@ define float @v_exp2_f32_dynamic_mode(float %in) #1 {
|
||||
}
|
||||
|
||||
define float @v_exp2_f32_undef() {
|
||||
; GCN-SDAG-LABEL: v_exp2_f32_undef:
|
||||
; GCN-SDAG: ; %bb.0:
|
||||
; GCN-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-SDAG-NEXT: v_exp_f32_e32 v0, 0x7fc00000
|
||||
; GCN-SDAG-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; SI-GISEL-LABEL: v_exp2_f32_undef:
|
||||
; SI-GISEL: ; %bb.0:
|
||||
; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v0, 0xc2fc0000
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x42800000
|
||||
; SI-GISEL-NEXT: v_add_f32_e32 v1, s4, v1
|
||||
; SI-GISEL-NEXT: v_add_f32_e64 v2, s4, 0
|
||||
; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0
|
||||
; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc
|
||||
; SI-GISEL-NEXT: v_exp_f32_e32 v0, v0
|
||||
; SI-GISEL-NEXT: v_not_b32_e32 v1, 63
|
||||
; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
||||
; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v1
|
||||
; SI-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; VI-GISEL-LABEL: v_exp2_f32_undef:
|
||||
; VI-GISEL: ; %bb.0:
|
||||
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; VI-GISEL-NEXT: v_mov_b32_e32 v0, 0xc2fc0000
|
||||
; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x42800000
|
||||
; VI-GISEL-NEXT: v_add_f32_e32 v1, s4, v1
|
||||
; VI-GISEL-NEXT: v_add_f32_e64 v2, s4, 0
|
||||
; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0
|
||||
; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc
|
||||
; VI-GISEL-NEXT: v_exp_f32_e32 v0, v0
|
||||
; VI-GISEL-NEXT: v_not_b32_e32 v1, 63
|
||||
; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
||||
; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v1
|
||||
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX900-GISEL-LABEL: v_exp2_f32_undef:
|
||||
; GFX900-GISEL: ; %bb.0:
|
||||
; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v0, 0xc2fc0000
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x42800000
|
||||
; GFX900-GISEL-NEXT: v_add_f32_e32 v1, s4, v1
|
||||
; GFX900-GISEL-NEXT: v_add_f32_e64 v2, s4, 0
|
||||
; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0
|
||||
; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc
|
||||
; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v0
|
||||
; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 63
|
||||
; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
||||
; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v1
|
||||
; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
; GCN-LABEL: v_exp2_f32_undef:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; R600-LABEL: v_exp2_f32_undef:
|
||||
; R600: ; %bb.0:
|
||||
@@ -4076,3 +4030,4 @@ attributes #1 = { "denormal-fp-math-f32"="dynamic,dynamic" }
|
||||
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
|
||||
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
|
||||
; GCN-GISEL: {{.*}}
|
||||
; GCN-SDAG: {{.*}}
|
||||
|
||||
@@ -5590,162 +5590,15 @@ define float @v_log_f32_dynamic_mode(float %in) #1 {
|
||||
}
|
||||
|
||||
define float @v_log_f32_undef() {
|
||||
; SI-SDAG-LABEL: v_log_f32_undef:
|
||||
; SI-SDAG: ; %bb.0:
|
||||
; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; SI-SDAG-NEXT: v_log_f32_e32 v0, s4
|
||||
; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f317217
|
||||
; SI-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf
|
||||
; SI-SDAG-NEXT: s_mov_b32 s6, 0x7f800000
|
||||
; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v0
|
||||
; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v1
|
||||
; SI-SDAG-NEXT: v_fma_f32 v2, v0, s5, v2
|
||||
; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s6
|
||||
; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; SI-SDAG-NEXT: s_setpc_b64 s[30:31]
|
||||
; GFX689-LABEL: v_log_f32_undef:
|
||||
; GFX689: ; %bb.0:
|
||||
; GFX689-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX689-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; SI-GISEL-LABEL: v_log_f32_undef:
|
||||
; SI-GISEL: ; %bb.0:
|
||||
; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x4f800000
|
||||
; SI-GISEL-NEXT: v_mul_f32_e32 v1, s4, v1
|
||||
; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0
|
||||
; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; SI-GISEL-NEXT: v_log_f32_e32 v0, v0
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f317217
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf
|
||||
; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v0
|
||||
; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v2
|
||||
; SI-GISEL-NEXT: v_fma_f32 v1, v0, v3, v1
|
||||
; SI-GISEL-NEXT: v_add_f32_e32 v1, v2, v1
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
|
||||
; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v2
|
||||
; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b17218
|
||||
; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
||||
; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; SI-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; VI-SDAG-LABEL: v_log_f32_undef:
|
||||
; VI-SDAG: ; %bb.0:
|
||||
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; VI-SDAG-NEXT: v_log_f32_e32 v0, s4
|
||||
; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
|
||||
; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v0
|
||||
; VI-SDAG-NEXT: v_sub_f32_e32 v3, v0, v1
|
||||
; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v1
|
||||
; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v3
|
||||
; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v3
|
||||
; VI-SDAG-NEXT: v_add_f32_e32 v2, v2, v4
|
||||
; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v1
|
||||
; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v2
|
||||
; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
|
||||
; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; VI-GISEL-LABEL: v_log_f32_undef:
|
||||
; VI-GISEL: ; %bb.0:
|
||||
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; VI-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000
|
||||
; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x4f800000
|
||||
; VI-GISEL-NEXT: v_mul_f32_e32 v1, s4, v1
|
||||
; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0
|
||||
; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; VI-GISEL-NEXT: v_log_f32_e32 v0, v0
|
||||
; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v0
|
||||
; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v1
|
||||
; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v1
|
||||
; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v2
|
||||
; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v4
|
||||
; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v2
|
||||
; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v3
|
||||
; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v1
|
||||
; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
|
||||
; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v2
|
||||
; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]
|
||||
; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b17218
|
||||
; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
||||
; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX900-SDAG-LABEL: v_log_f32_undef:
|
||||
; GFX900-SDAG: ; %bb.0:
|
||||
; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX900-SDAG-NEXT: v_log_f32_e32 v0, s4
|
||||
; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f317217
|
||||
; GFX900-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf
|
||||
; GFX900-SDAG-NEXT: s_mov_b32 s6, 0x7f800000
|
||||
; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v0
|
||||
; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v1
|
||||
; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s5, v2
|
||||
; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s6
|
||||
; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX900-GISEL-LABEL: v_log_f32_undef:
|
||||
; GFX900-GISEL: ; %bb.0:
|
||||
; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x4f800000
|
||||
; GFX900-GISEL-NEXT: v_mul_f32_e32 v1, s4, v1
|
||||
; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0
|
||||
; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v0
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f317217
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf
|
||||
; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v0
|
||||
; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v2
|
||||
; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v3, v1
|
||||
; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v2, v1
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
|
||||
; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v2
|
||||
; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b17218
|
||||
; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
||||
; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1100-SDAG-LABEL: v_log_f32_undef:
|
||||
; GFX1100-SDAG: ; %bb.0:
|
||||
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, s0
|
||||
; GFX1100-SDAG-NEXT: s_waitcnt_depctr 0xfff
|
||||
; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v0
|
||||
; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
|
||||
; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v1
|
||||
; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v2
|
||||
; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo
|
||||
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1100-GISEL-LABEL: v_log_f32_undef:
|
||||
; GFX1100-GISEL: ; %bb.0:
|
||||
; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1100-GISEL-NEXT: v_mul_f32_e64 v0, 0x4f800000, s0
|
||||
; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x800000, s0
|
||||
; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, s0, v0, vcc_lo
|
||||
; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v0
|
||||
; GFX1100-GISEL-NEXT: s_waitcnt_depctr 0xfff
|
||||
; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v0
|
||||
; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
|
||||
; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v1
|
||||
; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v0
|
||||
; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s0
|
||||
; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
|
||||
; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
; GFX1100-LABEL: v_log_f32_undef:
|
||||
; GFX1100: ; %bb.0:
|
||||
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1100-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; R600-LABEL: v_log_f32_undef:
|
||||
; R600: ; %bb.0:
|
||||
|
||||
@@ -5590,162 +5590,15 @@ define float @v_log10_f32_dynamic_mode(float %in) #1 {
|
||||
}
|
||||
|
||||
define float @v_log10_f32_undef() {
|
||||
; SI-SDAG-LABEL: v_log10_f32_undef:
|
||||
; SI-SDAG: ; %bb.0:
|
||||
; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; SI-SDAG-NEXT: v_log_f32_e32 v0, s4
|
||||
; SI-SDAG-NEXT: s_mov_b32 s4, 0x3e9a209a
|
||||
; SI-SDAG-NEXT: s_mov_b32 s5, 0x3284fbcf
|
||||
; SI-SDAG-NEXT: s_mov_b32 s6, 0x7f800000
|
||||
; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3e9a209a, v0
|
||||
; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v1
|
||||
; SI-SDAG-NEXT: v_fma_f32 v2, v0, s5, v2
|
||||
; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s6
|
||||
; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; SI-SDAG-NEXT: s_setpc_b64 s[30:31]
|
||||
; GFX689-LABEL: v_log10_f32_undef:
|
||||
; GFX689: ; %bb.0:
|
||||
; GFX689-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX689-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; SI-GISEL-LABEL: v_log10_f32_undef:
|
||||
; SI-GISEL: ; %bb.0:
|
||||
; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x4f800000
|
||||
; SI-GISEL-NEXT: v_mul_f32_e32 v1, s4, v1
|
||||
; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0
|
||||
; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; SI-GISEL-NEXT: v_log_f32_e32 v0, v0
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3e9a209a
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3284fbcf
|
||||
; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3e9a209a, v0
|
||||
; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v2
|
||||
; SI-GISEL-NEXT: v_fma_f32 v1, v0, v3, v1
|
||||
; SI-GISEL-NEXT: v_add_f32_e32 v1, v2, v1
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
|
||||
; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v2
|
||||
; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]
|
||||
; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x411a209b
|
||||
; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
||||
; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; SI-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; VI-SDAG-LABEL: v_log10_f32_undef:
|
||||
; VI-SDAG: ; %bb.0:
|
||||
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; VI-SDAG-NEXT: v_log_f32_e32 v0, s4
|
||||
; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
|
||||
; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v0
|
||||
; VI-SDAG-NEXT: v_sub_f32_e32 v3, v0, v1
|
||||
; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x369a84fb, v1
|
||||
; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x369a84fb, v3
|
||||
; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3e9a2000, v3
|
||||
; VI-SDAG-NEXT: v_add_f32_e32 v2, v2, v4
|
||||
; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3e9a2000, v1
|
||||
; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v2
|
||||
; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
|
||||
; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; VI-GISEL-LABEL: v_log10_f32_undef:
|
||||
; VI-GISEL: ; %bb.0:
|
||||
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; VI-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000
|
||||
; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x4f800000
|
||||
; VI-GISEL-NEXT: v_mul_f32_e32 v1, s4, v1
|
||||
; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0
|
||||
; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; VI-GISEL-NEXT: v_log_f32_e32 v0, v0
|
||||
; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v0
|
||||
; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v1
|
||||
; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x369a84fb, v1
|
||||
; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x369a84fb, v2
|
||||
; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v4
|
||||
; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3e9a2000, v2
|
||||
; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v3
|
||||
; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3e9a2000, v1
|
||||
; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
|
||||
; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v2
|
||||
; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]
|
||||
; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x411a209b
|
||||
; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
||||
; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX900-SDAG-LABEL: v_log10_f32_undef:
|
||||
; GFX900-SDAG: ; %bb.0:
|
||||
; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX900-SDAG-NEXT: v_log_f32_e32 v0, s4
|
||||
; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3e9a209a
|
||||
; GFX900-SDAG-NEXT: s_mov_b32 s5, 0x3284fbcf
|
||||
; GFX900-SDAG-NEXT: s_mov_b32 s6, 0x7f800000
|
||||
; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3e9a209a, v0
|
||||
; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v1
|
||||
; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s5, v2
|
||||
; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s6
|
||||
; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX900-GISEL-LABEL: v_log10_f32_undef:
|
||||
; GFX900-GISEL: ; %bb.0:
|
||||
; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x4f800000
|
||||
; GFX900-GISEL-NEXT: v_mul_f32_e32 v1, s4, v1
|
||||
; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0
|
||||
; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v0
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3e9a209a
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3284fbcf
|
||||
; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3e9a209a, v0
|
||||
; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v2
|
||||
; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v3, v1
|
||||
; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v2, v1
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
|
||||
; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v2
|
||||
; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]
|
||||
; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x411a209b
|
||||
; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
||||
; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1100-SDAG-LABEL: v_log10_f32_undef:
|
||||
; GFX1100-SDAG: ; %bb.0:
|
||||
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, s0
|
||||
; GFX1100-SDAG-NEXT: s_waitcnt_depctr 0xfff
|
||||
; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3e9a209a, v0
|
||||
; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
|
||||
; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3e9a209a, v0, -v1
|
||||
; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3284fbcf, v2
|
||||
; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo
|
||||
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1100-GISEL-LABEL: v_log10_f32_undef:
|
||||
; GFX1100-GISEL: ; %bb.0:
|
||||
; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1100-GISEL-NEXT: v_mul_f32_e64 v0, 0x4f800000, s0
|
||||
; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x800000, s0
|
||||
; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, s0, v0, vcc_lo
|
||||
; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v0
|
||||
; GFX1100-GISEL-NEXT: s_waitcnt_depctr 0xfff
|
||||
; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3e9a209a, v0
|
||||
; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
|
||||
; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3e9a209a, v0, -v1
|
||||
; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3284fbcf, v0
|
||||
; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v2
|
||||
; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s0
|
||||
; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x411a209b, vcc_lo
|
||||
; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
; GFX1100-LABEL: v_log10_f32_undef:
|
||||
; GFX1100: ; %bb.0:
|
||||
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1100-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; R600-LABEL: v_log10_f32_undef:
|
||||
; R600: ; %bb.0:
|
||||
|
||||
@@ -3542,45 +3542,15 @@ define float @v_log2_f32_dynamic_mode(float %in) #1 {
|
||||
}
|
||||
|
||||
define float @v_log2_f32_undef() {
|
||||
; GFX689-SDAG-LABEL: v_log2_f32_undef:
|
||||
; GFX689-SDAG: ; %bb.0:
|
||||
; GFX689-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX689-SDAG-NEXT: v_log_f32_e32 v0, s4
|
||||
; GFX689-SDAG-NEXT: s_setpc_b64 s[30:31]
|
||||
; GFX689-LABEL: v_log2_f32_undef:
|
||||
; GFX689: ; %bb.0:
|
||||
; GFX689-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX689-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX689-GISEL-LABEL: v_log2_f32_undef:
|
||||
; GFX689-GISEL: ; %bb.0:
|
||||
; GFX689-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX689-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000
|
||||
; GFX689-GISEL-NEXT: v_mov_b32_e32 v1, 0x4f800000
|
||||
; GFX689-GISEL-NEXT: v_mul_f32_e32 v1, s4, v1
|
||||
; GFX689-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0
|
||||
; GFX689-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
|
||||
; GFX689-GISEL-NEXT: v_log_f32_e32 v0, v0
|
||||
; GFX689-GISEL-NEXT: v_mov_b32_e32 v1, 0x42000000
|
||||
; GFX689-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
|
||||
; GFX689-GISEL-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; GFX689-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1100-SDAG-LABEL: v_log2_f32_undef:
|
||||
; GFX1100-SDAG: ; %bb.0:
|
||||
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, s0
|
||||
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1100-GISEL-LABEL: v_log2_f32_undef:
|
||||
; GFX1100-GISEL: ; %bb.0:
|
||||
; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1100-GISEL-NEXT: v_mul_f32_e64 v0, 0x4f800000, s0
|
||||
; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x800000, s0
|
||||
; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, s0, v0, vcc_lo
|
||||
; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x42000000, vcc_lo
|
||||
; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v0
|
||||
; GFX1100-GISEL-NEXT: s_waitcnt_depctr 0xfff
|
||||
; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
; GFX1100-LABEL: v_log2_f32_undef:
|
||||
; GFX1100: ; %bb.0:
|
||||
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1100-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; R600-LABEL: v_log2_f32_undef:
|
||||
; R600: ; %bb.0:
|
||||
|
||||
@@ -57,8 +57,7 @@ define <vscale x 2 x float> @exp10_exp10_scalable_vector(<vscale x 2 x float> %x
|
||||
|
||||
define float @exp10_poison() {
|
||||
; CHECK-LABEL: define float @exp10_poison() {
|
||||
; CHECK-NEXT: [[RET:%.*]] = call float @llvm.exp10.f32(float poison)
|
||||
; CHECK-NEXT: ret float [[RET]]
|
||||
; CHECK-NEXT: ret float poison
|
||||
;
|
||||
%ret = call float @llvm.exp10.f32(float poison)
|
||||
ret float %ret
|
||||
@@ -66,8 +65,7 @@ define float @exp10_poison() {
|
||||
|
||||
define <2 x float> @exp10_poison_vector() {
|
||||
; CHECK-LABEL: define <2 x float> @exp10_poison_vector() {
|
||||
; CHECK-NEXT: [[RET:%.*]] = call <2 x float> @llvm.exp10.v2f32(<2 x float> poison)
|
||||
; CHECK-NEXT: ret <2 x float> [[RET]]
|
||||
; CHECK-NEXT: ret <2 x float> poison
|
||||
;
|
||||
%ret = call <2 x float> @llvm.exp10.v2f32(<2 x float> poison)
|
||||
ret <2 x float> %ret
|
||||
@@ -75,8 +73,7 @@ define <2 x float> @exp10_poison_vector() {
|
||||
|
||||
define <vscale x 2 x float> @exp10_poison_scaleable_vector() {
|
||||
; CHECK-LABEL: define <vscale x 2 x float> @exp10_poison_scaleable_vector() {
|
||||
; CHECK-NEXT: [[RET:%.*]] = call <vscale x 2 x float> @llvm.exp10.nxv2f32(<vscale x 2 x float> poison)
|
||||
; CHECK-NEXT: ret <vscale x 2 x float> [[RET]]
|
||||
; CHECK-NEXT: ret <vscale x 2 x float> poison
|
||||
;
|
||||
%ret = call <vscale x 2 x float> @llvm.exp10.nxv2f32(<vscale x 2 x float> poison)
|
||||
ret <vscale x 2 x float> %ret
|
||||
|
||||
@@ -286,3 +286,327 @@ define void @tanh_poison(ptr %P) {
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @exp_poison(ptr %P) {
|
||||
; CHECK-LABEL: @exp_poison(
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%exp_f32 = call float @llvm.exp(float poison)
|
||||
store volatile float %exp_f32, ptr %P
|
||||
|
||||
%exp_2xf32 = call <2 x float> @llvm.exp(<2 x float> poison)
|
||||
store volatile <2 x float> %exp_2xf32, ptr %P
|
||||
|
||||
%exp_4xf64 = call <4 x double> @llvm.exp(<4 x double> poison)
|
||||
store volatile <4 x double> %exp_4xf64, ptr %P
|
||||
|
||||
%exp2_f32 = call float @llvm.exp2(float poison)
|
||||
store volatile float %exp2_f32, ptr %P
|
||||
|
||||
%exp2_2xf32 = call <2 x float> @llvm.exp2(<2 x float> poison)
|
||||
store volatile <2 x float> %exp2_2xf32, ptr %P
|
||||
|
||||
%exp2_4xf64 = call <4 x double> @llvm.exp2(<4 x double> poison)
|
||||
store volatile <4 x double> %exp2_4xf64, ptr %P
|
||||
|
||||
%exp10_f32 = call float @llvm.exp10(float poison)
|
||||
store volatile float %exp10_f32, ptr %P
|
||||
|
||||
%exp10_2xf32 = call <2 x float> @llvm.exp10(<2 x float> poison)
|
||||
store volatile <2 x float> %exp10_2xf32, ptr %P
|
||||
|
||||
%exp10_4xf64 = call <4 x double> @llvm.exp10(<4 x double> poison)
|
||||
store volatile <4 x double> %exp10_4xf64, ptr %P
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @log_poison(ptr %P) {
|
||||
; CHECK-LABEL: @log_poison(
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%log_f32 = call float @llvm.log(float poison)
|
||||
store volatile float %log_f32, ptr %P
|
||||
|
||||
%log_2xf32 = call <2 x float> @llvm.log(<2 x float> poison)
|
||||
store volatile <2 x float> %log_2xf32, ptr %P
|
||||
|
||||
%log_4xf64 = call <4 x double> @llvm.log(<4 x double> poison)
|
||||
store volatile <4 x double> %log_4xf64, ptr %P
|
||||
|
||||
%log2_f32 = call float @llvm.log2(float poison)
|
||||
store volatile float %log2_f32, ptr %P
|
||||
|
||||
%log2_2xf32 = call <2 x float> @llvm.log2(<2 x float> poison)
|
||||
store volatile <2 x float> %log2_2xf32, ptr %P
|
||||
|
||||
%log2_4xf64 = call <4 x double> @llvm.log2(<4 x double> poison)
|
||||
store volatile <4 x double> %log2_4xf64, ptr %P
|
||||
|
||||
%log10_f32 = call float @llvm.log10(float poison)
|
||||
store volatile float %log10_f32, ptr %P
|
||||
|
||||
%log10_2xf32 = call <2 x float> @llvm.log10(<2 x float> poison)
|
||||
store volatile <2 x float> %log10_2xf32, ptr %P
|
||||
|
||||
%log10_4xf64 = call <4 x double> @llvm.log10(<4 x double> poison)
|
||||
store volatile <4 x double> %log10_4xf64, ptr %P
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @modf_poison(ptr %P) {
|
||||
; CHECK-LABEL: @modf_poison(
|
||||
; CHECK-NEXT: store volatile { float, float } poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile { <2 x float>, <2 x float> } poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile { <4 x double>, <4 x double> } poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%modf_f32 = call { float, float } @llvm.modf(float poison)
|
||||
store volatile { float, float } %modf_f32, ptr %P
|
||||
|
||||
%modf_2xf32 = call { <2 x float>, <2 x float> } @llvm.modf(<2 x float> poison)
|
||||
store volatile { <2 x float>, <2 x float> } %modf_2xf32, ptr %P
|
||||
|
||||
%modf_4xf64 = call { <4 x double>, <4 x double> } @llvm.modf(<4 x double> poison)
|
||||
store volatile { <4 x double>, <4 x double> } %modf_4xf64, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @floor_poison(ptr %P) {
|
||||
; CHECK-LABEL: @floor_poison(
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%floor_f32 = call float @llvm.floor(float poison)
|
||||
store volatile float %floor_f32, ptr %P
|
||||
|
||||
%floor_2xf32 = call <2 x float> @llvm.floor(<2 x float> poison)
|
||||
store volatile <2 x float> %floor_2xf32, ptr %P
|
||||
|
||||
%floor_4xf64 = call <4 x double> @llvm.floor(<4 x double> poison)
|
||||
store volatile <4 x double> %floor_4xf64, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @ceil_poison(ptr %P) {
|
||||
; CHECK-LABEL: @ceil_poison(
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%ceil_f32 = call float @llvm.ceil(float poison)
|
||||
store volatile float %ceil_f32, ptr %P
|
||||
|
||||
%ceil_2xf32 = call <2 x float> @llvm.ceil(<2 x float> poison)
|
||||
store volatile <2 x float> %ceil_2xf32, ptr %P
|
||||
|
||||
%ceil_4xf64 = call <4 x double> @llvm.ceil(<4 x double> poison)
|
||||
store volatile <4 x double> %ceil_4xf64, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @trunc_poison(ptr %P) {
|
||||
; CHECK-LABEL: @trunc_poison(
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%trunc_f32 = call float @llvm.trunc(float poison)
|
||||
store volatile float %trunc_f32, ptr %P
|
||||
|
||||
%trunc_2xf32 = call <2 x float> @llvm.trunc(<2 x float> poison)
|
||||
store volatile <2 x float> %trunc_2xf32, ptr %P
|
||||
|
||||
%trunc_4xf64 = call <4 x double> @llvm.trunc(<4 x double> poison)
|
||||
store volatile <4 x double> %trunc_4xf64, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @rint_poison(ptr %P) {
|
||||
; CHECK-LABEL: @rint_poison(
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%rint_f32 = call float @llvm.rint(float poison)
|
||||
store volatile float %rint_f32, ptr %P
|
||||
|
||||
%rint_2xf32 = call <2 x float> @llvm.rint(<2 x float> poison)
|
||||
store volatile <2 x float> %rint_2xf32, ptr %P
|
||||
|
||||
%rint_4xf64 = call <4 x double> @llvm.rint(<4 x double> poison)
|
||||
store volatile <4 x double> %rint_4xf64, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @nearbyint_poison(ptr %P) {
|
||||
; CHECK-LABEL: @nearbyint_poison(
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%nearbyint_f32 = call float @llvm.nearbyint(float poison)
|
||||
store volatile float %nearbyint_f32, ptr %P
|
||||
|
||||
%nearbyint_2xf32 = call <2 x float> @llvm.nearbyint(<2 x float> poison)
|
||||
store volatile <2 x float> %nearbyint_2xf32, ptr %P
|
||||
|
||||
%nearbyint_4xf64 = call <4 x double> @llvm.nearbyint(<4 x double> poison)
|
||||
store volatile <4 x double> %nearbyint_4xf64, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @round_poison(ptr %P) {
|
||||
; CHECK-LABEL: @round_poison(
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%round_f32 = call float @llvm.round(float poison)
|
||||
store volatile float %round_f32, ptr %P
|
||||
|
||||
%round_2xf32 = call <2 x float> @llvm.round(<2 x float> poison)
|
||||
store volatile <2 x float> %round_2xf32, ptr %P
|
||||
|
||||
%round_4xf64 = call <4 x double> @llvm.round(<4 x double> poison)
|
||||
store volatile <4 x double> %round_4xf64, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @roundeven_poison(ptr %P) {
|
||||
; CHECK-LABEL: @roundeven_poison(
|
||||
; CHECK-NEXT: store volatile float poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x float> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x double> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%roundeven_f32 = call float @llvm.roundeven(float poison)
|
||||
store volatile float %roundeven_f32, ptr %P
|
||||
|
||||
%roundeven_2xf32 = call <2 x float> @llvm.roundeven(<2 x float> poison)
|
||||
store volatile <2 x float> %roundeven_2xf32, ptr %P
|
||||
|
||||
%roundeven_4xf64 = call <4 x double> @llvm.roundeven(<4 x double> poison)
|
||||
store volatile <4 x double> %roundeven_4xf64, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @lrint_poison(ptr %P) {
|
||||
; CHECK-LABEL: @lrint_poison(
|
||||
; CHECK-NEXT: store volatile i32 poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x i32> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x i64> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%lrint_f32 = call i32 @llvm.lrint(float poison)
|
||||
store volatile i32 %lrint_f32, ptr %P
|
||||
|
||||
%lrint_2xf32 = call <2 x i32> @llvm.lrint(<2 x float> poison)
|
||||
store volatile <2 x i32> %lrint_2xf32, ptr %P
|
||||
|
||||
%lrint_4xf64 = call <4 x i64> @llvm.lrint(<4 x double> poison)
|
||||
store volatile <4 x i64> %lrint_4xf64, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @llrint_poison(ptr %P) {
|
||||
; CHECK-LABEL: @llrint_poison(
|
||||
; CHECK-NEXT: store volatile i32 poison, ptr [[P:%.*]], align 4
|
||||
; CHECK-NEXT: store volatile <2 x i32> poison, ptr [[P]], align 8
|
||||
; CHECK-NEXT: store volatile <4 x i64> poison, ptr [[P]], align 32
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%llrint_f32 = call i32 @llvm.llrint(float poison)
|
||||
store volatile i32 %llrint_f32, ptr %P
|
||||
|
||||
%llrint_2xf32 = call <2 x i32> @llvm.llrint(<2 x float> poison)
|
||||
store volatile <2 x i32> %llrint_2xf32, ptr %P
|
||||
|
||||
%llrint_4xf64 = call <4 x i64> @llvm.llrint(<4 x double> poison)
|
||||
store volatile <4 x i64> %llrint_4xf64, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @umul_fix_poison(ptr %P) {
|
||||
; CHECK-LABEL: @umul_fix_poison(
|
||||
; CHECK-NEXT: store volatile i16 poison, ptr [[P:%.*]], align 2
|
||||
; CHECK-NEXT: store volatile i32 poison, ptr [[P]], align 4
|
||||
; CHECK-NEXT: store volatile <4 x i32> poison, ptr [[P]], align 16
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%umul_fix_i16 = call i16 @llvm.umul.fix(i16 poison, i16 poison, i32 2)
|
||||
store volatile i16 %umul_fix_i16, ptr %P
|
||||
|
||||
%umul_fix_i32 = call i32 @llvm.umul.fix(i32 poison, i32 poison, i32 2)
|
||||
store volatile i32 %umul_fix_i32, ptr %P
|
||||
|
||||
%umul_fix_4xi32 = call <4 x i32> @llvm.umul.fix(<4 x i32> poison, <4 x i32> poison, i32 2)
|
||||
store volatile <4 x i32> %umul_fix_4xi32, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
define void @umul_fix_sat_poison(ptr %P) {
|
||||
; CHECK-LABEL: @umul_fix_sat_poison(
|
||||
; CHECK-NEXT: store volatile i16 poison, ptr [[P:%.*]], align 2
|
||||
; CHECK-NEXT: store volatile i32 poison, ptr [[P]], align 4
|
||||
; CHECK-NEXT: store volatile <4 x i32> poison, ptr [[P]], align 16
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%umul_fix_sati16 = call i16 @llvm.umul.fix.sat(i16 poison, i16 poison, i32 2)
|
||||
store volatile i16 %umul_fix_sati16, ptr %P
|
||||
|
||||
%umul_fix_sati32 = call i32 @llvm.umul.fix.sat(i32 poison, i32 poison, i32 2)
|
||||
store volatile i32 %umul_fix_sati32, ptr %P
|
||||
|
||||
%umul_fix_sat4xi32 = call <4 x i32> @llvm.umul.fix.sat(<4 x i32> poison, <4 x i32> poison, i32 2)
|
||||
store volatile <4 x i32> %umul_fix_sat4xi32, ptr %P
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
@@ -915,11 +915,11 @@ TEST(ValueTracking, propagatesPoison) {
|
||||
{true, "call float @llvm.sin.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.cos.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.pow.f32(float %fx, float %fy)", 0},
|
||||
{false, "call float @llvm.exp.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.exp2.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.log.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.log10.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.log2.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.exp.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.exp2.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.log.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.log10.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.log2.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.fma.f32(float %fx, float %fx, float %fy)", 0},
|
||||
{false, "call float @llvm.fabs.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.minnum.f32(float %fx, float %fy)", 0},
|
||||
@@ -927,17 +927,17 @@ TEST(ValueTracking, propagatesPoison) {
|
||||
{false, "call float @llvm.minimum.f32(float %fx, float %fy)", 0},
|
||||
{false, "call float @llvm.maximum.f32(float %fx, float %fy)", 0},
|
||||
{false, "call float @llvm.copysign.f32(float %fx, float %fy)", 0},
|
||||
{false, "call float @llvm.floor.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.ceil.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.trunc.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.rint.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.nearbyint.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.round.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.roundeven.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.floor.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.ceil.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.trunc.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.rint.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.nearbyint.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.round.f32(float %fx)", 0},
|
||||
{true, "call float @llvm.roundeven.f32(float %fx)", 0},
|
||||
{false, "call i32 @llvm.lround.f32(float %fx)", 0},
|
||||
{false, "call i64 @llvm.llround.f32(float %fx)", 0},
|
||||
{false, "call i32 @llvm.lrint.f32(float %fx)", 0},
|
||||
{false, "call i64 @llvm.llrint.f32(float %fx)", 0},
|
||||
{true, "call i32 @llvm.lrint.f32(float %fx)", 0},
|
||||
{true, "call i64 @llvm.llrint.f32(float %fx)", 0},
|
||||
{false, "call float @llvm.fmuladd.f32(float %fx, float %fx, float %fy)",
|
||||
0}};
|
||||
|
||||
|
||||
Reference in New Issue
Block a user