mirror of
https://github.com/intel/llvm.git
synced 2026-01-30 22:53:05 +08:00
[Clang][LoongArch] Use the ClangBuiltin class to automatically generate support for CBE and CFE
Fixed the type modifier (L->W), removed redundant feature checking code since the feature has already been checked in `EmitBuiltinExpr`. And Cleaned up unused diagnostic information. Reviewed By: SixWeining Differential Revision: https://reviews.llvm.org/D156866
This commit is contained in:
@@ -16,8 +16,7 @@
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#endif
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// TODO: Support more builtins.
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// TODO: Added feature constraints.
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TARGET_BUILTIN(__builtin_loongarch_cacop_d, "vLiULiLi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_cacop_d, "vWiUWiWi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_cacop_w, "viUii", "nc", "32bit")
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TARGET_BUILTIN(__builtin_loongarch_dbar, "vIUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_ibar, "vIUi", "nc", "")
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@@ -26,36 +25,36 @@ TARGET_BUILTIN(__builtin_loongarch_movgr2fcsr, "vIUiUi", "nc", "f")
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TARGET_BUILTIN(__builtin_loongarch_break, "vIUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_syscall, "vIUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_cpucfg, "UiUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_asrtle_d, "vLiLi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_asrtgt_d, "vLiLi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_asrtle_d, "vWiWi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_asrtgt_d, "vWiWi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_crc_w_b_w, "iii", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_crc_w_h_w, "iii", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_crc_w_w_w, "iii", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_crc_w_d_w, "iLii", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_crc_w_d_w, "iWii", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_crcc_w_b_w, "iii", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_crcc_w_h_w, "iii", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_crcc_w_w_w, "iii", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_crcc_w_d_w, "iLii", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_crcc_w_d_w, "iWii", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_csrrd_w, "UiIUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_csrrd_d, "ULiIUi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_csrrd_d, "UWiIUi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_csrwr_w, "UiUiIUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_csrwr_d, "ULiULiIUi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_csrwr_d, "UWiUWiIUi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_csrxchg_w, "UiUiUiIUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_csrxchg_d, "ULiULiULiIUi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_csrxchg_d, "UWiUWiUWiIUi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_iocsrrd_b, "UiUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_iocsrrd_h, "UiUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_iocsrrd_w, "UiUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_iocsrrd_d, "ULiUi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_iocsrrd_d, "UWiUi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_iocsrwr_b, "vUiUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_iocsrwr_h, "vUiUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_iocsrwr_w, "vUiUi", "nc", "")
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TARGET_BUILTIN(__builtin_loongarch_iocsrwr_d, "vULiUi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_iocsrwr_d, "vUWiUi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_lddir_d, "LiLiIULi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_ldpte_d, "vLiIULi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_lddir_d, "WiWiIUWi", "nc", "64bit")
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TARGET_BUILTIN(__builtin_loongarch_ldpte_d, "vWiIUWi", "nc", "64bit")
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#undef BUILTIN
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#undef TARGET_BUILTIN
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@@ -11869,10 +11869,6 @@ def err_non_designated_init_used : Error<
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def err_cast_from_randomized_struct : Error<
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"casting from randomized structure pointer type %0 to %1">;
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// LoongArch-specific Diagnostics
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def err_loongarch_builtin_requires_la64 : Error<
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"this builtin requires target: loongarch64">;
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// Unsafe buffer usage diagnostics.
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def warn_unsafe_buffer_variable : Warning<
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"%0 is an %select{unsafe pointer used for buffer access|unsafe buffer that "
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@@ -11894,9 +11890,6 @@ def note_safe_buffer_usage_suggestions_disabled : Note<
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def note_safe_buffer_debug_mode : Note<"safe buffers debug: %0">;
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#endif
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def err_loongarch_builtin_requires_la32 : Error<
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"this builtin requires target: loongarch32">;
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def err_builtin_pass_in_regs_non_class : Error<
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"argument %0 is not an unqualified class type">;
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@@ -43,7 +43,6 @@
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#include "llvm/IR/IntrinsicsARM.h"
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#include "llvm/IR/IntrinsicsBPF.h"
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#include "llvm/IR/IntrinsicsHexagon.h"
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#include "llvm/IR/IntrinsicsLoongArch.h"
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#include "llvm/IR/IntrinsicsNVPTX.h"
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#include "llvm/IR/IntrinsicsPowerPC.h"
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#include "llvm/IR/IntrinsicsR600.h"
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@@ -5592,9 +5591,6 @@ static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF,
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case llvm::Triple::riscv32:
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case llvm::Triple::riscv64:
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return CGF->EmitRISCVBuiltinExpr(BuiltinID, E, ReturnValue);
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case llvm::Triple::loongarch32:
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case llvm::Triple::loongarch64:
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return CGF->EmitLoongArchBuiltinExpr(BuiltinID, E);
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default:
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return nullptr;
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}
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@@ -20358,129 +20354,3 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,
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llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
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return Builder.CreateCall(F, Ops, "");
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}
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Value *CodeGenFunction::EmitLoongArchBuiltinExpr(unsigned BuiltinID,
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const CallExpr *E) {
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SmallVector<Value *, 4> Ops;
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for (unsigned i = 0, e = E->getNumArgs(); i != e; i++)
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Ops.push_back(EmitScalarExpr(E->getArg(i)));
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Intrinsic::ID ID = Intrinsic::not_intrinsic;
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switch (BuiltinID) {
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default:
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llvm_unreachable("unexpected builtin ID.");
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case LoongArch::BI__builtin_loongarch_cacop_d:
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ID = Intrinsic::loongarch_cacop_d;
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break;
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case LoongArch::BI__builtin_loongarch_cacop_w:
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ID = Intrinsic::loongarch_cacop_w;
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break;
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case LoongArch::BI__builtin_loongarch_dbar:
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ID = Intrinsic::loongarch_dbar;
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break;
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case LoongArch::BI__builtin_loongarch_break:
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ID = Intrinsic::loongarch_break;
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break;
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case LoongArch::BI__builtin_loongarch_ibar:
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ID = Intrinsic::loongarch_ibar;
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break;
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case LoongArch::BI__builtin_loongarch_movfcsr2gr:
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ID = Intrinsic::loongarch_movfcsr2gr;
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break;
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case LoongArch::BI__builtin_loongarch_movgr2fcsr:
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ID = Intrinsic::loongarch_movgr2fcsr;
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break;
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case LoongArch::BI__builtin_loongarch_syscall:
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ID = Intrinsic::loongarch_syscall;
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break;
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case LoongArch::BI__builtin_loongarch_crc_w_b_w:
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ID = Intrinsic::loongarch_crc_w_b_w;
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break;
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case LoongArch::BI__builtin_loongarch_crc_w_h_w:
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ID = Intrinsic::loongarch_crc_w_h_w;
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break;
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case LoongArch::BI__builtin_loongarch_crc_w_w_w:
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ID = Intrinsic::loongarch_crc_w_w_w;
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break;
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case LoongArch::BI__builtin_loongarch_crc_w_d_w:
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ID = Intrinsic::loongarch_crc_w_d_w;
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break;
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case LoongArch::BI__builtin_loongarch_crcc_w_b_w:
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ID = Intrinsic::loongarch_crcc_w_b_w;
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break;
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case LoongArch::BI__builtin_loongarch_crcc_w_h_w:
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ID = Intrinsic::loongarch_crcc_w_h_w;
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break;
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case LoongArch::BI__builtin_loongarch_crcc_w_w_w:
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ID = Intrinsic::loongarch_crcc_w_w_w;
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break;
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case LoongArch::BI__builtin_loongarch_crcc_w_d_w:
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ID = Intrinsic::loongarch_crcc_w_d_w;
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break;
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case LoongArch::BI__builtin_loongarch_csrrd_w:
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ID = Intrinsic::loongarch_csrrd_w;
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break;
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case LoongArch::BI__builtin_loongarch_csrwr_w:
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ID = Intrinsic::loongarch_csrwr_w;
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break;
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case LoongArch::BI__builtin_loongarch_csrxchg_w:
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ID = Intrinsic::loongarch_csrxchg_w;
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break;
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case LoongArch::BI__builtin_loongarch_csrrd_d:
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ID = Intrinsic::loongarch_csrrd_d;
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break;
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case LoongArch::BI__builtin_loongarch_csrwr_d:
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ID = Intrinsic::loongarch_csrwr_d;
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break;
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case LoongArch::BI__builtin_loongarch_csrxchg_d:
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ID = Intrinsic::loongarch_csrxchg_d;
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break;
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case LoongArch::BI__builtin_loongarch_iocsrrd_b:
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ID = Intrinsic::loongarch_iocsrrd_b;
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break;
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case LoongArch::BI__builtin_loongarch_iocsrrd_h:
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ID = Intrinsic::loongarch_iocsrrd_h;
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break;
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case LoongArch::BI__builtin_loongarch_iocsrrd_w:
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ID = Intrinsic::loongarch_iocsrrd_w;
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break;
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case LoongArch::BI__builtin_loongarch_iocsrrd_d:
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ID = Intrinsic::loongarch_iocsrrd_d;
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break;
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case LoongArch::BI__builtin_loongarch_iocsrwr_b:
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ID = Intrinsic::loongarch_iocsrwr_b;
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break;
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case LoongArch::BI__builtin_loongarch_iocsrwr_h:
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ID = Intrinsic::loongarch_iocsrwr_h;
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break;
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case LoongArch::BI__builtin_loongarch_iocsrwr_w:
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ID = Intrinsic::loongarch_iocsrwr_w;
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break;
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case LoongArch::BI__builtin_loongarch_iocsrwr_d:
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ID = Intrinsic::loongarch_iocsrwr_d;
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break;
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case LoongArch::BI__builtin_loongarch_cpucfg:
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ID = Intrinsic::loongarch_cpucfg;
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break;
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case LoongArch::BI__builtin_loongarch_asrtle_d:
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ID = Intrinsic::loongarch_asrtle_d;
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break;
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case LoongArch::BI__builtin_loongarch_asrtgt_d:
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ID = Intrinsic::loongarch_asrtgt_d;
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break;
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case LoongArch::BI__builtin_loongarch_lddir_d:
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ID = Intrinsic::loongarch_lddir_d;
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break;
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case LoongArch::BI__builtin_loongarch_ldpte_d:
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ID = Intrinsic::loongarch_ldpte_d;
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break;
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// TODO: Support more Intrinsics.
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}
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assert(ID != Intrinsic::not_intrinsic);
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llvm::Function *F = CGM.getIntrinsic(ID);
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return Builder.CreateCall(F, Ops);
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}
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@@ -4316,7 +4316,6 @@ public:
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llvm::Value *EmitHexagonBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
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llvm::Value *EmitRISCVBuiltinExpr(unsigned BuiltinID, const CallExpr *E,
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ReturnValueSlot ReturnValue);
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llvm::Value *EmitLoongArchBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
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void ProcessOrderScopeAMDGCN(llvm::Value *Order, llvm::Value *Scope,
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llvm::AtomicOrdering &AO,
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llvm::SyncScope::ID &SSID);
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@@ -3848,39 +3848,12 @@ bool Sema::CheckLoongArchBuiltinFunctionCall(const TargetInfo &TI,
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default:
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break;
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case LoongArch::BI__builtin_loongarch_cacop_d:
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if (!TI.hasFeature("64bit"))
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return Diag(TheCall->getBeginLoc(),
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diag::err_loongarch_builtin_requires_la64)
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<< TheCall->getSourceRange();
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[[fallthrough]];
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case LoongArch::BI__builtin_loongarch_cacop_w: {
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if (BuiltinID == LoongArch::BI__builtin_loongarch_cacop_w &&
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!TI.hasFeature("32bit"))
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return Diag(TheCall->getBeginLoc(),
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diag::err_loongarch_builtin_requires_la32)
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<< TheCall->getSourceRange();
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SemaBuiltinConstantArgRange(TheCall, 0, 0, llvm::maxUIntN(5));
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SemaBuiltinConstantArgRange(TheCall, 2, llvm::minIntN(12),
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llvm::maxIntN(12));
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break;
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}
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case LoongArch::BI__builtin_loongarch_crc_w_b_w:
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case LoongArch::BI__builtin_loongarch_crc_w_h_w:
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case LoongArch::BI__builtin_loongarch_crc_w_w_w:
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case LoongArch::BI__builtin_loongarch_crc_w_d_w:
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case LoongArch::BI__builtin_loongarch_crcc_w_b_w:
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case LoongArch::BI__builtin_loongarch_crcc_w_h_w:
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case LoongArch::BI__builtin_loongarch_crcc_w_w_w:
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case LoongArch::BI__builtin_loongarch_crcc_w_d_w:
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case LoongArch::BI__builtin_loongarch_iocsrrd_d:
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case LoongArch::BI__builtin_loongarch_iocsrwr_d:
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case LoongArch::BI__builtin_loongarch_asrtle_d:
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case LoongArch::BI__builtin_loongarch_asrtgt_d:
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if (!TI.hasFeature("64bit"))
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return Diag(TheCall->getBeginLoc(),
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diag::err_loongarch_builtin_requires_la64)
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<< TheCall->getSourceRange();
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break;
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case LoongArch::BI__builtin_loongarch_break:
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case LoongArch::BI__builtin_loongarch_dbar:
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case LoongArch::BI__builtin_loongarch_ibar:
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@@ -3888,35 +3861,16 @@ bool Sema::CheckLoongArchBuiltinFunctionCall(const TargetInfo &TI,
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// Check if immediate is in [0, 32767].
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return SemaBuiltinConstantArgRange(TheCall, 0, 0, 32767);
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case LoongArch::BI__builtin_loongarch_csrrd_w:
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case LoongArch::BI__builtin_loongarch_csrrd_d:
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return SemaBuiltinConstantArgRange(TheCall, 0, 0, 16383);
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case LoongArch::BI__builtin_loongarch_csrwr_w:
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case LoongArch::BI__builtin_loongarch_csrwr_d:
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return SemaBuiltinConstantArgRange(TheCall, 1, 0, 16383);
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case LoongArch::BI__builtin_loongarch_csrxchg_w:
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return SemaBuiltinConstantArgRange(TheCall, 2, 0, 16383);
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case LoongArch::BI__builtin_loongarch_csrrd_d:
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if (!TI.hasFeature("64bit"))
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return Diag(TheCall->getBeginLoc(),
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diag::err_loongarch_builtin_requires_la64)
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<< TheCall->getSourceRange();
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return SemaBuiltinConstantArgRange(TheCall, 0, 0, 16383);
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case LoongArch::BI__builtin_loongarch_csrwr_d:
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if (!TI.hasFeature("64bit"))
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return Diag(TheCall->getBeginLoc(),
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diag::err_loongarch_builtin_requires_la64)
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<< TheCall->getSourceRange();
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return SemaBuiltinConstantArgRange(TheCall, 1, 0, 16383);
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case LoongArch::BI__builtin_loongarch_csrxchg_d:
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if (!TI.hasFeature("64bit"))
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return Diag(TheCall->getBeginLoc(),
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diag::err_loongarch_builtin_requires_la64)
|
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<< TheCall->getSourceRange();
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return SemaBuiltinConstantArgRange(TheCall, 2, 0, 16383);
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case LoongArch::BI__builtin_loongarch_lddir_d:
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case LoongArch::BI__builtin_loongarch_ldpte_d:
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if (!TI.hasFeature("64bit"))
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return Diag(TheCall->getBeginLoc(),
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diag::err_loongarch_builtin_requires_la64)
|
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<< TheCall->getSourceRange();
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return SemaBuiltinConstantArgRange(TheCall, 1, 0, 31);
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case LoongArch::BI__builtin_loongarch_movfcsr2gr:
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case LoongArch::BI__builtin_loongarch_movgr2fcsr:
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@@ -1,9 +1,58 @@
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// RUN: %clang_cc1 -triple loongarch32 -emit-llvm -S -verify %s -o /dev/null
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// RUN: not %clang_cc1 -triple loongarch32 -DFEATURE_CHECK -emit-llvm %s 2>&1 \
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// RUN: | FileCheck %s
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#include <larchintrin.h>
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#ifdef FEATURE_CHECK
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void test_feature(long *v_l, unsigned long *v_ul, int *v_i, unsigned ui, char c, short s) {
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// CHECK: error: '__builtin_loongarch_cacop_d' needs target feature 64bit
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__builtin_loongarch_cacop_d(1, v_ul[0], 1024);
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|
||||
// CHECK: error: '__builtin_loongarch_crc_w_b_w' needs target feature 64bit
|
||||
v_i[0] = __builtin_loongarch_crc_w_b_w(c, v_i[0]);
|
||||
// CHECK: error: '__builtin_loongarch_crc_w_h_w' needs target feature 64bit
|
||||
v_i[1] = __builtin_loongarch_crc_w_h_w(c, v_i[0]);
|
||||
// CHECK: error: '__builtin_loongarch_crc_w_w_w' needs target feature 64bit
|
||||
v_i[2] = __builtin_loongarch_crc_w_w_w(c, v_i[0]);
|
||||
// CHECK: error: '__builtin_loongarch_crc_w_d_w' needs target feature 64bit
|
||||
v_i[3] = __builtin_loongarch_crc_w_d_w(c, v_i[0]);
|
||||
|
||||
// CHECK: error: '__builtin_loongarch_crcc_w_b_w' needs target feature 64bit
|
||||
v_i[4] = __builtin_loongarch_crcc_w_b_w(c, v_i[0]);
|
||||
// CHECK: error: '__builtin_loongarch_crcc_w_h_w' needs target feature 64bit
|
||||
v_i[5] = __builtin_loongarch_crcc_w_h_w(s, v_i[0]);
|
||||
// CHECK: error: '__builtin_loongarch_crcc_w_w_w' needs target feature 64bit
|
||||
v_i[6] = __builtin_loongarch_crcc_w_w_w(v_i[0], v_i[1]);
|
||||
// CHECK: error: '__builtin_loongarch_crcc_w_d_w' needs target feature 64bit
|
||||
v_i[7] = __builtin_loongarch_crcc_w_d_w(v_l[0], v_i[0]);
|
||||
|
||||
// CHECK: error: '__builtin_loongarch_csrrd_d' needs target feature 64bit
|
||||
v_ul[0] = __builtin_loongarch_csrrd_d(1);
|
||||
// CHECK: error: '__builtin_loongarch_csrwr_d' needs target feature 64bit
|
||||
v_ul[1] = __builtin_loongarch_csrwr_d(v_ul[0], 1);
|
||||
// CHECK: error: '__builtin_loongarch_csrxchg_d' needs target feature 64bit
|
||||
v_ul[2] = __builtin_loongarch_csrxchg_d(v_ul[0], v_ul[1], 1);
|
||||
|
||||
|
||||
// CHECK: error: '__builtin_loongarch_iocsrrd_d' needs target feature 64bit
|
||||
v_ul[3] = __builtin_loongarch_iocsrrd_d(ui);
|
||||
// CHECK: error: '__builtin_loongarch_iocsrwr_d' needs target feature 64bit
|
||||
__builtin_loongarch_iocsrwr_d(v_ul[0], ui);
|
||||
|
||||
// CHECK: error: '__builtin_loongarch_asrtle_d' needs target feature 64bit
|
||||
__builtin_loongarch_asrtle_d(v_l[0], v_l[1]);
|
||||
// CHECK: error: '__builtin_loongarch_asrtgt_d' needs target feature 64bit
|
||||
__builtin_loongarch_asrtgt_d(v_l[0], v_l[1]);
|
||||
|
||||
// CHECK: error: '__builtin_loongarch_lddir_d' needs target feature 64bit
|
||||
v_ul[4] = __builtin_loongarch_lddir_d(v_l[0], 1);
|
||||
// CHECK: error: '__builtin_loongarch_ldpte_d' needs target feature 64bit
|
||||
__builtin_loongarch_ldpte_d(v_l[0], 1);
|
||||
}
|
||||
#endif
|
||||
|
||||
void cacop_d(unsigned long int a) {
|
||||
__builtin_loongarch_cacop_d(1, a, 1024); // expected-error {{this builtin requires target: loongarch64}}
|
||||
__builtin_loongarch_cacop_w(-1, a, 1024); // expected-error {{argument value -1 is outside the valid range [0, 31]}}
|
||||
__builtin_loongarch_cacop_w(32, a, 1024); // expected-error {{argument value 32 is outside the valid range [0, 31]}}
|
||||
__builtin_loongarch_cacop_w(1, a, -4096); // expected-error {{argument value -4096 is outside the valid range [-2048, 2047]}}
|
||||
@@ -47,49 +96,6 @@ void syscall(int a) {
|
||||
__builtin_loongarch_syscall(a); // expected-error {{argument to '__builtin_loongarch_syscall' must be a constant integer}}
|
||||
}
|
||||
|
||||
int crc_w_b_w(char a, int b) {
|
||||
return __builtin_loongarch_crc_w_b_w(a, b); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
int crc_w_h_w(short a, int b) {
|
||||
return __builtin_loongarch_crc_w_h_w(a, b); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
int crc_w_w_w(int a, int b) {
|
||||
return __builtin_loongarch_crc_w_w_w(a, b); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
int crc_w_d_w(long int a, int b) {
|
||||
return __builtin_loongarch_crc_w_d_w(a, b); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
int crcc_w_b_w(char a, int b) {
|
||||
return __builtin_loongarch_crcc_w_b_w(a, b); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
int crcc_w_h_w(short a, int b) {
|
||||
return __builtin_loongarch_crcc_w_h_w(a, b); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
int crcc_w_w_w(int a, int b) {
|
||||
return __builtin_loongarch_crcc_w_w_w(a, b); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
int crcc_w_d_w(long int a, int b) {
|
||||
return __builtin_loongarch_crcc_w_d_w(a, b); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
unsigned long int csrrd_d() {
|
||||
return __builtin_loongarch_csrrd_d(1); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
unsigned long int csrwr_d(unsigned long int a) {
|
||||
return __builtin_loongarch_csrwr_d(a, 1); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
unsigned long int csrxchg_d(unsigned long int a, unsigned long int b) {
|
||||
return __builtin_loongarch_csrxchg_d(a, b, 1); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
void csrrd_w(int a) {
|
||||
__builtin_loongarch_csrrd_w(16384); // expected-error {{argument value 16384 is outside the valid range [0, 16383]}}
|
||||
__builtin_loongarch_csrrd_w(-1); // expected-error {{argument value 4294967295 is outside the valid range [0, 16383]}}
|
||||
@@ -108,30 +114,6 @@ void csrxchg_w(unsigned int a, unsigned int b) {
|
||||
__builtin_loongarch_csrxchg_w(a, b, b); // expected-error {{argument to '__builtin_loongarch_csrxchg_w' must be a constant integer}}
|
||||
}
|
||||
|
||||
unsigned long int iocsrrd_d(unsigned int a) {
|
||||
return __builtin_loongarch_iocsrrd_d(a); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
void iocsrwr_d(unsigned long int a, unsigned int b) {
|
||||
__builtin_loongarch_iocsrwr_d(a, b); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
void asrtle_d(long int a, long int b) {
|
||||
__builtin_loongarch_asrtle_d(a, b); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
void asrtgt_d(long int a, long int b) {
|
||||
__builtin_loongarch_asrtgt_d(a, b); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
void lddir_d(long int a, int b) {
|
||||
__builtin_loongarch_lddir_d(a, 1); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
void ldpte_d(long int a, int b) {
|
||||
__builtin_loongarch_ldpte_d(a, 1); // expected-error {{this builtin requires target: loongarch64}}
|
||||
}
|
||||
|
||||
void rdtime_d() {
|
||||
__rdtime_d(); // expected-error {{call to undeclared function '__rdtime_d'}}
|
||||
}
|
||||
|
||||
@@ -51,74 +51,75 @@ defm int_loongarch_masked_cmpxchg : MaskedAtomicRMWFiveOpIntrinsics;
|
||||
//===----------------------------------------------------------------------===//
|
||||
// LoongArch BASE
|
||||
|
||||
def int_loongarch_break : Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_cacop_d : Intrinsic<[], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty],
|
||||
[ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>]>;
|
||||
def int_loongarch_cacop_w : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>]>;
|
||||
def int_loongarch_dbar : Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_ibar : Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_movfcsr2gr : Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_movgr2fcsr : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_syscall : Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
|
||||
class BaseInt<list<LLVMType> ret_types, list<LLVMType> param_types,
|
||||
list<IntrinsicProperty> intr_properties = []>
|
||||
: Intrinsic<ret_types, param_types, intr_properties>,
|
||||
ClangBuiltin<!subst("int_loongarch", "__builtin_loongarch", NAME)>;
|
||||
|
||||
def int_loongarch_crc_w_b_w : Intrinsic<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crc_w_h_w : Intrinsic<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crc_w_w_w : Intrinsic<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crc_w_d_w : Intrinsic<[llvm_i32_ty],
|
||||
[llvm_i64_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_break : BaseInt<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_cacop_d : BaseInt<[], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty],
|
||||
[ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>]>;
|
||||
def int_loongarch_cacop_w : BaseInt<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>]>;
|
||||
def int_loongarch_dbar : BaseInt<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
|
||||
|
||||
def int_loongarch_crcc_w_b_w : Intrinsic<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crcc_w_h_w : Intrinsic<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crcc_w_w_w : Intrinsic<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crcc_w_d_w : Intrinsic<[llvm_i32_ty],
|
||||
[llvm_i64_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_ibar : BaseInt<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_movfcsr2gr : BaseInt<[llvm_i32_ty], [llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_movgr2fcsr : BaseInt<[], [llvm_i32_ty, llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_syscall : BaseInt<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
|
||||
|
||||
def int_loongarch_csrrd_w : Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_csrrd_d : Intrinsic<[llvm_i64_ty], [llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_csrwr_w : Intrinsic<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<1>>]>;
|
||||
def int_loongarch_csrwr_d : Intrinsic<[llvm_i64_ty],
|
||||
[llvm_i64_ty, llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<1>>]>;
|
||||
def int_loongarch_csrxchg_w : Intrinsic<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty,
|
||||
llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<2>>]>;
|
||||
def int_loongarch_csrxchg_d : Intrinsic<[llvm_i64_ty],
|
||||
[llvm_i64_ty, llvm_i64_ty,
|
||||
llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<2>>]>;
|
||||
def int_loongarch_crc_w_b_w : BaseInt<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crc_w_h_w : BaseInt<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crc_w_w_w : BaseInt<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crc_w_d_w : BaseInt<[llvm_i32_ty],
|
||||
[llvm_i64_ty, llvm_i32_ty]>;
|
||||
|
||||
def int_loongarch_iocsrrd_b : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrrd_h : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrrd_w : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrrd_d : Intrinsic<[llvm_i64_ty], [llvm_i32_ty]>;
|
||||
def int_loongarch_crcc_w_b_w : BaseInt<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crcc_w_h_w : BaseInt<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crcc_w_w_w : BaseInt<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_crcc_w_d_w : BaseInt<[llvm_i32_ty],
|
||||
[llvm_i64_ty, llvm_i32_ty]>;
|
||||
|
||||
def int_loongarch_iocsrwr_b : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrwr_h : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrwr_w : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrwr_d : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_csrrd_w : BaseInt<[llvm_i32_ty], [llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_csrrd_d : BaseInt<[llvm_i64_ty], [llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<0>>]>;
|
||||
def int_loongarch_csrwr_w : BaseInt<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<1>>]>;
|
||||
def int_loongarch_csrwr_d : BaseInt<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<1>>]>;
|
||||
def int_loongarch_csrxchg_w : BaseInt<[llvm_i32_ty],
|
||||
[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<2>>]>;
|
||||
def int_loongarch_csrxchg_d : BaseInt<[llvm_i64_ty],
|
||||
[llvm_i64_ty, llvm_i64_ty, llvm_i32_ty],
|
||||
[ImmArg<ArgIndex<2>>]>;
|
||||
|
||||
def int_loongarch_cpucfg : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrrd_b : BaseInt<[llvm_i32_ty], [llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrrd_h : BaseInt<[llvm_i32_ty], [llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrrd_w : BaseInt<[llvm_i32_ty], [llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrrd_d : BaseInt<[llvm_i64_ty], [llvm_i32_ty]>;
|
||||
|
||||
def int_loongarch_asrtle_d : Intrinsic<[], [llvm_i64_ty, llvm_i64_ty]>;
|
||||
def int_loongarch_asrtgt_d : Intrinsic<[], [llvm_i64_ty, llvm_i64_ty]>;
|
||||
def int_loongarch_iocsrwr_b : BaseInt<[], [llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrwr_h : BaseInt<[], [llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrwr_w : BaseInt<[], [llvm_i32_ty, llvm_i32_ty]>;
|
||||
def int_loongarch_iocsrwr_d : BaseInt<[], [llvm_i64_ty, llvm_i32_ty]>;
|
||||
|
||||
def int_loongarch_lddir_d : Intrinsic<[llvm_i64_ty],
|
||||
[llvm_i64_ty, llvm_i64_ty],
|
||||
[ImmArg<ArgIndex<1>>]>;
|
||||
def int_loongarch_ldpte_d : Intrinsic<[], [llvm_i64_ty, llvm_i64_ty],
|
||||
[ImmArg<ArgIndex<1>>]>;
|
||||
def int_loongarch_cpucfg : BaseInt<[llvm_i32_ty], [llvm_i32_ty]>;
|
||||
|
||||
def int_loongarch_asrtle_d : BaseInt<[], [llvm_i64_ty, llvm_i64_ty]>;
|
||||
def int_loongarch_asrtgt_d : BaseInt<[], [llvm_i64_ty, llvm_i64_ty]>;
|
||||
|
||||
def int_loongarch_lddir_d : BaseInt<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty],
|
||||
[ImmArg<ArgIndex<1>>]>;
|
||||
def int_loongarch_ldpte_d : BaseInt<[], [llvm_i64_ty, llvm_i64_ty],
|
||||
[ImmArg<ArgIndex<1>>]>;
|
||||
} // TargetPrefix = "loongarch"
|
||||
|
||||
@@ -37,6 +37,7 @@
|
||||
#include "llvm/IR/IntrinsicsBPF.h"
|
||||
#include "llvm/IR/IntrinsicsDirectX.h"
|
||||
#include "llvm/IR/IntrinsicsHexagon.h"
|
||||
#include "llvm/IR/IntrinsicsLoongArch.h"
|
||||
#include "llvm/IR/IntrinsicsMips.h"
|
||||
#include "llvm/IR/IntrinsicsNVPTX.h"
|
||||
#include "llvm/IR/IntrinsicsPowerPC.h"
|
||||
|
||||
Reference in New Issue
Block a user