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[InstCombine] Canonicalize active lane mask params (#158065)

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Rewrite active lane mask intrinsics to begin their range from 0 when
both parameters are constant integers.
This commit is contained in:
Matthew Devereau
2025-09-12 16:35:58 +01:00
committed by GitHub
parent 7ebfcbd0ec
commit ead4f3e271
2 changed files with 51 additions and 0 deletions
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13
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
View File

@@ -3952,6 +3952,19 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
}
break;
}
case Intrinsic::get_active_lane_mask: {
const APInt *Op0, *Op1;
if (match(II->getOperand(0), m_StrictlyPositive(Op0)) &&
match(II->getOperand(1), m_APInt(Op1))) {
Type *OpTy = II->getOperand(0)->getType();
return replaceInstUsesWith(
*II, Builder.CreateIntrinsic(
II->getType(), Intrinsic::get_active_lane_mask,
{Constant::getNullValue(OpTy),
ConstantInt::get(OpTy, Op1->usub_sat(*Op0))}));
}
break;
}
default: {
// Handle target specific intrinsics
std::optional<Instruction *> V = targetInstCombineIntrinsic(*II);

38
llvm/test/Transforms/InstCombine/get_active_lane_mask.ll Normal file
View File

@@ -0,0 +1,38 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
define <vscale x 4 x i1> @rewrite_range_nxv4i1() {
; CHECK-LABEL: define <vscale x 4 x i1> @rewrite_range_nxv4i1() {
; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 0, i32 3)
; CHECK-NEXT: ret <vscale x 4 x i1> [[MASK]]
;
%mask = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 1, i32 4)
ret <vscale x 4 x i1> %mask
}
define <vscale x 16 x i1> @rewrite_range_nxv16i1() {
; CHECK-LABEL: define <vscale x 16 x i1> @rewrite_range_nxv16i1() {
; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 0, i64 7)
; CHECK-NEXT: ret <vscale x 16 x i1> [[MASK]]
;
%mask = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 123123, i64 123130)
ret <vscale x 16 x i1> %mask
}
define <vscale x 16 x i1> @rewrite_range_nxv16i1_i128() {
; CHECK-LABEL: define <vscale x 16 x i1> @rewrite_range_nxv16i1_i128() {
; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i128(i128 0, i128 10)
; CHECK-NEXT: ret <vscale x 16 x i1> [[MASK]]
;
%mask = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i128(i128 18446744073709551616, i128 18446744073709551626)
ret <vscale x 16 x i1> %mask
}
define <vscale x 4 x i1> @bail_lhs_is_zero() {
; CHECK-LABEL: define <vscale x 4 x i1> @bail_lhs_is_zero() {
; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 0, i32 4)
; CHECK-NEXT: ret <vscale x 4 x i1> [[MASK]]
;
%mask = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 0, i32 4)
ret <vscale x 4 x i1> %mask
}