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[mlir] Start migrating more dialects to prefixed form

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Marked all dialects that could be (reasonably) easily flipped to _Both
prefix. Updating the accessors to prefixed form will happen in follow
up, this was to flush out conflicts and to mark all dialects explicitly
as I plan to flip OpBase default to _Prefixed to avoid needing to
migrate new dialects.

Except for Standalone example which got flipped to _Prefixed.

Differential Revision: https://reviews.llvm.org/D128027
This commit is contained in:
Jacques Pienaar
2022-06-18 10:10:31 -07:00
parent 37185ceac9
commit eca86cb2ed
30 changed files with 215 additions and 161 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
mlir/examples/standalone/include/Standalone/StandaloneDialect.td
View File

@@ -24,6 +24,8 @@ def Standalone_Dialect : Dialect {
working inside of the LLVM source tree.
}];
let cppNamespace = "::mlir::standalone";
let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
//===----------------------------------------------------------------------===//

2
mlir/include/mlir/Dialect/AMDGPU/AMDGPU.td
View File

@@ -21,6 +21,8 @@ def AMDGPU_Dialect : Dialect {
more generic dialects, such as `gpu` and `vector`, when generating LLVM IR
that will eventually be executed on AMD hardware.
}];
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
//===----------------------------------------------------------------------===//

2
mlir/include/mlir/Dialect/AMX/AMX.td
View File

@@ -55,6 +55,8 @@ def AMX_Dialect : Dialect {
For details, see the Intel documentation:
https://software.intel.com/content/www/us/en/develop/articles/intel-sdm.html
}];
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
//===----------------------------------------------------------------------===//

2
mlir/include/mlir/Dialect/Affine/IR/AffineMemoryOpInterfaces.td
View File

@@ -167,7 +167,7 @@ def AffineMapAccessInterface : OpInterface<"AffineMapAccessInterface"> {
ConcreteOp op = cast<ConcreteOp>(this->getOperation());
assert(memref == op.getMemRef() &&
"Expected memref argument to match memref operand");
return {StringAttr::get(op.getContext(), op.getMapAttrName()),
return {StringAttr::get(op.getContext(), op.getMapAttrStrName()),
op.getAffineMapAttr()};
}]
>,

24
mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
View File

@@ -115,7 +115,7 @@ public:
/// Returns the affine map used to access the source memref.
AffineMap getSrcMap() { return getSrcMapAttr().getValue(); }
AffineMapAttr getSrcMapAttr() {
return (*this)->getAttr(getSrcMapAttrName()).cast<AffineMapAttr>();
return (*this)->getAttr(getSrcMapAttrStrName()).cast<AffineMapAttr>();
}
/// Returns the source memref affine map indices for this DMA operation.
@@ -154,7 +154,7 @@ public:
/// Returns the affine map used to access the destination memref.
AffineMap getDstMap() { return getDstMapAttr().getValue(); }
AffineMapAttr getDstMapAttr() {
return (*this)->getAttr(getDstMapAttrName()).cast<AffineMapAttr>();
return (*this)->getAttr(getDstMapAttrStrName()).cast<AffineMapAttr>();
}
/// Returns the destination memref indices for this DMA operation.
@@ -183,7 +183,7 @@ public:
/// Returns the affine map used to access the tag memref.
AffineMap getTagMap() { return getTagMapAttr().getValue(); }
AffineMapAttr getTagMapAttr() {
return (*this)->getAttr(getTagMapAttrName()).cast<AffineMapAttr>();
return (*this)->getAttr(getTagMapAttrStrName()).cast<AffineMapAttr>();
}
/// Returns the tag memref indices for this DMA operation.
@@ -203,14 +203,14 @@ public:
/// Returns the AffineMapAttr associated with 'memref'.
NamedAttribute getAffineMapAttrForMemRef(Value memref) {
if (memref == getSrcMemRef())
return {StringAttr::get(getContext(), getSrcMapAttrName()),
return {StringAttr::get(getContext(), getSrcMapAttrStrName()),
getSrcMapAttr()};
if (memref == getDstMemRef())
return {StringAttr::get(getContext(), getDstMapAttrName()),
return {StringAttr::get(getContext(), getDstMapAttrStrName()),
getDstMapAttr()};
assert(memref == getTagMemRef() &&
"DmaStartOp expected source, destination or tag memref");
return {StringAttr::get(getContext(), getTagMapAttrName()),
return {StringAttr::get(getContext(), getTagMapAttrStrName()),
getTagMapAttr()};
}
@@ -233,9 +233,9 @@ public:
return isSrcMemorySpaceFaster() ? 0 : getDstMemRefOperandIndex();
}
static StringRef getSrcMapAttrName() { return "src_map"; }
static StringRef getDstMapAttrName() { return "dst_map"; }
static StringRef getTagMapAttrName() { return "tag_map"; }
static StringRef getSrcMapAttrStrName() { return "src_map"; }
static StringRef getDstMapAttrStrName() { return "dst_map"; }
static StringRef getTagMapAttrStrName() { return "tag_map"; }
static StringRef getOperationName() { return "affine.dma_start"; }
static ParseResult parse(OpAsmParser &parser, OperationState &result);
@@ -301,7 +301,7 @@ public:
/// Returns the affine map used to access the tag memref.
AffineMap getTagMap() { return getTagMapAttr().getValue(); }
AffineMapAttr getTagMapAttr() {
return (*this)->getAttr(getTagMapAttrName()).cast<AffineMapAttr>();
return (*this)->getAttr(getTagMapAttrStrName()).cast<AffineMapAttr>();
}
/// Returns the tag memref index for this DMA operation.
@@ -319,14 +319,14 @@ public:
/// associated with 'memref'.
NamedAttribute getAffineMapAttrForMemRef(Value memref) {
assert(memref == getTagMemRef());
return {StringAttr::get(getContext(), getTagMapAttrName()),
return {StringAttr::get(getContext(), getTagMapAttrStrName()),
getTagMapAttr()};
}
/// Returns the number of elements transferred by the associated DMA op.
Value getNumElements() { return getOperand(1 + getTagMap().getNumInputs()); }
static StringRef getTagMapAttrName() { return "tag_map"; }
static StringRef getTagMapAttrStrName() { return "tag_map"; }
static ParseResult parse(OpAsmParser &parser, OperationState &result);
void print(OpAsmPrinter &p);
LogicalResult verifyInvariantsImpl();

71
mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
View File

@@ -24,6 +24,8 @@ def Affine_Dialect : Dialect {
let cppNamespace = "mlir";
let hasConstantMaterializer = 1;
let dependentDialects = ["arith::ArithmeticDialect"];
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
// Base class for Affine dialect ops.
@@ -96,8 +98,6 @@ def AffineApplyOp : Affine_Op<"apply", [NoSideEffect]> {
/// Returns true if the result of this operation is a symbol for all its
/// uses in `region`.
bool isValidSymbol(Region *region);
operand_range getMapOperands() { return getOperands(); }
}];
let hasCanonicalizer = 1;
@@ -241,9 +241,9 @@ def AffineForOp : Affine_Op<"for",
using BodyBuilderFn =
function_ref<void(OpBuilder &, Location, Value, ValueRange)>;
static StringRef getStepAttrName() { return "step"; }
static StringRef getLowerBoundAttrName() { return "lower_bound"; }
static StringRef getUpperBoundAttrName() { return "upper_bound"; }
static StringRef getStepAttrStrName() { return "step"; }
static StringRef getLowerBoundAttrStrName() { return "lower_bound"; }
static StringRef getUpperBoundAttrStrName() { return "upper_bound"; }
BlockArgument getInductionVar() { return getBody()->getArgument(0); }
Block::BlockArgListType getRegionIterArgs() {
@@ -274,18 +274,18 @@ def AffineForOp : Affine_Op<"for",
/// Returns loop step.
int64_t getStep() {
return (*this)->getAttr(getStepAttrName()).cast<IntegerAttr>().getInt();
return (*this)->getAttr(getStepAttrStrName()).cast<IntegerAttr>().getInt();
}
/// Returns affine map for the lower bound.
AffineMap getLowerBoundMap() { return getLowerBoundMapAttr().getValue(); }
AffineMapAttr getLowerBoundMapAttr() {
return (*this)->getAttr(getLowerBoundAttrName()).cast<AffineMapAttr>();
return (*this)->getAttr(getLowerBoundAttrStrName()).cast<AffineMapAttr>();
}
/// Returns affine map for the upper bound. The upper bound is exclusive.
AffineMap getUpperBoundMap() { return getUpperBoundMapAttr().getValue(); }
AffineMapAttr getUpperBoundMapAttr() {
return (*this)->getAttr(getUpperBoundAttrName()).cast<AffineMapAttr>();
return (*this)->getAttr(getUpperBoundAttrStrName()).cast<AffineMapAttr>();
}
/// Set lower bound. The new bound must have the same number of operands as
@@ -305,7 +305,7 @@ def AffineForOp : Affine_Op<"for",
void setStep(int64_t step) {
assert(step > 0 && "step has to be a positive integer constant");
auto *context = getLowerBoundMap().getContext();
(*this)->setAttr(StringAttr::get(context, getStepAttrName()),
(*this)->setAttr(StringAttr::get(context, getStepAttrStrName()),
IntegerAttr::get(IndexType::get(context), step));
}
@@ -436,7 +436,7 @@ def AffineIfOp : Affine_Op<"if",
];
let extraClassDeclaration = [{
static StringRef getConditionAttrName() { return "condition"; }
static StringRef getConditionAttrStrName() { return "condition"; }
IntegerSet getIntegerSet();
void setIntegerSet(IntegerSet newSet);
@@ -492,13 +492,10 @@ class AffineLoadOpBase<string mnemonic, list<Trait> traits = []> :
/// Returns the affine map used to index the memref for this operation.
AffineMapAttr getAffineMapAttr() {
return (*this)->getAttr(getMapAttrName()).cast<AffineMapAttr>();
return (*this)->getAttr(getMapAttrStrName()).cast<AffineMapAttr>();
}
static StringRef getMapAttrName() { return "map"; }
// TODO: Remove once prefixing is flipped.
operand_range getIndices() { return indices(); }
static StringRef getMapAttrStrName() { return "map"; }
}];
}
@@ -558,7 +555,7 @@ class AffineMinMaxOpBase<string mnemonic, list<Trait> traits = []> :
];
let extraClassDeclaration = [{
static StringRef getMapAttrName() { return "map"; }
static StringRef getMapAttrStrName() { return "map"; }
AffineMap getAffineMap() { return map(); }
ValueRange getMapOperands() { return operands(); }
ValueRange getDimOperands() {
@@ -688,7 +685,7 @@ def AffineParallelOp : Affine_Op<"parallel",
I32ElementsAttr:$lowerBoundsGroups,
AffineMapAttr:$upperBoundsMap,
I32ElementsAttr:$upperBoundsGroups,
I64ArrayAttr:$steps,
I64SmallVectorArrayAttr:$steps,
Variadic<Index>:$mapOperands);
let results = (outs Variadic<AnyType>:$results);
let regions = (region SizedRegion<1>:$region);
@@ -733,21 +730,20 @@ def AffineParallelOp : Affine_Op<"parallel",
void setUpperBounds(ValueRange operands, AffineMap map);
void setUpperBoundsMap(AffineMap map);
SmallVector<int64_t, 8> getSteps();
void setSteps(ArrayRef<int64_t> newSteps);
/// Returns attribute names to use in op construction. Not expected to be
/// used directly.
static StringRef getReductionsAttrName() { return "reductions"; }
static StringRef getLowerBoundsMapAttrName() { return "lowerBoundsMap"; }
static StringRef getLowerBoundsGroupsAttrName() {
static StringRef getReductionsAttrStrName() { return "reductions"; }
static StringRef getLowerBoundsMapAttrStrName() { return "lowerBoundsMap"; }
static StringRef getLowerBoundsGroupsAttrStrName() {
return "lowerBoundsGroups";
}
static StringRef getUpperBoundsMapAttrName() { return "upperBoundsMap"; }
static StringRef getUpperBoundsGroupsAttrName() {
static StringRef getUpperBoundsMapAttrStrName() { return "upperBoundsMap"; }
static StringRef getUpperBoundsGroupsAttrStrName() {
return "upperBoundsGroups";
}
static StringRef getStepsAttrName() { return "steps"; }
static StringRef getStepsAttrStrName() { return "steps"; }
/// Returns `true` if the loop bounds have min/max expressions.
bool hasMinMaxBounds() {
@@ -798,11 +794,11 @@ def AffinePrefetchOp : Affine_Op<"prefetch",
auto isWriteAttr = $_builder.getBoolAttr(isWrite);
auto isDataCacheAttr = $_builder.getBoolAttr(isDataCache);
$_state.addOperands(memref);
$_state.addAttribute(getMapAttrName(), AffineMapAttr::get(map));
$_state.addAttribute(getMapAttrStrName(), AffineMapAttr::get(map));
$_state.addOperands(mapOperands);
$_state.addAttribute(getLocalityHintAttrName(), localityHintAttr);
$_state.addAttribute(getIsWriteAttrName(), isWriteAttr);
$_state.addAttribute(getIsDataCacheAttrName(), isDataCacheAttr);
$_state.addAttribute(getLocalityHintAttrStrName(), localityHintAttr);
$_state.addAttribute(getIsWriteAttrStrName(), isWriteAttr);
$_state.addAttribute(getIsDataCacheAttrStrName(), isDataCacheAttr);
}]>];
let extraClassDeclaration = [{
@@ -813,7 +809,7 @@ def AffinePrefetchOp : Affine_Op<"prefetch",
/// Returns the affine map used to index the memref for this operation.
AffineMap getAffineMap() { return getAffineMapAttr().getValue(); }
AffineMapAttr getAffineMapAttr() {
return (*this)->getAttr(getMapAttrName()).cast<AffineMapAttr>();
return (*this)->getAttr(getMapAttrStrName()).cast<AffineMapAttr>();
}
/// Impelements the AffineMapAccessInterface.
@@ -821,7 +817,7 @@ def AffinePrefetchOp : Affine_Op<"prefetch",
NamedAttribute getAffineMapAttrForMemRef(Value mref) {
assert(mref == memref() &&
"Expected mref argument to match memref operand");
return {StringAttr::get(getContext(), getMapAttrName()),
return {StringAttr::get(getContext(), getMapAttrStrName()),
getAffineMapAttr()};
}
@@ -830,10 +826,10 @@ def AffinePrefetchOp : Affine_Op<"prefetch",
return {operand_begin() + 1, operand_end()};
}
static StringRef getMapAttrName() { return "map"; }
static StringRef getLocalityHintAttrName() { return "localityHint"; }
static StringRef getIsWriteAttrName() { return "isWrite"; }
static StringRef getIsDataCacheAttrName() { return "isDataCache"; }
static StringRef getMapAttrStrName() { return "map"; }
static StringRef getLocalityHintAttrStrName() { return "localityHint"; }
static StringRef getIsWriteAttrStrName() { return "isWrite"; }
static StringRef getIsDataCacheAttrStrName() { return "isDataCache"; }
}];
let hasCanonicalizer = 1;
@@ -858,13 +854,10 @@ class AffineStoreOpBase<string mnemonic, list<Trait> traits = []> :
/// Returns the affine map used to index the memref for this operation.
AffineMapAttr getAffineMapAttr() {
return (*this)->getAttr(getMapAttrName()).cast<AffineMapAttr>();
return (*this)->getAttr(getMapAttrStrName()).cast<AffineMapAttr>();
}
static StringRef getMapAttrName() { return "map"; }
// TODO: Remove once prefixing is flipped.
operand_range getIndices() { return indices(); }
static StringRef getMapAttrStrName() { return "map"; }
}];
}

2
mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
View File

@@ -28,6 +28,8 @@ def ArmNeon_Dialect : Dialect {
// Note: this does not need to depend on LLVMDialect as long as functions in
// this dialect (such as canonicalization) do not produce entities belonging
// to the LLVMDialect (ops or types).
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
//===----------------------------------------------------------------------===//

2
mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td
View File

@@ -28,6 +28,8 @@ def ArmSVE_Dialect : Dialect {
This dialect contains the definitions necessary to target specific Arm SVE
scalable vector operations.
}];
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
//===----------------------------------------------------------------------===//

2
mlir/include/mlir/Dialect/Async/IR/AsyncDialect.td
View File

@@ -39,6 +39,8 @@ def AsyncDialect : Dialect {
"async.allowed_to_block";
}];
// TODO: Prefixed form overlaps with generated names, update before flipping.
let emitAccessorPrefix = kEmitAccessorPrefix_Raw;
}
#endif // ASYNC_DIALECT_TD

2
mlir/include/mlir/Dialect/DLTI/DLTIBase.td
View File

@@ -37,6 +37,8 @@ def DLTI_Dialect : Dialect {
}];
let useDefaultAttributePrinterParser = 1;
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
def DLTI_DataLayoutEntryAttr : DialectAttr<

2
mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
View File

@@ -31,6 +31,8 @@ def EmitC_Dialect : Dialect {
let hasConstantMaterializer = 1;
let useDefaultTypePrinterParser = 1;
let useDefaultAttributePrinterParser = 1;
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
#endif // MLIR_DIALECT_EMITC_IR_EMITCBASE

4
mlir/include/mlir/Dialect/GPU/IR/GPUBase.td
View File

@@ -56,6 +56,10 @@ def GPU_Dialect : Dialect {
let dependentDialects = ["arith::ArithmeticDialect"];
let useDefaultAttributePrinterParser = 1;
let useDefaultTypePrinterParser = 1;
// TODO: This has overlapping accessors with generated when switched to
// prefixed. Fix and update to _Both & then _Prefixed.
let emitAccessorPrefix = kEmitAccessorPrefix_Raw;
}
def GPU_AsyncToken : DialectType<

2
mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
View File

@@ -548,4 +548,4 @@ def LLVM_VPSIToFPOp : LLVM_VPCastI<"sitofp">;
def LLVM_VPPtrToIntOp : LLVM_VPCastPtr<"ptrtoint">;
def LLVM_VPIntToPtrOp : LLVM_VPCastI<"inttoptr">;
#endif // LLVM_INTRINSIC_OPS
#endif // LLVM_INTRINSIC_OP

2
mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
View File

@@ -37,6 +37,8 @@ def NVVM_Dialect : Dialect {
}];
let useDefaultAttributePrinterParser = 1;
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
//===----------------------------------------------------------------------===//

2
mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
View File

@@ -31,6 +31,8 @@ def ROCDL_Dialect : Dialect {
/// functions.
static StringRef getKernelFuncAttrName() { return "rocdl.kernel"; }
}];
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
//===----------------------------------------------------------------------===//

4
mlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td
View File

@@ -57,6 +57,10 @@ def Linalg_Dialect : Dialect {
private:
llvm::StringMap<RegionBuilderFunType> namedStructuredOpRegionBuilders;
}];
// TODO: This has overlapping accessors with generated when switched to
// prefixed. Fix and update to _Both & then _Prefixed.
let emitAccessorPrefix = kEmitAccessorPrefix_Raw;
}
// Define the function attribute enums matching the OpDSL functions.

4
mlir/include/mlir/Dialect/MemRef/IR/MemRefBase.td
View File

@@ -21,6 +21,10 @@ def MemRef_Dialect : Dialect {
}];
let dependentDialects = ["arith::ArithmeticDialect"];
let hasConstantMaterializer = 1;
// TODO: This has overlapping accessors with generated when switched to
// prefixed. Fix and update to _Both & then _Prefixed.
let emitAccessorPrefix = kEmitAccessorPrefix_Raw;
}
#endif // MEMREF_BASE

2
mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
View File

@@ -34,6 +34,8 @@ def NVGPU_Dialect : Dialect {
}];
let useDefaultTypePrinterParser = 1;
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
/// Device-side synchronization token.

4
mlir/include/mlir/Dialect/PDL/IR/PDLDialect.td
View File

@@ -69,6 +69,10 @@ def PDL_Dialect : Dialect {
let extraClassDeclaration = [{
void registerTypes();
}];
// FIXME: Prefixed accessors overlap with builtin Operation members. Flip
// once resolved.
let emitAccessorPrefix = kEmitAccessorPrefix_Raw;
}
#endif // MLIR_DIALECT_PDL_IR_PDLDIALECT

2
mlir/include/mlir/Dialect/Quant/QuantOpsBase.td
View File

@@ -20,6 +20,8 @@ def Quantization_Dialect : Dialect {
let cppNamespace = "::mlir::quant";
let useDefaultTypePrinterParser = 1;
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
//===----------------------------------------------------------------------===//

4
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
View File

@@ -72,6 +72,10 @@ def SPIRV_Dialect : Dialect {
void printAttribute(
Attribute attr, DialectAsmPrinter &printer) const override;
}];
// TODO: This has overlapping accessors with generated when switched to
// prefixed. Fix and update to _Both & then _Prefixed.
let emitAccessorPrefix = kEmitAccessorPrefix_Raw;
}
//===----------------------------------------------------------------------===//

2
mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
View File

@@ -74,6 +74,8 @@ def SparseTensor_Dialect : Dialect {
}];
let useDefaultAttributePrinterParser = 1;
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
#endif // SPARSETENSOR_BASE

2
mlir/include/mlir/Dialect/Tensor/IR/TensorBase.td
View File

@@ -50,6 +50,8 @@ def Tensor_Dialect : Dialect {
"arith::ArithmeticDialect",
"complex::ComplexDialect",
];
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
#endif // TENSOR_BASE

6
mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
View File

@@ -680,7 +680,7 @@ class Tensor_ReassociativeReshapeOp<string mnemonic, list<Trait> traits = []> :
Results<(outs AnyTensor:$result)> {
code commonExtraClassDeclaration = [{
static StringRef getReassociationAttrName() { return "reassociation"; }
static StringRef getReassociationAttrStrName() { return "reassociation"; }
SmallVector<AffineMap, 4> getReassociationMaps();
SmallVector<ReassociationExprs, 4> getReassociationExprs();
SmallVector<ReassociationIndices, 4> getReassociationIndices() {
@@ -921,11 +921,11 @@ def Tensor_PadOp : Tensor_Op<"pad", [AttrSizedOperandSegments, NoSideEffect,
}];
let extraClassDeclaration = [{
static StringRef getStaticLowAttrName() {
static StringRef getStaticLowAttrStrName() {
return "static_low";
}
static StringRef getStaticHighAttrName() {
static StringRef getStaticHighAttrStrName() {
return "static_high";
}

2
mlir/include/mlir/Dialect/X86Vector/X86Vector.td
View File

@@ -24,6 +24,8 @@ include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
def X86Vector_Dialect : Dialect {
let name = "x86vector";
let cppNamespace = "::mlir::x86vector";
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
//===----------------------------------------------------------------------===//

11
mlir/include/mlir/IR/OpBase.td
View File

@@ -1421,6 +1421,17 @@ def I64ArrayAttr : TypedArrayAttrBase<I64Attr,
"64-bit integer array attribute"> {
let constBuilderCall = "$_builder.getI64ArrayAttr($0)";
}
// Variant of I64ArrayAttr whose user accessor is SmallVector<in64_t>.
def I64SmallVectorArrayAttr :
TypedArrayAttrBase<I64Attr, "64-bit integer array attribute"> {
let returnType = [{ ::llvm::SmallVector<int64_t, 8> }];
let convertFromStorage = [{
llvm::to_vector<4>(
llvm::map_range($_self.getAsRange<mlir::IntegerAttr>(),
[](IntegerAttr attr) { return attr.getInt(); }));
}];
let constBuilderCall = "$_builder.getI64ArrayAttr($0)";
}
def F32ArrayAttr : TypedArrayAttrBase<F32Attr, "32-bit float array attribute"> {
let constBuilderCall = "$_builder.getF32ArrayAttr($0)";
}

5
mlir/lib/Conversion/AffineToStandard/AffineToStandard.cpp
View File

@@ -194,9 +194,8 @@ public:
upperBoundTuple.push_back(upper);
}
steps.reserve(op.steps().size());
for (Attribute step : op.steps())
steps.push_back(rewriter.create<arith::ConstantIndexOp>(
loc, step.cast<IntegerAttr>().getInt()));
for (int64_t step : op.steps())
steps.push_back(rewriter.create<arith::ConstantIndexOp>(loc, step));
// Get the terminator op.
Operation *affineParOpTerminator = op.getBody()->getTerminator();

199
mlir/lib/Dialect/Affine/IR/AffineOps.cpp
View File

@@ -1004,13 +1004,13 @@ void AffineDmaStartOp::build(OpBuilder &builder, OperationState &result,
ValueRange tagIndices, Value numElements,
Value stride, Value elementsPerStride) {
result.addOperands(srcMemRef);
result.addAttribute(getSrcMapAttrName(), AffineMapAttr::get(srcMap));
result.addAttribute(getSrcMapAttrStrName(), AffineMapAttr::get(srcMap));
result.addOperands(srcIndices);
result.addOperands(destMemRef);
result.addAttribute(getDstMapAttrName(), AffineMapAttr::get(dstMap));
result.addAttribute(getDstMapAttrStrName(), AffineMapAttr::get(dstMap));
result.addOperands(destIndices);
result.addOperands(tagMemRef);
result.addAttribute(getTagMapAttrName(), AffineMapAttr::get(tagMap));
result.addAttribute(getTagMapAttrStrName(), AffineMapAttr::get(tagMap));
result.addOperands(tagIndices);
result.addOperands(numElements);
if (stride) {
@@ -1064,13 +1064,16 @@ ParseResult AffineDmaStartOp::parse(OpAsmParser &parser,
// *) number of elements transferred by DMA operation.
if (parser.parseOperand(srcMemRefInfo) ||
parser.parseAffineMapOfSSAIds(srcMapOperands, srcMapAttr,
getSrcMapAttrName(), result.attributes) ||
getSrcMapAttrStrName(),
result.attributes) ||
parser.parseComma() || parser.parseOperand(dstMemRefInfo) ||
parser.parseAffineMapOfSSAIds(dstMapOperands, dstMapAttr,
getDstMapAttrName(), result.attributes) ||
getDstMapAttrStrName(),
result.attributes) ||
parser.parseComma() || parser.parseOperand(tagMemRefInfo) ||
parser.parseAffineMapOfSSAIds(tagMapOperands, tagMapAttr,
getTagMapAttrName(), result.attributes) ||
getTagMapAttrStrName(),
result.attributes) ||
parser.parseComma() || parser.parseOperand(numElementsInfo))
return failure();
@@ -1166,7 +1169,7 @@ void AffineDmaWaitOp::build(OpBuilder &builder, OperationState &result,
Value tagMemRef, AffineMap tagMap,
ValueRange tagIndices, Value numElements) {
result.addOperands(tagMemRef);
result.addAttribute(getTagMapAttrName(), AffineMapAttr::get(tagMap));
result.addAttribute(getTagMapAttrStrName(), AffineMapAttr::get(tagMap));
result.addOperands(tagIndices);
result.addOperands(numElements);
}
@@ -1197,7 +1200,8 @@ ParseResult AffineDmaWaitOp::parse(OpAsmParser &parser,
// Parse tag memref, its map operands, and dma size.
if (parser.parseOperand(tagMemRefInfo) ||
parser.parseAffineMapOfSSAIds(tagMapOperands, tagMapAttr,
getTagMapAttrName(), result.attributes) ||
getTagMapAttrStrName(),
result.attributes) ||
parser.parseComma() || parser.parseOperand(numElementsInfo) ||
parser.parseColonType(type) ||
parser.resolveOperand(tagMemRefInfo, type, result.operands) ||
@@ -1256,15 +1260,15 @@ void AffineForOp::build(OpBuilder &builder, OperationState &result,
result.addTypes(val.getType());
// Add an attribute for the step.
result.addAttribute(getStepAttrName(),
result.addAttribute(getStepAttrStrName(),
builder.getIntegerAttr(builder.getIndexType(), step));
// Add the lower bound.
result.addAttribute(getLowerBoundAttrName(), AffineMapAttr::get(lbMap));
result.addAttribute(getLowerBoundAttrStrName(), AffineMapAttr::get(lbMap));
result.addOperands(lbOperands);
// Add the upper bound.
result.addAttribute(getUpperBoundAttrName(), AffineMapAttr::get(ubMap));
result.addAttribute(getUpperBoundAttrStrName(), AffineMapAttr::get(ubMap));
result.addOperands(ubOperands);
result.addOperands(iterArgs);
@@ -1346,8 +1350,8 @@ static ParseResult parseBound(bool isLower, OperationState &result,
failed(p.parseOptionalKeyword(isLower ? "max" : "min"));
auto &builder = p.getBuilder();
auto boundAttrName = isLower ? AffineForOp::getLowerBoundAttrName()
: AffineForOp::getUpperBoundAttrName();
auto boundAttrStrName = isLower ? AffineForOp::getLowerBoundAttrStrName()
: AffineForOp::getUpperBoundAttrStrName();
// Parse ssa-id as identity map.
SmallVector<OpAsmParser::UnresolvedOperand, 1> boundOpInfos;
@@ -1370,7 +1374,7 @@ static ParseResult parseBound(bool isLower, OperationState &result,
// for storage. Analysis passes may expand it into a multi-dimensional map
// if desired.
AffineMap map = builder.getSymbolIdentityMap();
result.addAttribute(boundAttrName, AffineMapAttr::get(map));
result.addAttribute(boundAttrStrName, AffineMapAttr::get(map));
return success();
}
@@ -1378,7 +1382,7 @@ static ParseResult parseBound(bool isLower, OperationState &result,
SMLoc attrLoc = p.getCurrentLocation();
Attribute boundAttr;
if (p.parseAttribute(boundAttr, builder.getIndexType(), boundAttrName,
if (p.parseAttribute(boundAttr, builder.getIndexType(), boundAttrStrName,
result.attributes))
return failure();
@@ -1419,7 +1423,7 @@ static ParseResult parseBound(bool isLower, OperationState &result,
if (auto integerAttr = boundAttr.dyn_cast<IntegerAttr>()) {
result.attributes.pop_back();
result.addAttribute(
boundAttrName,
boundAttrStrName,
AffineMapAttr::get(builder.getConstantAffineMap(integerAttr.getInt())));
return success();
}
@@ -1446,13 +1450,13 @@ ParseResult AffineForOp::parse(OpAsmParser &parser, OperationState &result) {
// Parse the optional loop step, we default to 1 if one is not present.
if (parser.parseOptionalKeyword("step")) {
result.addAttribute(
AffineForOp::getStepAttrName(),
AffineForOp::getStepAttrStrName(),
builder.getIntegerAttr(builder.getIndexType(), /*value=*/1));
} else {
SMLoc stepLoc = parser.getCurrentLocation();
IntegerAttr stepAttr;
if (parser.parseAttribute(stepAttr, builder.getIndexType(),
AffineForOp::getStepAttrName().data(),
AffineForOp::getStepAttrStrName().data(),
result.attributes))
return failure();
@@ -1576,9 +1580,9 @@ void AffineForOp::print(OpAsmPrinter &p) {
p << ' ';
p.printRegion(region(), /*printEntryBlockArgs=*/false, printBlockTerminators);
p.printOptionalAttrDict((*this)->getAttrs(),
/*elidedAttrs=*/{getLowerBoundAttrName(),
getUpperBoundAttrName(),
getStepAttrName()});
/*elidedAttrs=*/{getLowerBoundAttrStrName(),
getUpperBoundAttrStrName(),
getStepAttrStrName()});
}
/// Fold the constant bounds of a loop.
@@ -1821,7 +1825,7 @@ void AffineForOp::setLowerBound(ValueRange lbOperands, AffineMap map) {
newOperands.append(iterOperands.begin(), iterOperands.end());
(*this)->setOperands(newOperands);
(*this)->setAttr(getLowerBoundAttrName(), AffineMapAttr::get(map));
(*this)->setAttr(getLowerBoundAttrStrName(), AffineMapAttr::get(map));
}
void AffineForOp::setUpperBound(ValueRange ubOperands, AffineMap map) {
@@ -1834,7 +1838,7 @@ void AffineForOp::setUpperBound(ValueRange ubOperands, AffineMap map) {
newOperands.append(iterOperands.begin(), iterOperands.end());
(*this)->setOperands(newOperands);
(*this)->setAttr(getUpperBoundAttrName(), AffineMapAttr::get(map));
(*this)->setAttr(getUpperBoundAttrStrName(), AffineMapAttr::get(map));
}
void AffineForOp::setLowerBoundMap(AffineMap map) {
@@ -1843,7 +1847,7 @@ void AffineForOp::setLowerBoundMap(AffineMap map) {
lbMap.getNumSymbols() == map.getNumSymbols());
assert(map.getNumResults() >= 1 && "bound map has at least one result");
(void)lbMap;
(*this)->setAttr(getLowerBoundAttrName(), AffineMapAttr::get(map));
(*this)->setAttr(getLowerBoundAttrStrName(), AffineMapAttr::get(map));
}
void AffineForOp::setUpperBoundMap(AffineMap map) {
@@ -1852,7 +1856,7 @@ void AffineForOp::setUpperBoundMap(AffineMap map) {
ubMap.getNumSymbols() == map.getNumSymbols());
assert(map.getNumResults() >= 1 && "bound map has at least one result");
(void)ubMap;
(*this)->setAttr(getUpperBoundAttrName(), AffineMapAttr::get(map));
(*this)->setAttr(getUpperBoundAttrStrName(), AffineMapAttr::get(map));
}
bool AffineForOp::hasConstantLowerBound() {
@@ -2169,7 +2173,7 @@ LogicalResult AffineIfOp::verify() {
// Verify that we have a condition attribute.
// FIXME: This should be specified in the arguments list in ODS.
auto conditionAttr =
(*this)->getAttrOfType<IntegerSetAttr>(getConditionAttrName());
(*this)->getAttrOfType<IntegerSetAttr>(getConditionAttrStrName());
if (!conditionAttr)
return emitOpError("requires an integer set attribute named 'condition'");
@@ -2191,7 +2195,8 @@ ParseResult AffineIfOp::parse(OpAsmParser &parser, OperationState &result) {
// Parse the condition attribute set.
IntegerSetAttr conditionAttr;
unsigned numDims;
if (parser.parseAttribute(conditionAttr, AffineIfOp::getConditionAttrName(),
if (parser.parseAttribute(conditionAttr,
AffineIfOp::getConditionAttrStrName(),
result.attributes) ||
parseDimAndSymbolList(parser, result.operands, numDims))
return failure();
@@ -2239,7 +2244,7 @@ ParseResult AffineIfOp::parse(OpAsmParser &parser, OperationState &result) {
void AffineIfOp::print(OpAsmPrinter &p) {
auto conditionAttr =
(*this)->getAttrOfType<IntegerSetAttr>(getConditionAttrName());
(*this)->getAttrOfType<IntegerSetAttr>(getConditionAttrStrName());
p << " " << conditionAttr;
printDimAndSymbolList(operand_begin(), operand_end(),
conditionAttr.getValue().getNumDims(), p);
@@ -2259,17 +2264,17 @@ void AffineIfOp::print(OpAsmPrinter &p) {
// Print the attribute list.
p.printOptionalAttrDict((*this)->getAttrs(),
/*elidedAttrs=*/getConditionAttrName());
/*elidedAttrs=*/getConditionAttrStrName());
}
IntegerSet AffineIfOp::getIntegerSet() {
return (*this)
->getAttrOfType<IntegerSetAttr>(getConditionAttrName())
->getAttrOfType<IntegerSetAttr>(getConditionAttrStrName())
.getValue();
}
void AffineIfOp::setIntegerSet(IntegerSet newSet) {
(*this)->setAttr(getConditionAttrName(), IntegerSetAttr::get(newSet));
(*this)->setAttr(getConditionAttrStrName(), IntegerSetAttr::get(newSet));
}
void AffineIfOp::setConditional(IntegerSet set, ValueRange operands) {
@@ -2283,7 +2288,7 @@ void AffineIfOp::build(OpBuilder &builder, OperationState &result,
assert(resultTypes.empty() || withElseRegion);
result.addTypes(resultTypes);
result.addOperands(args);
result.addAttribute(getConditionAttrName(), IntegerSetAttr::get(set));
result.addAttribute(getConditionAttrStrName(), IntegerSetAttr::get(set));
Region *thenRegion = result.addRegion();
thenRegion->push_back(new Block());
@@ -2337,7 +2342,7 @@ void AffineLoadOp::build(OpBuilder &builder, OperationState &result,
assert(operands.size() == 1 + map.getNumInputs() && "inconsistent operands");
result.addOperands(operands);
if (map)
result.addAttribute(getMapAttrName(), AffineMapAttr::get(map));
result.addAttribute(getMapAttrStrName(), AffineMapAttr::get(map));
auto memrefType = operands[0].getType().cast<MemRefType>();
result.types.push_back(memrefType.getElementType());
}
@@ -2348,7 +2353,7 @@ void AffineLoadOp::build(OpBuilder &builder, OperationState &result,
result.addOperands(memref);
result.addOperands(mapOperands);
auto memrefType = memref.getType().cast<MemRefType>();
result.addAttribute(getMapAttrName(), AffineMapAttr::get(map));
result.addAttribute(getMapAttrStrName(), AffineMapAttr::get(map));
result.types.push_back(memrefType.getElementType());
}
@@ -2374,7 +2379,7 @@ ParseResult AffineLoadOp::parse(OpAsmParser &parser, OperationState &result) {
return failure(
parser.parseOperand(memrefInfo) ||
parser.parseAffineMapOfSSAIds(mapOperands, mapAttr,
AffineLoadOp::getMapAttrName(),
AffineLoadOp::getMapAttrStrName(),
result.attributes) ||
parser.parseOptionalAttrDict(result.attributes) ||
parser.parseColonType(type) ||
@@ -2386,11 +2391,11 @@ ParseResult AffineLoadOp::parse(OpAsmParser &parser, OperationState &result) {
void AffineLoadOp::print(OpAsmPrinter &p) {
p << " " << getMemRef() << '[';
if (AffineMapAttr mapAttr =
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrName()))
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()))
p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
p << ']';
p.printOptionalAttrDict((*this)->getAttrs(),
/*elidedAttrs=*/{getMapAttrName()});
/*elidedAttrs=*/{getMapAttrStrName()});
p << " : " << getMemRefType();
}
@@ -2430,7 +2435,7 @@ LogicalResult AffineLoadOp::verify() {
if (failed(verifyMemoryOpIndexing(
getOperation(),
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrName()),
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()),
getMapOperands(), memrefType,
/*numIndexOperands=*/getNumOperands() - 1)))
return failure();
@@ -2489,7 +2494,7 @@ void AffineStoreOp::build(OpBuilder &builder, OperationState &result,
result.addOperands(valueToStore);
result.addOperands(memref);
result.addOperands(mapOperands);
result.addAttribute(getMapAttrName(), AffineMapAttr::get(map));
result.addAttribute(getMapAttrStrName(), AffineMapAttr::get(map));
}
// Use identity map.
@@ -2515,9 +2520,9 @@ ParseResult AffineStoreOp::parse(OpAsmParser &parser, OperationState &result) {
SmallVector<OpAsmParser::UnresolvedOperand, 1> mapOperands;
return failure(parser.parseOperand(storeValueInfo) || parser.parseComma() ||
parser.parseOperand(memrefInfo) ||
parser.parseAffineMapOfSSAIds(mapOperands, mapAttr,
AffineStoreOp::getMapAttrName(),
result.attributes) ||
parser.parseAffineMapOfSSAIds(
mapOperands, mapAttr, AffineStoreOp::getMapAttrStrName(),
result.attributes) ||
parser.parseOptionalAttrDict(result.attributes) ||
parser.parseColonType(type) ||
parser.resolveOperand(storeValueInfo, type.getElementType(),
@@ -2530,11 +2535,11 @@ void AffineStoreOp::print(OpAsmPrinter &p) {
p << " " << getValueToStore();
p << ", " << getMemRef() << '[';
if (AffineMapAttr mapAttr =
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrName()))
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()))
p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
p << ']';
p.printOptionalAttrDict((*this)->getAttrs(),
/*elidedAttrs=*/{getMapAttrName()});
/*elidedAttrs=*/{getMapAttrStrName()});
p << " : " << getMemRefType();
}
@@ -2547,7 +2552,7 @@ LogicalResult AffineStoreOp::verify() {
if (failed(verifyMemoryOpIndexing(
getOperation(),
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrName()),
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()),
getMapOperands(), memrefType,
/*numIndexOperands=*/getNumOperands() - 2)))
return failure();
@@ -2579,7 +2584,7 @@ template <typename T> static LogicalResult verifyAffineMinMaxOp(T op) {
}
template <typename T> static void printAffineMinMaxOp(OpAsmPrinter &p, T op) {
p << ' ' << op->getAttr(T::getMapAttrName());
p << ' ' << op->getAttr(T::getMapAttrStrName());
auto operands = op.getOperands();
unsigned numDims = op.map().getNumDims();
p << '(' << operands.take_front(numDims) << ')';
@@ -2587,7 +2592,7 @@ template <typename T> static void printAffineMinMaxOp(OpAsmPrinter &p, T op) {
if (operands.size() != numDims)
p << '[' << operands.drop_front(numDims) << ']';
p.printOptionalAttrDict(op->getAttrs(),
/*elidedAttrs=*/{T::getMapAttrName()});
/*elidedAttrs=*/{T::getMapAttrStrName()});
}
template <typename T>
@@ -2599,7 +2604,8 @@ static ParseResult parseAffineMinMaxOp(OpAsmParser &parser,
SmallVector<OpAsmParser::UnresolvedOperand, 8> symInfos;
AffineMapAttr mapAttr;
return failure(
parser.parseAttribute(mapAttr, T::getMapAttrName(), result.attributes) ||
parser.parseAttribute(mapAttr, T::getMapAttrStrName(),
result.attributes) ||
parser.parseOperandList(dimInfos, OpAsmParser::Delimiter::Paren) ||
parser.parseOperandList(symInfos,
OpAsmParser::Delimiter::OptionalSquare) ||
@@ -2930,13 +2936,13 @@ ParseResult AffinePrefetchOp::parse(OpAsmParser &parser,
SmallVector<OpAsmParser::UnresolvedOperand, 1> mapOperands;
if (parser.parseOperand(memrefInfo) ||
parser.parseAffineMapOfSSAIds(mapOperands, mapAttr,
AffinePrefetchOp::getMapAttrName(),
AffinePrefetchOp::getMapAttrStrName(),
result.attributes) ||
parser.parseComma() || parser.parseKeyword(&readOrWrite) ||
parser.parseComma() || parser.parseKeyword("locality") ||
parser.parseLess() ||
parser.parseAttribute(hintInfo, i32Type,
AffinePrefetchOp::getLocalityHintAttrName(),
AffinePrefetchOp::getLocalityHintAttrStrName(),
result.attributes) ||
parser.parseGreater() || parser.parseComma() ||
parser.parseKeyword(&cacheType) ||
@@ -2950,7 +2956,7 @@ ParseResult AffinePrefetchOp::parse(OpAsmParser &parser,
return parser.emitError(parser.getNameLoc(),
"rw specifier has to be 'read' or 'write'");
result.addAttribute(
AffinePrefetchOp::getIsWriteAttrName(),
AffinePrefetchOp::getIsWriteAttrStrName(),
parser.getBuilder().getBoolAttr(readOrWrite.equals("write")));
if (!cacheType.equals("data") && !cacheType.equals("instr"))
@@ -2958,7 +2964,7 @@ ParseResult AffinePrefetchOp::parse(OpAsmParser &parser,
"cache type has to be 'data' or 'instr'");
result.addAttribute(
AffinePrefetchOp::getIsDataCacheAttrName(),
AffinePrefetchOp::getIsDataCacheAttrStrName(),
parser.getBuilder().getBoolAttr(cacheType.equals("data")));
return success();
@@ -2967,7 +2973,7 @@ ParseResult AffinePrefetchOp::parse(OpAsmParser &parser,
void AffinePrefetchOp::print(OpAsmPrinter &p) {
p << " " << memref() << '[';
AffineMapAttr mapAttr =
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrName());
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName());
if (mapAttr)
p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
p << ']' << ", " << (isWrite() ? "write" : "read") << ", "
@@ -2975,13 +2981,13 @@ void AffinePrefetchOp::print(OpAsmPrinter &p) {
<< (isDataCache() ? "data" : "instr");
p.printOptionalAttrDict(
(*this)->getAttrs(),
/*elidedAttrs=*/{getMapAttrName(), getLocalityHintAttrName(),
getIsDataCacheAttrName(), getIsWriteAttrName()});
/*elidedAttrs=*/{getMapAttrStrName(), getLocalityHintAttrStrName(),
getIsDataCacheAttrStrName(), getIsWriteAttrStrName()});
p << " : " << getMemRefType();
}
LogicalResult AffinePrefetchOp::verify() {
auto mapAttr = (*this)->getAttrOfType<AffineMapAttr>(getMapAttrName());
auto mapAttr = (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName());
if (mapAttr) {
AffineMap map = mapAttr.getValue();
if (map.getNumResults() != getMemRefType().getRank())
@@ -3065,7 +3071,7 @@ void AffineParallelOp::build(OpBuilder &builder, OperationState &result,
for (arith::AtomicRMWKind reduction : reductions)
reductionAttrs.push_back(
builder.getI64IntegerAttr(static_cast<int64_t>(reduction)));
result.addAttribute(getReductionsAttrName(),
result.addAttribute(getReductionsAttrStrName(),
builder.getArrayAttr(reductionAttrs));
// Concatenates maps defined in the same input space (same dimensions and
@@ -3089,13 +3095,15 @@ void AffineParallelOp::build(OpBuilder &builder, OperationState &result,
SmallVector<int32_t> lbGroups, ubGroups;
AffineMap lbMap = concatMapsSameInput(lbMaps, lbGroups);
AffineMap ubMap = concatMapsSameInput(ubMaps, ubGroups);
result.addAttribute(getLowerBoundsMapAttrName(), AffineMapAttr::get(lbMap));
result.addAttribute(getLowerBoundsGroupsAttrName(),
result.addAttribute(getLowerBoundsMapAttrStrName(),
AffineMapAttr::get(lbMap));
result.addAttribute(getLowerBoundsGroupsAttrStrName(),
builder.getI32TensorAttr(lbGroups));
result.addAttribute(getUpperBoundsMapAttrName(), AffineMapAttr::get(ubMap));
result.addAttribute(getUpperBoundsGroupsAttrName(),
result.addAttribute(getUpperBoundsMapAttrStrName(),
AffineMapAttr::get(ubMap));
result.addAttribute(getUpperBoundsGroupsAttrStrName(),
builder.getI32TensorAttr(ubGroups));
result.addAttribute(getStepsAttrName(), builder.getI64ArrayAttr(steps));
result.addAttribute(getStepsAttrStrName(), builder.getI64ArrayAttr(steps));
result.addOperands(lbArgs);
result.addOperands(ubArgs);
@@ -3212,14 +3220,6 @@ void AffineParallelOp::setUpperBoundsMap(AffineMap map) {
upperBoundsMapAttr(AffineMapAttr::get(map));
}
SmallVector<int64_t, 8> AffineParallelOp::getSteps() {
SmallVector<int64_t, 8> result;
for (Attribute attr : steps()) {
result.push_back(attr.cast<IntegerAttr>().getInt());
}
return result;
}
void AffineParallelOp::setSteps(ArrayRef<int64_t> newSteps) {
stepsAttr(getBodyBuilder().getI64ArrayAttr(newSteps));
}
@@ -3370,12 +3370,12 @@ void AffineParallelOp::print(OpAsmPrinter &p) {
/*printBlockTerminators=*/getNumResults());
p.printOptionalAttrDict(
(*this)->getAttrs(),
/*elidedAttrs=*/{AffineParallelOp::getReductionsAttrName(),
AffineParallelOp::getLowerBoundsMapAttrName(),
AffineParallelOp::getLowerBoundsGroupsAttrName(),
AffineParallelOp::getUpperBoundsMapAttrName(),
AffineParallelOp::getUpperBoundsGroupsAttrName(),
AffineParallelOp::getStepsAttrName()});
/*elidedAttrs=*/{AffineParallelOp::getReductionsAttrStrName(),
AffineParallelOp::getLowerBoundsMapAttrStrName(),
AffineParallelOp::getLowerBoundsGroupsAttrStrName(),
AffineParallelOp::getUpperBoundsMapAttrStrName(),
AffineParallelOp::getUpperBoundsGroupsAttrStrName(),
AffineParallelOp::getStepsAttrStrName()});
}
/// Given a list of lists of parsed operands, populates `uniqueOperands` with
@@ -3432,14 +3432,15 @@ enum class MinMaxKind { Min, Max };
static ParseResult parseAffineMapWithMinMax(OpAsmParser &parser,
OperationState &result,
MinMaxKind kind) {
constexpr llvm::StringLiteral tmpAttrName = "__pseudo_bound_map";
constexpr llvm::StringLiteral tmpAttrStrName = "__pseudo_bound_map";
StringRef mapName = kind == MinMaxKind::Min
? AffineParallelOp::getUpperBoundsMapAttrName()
: AffineParallelOp::getLowerBoundsMapAttrName();
StringRef groupsName = kind == MinMaxKind::Min
? AffineParallelOp::getUpperBoundsGroupsAttrName()
: AffineParallelOp::getLowerBoundsGroupsAttrName();
? AffineParallelOp::getUpperBoundsMapAttrStrName()
: AffineParallelOp::getLowerBoundsMapAttrStrName();
StringRef groupsName =
kind == MinMaxKind::Min
? AffineParallelOp::getUpperBoundsGroupsAttrStrName()
: AffineParallelOp::getLowerBoundsGroupsAttrStrName();
if (failed(parser.parseLParen()))
return failure();
@@ -3461,11 +3462,11 @@ static ParseResult parseAffineMapWithMinMax(OpAsmParser &parser,
kind == MinMaxKind::Min ? "min" : "max"))) {
mapOperands.clear();
AffineMapAttr map;
if (failed(parser.parseAffineMapOfSSAIds(mapOperands, map, tmpAttrName,
if (failed(parser.parseAffineMapOfSSAIds(mapOperands, map, tmpAttrStrName,
result.attributes,
OpAsmParser::Delimiter::Paren)))
return failure();
result.attributes.erase(tmpAttrName);
result.attributes.erase(tmpAttrStrName);
llvm::append_range(flatExprs, map.getValue().getResults());
auto operandsRef = llvm::makeArrayRef(mapOperands);
auto dimsRef = operandsRef.take_front(map.getValue().getNumDims());
@@ -3546,11 +3547,11 @@ ParseResult AffineParallelOp::parse(OpAsmParser &parser,
SmallVector<OpAsmParser::UnresolvedOperand, 4> stepsMapOperands;
if (failed(parser.parseOptionalKeyword("step"))) {
SmallVector<int64_t, 4> steps(ivs.size(), 1);
result.addAttribute(AffineParallelOp::getStepsAttrName(),
result.addAttribute(AffineParallelOp::getStepsAttrStrName(),
builder.getI64ArrayAttr(steps));
} else {
if (parser.parseAffineMapOfSSAIds(stepsMapOperands, stepsMapAttr,
AffineParallelOp::getStepsAttrName(),
AffineParallelOp::getStepsAttrStrName(),
stepsAttrs,
OpAsmParser::Delimiter::Paren))
return failure();
@@ -3565,7 +3566,7 @@ ParseResult AffineParallelOp::parse(OpAsmParser &parser,
"steps must be constant integers");
steps.push_back(constExpr.getValue());
}
result.addAttribute(AffineParallelOp::getStepsAttrName(),
result.addAttribute(AffineParallelOp::getStepsAttrStrName(),
builder.getI64ArrayAttr(steps));
}
@@ -3597,7 +3598,7 @@ ParseResult AffineParallelOp::parse(OpAsmParser &parser,
if (parser.parseCommaSeparatedList(parseAttributes) || parser.parseRParen())
return failure();
}
result.addAttribute(AffineParallelOp::getReductionsAttrName(),
result.addAttribute(AffineParallelOp::getReductionsAttrStrName(),
builder.getArrayAttr(reductions));
// Parse return types of reductions (if any)
@@ -3649,7 +3650,7 @@ void AffineVectorLoadOp::build(OpBuilder &builder, OperationState &result,
assert(operands.size() == 1 + map.getNumInputs() && "inconsistent operands");
result.addOperands(operands);
if (map)
result.addAttribute(getMapAttrName(), AffineMapAttr::get(map));
result.addAttribute(getMapAttrStrName(), AffineMapAttr::get(map));
result.types.push_back(resultType);
}
@@ -3659,7 +3660,7 @@ void AffineVectorLoadOp::build(OpBuilder &builder, OperationState &result,
assert(map.getNumInputs() == mapOperands.size() && "inconsistent index info");
result.addOperands(memref);
result.addOperands(mapOperands);
result.addAttribute(getMapAttrName(), AffineMapAttr::get(map));
result.addAttribute(getMapAttrStrName(), AffineMapAttr::get(map));
result.types.push_back(resultType);
}
@@ -3693,7 +3694,7 @@ ParseResult AffineVectorLoadOp::parse(OpAsmParser &parser,
return failure(
parser.parseOperand(memrefInfo) ||
parser.parseAffineMapOfSSAIds(mapOperands, mapAttr,
AffineVectorLoadOp::getMapAttrName(),
AffineVectorLoadOp::getMapAttrStrName(),
result.attributes) ||
parser.parseOptionalAttrDict(result.attributes) ||
parser.parseColonType(memrefType) || parser.parseComma() ||
@@ -3706,11 +3707,11 @@ ParseResult AffineVectorLoadOp::parse(OpAsmParser &parser,
void AffineVectorLoadOp::print(OpAsmPrinter &p) {
p << " " << getMemRef() << '[';
if (AffineMapAttr mapAttr =
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrName()))
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()))
p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
p << ']';
p.printOptionalAttrDict((*this)->getAttrs(),
/*elidedAttrs=*/{getMapAttrName()});
/*elidedAttrs=*/{getMapAttrStrName()});
p << " : " << getMemRefType() << ", " << getType();
}
@@ -3728,7 +3729,7 @@ LogicalResult AffineVectorLoadOp::verify() {
MemRefType memrefType = getMemRefType();
if (failed(verifyMemoryOpIndexing(
getOperation(),
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrName()),
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()),
getMapOperands(), memrefType,
/*numIndexOperands=*/getNumOperands() - 1)))
return failure();
@@ -3750,7 +3751,7 @@ void AffineVectorStoreOp::build(OpBuilder &builder, OperationState &result,
result.addOperands(valueToStore);
result.addOperands(memref);
result.addOperands(mapOperands);
result.addAttribute(getMapAttrName(), AffineMapAttr::get(map));
result.addAttribute(getMapAttrStrName(), AffineMapAttr::get(map));
}
// Use identity map.
@@ -3784,7 +3785,7 @@ ParseResult AffineVectorStoreOp::parse(OpAsmParser &parser,
parser.parseOperand(storeValueInfo) || parser.parseComma() ||
parser.parseOperand(memrefInfo) ||
parser.parseAffineMapOfSSAIds(mapOperands, mapAttr,
AffineVectorStoreOp::getMapAttrName(),
AffineVectorStoreOp::getMapAttrStrName(),
result.attributes) ||
parser.parseOptionalAttrDict(result.attributes) ||
parser.parseColonType(memrefType) || parser.parseComma() ||
@@ -3798,18 +3799,18 @@ void AffineVectorStoreOp::print(OpAsmPrinter &p) {
p << " " << getValueToStore();
p << ", " << getMemRef() << '[';
if (AffineMapAttr mapAttr =
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrName()))
(*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()))
p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
p << ']';
p.printOptionalAttrDict((*this)->getAttrs(),
/*elidedAttrs=*/{getMapAttrName()});
/*elidedAttrs=*/{getMapAttrStrName()});
p << " : " << getMemRefType() << ", " << getValueToStore().getType();
}
LogicalResult AffineVectorStoreOp::verify() {
MemRefType memrefType = getMemRefType();
if (failed(verifyMemoryOpIndexing(
*this, (*this)->getAttrOfType<AffineMapAttr>(getMapAttrName()),
*this, (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()),
getMapOperands(), memrefType,
/*numIndexOperands=*/getNumOperands() - 2)))
return failure();

4
mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
View File

@@ -687,7 +687,7 @@ struct ExtractFromTensorGenerate : public OpRewritePattern<tensor::ExtractOp> {
return failure();
BlockAndValueMapping mapping;
Block *body = tensorFromElements.getBody();
Block *body = &tensorFromElements.getBody().front();
mapping.map(body->getArguments(), extract.indices());
for (auto &op : body->without_terminator())
rewriter.clone(op, mapping);
@@ -840,7 +840,7 @@ void CollapseShapeOp::build(OpBuilder &b, OperationState &result, Value src,
getSymbolLessAffineMaps(
convertReassociationIndicesToExprs(b.getContext(), reassociation)));
build(b, result, resultType, src, attrs);
result.addAttribute(getReassociationAttrName(),
result.addAttribute(getReassociationAttrStrName(),
getReassociationIndicesAttribute(b, reassociation));
}

2
mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
View File

@@ -448,7 +448,7 @@ struct GenerateOpInterface
auto parallel =
rewriter.create<scf::ParallelOp>(loc, lowerBounds, upperBounds, steps);
Block *parallelBody = parallel.getBody();
rewriter.mergeBlockBefore(generateOp.getBody(),
rewriter.mergeBlockBefore(&generateOp.getBody().front(),
parallelBody->getTerminator(),
parallelBody->getArguments());
// Replace the inlined yield op with a store op. The scf.parallel's builder