[lldb] Fix Python test formatting (NFC)

All Python files in the LLVM repository were reformatted with Black [1].
Files inside the LLDB subproject were reformatted in 2238dcc393. This
patch updates a handful of tests that were added or modified since then
and weren't formatted with Black.

[1] https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style/68257

lldb/test/API/commands/platform/process/launch/TestPlatformProcessLaunch.py

@@ -22,10 +22,17 @@ class ProcessLaunchTestCase(TestBase):
         self.runCmd("continue")
 
         with open(outfile) as f:
-           self.assertEqual(dedent("""\
+            self.assertEqual(
+                dedent(
+                    """\
                 Got 1 argument(s).
                 [0]: {}
-                """.format(exe)), f.read())
+                """.format(
+                        exe
+                    )
+                ),
+                f.read(),
+            )
 
     def test_process_launch_command_args(self):
         exe, outfile = self.setup()
@@ -35,13 +42,20 @@ class ProcessLaunchTestCase(TestBase):
         self.runCmd("continue")
 
         with open(outfile) as f:
-           self.assertEqual(dedent("""\
+            self.assertEqual(
+                dedent(
+                    """\
                 Got 4 argument(s).
                 [0]: {}
                 [1]: A
                 [2]: B
                 [3]: C
-                """.format(exe)), f.read())
+                """.format(
+                        exe
+                    )
+                ),
+                f.read(),
+            )
 
     def test_process_launch_target_args(self):
         exe, outfile = self.setup()
@@ -51,9 +65,16 @@ class ProcessLaunchTestCase(TestBase):
         self.runCmd("continue")
 
         with open(outfile) as f:
-           self.assertEqual(dedent("""\
+            self.assertEqual(
+                dedent(
+                    """\
                 Got 3 argument(s).
                 [0]: {}
                 [1]: D
                 [2]: E
-                """.format(exe)), f.read())
+                """.format(
+                        exe
+                    )
+                ),
+                f.read(),
+            )

lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/TestSVEThreadedDynamic.py

@@ -14,10 +14,12 @@ from lldbsuite.test.decorators import *
 from lldbsuite.test.lldbtest import *
 from lldbsuite.test import lldbutil
 
+
 class Mode(Enum):
     SVE = 0
     SSVE = 1
 
+
 class RegisterCommandsTestCase(TestBase):
     def get_supported_vg(self):
         # Changing VL trashes the register state, so we need to run the program
@@ -147,7 +149,7 @@ class RegisterCommandsTestCase(TestBase):
         self.runCmd("process continue", RUN_SUCCEEDED)
 
         # If we start the checks too quickly, thread 3 may not have started.
-        while (process.GetNumThreads() < 3):
+        while process.GetNumThreads() < 3:
             pass
 
         for idx in range(1, process.GetNumThreads()):

lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py

@@ -8,10 +8,12 @@ from lldbsuite.test.decorators import *
 from lldbsuite.test.lldbtest import *
 from lldbsuite.test import lldbutil
 
+
 class Mode(Enum):
     SVE = 0
     SSVE = 1
 
+
 class RegisterCommandsTestCase(TestBase):
     def check_sve_register_size(self, set, name, expected):
         reg_value = set.GetChildMemberWithName(name)
@@ -104,7 +106,9 @@ class RegisterCommandsTestCase(TestBase):
         currentFrame = thread.GetFrameAtIndex(0)
 
         registerSets = process.GetThreadAtIndex(0).GetFrameAtIndex(0).GetRegisters()
-        sve_registers = registerSets.GetFirstValueByName("Scalable Vector Extension Registers")
+        sve_registers = registerSets.GetFirstValueByName(
+            "Scalable Vector Extension Registers"
+        )
         self.assertTrue(sve_registers)
 
         vg_reg_value = sve_registers.GetChildMemberWithName("vg").GetValueAsUnsigned()
@@ -157,7 +161,9 @@ class RegisterCommandsTestCase(TestBase):
         process = target.GetProcess()
 
         registerSets = process.GetThreadAtIndex(0).GetFrameAtIndex(0).GetRegisters()
-        sve_registers = registerSets.GetFirstValueByName("Scalable Vector Extension Registers")
+        sve_registers = registerSets.GetFirstValueByName(
+            "Scalable Vector Extension Registers"
+        )
         self.assertTrue(sve_registers)
 
         vg_reg_value = sve_registers.GetChildMemberWithName("vg").GetValueAsUnsigned()
@@ -168,9 +174,13 @@ class RegisterCommandsTestCase(TestBase):
         self.expect("expression expr_eval_func", substrs=["= 0x"])
 
         # Evaluate expression call function expr_eval_func.
-        self.expect_expr("expr_eval_func({})".format(
-            "true" if (eval_mode == Mode.SSVE) else "false"), result_type="int",
-            result_value="1")
+        self.expect_expr(
+            "expr_eval_func({})".format(
+                "true" if (eval_mode == Mode.SSVE) else "false"
+            ),
+            result_type="int",
+            result_value="1",
+        )
 
         # We called a jitted function above which must not have changed SVE
         # vector length or register values.
@@ -206,4 +216,4 @@ class RegisterCommandsTestCase(TestBase):
     @skipIf(archs=no_match(["aarch64"]))
     @skipIf(oslist=no_match(["linux"]))
     def test_registers_expr_read_write_ssve_sve(self):
-        self.sve_registers_read_write_impl(Mode.SSVE, Mode.SVE)
+        self.sve_registers_read_write_impl(Mode.SSVE, Mode.SVE)

lldb/test/API/commands/register/register/aarch64_sve_simd_registers/TestSVESIMDRegisters.py

@@ -19,11 +19,13 @@ from lldbsuite.test.decorators import *
 from lldbsuite.test.lldbtest import *
 from lldbsuite.test import lldbutil
 
+
 class Mode(Enum):
     SIMD = 0
     SVE = 1
     SSVE = 2
 
+
 class SVESIMDRegistersTestCase(TestBase):
     def get_build_flags(self, mode):
         cflags = "-march=armv8-a+sve"
@@ -69,19 +71,22 @@ class SVESIMDRegistersTestCase(TestBase):
         # These are 128 bit registers, so getting them from the API as unsigned
         # values doesn't work. Check the command output instead.
         for i in range(32):
-            self.expect("register read v{}".format(i),
-                substrs=[self.make_simd_value(i)])
+            self.expect(
+                "register read v{}".format(i), substrs=[self.make_simd_value(i)]
+            )
 
         # Write a new set of values. The kernel will move the program back to
         # non-streaming mode here.
         for i in range(32):
-            self.runCmd("register write v{} \"{}\"".format(
-                i, self.make_simd_value(i+1)))
+            self.runCmd(
+                'register write v{} "{}"'.format(i, self.make_simd_value(i + 1))
+            )
 
         # Should be visible within lldb.
         for i in range(32):
-            self.expect("register read v{}".format(i),
-                substrs=[self.make_simd_value(i+1)])
+            self.expect(
+                "register read v{}".format(i), substrs=[self.make_simd_value(i + 1)]
+            )
 
         # The program should agree with lldb.
         self.expect("continue", substrs=["exited with status = 0"])

lldb/test/API/commands/register/register/register_command/TestRegisters.py

@@ -572,16 +572,22 @@ class RegisterCommandsTestCase(TestBase):
         self.build()
         self.common_setup()
 
-        self.expect("register info blub", error=True,
-                    substrs=["error: No register found with name 'blub'."])
+        self.expect(
+            "register info blub",
+            error=True,
+            substrs=["error: No register found with name 'blub'."],
+        )
 
     def test_info_many_registers(self):
         self.build()
         self.common_setup()
 
         # Only 1 register allowed at this time.
-        self.expect("register info abc def", error=True,
-                    substrs=["error: register info takes exactly 1 argument"])
+        self.expect(
+            "register info abc def",
+            error=True,
+            substrs=["error: register info takes exactly 1 argument"],
+        )
 
     @skipIf(archs=no_match(["aarch64"]))
     def test_info_register(self):
@@ -593,12 +599,17 @@ class RegisterCommandsTestCase(TestBase):
         self.common_setup()
 
         # Standard register. Doesn't invalidate anything, doesn't have an alias.
-        self.expect("register info x1", substrs=[
-                   "Name: x1",
-                   "Size: 8 bytes (64 bits)",
-                   "In sets: General Purpose Registers"])
-        self.expect("register info x1", substrs=["Invalidates:", "Name: x1 ("],
-                    matching=False)
+        self.expect(
+            "register info x1",
+            substrs=[
+                "Name: x1",
+                "Size: 8 bytes (64 bits)",
+                "In sets: General Purpose Registers",
+            ],
+        )
+        self.expect(
+            "register info x1", substrs=["Invalidates:", "Name: x1 ("], matching=False
+        )
 
         # These registers invalidate others as they are subsets of those registers.
         self.expect("register info w1", substrs=["Invalidates: x1"])
@@ -631,9 +642,7 @@ class RegisterCommandsTestCase(TestBase):
         self.assertTrue(reg_fs_base.IsValid(), "fs_base is not available")
         reg_gs_base = current_frame.FindRegister("gs_base")
         self.assertTrue(reg_gs_base.IsValid(), "gs_base is not available")
-        self.assertEqual(
-            reg_gs_base.GetValueAsSigned(-1), 0, f"gs_base should be zero"
-        )
+        self.assertEqual(reg_gs_base.GetValueAsSigned(-1), 0, f"gs_base should be zero")
 
         # Evaluate pthread_self() and compare against fs_base register read.
         pthread_self_code = "(uint64_t)pthread_self()"

lldb/test/API/commands/settings/TestSettings.py

@@ -971,11 +971,9 @@ class SettingsCommandTestCase(TestBase):
 
         # Test OptionValueLanguage
         self.verify_setting_value_json("repl-lang", "c++")
-        
+
     def test_global_option(self):
         # This command used to crash the settings because -g was signaled by a
         # NULL execution context (not one with an empty Target...) and in the
         # special handling for load-script-from-symbol-file this wasn't checked.
         self.runCmd("settings set -g target.load-script-from-symbol-file true")
-
-          

lldb/test/API/functionalities/archives/TestBSDArchives.py

@@ -167,7 +167,7 @@ class BSDArchivesTestCase(TestBase):
             ") of the .o file doesn't match",
         ]
         self.check_frame_variable_errors(thread, error_strings)
-        
+
         # Break at b() should succeed
         (target, process, thread, bkpt) = lldbutil.run_to_name_breakpoint(
             self, "b", bkpt_module=exe
@@ -181,7 +181,6 @@ class BSDArchivesTestCase(TestBase):
             "frame variable", VARIABLES_DISPLAYED_CORRECTLY, substrs=["(int) arg = 2"]
         )
 
-
     @skipIfRemote
     @skipUnlessDarwin
     def test_frame_var_errors_when_mtime_mistmatch_for_object_in_archive(self):

lldb/test/API/functionalities/completion/TestCompletion.py

@@ -883,7 +883,7 @@ class CommandLineCompletionTestCase(TestBase):
 
     def test_ambiguous_command(self):
         """Test completing an ambiguous commands"""
-        self.complete_from_to("settings s", ['set', 'show'])
+        self.complete_from_to("settings s", ["set", "show"])
 
     def test_ambiguous_subcommand(self):
         """Test completing a subcommand of an ambiguous command"""

lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py

@@ -620,7 +620,8 @@ class TestXMLRegisterFlags(GDBRemoteTestBase):
         # The table should split according to terminal width.
         self.runCmd("settings set term-width 17")
 
-        self.expect("register info cpsr",
+        self.expect(
+            "register info cpsr",
             substrs=[
                 "       Name: cpsr\n"
                 "       Size: 4 bytes (32 bits)\n"
@@ -632,4 +633,6 @@ class TestXMLRegisterFlags(GDBRemoteTestBase):
                 "\n"
                 "| 15-8 | 7-0 |\n"
                 "|------|-----|\n"
-                "|  C   |  D  |"])
+                "|  C   |  D  |"
+            ],
+        )

lldb/test/API/functionalities/postmortem/elf-core/thread_crash/TestLinuxCoreThreads.py

@@ -41,7 +41,7 @@ class LinuxCoreThreadsTestCase(TestBase):
 
         # The fs_base/gs_base registers in linux-x86_64.core are parsed by
         # using "eu-readelf -n linux-x86_64.core" to verify.
-        fs_base_values = [0x00007fc295017700, 0x00007fc294fff740, 0x00007fc29501f700]
+        fs_base_values = [0x00007FC295017700, 0x00007FC294FFF740, 0x00007FC29501F700]
         gs_base_values = [0, 0, 0]
 
         for i in range(process.GetNumThreads()):
@@ -57,15 +57,18 @@ class LinuxCoreThreadsTestCase(TestBase):
             self.assertTrue(reg_gs_base.IsValid(), "gs_base is not available")
 
             self.assertEqual(
-                reg_fs_base.GetValueAsSigned(-1), fs_base_values[i], f"fs_base read is different from expected"
+                reg_fs_base.GetValueAsSigned(-1),
+                fs_base_values[i],
+                f"fs_base read is different from expected",
             )
 
             self.assertEqual(
-                reg_gs_base.GetValueAsSigned(-1), gs_base_values[i], f"gs_base read is different from expected"
+                reg_gs_base.GetValueAsSigned(-1),
+                gs_base_values[i],
+                f"gs_base read is different from expected",
             )
         self.dbg.DeleteTarget(target)
 
-
     def do_test(self, filename, pid, tid):
         target = self.dbg.CreateTarget("")
         process = target.LoadCore(filename + ".core")

lldb/test/API/functionalities/unwind/aarch64_unwind_pac/TestAArch64UnwindPAC.py

@@ -52,7 +52,7 @@ class AArch64UnwindPAC(TestBase):
         self.assertTrue(thread.GetNumFrames() >= (len(backtrace) + len(libc_backtrace)))
 
         # Strictly check frames that are in the test program's source.
-        for frame_idx, frame in enumerate(thread.frames[:len(backtrace)]):
+        for frame_idx, frame in enumerate(thread.frames[: len(backtrace)]):
             self.assertTrue(frame)
             self.assertEqual(frame.GetFunctionName(), backtrace[frame_idx])
             self.assertEqual(

lldb/test/API/lang/cpp/namespace/TestNamespaceLookup.py

@@ -166,8 +166,7 @@ class NamespaceLookupTestCase(TestBase):
         self.runToBkpt("continue")
         # FIXME: In DWARF 5 with dsyms, the ordering of functions is slightly
         # different, which also hits the same issues mentioned previously.
-        if (configuration.dwarf_version <= 4 or
-            self.getDebugInfo() == 'dwarf'):
+        if configuration.dwarf_version <= 4 or self.getDebugInfo() == "dwarf":
             self.expect_expr("func()", result_type="int", result_value="2")
 
         # Continue to BP_ns_scope at ns scope

lldb/test/API/lang/objc/objc-po-hint/TestObjcPoHint.py

@@ -26,9 +26,7 @@ class TestObjcPoHint(TestBase):
         # Make sure it's not printed again.
         self.expect(
             "dwim-print -O -- foo",
-            substrs=[
-                "note: object description"
-            ],
+            substrs=["note: object description"],
             matching=False,
         )
 
@@ -42,8 +40,6 @@ class TestObjcPoHint(TestBase):
         # Make sure the hint is printed the first time
         self.expect(
             "dwim-print -O -- foo",
-            substrs=[
-                "note: object description"
-            ],
+            substrs=["note: object description"],
             matching=False,
         )

lldb/test/API/linux/aarch64/tls_registers/TestAArch64LinuxTLSRegisters.py

@@ -49,8 +49,9 @@ class AArch64LinuxTLSRegisters(TestBase):
 
         for register in registers:
             tls_reg = tls_regs.GetChildMemberWithName(register)
-            self.assertTrue(tls_reg.IsValid(), "{} register not found.".format(
-                register))
+            self.assertTrue(
+                tls_reg.IsValid(), "{} register not found.".format(register)
+            )
             self.assertEqual(tls_reg.GetValueAsUnsigned(), values[register])
 
     def check_tls_reg(self, registers):
@@ -77,8 +78,9 @@ class AArch64LinuxTLSRegisters(TestBase):
 
         # Set our own value(s) for the program to find.
         for register in registers:
-            self.expect("register write {} 0x{:x}".format(register,
-                            set_values[register]))
+            self.expect(
+                "register write {} 0x{:x}".format(register, set_values[register])
+            )
 
         self.expect("continue")
 
@@ -119,5 +121,4 @@ class AArch64LinuxTLSRegisters(TestBase):
         tls_regs = regs.GetFirstValueByName("Thread Local Storage Registers")
         self.assertTrue(tls_regs.IsValid(), "No TLS registers found.")
         tls_reg = tls_regs.GetChildMemberWithName("tpidr2")
-        self.assertFalse(tls_reg.IsValid(),
-            "tpdir2 should not be present without SME")
+        self.assertFalse(tls_reg.IsValid(), "tpdir2 should not be present without SME")

lldb/test/API/python_api/value/TestValueAPI.py

@@ -151,13 +151,17 @@ class ValueAPITestCase(TestBase):
         # smaller type to a larger as we often wouldn't know how to get the extra data:
         val_f = target.EvaluateExpression("f")
         bad_cast = val_s.Cast(val_f.GetType())
-        self.assertFailure(bad_cast.GetError(),
-                           "Can only cast to a type that is equal to or smaller than the orignal type.")
+        self.assertFailure(
+            bad_cast.GetError(),
+            "Can only cast to a type that is equal to or smaller than the orignal type.",
+        )
         weird_cast = val_f.Cast(val_s.GetType())
-        self.assertSuccess(weird_cast.GetError(),
-                        "Can cast from a larger to a smaller")
-        self.assertEqual(weird_cast.GetChildMemberWithName("a").GetValueAsSigned(0), 33,
-                         "Got the right value")
+        self.assertSuccess(weird_cast.GetError(), "Can cast from a larger to a smaller")
+        self.assertEqual(
+            weird_cast.GetChildMemberWithName("a").GetValueAsSigned(0),
+            33,
+            "Got the right value",
+        )
 
         # Check that lldb.value implements truth testing.
         self.assertFalse(lldb.value(frame0.FindVariable("bogus")))

lldb/test/API/source-manager/TestSourceManager.py

@@ -39,7 +39,6 @@ class SourceManagerTestCase(TestBase):
         self.line = line_number("main.c", "// Set break point at this line.")
 
     def modify_content(self):
-
         # Read the main.c file content.
         with io.open(self.file, "r", newline="\n") as f:
             original_content = f.read()
@@ -361,16 +360,12 @@ class SourceManagerTestCase(TestBase):
 
         # Create a first target.
         self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
-        lldbutil.run_break_set_by_symbol(
-            self, "main", num_expected_locations=1
-        )
+        lldbutil.run_break_set_by_symbol(self, "main", num_expected_locations=1)
         self.expect("run", RUN_SUCCEEDED, substrs=["Hello world"])
 
         # Create a second target.
         self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
-        lldbutil.run_break_set_by_symbol(
-            self, "main", num_expected_locations=1
-        )
+        lldbutil.run_break_set_by_symbol(self, "main", num_expected_locations=1)
         self.expect("run", RUN_SUCCEEDED, substrs=["Hello world"])
 
         # Modify the source file content.
@@ -381,7 +376,8 @@ class SourceManagerTestCase(TestBase):
         self.runCmd("source cache clear")
 
         # Make sure we're seeing the new content from the clean process cache.
-        self.expect("next",
+        self.expect(
+            "next",
             SOURCE_DISPLAYED_CORRECTLY,
             substrs=["Hello lldb"],
         )
@@ -391,8 +387,8 @@ class SourceManagerTestCase(TestBase):
 
         # Make sure we're seeing the old content from the first target's
         # process cache.
-        self.expect("next",
+        self.expect(
+            "next",
             SOURCE_DISPLAYED_CORRECTLY,
             substrs=["Hello world"],
         )
-

lldb/test/API/tools/lldb-vscode/disassemble/TestVSCode_disassemble.py

@@ -33,7 +33,7 @@ class TestVSCode_disassemble(lldbvscode_testcase.VSCodeTestCaseBase):
         pc_assembly = self.disassemble(frameIndex=0)
         self.assertTrue("location" in pc_assembly, "Source location missing.")
         self.assertTrue("instruction" in pc_assembly, "Assembly instruction missing.")
-        
+
         # The calling frame (qsort) is coming from a system library, as a result
         # we should not have a source location.
         qsort_assembly = self.disassemble(frameIndex=1)

lldb/test/API/tools/lldb-vscode/runInTerminal/TestVSCode_runInTerminal.py

@@ -60,9 +60,7 @@ class TestVSCode_runInTerminal(lldbvscode_testcase.VSCodeTestCaseBase):
         )
 
         self.assertEqual(
-            len(self.vscode.reverse_requests), 
-            1, 
-            "make sure we got a reverse request"
+            len(self.vscode.reverse_requests), 1, "make sure we got a reverse request"
         )
 
         request = self.vscode.reverse_requests[0]