intel/llvm
1
0
Fork 0
mirror of https://github.com/intel/llvm.git synced 2026-02-08 17:28:30 +08:00
Code Issues Packages Projects Releases Wiki Activity

Add a couple of assertions to the load combine code introduced by r289538

Browse Source 
llvm-svn: 289646
This commit is contained in:
Artur Pilipenko
2016-12-14 11:55:47 +00:00
parent cfd1ce6a52
commit f3ee444010
1 changed files with 5 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@@ -4561,7 +4561,10 @@ SDValue DAGCombiner::MatchLoadCombine(SDNode *N) {
return SDValue();
// Calculate the offset of the current byte from the base address
unsigned LoadByteWidth = L->getMemoryVT().getSizeInBits() / 8;
unsigned LoadBitWidth = L->getMemoryVT().getSizeInBits();
assert(LoadBitWidth % 8 == 0 &&
"can only analyze providers for individual bytes not bit");
unsigned LoadByteWidth = LoadBitWidth / 8;
int64_t MemoryByteOffset =
DAG.getDataLayout().isBigEndian()
? BigEndianByteAt(LoadByteWidth, Bytes[i].ByteOffset)
@@ -4576,6 +4579,7 @@ SDValue DAGCombiner::MatchLoadCombine(SDNode *N) {
Loads.insert(L);
}
assert(Base && "must be set");
assert(Loads.size() > 0 && "must be at least one load");
// Check if the bytes of the OR we are looking at match with either big or
// little endian value load