Commit Graph

322651 Commits

Author SHA1 Message Date
Jonas Devlieghere
463a48e416 [TableGen] Move target properties into a separate file (NFC)
With the plugins having their own tablgen file, it makes sense to split
off the target properties as well.

llvm-svn: 367139
2019-07-26 18:14:08 +00:00
Jonas Devlieghere
7070a0b02a [TableGen] Move interpreter properties into a separate file (NFC)
With the plugins having their own tablgen file, it makes sense to split
off the interpreter properties as well.

llvm-svn: 367138
2019-07-26 18:14:04 +00:00
Diego Astiazaran
d6cdd98a25 [clang-format] Fix style of css file paths
CSS files included in HTML should have a path in posix style, it should
not be different for Windows.

Differential Revision: https://reviews.llvm.org/D65309

llvm-svn: 367137
2019-07-26 18:02:42 +00:00
Bob Haarman
51dcb292cc [lld-link] diagnose undefined symbols before LTO when possible
Summary:
This allows reporting undefined symbols before LTO codegen is
run. Since LTO codegen can take a long time, this improves user
experience by avoiding that time spend if the link is going to
fail with undefined symbols anyway.

Fixes PR32400.

Reviewers: ruiu

Reviewed By: ruiu

Subscribers: mehdi_amini, steven_wu, dexonsmith, mstorsjo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62434

llvm-svn: 367136
2019-07-26 17:56:45 +00:00
Nathan Huckleberry
2e040398f8 [Sema] Fix -Wuninitialized for struct assignment from GNU C statement expression
Summary:
Do not automatically report self references of structs in statement expression
as warnings. Instead wait for uninitialized cfg analysis.
https://bugs.llvm.org/show_bug.cgi?id=42604

Reviewers: aaron.ballman, rsmith, nickdesaulniers

Reviewed By: aaron.ballman, nickdesaulniers

Subscribers: nathanchance, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64678

llvm-svn: 367134
2019-07-26 17:29:35 +00:00
Sean Fertile
9df6177d38 [PowerPC][AIX]Add lowering of MCSymbol MachineOperand.
Adds machine operand lowering for MCSymbolSDNodes to the PowerPC
backend. This is needed to produce call instructions in assembly for AIX
because the callee operand is a MCSymbolSDNode. The test is XFAIL'ed for
asserts due to a (valid) assertion in PEI that the AIX ABI isn't supported yet.

Differential Revision: https://reviews.llvm.org/D63738

llvm-svn: 367133
2019-07-26 17:25:27 +00:00
Jim Ingham
be4a78af46 Document that LLDB_LOG macros use the format_providers.
Differential Revision: https://reviews.llvm.org/D65293

llvm-svn: 367132
2019-07-26 17:25:20 +00:00
Michael Liao
711556e6a8 [AMDGPU] Fix typo.
llvm-svn: 367131
2019-07-26 17:13:59 +00:00
Sergey Dmitriev
cdeaac5dce [llvm-objcopy] Add support for --add-section for COFF
This patch enables support for --add-section=... option for COFF objects.

Differential Revision: https://reviews.llvm.org/D65040

llvm-svn: 367130
2019-07-26 17:06:41 +00:00
Jonas Devlieghere
81dab368bf [CMake] Fix find_python_libs_windows
Exporting PYTHON_INCLUDE_DIR to the Python scope somehow got lost in my
last change. Add it back again. This should fix the Windows bot!

llvm-svn: 367127
2019-07-26 16:32:49 +00:00
Fangrui Song
d6c448244b [ELF] Simplify with dyn_cast_or_null. NFC
llvm-svn: 367126
2019-07-26 16:29:15 +00:00
Jonas Devlieghere
ac4a5c15fe [CMake] Print Python version on Windows
Trying to figure out what's causing the Windows bot to fail.

llvm-svn: 367125
2019-07-26 16:15:19 +00:00
Cullen Rhodes
2cde8b5db6 [AArch64][SVE2] Rename bitperm feature to sve2-bitperm
Summary:
The bitperm feature flag is now prefixed with SVE2, as it is for all other SVE2
extensions

Patch by Maciej Gabka.

Reviewers: sdesmalen, rovka, chill, SjoerdMeijer, rengolin

Reviewed By: SjoerdMeijer, rengolin

Differential Revision: https://reviews.llvm.org/D65327

llvm-svn: 367124
2019-07-26 15:57:50 +00:00
Michal Gorny
40a10446c0 [llvm] [lit/tests] Replace 'env -u' with more portable construct
Set environment variables to empty values rather than attempting
to unset them via 'env -u', in order to fix NetBSD test regression
caused by r366980.  POSIX does not guarantee that env(1) supports '-u'
option, and indeed NetBSD env(1) does not support it.

Differential Revision: https://reviews.llvm.org/D65335

llvm-svn: 367123
2019-07-26 15:39:05 +00:00
Michal Gorny
ffc722a358 [llvm] [FileCheck] Use FILECHECK_DUMP_INPUT_ON_FAILURE only when non-empty
Enable dumping output only if FILECHECK_DUMP_INPUT_ON_FAILURE is set to
a non-empty value.  This is necessary to support disabling it via
POSIX-compliant env(1) that does not support '-u' argument,
and therefore fix regression caused by r366980.

Differential Revision: https://reviews.llvm.org/D65334

llvm-svn: 367122
2019-07-26 15:38:57 +00:00
Sam McCall
91e8eac73a [clangd] Support extraction of binary "subexpressions" like a + [[b + c]].
Summary:
These aren't formally subexpressions in C++, in this case + is left-associative.
However informally +, *, etc are usually (mathematically) associative and users
consider these subexpressions.

We detect these and in simple cases support extracting the partial expression.
As well as builtin associative operators, we assume that overloads of them
are associative and support those too.

Reviewers: SureYeaah

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D65139

llvm-svn: 367121
2019-07-26 15:29:52 +00:00
Marshall Clow
736e8aa8ed Fix a bug in std::chrono::abs where it would fail when the duration's period had not been reduced.s
llvm-svn: 367120
2019-07-26 15:10:46 +00:00
Simi Pallipurath
92363a3ada [ARM] Set default alignment to 64bits
The maximum alignment used by ARM arch
is 64bits, not 128.

This could cause overaligned memory
access for 128 bit neon vector that
have unpredictable behaviour.

This fixes: https://bugs.llvm.org/show_bug.cgi?id=42668

Patch by: Diogo Sampaio(diogo.sampaio@arm.com)

Differential Revision: https://reviews.llvm.org/D65000

Change-Id: I5a62b766491f15dd51e4cfe6625929db897f67e3
llvm-svn: 367119
2019-07-26 15:05:19 +00:00
Nico Weber
13f337c4cb Revert r367091, it caused PR42777.
llvm-svn: 367118
2019-07-26 14:58:42 +00:00
Fangrui Song
3d51d4ed6d [ELF] Detemplate maybeReportUndefined and copySectionsIntoPartitions
llvm-svn: 367117
2019-07-26 14:57:53 +00:00
Alexey Bataev
8a8c69808c [OPENMP]Add support for analysis of reduction variables.
Summary:
Reduction variables are the variables, for which the private copies
must be created in the OpenMP regions. Then they are initialized with
the predefined values depending on the reduction operation. After exit
from the OpenMP region the original variable is updated using the
reduction value and the value of the original reduction variable.

Reviewers: NoQ

Subscribers: guansong, jdoerfert, caomhin, kkwli0, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D65106

llvm-svn: 367116
2019-07-26 14:50:05 +00:00
Jonas Devlieghere
447ef83068 [CMake] Loosen Python version check and ignore patch version
Some versions of macOS report a different patch version for the system
provided interpreter and libraries.

Differential revision: https://reviews.llvm.org/D65230

llvm-svn: 367115
2019-07-26 14:26:33 +00:00
Sam Parker
3da59e5513 [ARM][ParallelDSP] Combine structs
Combine OpChain and BinOpChain structs as OpChain is a base class to
BinOpChain that is never used.

llvm-svn: 367114
2019-07-26 14:11:40 +00:00
Shaurya Gupta
76ba1cf1f1 [Clangd] Disable ExtractVariable for all types of assignments
Reviewers: sammccall, kadircet

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D65332

llvm-svn: 367113
2019-07-26 14:08:27 +00:00
Sam McCall
7ee0867a85 [clangd] Fix background index not triggering on windows due to case mismatch.
Summary:
This isn't a general fix to all paths where we assume case-sensitivity, it's
a minimally-invasive fix targeting the llvm 9 branch.

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D65320

llvm-svn: 367112
2019-07-26 14:07:11 +00:00
Sean Fertile
9bd22fec0d [PowerPC] Add getCRSaveOffset to improve readability. [NFC]
In preperation for AIX support in FrameLowering: replace a number of literal
'8' that represent the stack offset of the condition register save area with
a member in PPCFrameLowering.

Patch by Chris Bowler.

llvm-svn: 367111
2019-07-26 14:02:17 +00:00
Raphael Isemann
623950db50 [lldb][NFC] Remove eDiagnosticOriginGo
This enum value is unused as we removed Go support.

llvm-svn: 367110
2019-07-26 14:00:13 +00:00
Nico Weber
d2a4e57891 gn build: Merge r367043
llvm-svn: 367109
2019-07-26 13:27:19 +00:00
Nico Weber
250ee88ff2 gn build: Merge r366956
llvm-svn: 367108
2019-07-26 13:24:56 +00:00
Petar Avramovic
cf21794566 [MIPS GlobalISel] Fix check for void return during lowerCall
Void return used to have unsigned with value 0 for virtual register
but with addition of Register class and changes to arguments to lowerCall
this is no longer valid.
Check for void return by inspecting the Ty field in OrigRet.

Differential Revision: https://reviews.llvm.org/D65321

llvm-svn: 367107
2019-07-26 13:19:37 +00:00
Pavel Labath
d67b550df5 DWARF: Improve type safety or range lists parsing
Delete the abstract GetOffset function, which is only defined for
rnglists entries. Instead fix up entries which refer to the range list
classes so that one can statically know that he is dealing with the
rnglists section and call the function that way.

llvm-svn: 367106
2019-07-26 13:15:28 +00:00
Carl Ritson
0b28357053 [AMDGPU] Move WQM/WWM intrinsic instruction selection to AMDGPUISelDAGToDAG
Reviewers: arsenm, nhaehnle

Reviewed By: arsenm

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65328

llvm-svn: 367105
2019-07-26 13:11:44 +00:00
Petar Avramovic
b1fc6f6130 [MIPS GlobalISel] Select inttoptr and ptrtoint
Select G_INTTOPTR and G_PTRTOINT for MIPS32.

Differential Revision: https://reviews.llvm.org/D65217

llvm-svn: 367104
2019-07-26 13:08:06 +00:00
Erich Keane
61478ec6ac Make the CXXABIs respect the target's default calling convention.
SPIR targets need to have all functions be SPIR calling convention,
however the CXXABIs were just returning CC_C in all non-'this-CC' cases.

https://reviews.llvm.org/D65294

llvm-svn: 367103
2019-07-26 12:36:12 +00:00
Raphael Isemann
0ab0bb91aa [lldb] Don't dynamically allocate the posix option validator.
We dynamically allocate the option validator which means we
can't mark this list of OptionDefinitions as constexpr. It's also
more complicated than necessary.

llvm-svn: 367102
2019-07-26 11:46:21 +00:00
Sanjay Patel
c229cfeb7a [InstCombine] remove flop from lerp patterns
(Y * (1.0 - Z)) + (X * Z) -->
Y - (Y * Z) + (X * Z) -->
Y + Z * (X - Y)

This is part of solving:
https://bugs.llvm.org/show_bug.cgi?id=42716

Factoring eliminates an instruction, so that should be a good canonicalization.
The potential conversion to FMA would be handled by the backend based on target
capabilities.

Differential Revision: https://reviews.llvm.org/D65305

llvm-svn: 367101
2019-07-26 11:19:18 +00:00
Simon Pilgrim
d93e8ece7b [X86][SSE] Replace PMULDQ GetDemandedBits combine with SimplifyMultipleUseDemandedBits handler.
This removes a GetDemandedBits user and allows us to benefit from the DemandedElts propagated through SimplifyDemandedBits.

llvm-svn: 367100
2019-07-26 11:10:20 +00:00
Sam Parker
7440065bd8 [NFC][ARM][ParallelDSP] Cleanup isNarrowSequence
Remove unused logic.

llvm-svn: 367099
2019-07-26 10:57:42 +00:00
Simon Pilgrim
a424a1f351 [SelectionDAG] GetDemandedBits - update SIGN_EXTEND_INREG op to just call SimplifyMultipleUseDemandedBits.
llvm-svn: 367098
2019-07-26 10:03:07 +00:00
Carl Ritson
00e89b428b [AMDGPU] Add llvm.amdgcn.softwqm intrinsic
Add llvm.amdgcn.softwqm intrinsic which behaves like llvm.amdgcn.wqm
only if there is other WQM computation in the shader.

Reviewers: nhaehnle, tpr

Reviewed By: nhaehnle

Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64935

llvm-svn: 367097
2019-07-26 09:54:12 +00:00
Simon Pilgrim
9758407bf1 [TargetLowering] SimplifyMultipleUseDemandedBits - add SIGN_EXTEND_INREG support.
llvm-svn: 367096
2019-07-26 09:41:08 +00:00
Pavel Labath
fcdceab7e1 Fix some "control reaches end of non-void function" warnings
llvm-svn: 367095
2019-07-26 09:38:23 +00:00
Simon Pilgrim
cb5f7de448 [ARM][ParallelDSP] Regenerate multi-use-loads.ll test checks
llvm-svn: 367094
2019-07-26 09:32:21 +00:00
Momchil Velikov
898d953693 [AArch64] Define ETE and TRBE system registers
Embedded Trace Extension and Trace Buffer Extension are optional
future architecture extensions.
(cf. https://developer.arm.com/architectures/cpu-architecture/a-profile/exploration-tools)

Their system registers are documented here:
https://developer.arm.com/docs/ddi0601/a

ETE shares register names with ETM. One exception is the ETE
TRCEXTINSELR0 register, which has the same encoding as the ETM
TRCEXTINSELR register (but different semantics). This patch treats
them as aliases: the assembler will accept both names, emitting
identical encoding, and the disassembler will keep disassembling
to TRCEXRINSELR.

Differential Revision: https://reviews.llvm.org/D63707

llvm-svn: 367093
2019-07-26 09:19:08 +00:00
Simon Pilgrim
d0164fc525 [SelectionDAG] GetDemandedBits - update OR/XOR ops to just call SimplifyMultipleUseDemandedBits.
Eventually all of these will be moved over, but we create nodes in GetDemandedBits recursion at the moment which causes regressions when we try to remove them all.

llvm-svn: 367092
2019-07-26 09:13:29 +00:00
Simon Pilgrim
b32ceb79b0 [TargetLowering] SimplifyMultipleUseDemandedBits - add BITCAST pass through support.
This allows us to peek through BITCASTs and attempt simplify the source operand, and then bitcast back.

llvm-svn: 367091
2019-07-26 08:38:39 +00:00
Fangrui Song
20db94b7b3 ObjectFileELF: Use llvm::JamCRC to refactor CRC32 computation
Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D65318

llvm-svn: 367090
2019-07-26 08:33:36 +00:00
Sam Parker
c760b5da11 [ARM][LowOverheadLoops] Add CPSR defs
Both WhileLoopStart and LoopEnd may get turned into a cmp and br pair,
so add an implicit def to these pseudo instructions in case that WLS
and LE aren't generated.

Differential Revision: https://reviews.llvm.org/D65275

llvm-svn: 367089
2019-07-26 08:15:01 +00:00
Pengfei Wang
9ad565f70e [WinEH] Allocate space in funclets stack to save XMM CSRs
Summary:
This is an alternate approach to D57970.
Currently funclets reuse the same stack slots that are used in the
parent function for saving callee-saved xmm registers. If the parent
function modifies a callee-saved xmm register before an excpetion is
thrown, the catch handler will overwrite the original saved value.

This patch allocates space in funclets stack for saving callee-saved xmm
registers and uses RSP instead RBP to access memory.

Reviewers: andrew.w.kaylor, LuoYuanke, annita.zhang, craig.topper,
RKSimon

Subscribers: rnk, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63396

Signed-off-by: pengfei <pengfei.wang@intel.com>
llvm-svn: 367088
2019-07-26 07:33:15 +00:00
Serguei Katkov
7f8c809592 [Loop Utils] Extend the scope of addStringMetadataToLoop.
To avoid duplicates in loop metadata, if the string to add is
already there, just update the value.

Reviewers: reames, Ashutosh
Reviewed By: reames
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D65265

llvm-svn: 367087
2019-07-26 07:04:34 +00:00