Commit Graph

386124 Commits

Author SHA1 Message Date
Alexander Shaposhnikov
5c835e1ae5 [lld][MachO] Add support for LC_VERSION_MIN_* load commands
This diff adds initial support for the legacy LC_VERSION_MIN_* load commands.

Test plan: make check-lld-macho

Differential revision: https://reviews.llvm.org/D100523
2021-04-21 05:41:14 -07:00
Sylvain Audi
8c16c8b7ef Reland "[clang-scan-deps] Add support for clang-cl"
This reverts commit 199c397482.
This time, clang-scan-deps's search for output argument in clang-cl command line will now ignore arguments preceded by "-Xclang".
That way, it won't detect a /o argument in "-Xclang -ivfsoverlay -Xclang /opt/subpath"

Initial patch description:
clang-scan-deps contains some command line parsing and modifications.
This patch adds support for clang-cl command options.

Differential Revision: https://reviews.llvm.org/D92191
2021-04-21 07:56:39 -04:00
David Green
c6e2aedb65 [AArch64] Add and update reverse mask tests. NFC 2021-04-21 12:11:41 +01:00
Sven van Haastregt
e2b3b89bf1 [OpenCL] Do not add builtins with unavailable types
Add functionality to assign extensions to types in OpenCLBuiltins.td
and use that information to filter candidates that should not be
exposed if a type is not available.

Differential Revision: https://reviews.llvm.org/D100209
2021-04-21 11:59:29 +01:00
Sven van Haastregt
fdcb9c2728 [OpenCL] Refactor shuffle builtin decls
The shuffle and shuffle2 builtins relied on processing two TypeLists
for different arguments in sync.  This will no longer work when a type
(e.g. double) in one of the TypeLists is optional.

Rewrite the declarations using explicit types instead of GenericTypes.
2021-04-21 11:59:24 +01:00
Martin Storsjö
174e796c7d [llvm-rc] Fix a new test to disambiguate macOS paths like /Users/... from options starting with a slash
This should fix test failures on macOS.
2021-04-21 13:34:33 +03:00
Simon Tatham
77e170db86 [ARM][Driver][Windows] Allow command-line upgrade to Armv8.
If you gave clang the options `--target=arm-pc-windows-msvc` and
`-march=armv8-a+crypto` together, the crypto extension would not be
enabled in the compilation, and you'd see the following warning
message suggesting that the 'armv8-a' had been ignored:

  clang: warning: ignoring extension 'crypto' because the 'armv7-a' architecture does not support it [-Winvalid-command-line-argument]

This happens because Triple::getARMCPUForArch(), for the Win32 OS,
unconditionally returns "cortex-a9" (an Armv7 CPU) regardless of
MArch, which overrides the architecture setting on the command line.

I don't think that the combination of Windows and AArch32 _should_
unconditionally outlaw the use of the crypto extension. MSVC itself
doesn't think so: you can perfectly well compile Thumb crypto code
using its AArch32-targeted compiler.

All the other default CPUs in the same switch statement are
conditional on a particular MArch setting; this is the only one that
returns a particular CPU _regardless_ of MArch. So I've fixed this one
by adding a condition, so that if you ask for an architecture *above*
v7, the default of Cortex-A9 no longer overrides it.

Reviewed By: mstorsjo

Differential Revision: https://reviews.llvm.org/D100937
2021-04-21 11:20:05 +01:00
Michał Górny
08ce2ba518 [lldb] [MainLoop] Support multiple callbacks per signal
Support registering multiple callbacks for a single signal.  This is
necessary to support multiple co-existing native process instances, with
separate SIGCHLD handlers.

The system signal handler is registered on first request, additional
callback are added on subsequent requests.  The system signal handler
is removed when last callback is unregistered.

Differential Revision: https://reviews.llvm.org/D100418
2021-04-21 12:18:20 +02:00
Simon Pilgrim
d860bf2d0e [DAG] TargetLowering.cpp - breakup if-else chains where each block returns. NFCI.
Match style guide that requests that if+return blocks are separate.
2021-04-21 11:17:27 +01:00
Fraser Cormack
c141bd3cf9 [DAGCombiner] Support all-ones/all-zeros SPLAT_VECTOR in more combines
This patch adds incrementally-better support for SPLAT_VECTOR in a
handful of vector combines by changing a few more
isBuildVectorAllOnes/isBuildVectorAllZeros to the equivalent
isConstantSplatVectorAllOnes/Zeros calls.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D100851
2021-04-21 11:05:37 +01:00
Fraser Cormack
3f02d26943 [RISCV] Further fixes for RVV stack offset computation
This patch fixes a case missed out by D100574, in which RVV scalable
stack offset computations may require three live registers in the case
where the offset's fixed component is 12 bits or larger and has a
scalable component.

Instead of adding an additional emergency spill slot, this patch further
optimizes the scalable stack offset computation sequences to reduce
register usage.

By emitting the sequence to compute the scalable component before the
fixed component, we can free up one scratch register to be reallocated
by the sequence for the fixed component. Doing this saves one register
and thus one additional emergency spill slot.

Compare:

    $x5 = LUI 1
    $x1 = ADDIW killed $x5, -1896
    $x1 = ADD $x2, killed $x1
    $x5 = PseudoReadVLENB
    $x6 = ADDI $x0, 50
    $x5 = MUL killed $x5, killed $x6
    $x1 = ADD killed $x1, killed $x5

versus:

    $x5 = PseudoReadVLENB
    $x1 = ADDI $x0, 50
    $x5 = MUL killed $x5, killed $x1
    $x1 = LUI 1
    $x1 = ADDIW killed $x1, -1896
    $x1 = ADD $x2, killed $x1
    $x1 = ADD killed $x1, killed $x5

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D100847
2021-04-21 10:51:07 +01:00
Martin Storsjö
066b8f2fc6 [llvm-rc] Try to fix the Preprocessor/llvm-rc.rc test on non arm/x86 architectures
When llvm-rc invokes clang for preprocessing, it uses a target
triple derived from the default target. The test verifies that
e.g. _WIN32 is defined when preprocessing.

If running clang with e.g. -target ppc64le-windows-msvc, that
particular arch/OS combination isn't hooked up, so _WIN32 doesn't
get defined in that configuration. Therefore, the preprocessing
test fails.

Instead make llvm-rc inspect the architecture of the default target.
If it's one of the known supported architectures, use it as such,
otherwise set a default one (x86_64). (Clang can run preprocessing
with an x86_64 target triple, even if the x86 backend isn't
enabled.)

Also remove superfluous llvm:: specifications on enums in llvm-rc.cpp.
2021-04-21 12:47:33 +03:00
Andrzej Warzynski
dc256a443a [flang][driver] Add support for -fget-definition
This patch adds `-fget-definition` to `flang-new`. The semantics of this
option are identical in both drivers. The error message in the
"throwaway" driver is updated so that it matches the one from
`flang-new` (which is auto-generated and cannot be changed easily).

Tests are updated accordingly. A dedicated test for error handling was
added: get-definition.f90 (for the sake of simplicity,
getdefinition01.f90 no longer tests for errors).

The `ParseFrontendArgs` function is updated so that it can return
errors. This change is required in order to report invalid values
following `-fget-definition`.

The actual implementation of `GetDefinitionAction::ExecuteAction()` was
extracted from f18.cpp (i.e. the bit that deals with
`-fget-definition`).

Depends on: https://reviews.llvm.org/D100556

Differential Revision: https://reviews.llvm.org/D100558
2021-04-21 09:31:36 +00:00
Pavel Labath
cd64273f5e [lldb/ELF] Fix IDs of synthetic eh_frame symbols
The code used the total number of symbols to create a symbol ID for the
synthetic symbols. This is not correct because the IDs of real symbols
can be higher than their total number, as we do not add all symbols (and
in particular, we never add symbol zero, which is not a real symbol).

This meant we could have symbols with duplicate IDs, which caused
problems if some relocations were referring to the duplicated IDs. This
was the cause of the failure of the test D97786.

This patch fixes the code to use the ID of the highest (last) symbol
instead.
2021-04-21 11:24:43 +02:00
Butygin
85740ee108 [mlir] Assume terminators in nested regions are always legal in FuncBufferizePass
Previously, any terminator without ReturnLike and BranchOpInterface traits (e.g. scf.condition) were causing pass to fail.

Differential Revision: https://reviews.llvm.org/D100832
2021-04-21 11:55:11 +03:00
Martin Storsjö
64bc44f5dd [llvm-rc] Run clang to preprocess input files
Allow opting out from preprocessing with a command line argument.

Update tests to pass -no-preprocess to make it not try to use clang
(which isn't a build level dependency of llvm-rc), but add a test that
does preprocessing under clang/test/Preprocessor.

Update a few options to allow them both joined (as -DFOO) and separate
(-D BR), as rc.exe allows both forms of them.

With the verbose flag set, this prints the preprocessing command
used (which differs from what rc.exe does).

Tests under llvm/test/tools/llvm-rc only test constructing the
preprocessor commands, while tests under clang/test/Preprocessor test
actually running the preprocessor.

Differential Revision: https://reviews.llvm.org/D100755
2021-04-21 11:50:10 +03:00
Martin Storsjö
ee34ca34c6 [llvm-cvtres] Reduce the set of dependencies of llvm-cvtres. NFC.
Don't use createBinary() but call the WindowsResource class directly.
The createBinary() function references all supported object file
types and ends up pulling way more from all the underlying libraries
than what is necessary.

This shrinks a stripped llvm-cvtres from 4.6 MB to 463 KB.

Differential Revision: https://reviews.llvm.org/D100833
2021-04-21 11:50:10 +03:00
ShihPo Hung
11072a0bdb [RISCV][Clang] Add RVV AMO builtins
Add vamo[swap/add/xor/and/or/min/max/minu/maxu] builtins.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D100448
2021-04-21 01:48:02 -07:00
David Sherwood
57ca65e21e [AArch64] Add instruction costs for FP_TO_UINT and FP_TO_SINT with half types
We were missing some instruction costs when converting vectors of
floating point half types into integers, so I've added those here.
I also manually generated assembly code for each FP->int case and
looked at the number of instructions generated, which meant
adjusting some of the existing costs too.

I've updated an existing test to reflect the new costs:

  Analysis/CostModel/AArch64/sve-fptoi.ll

Differential Revision: https://reviews.llvm.org/D99935
2021-04-21 09:39:45 +01:00
Christian Kühnel
cf61cf0724 [NFC] fixed link in documentation 2021-04-21 10:17:03 +02:00
Pushpinder Singh
0ad50bf27f Revert "[AMDGPU][OpenMP] Add amdgpu-arch tool to list AMD GPUs installed"
This reverts commit 3194761d27.
2021-04-21 08:05:38 +00:00
Yang Fan
c09277b0d8 [lld][ELF] Fix "enumeral and non-enumeral type in conditional expression" warning (NFC)
GCC warning:
```
/llvm-project/lld/ELF/SyntheticSections.cpp: In member function ‘virtual void lld::elf::VersionTableSection::writeTo(uint8_t*)’:
/llvm-project/lld/ELF/SyntheticSections.cpp:3128:34: warning: enumeral and non-enumeral type in conditional expression [-Wextra]
 3128 |     write16(buf, s.sym->isLazy() ? VER_NDX_GLOBAL : s.sym->versionId);
      |                  ~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
2021-04-21 16:01:46 +08:00
Yang Fan
4307446e9f [SCEV] Fix -Wunused-variable warning (NFC)
GCC warning:
```
/llvm-project/llvm/lib/Analysis/ScalarEvolution.cpp: In member function ‘const llvm::SCEV* llvm::ScalarEvolution::getLosslessPtrToIntExpr(const llvm::SCEV*, unsigned int)::SCEVPtrToIntSinkingRewriter::visitUnknown(const llvm::SCEVUnknown*)’:
/llvm-project/llvm/lib/Analysis/ScalarEvolution.cpp:1152:13: warning: unused variable ‘ExprPtrTy’ [-Wunused-variable]
 1152 |       Type *ExprPtrTy = Expr->getType();
      |             ^~~~~~~~~
```
2021-04-21 16:01:46 +08:00
Christian Kühnel
7f9717b922 added section on CI system
Add documentation for working with the CI systems.

This is based on the discussion in the Infrastructure Working Group:
https://github.com/ChristianKuehnel/iwg-workspace/issues/37

Differential Revision: https://reviews.llvm.org/D97389
2021-04-21 09:59:41 +02:00
Nikita Popov
de18fa9e52 Revert "[InstSimplify] Bypass no-op and-mask, using known bits (PR49543)"
This reverts commit ea1a0d7c9a.

While this is strictly more powerful, it is also strictly slower.
InstSimplify intentionally does not perform many folds that it
is allowed to perform, if doing so requires a KnownBits calculation
that will be repeated in InstCombine.

Maybe it's worthwhile to do this here, but that needs a more
explicitly stated motivation, evaluated in a review.
2021-04-21 09:55:25 +02:00
David Sherwood
eecb4b478f [Docs] Fix formatting issue for llvm.experimental.stepvector in LangRef
The llvm.experimental.stepvector section was missing the '^^^' line
underneath the intrinsic name.
2021-04-21 08:42:40 +01:00
Zakk Chen
ad0fe5db2f [RISCV][MC] Mask load should not have VMConstraint.
Add a test, dest register could be v0.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D100825
2021-04-21 15:21:37 +08:00
Tobias Gysi
5a451e486f [mlir][linalg] adapt named op generalization to work with captures.
Instead of always running the region builder check if the generalized op has a region attached. If yes inline the existing region instead of calling the region builder. This change circumvents a problem with named operations that have a region builder taking captures and the generalization pass not knowing about this captures.

Differential Revision: https://reviews.llvm.org/D100880
2021-04-21 06:37:53 +00:00
Michael Kruse
6048d1d19c [PollyACC] Configure PollyPPCG only if needed.
The PollyPPCG library is only needed when POLLY_ENABLE_GPGPU_CODEGEN=ON.
If disabled, the library target is still created, but not linked against
anything.

This change does not add create the PollyPPCG build target if not
needed.

Motivated by llvm.org/PR50021
2021-04-21 01:08:01 -05:00
Michael Kruse
90e5ce0b0d [PollyACC] Fix implicit function definitions. NFC.
The isl_id_* have been in used without including the correspodning
isl/id.h header. According to rules in C, a function is defined
implicitly when first used with an assumed int return type (32 bits on
64 bit systems). But the implementation returns a pointer (64 bits on 64
bit systems). Is usually has no consequence because the return value is
stored in a registers that is 64 bits (RAX) and the optimizer does not
truncate its value before using it again as a pointer value. However,
LTO optimizers will be rightfull;y confused.

Fix by including <isl/id.h>

This fixes llvm.org/PR50021
2021-04-21 01:08:00 -05:00
Siva Chandra Reddy
f76fb7d420 [libc] Add fma to the C standard spec. 2021-04-21 06:00:35 +00:00
Serge Pavlov
d20a2376d8 [RISCV] Introduce floating point control and state registers
New registers FRM, FFLAGS and FCSR was defined. They represent
corresponding system registers. The new registers are necessary to
properly order floating point instructions in non-default modes.

Differential Revision: https://reviews.llvm.org/D99083
2021-04-21 12:55:30 +07:00
serge-sans-paille
d9806334d1 Use SmallVector instead of std::vector to manage storage of llvm::BitVector
This is a follow-up to https://reviews.llvm.org/D100387.

std::vector is not the best storage container here. My local benchmark (counting
the number of instruction when compiling the sqlite3 amalgamation) yields the
following:

- std::vector<BitVector> -> 5,860,885,896
- SmallVector<BitWord, 0> -> 5,858,991,997
- SmallVector<BitWord> -> 5,817,679,224

Differential Revision: https://reviews.llvm.org/D100744
2021-04-21 07:31:28 +02:00
Arthur Eubanks
dd56715326 [NFC] Remove redundant InstCombinePass name 2021-04-20 22:23:07 -07:00
Max Kazantsev
0ef7e0041a [Test] Add a negative unit test 2021-04-21 12:11:05 +07:00
Pushpinder Singh
3194761d27 [AMDGPU][OpenMP] Add amdgpu-arch tool to list AMD GPUs installed
This patch adds new clang tool named amdgpu-arch which uses
HSA to detect installed AMDGPU and report back latter's march.
This tool is built only if system has HSA installed.

The value printed by amdgpu-arch is used to fill -march when
latter is not explicitly provided in -Xopenmp-target.

Reviewed By: JonChesterfield, gregrodgers

Differential Revision: https://reviews.llvm.org/D99949
2021-04-21 05:05:49 +00:00
Siva Chandra Reddy
653345155a [libc] Disable fma and fmaf for x86_64.
The version of clang installed on the buildbot workers is not able to
compile them. However, the version of gcc installed is able to compile
them fine. So, this change disables them until we can find a way to
compile them using clang on the buildbot workers.
2021-04-21 05:01:15 +00:00
Vitaly Buka
5e9e463e1f [lsan] Test to show lsan dependency on globals
This test from @MaskRay comment on D69428. The patch is looking to
break this behavior. If we go with D69428 I hope we will have some
workaround for this test or include explicit test update into the patch.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D100906
2021-04-20 22:00:26 -07:00
Jonas Devlieghere
eff4f65afb [lldb] Simplify check for nill value in breakpoint_function_callback.test 2021-04-20 21:53:30 -07:00
Zi Xuan Wu
ca31b43ae8 [NFC][CSKY] Resort the instruction description in td
Resort the instruction description in td to make it easy to upstream more instructions and add predicts later.
2021-04-21 12:36:07 +08:00
Siva Chandra
95934c3a37 [libc] Add hardware implementations of fma and fmaf for x86_64 and aarch64.
The current generic implementation of the fmaf function has been moved
to the FPUtil directory. This allows one use the fma operation from
implementations of other math functions like the trignometric functions
without depending on/requiring the fma/fmaf/fmal function targets. If
this pattern ends being convenient, we will switch all generic math
implementations to this pattern.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D100811
2021-04-21 04:31:27 +00:00
Jonas Devlieghere
05eeed9691 Revert "[Driver] Support default libc++ library location on Darwin"
This reverts the following commits because it breaks
TestAppleSimulatorOSType.py on GreenDragon [1].

caff17e503
f5efe0aa04
ae8b2cab67

[1] http://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/31346/
2021-04-20 20:42:50 -07:00
Liu, Chen3
72e4bf12ee [X86] Support some missing intrinsics
Support for _mm512_i32logather_pd, _mm512_mask_i32logather_pd,
_mm512_i32logather_epi64, _mm512_mask_i32logather_epi64, _mm512_i32loscatter_pd,
_mm512_mask_i32loscatter_pd, _mm512_i32loscatter_epi64,
_mm512_mask_i32loscatter_epi64.

Differential Revision: https://reviews.llvm.org/D100368
2021-04-21 10:50:37 +08:00
Craig Topper
78abad569c [RISCV] Add missing SEW=64 tests to vmslt-rv32.ll. NFC 2021-04-20 18:31:36 -07:00
Amy Zhuang
9194071626 [mlir] Support hoisting whole affine for loops in LICM
Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D100512
2021-04-20 18:07:06 -07:00
George Balatsouras
79b5280a6c [dfsan] Enable origin tracking with fast8 mode
All related instrumentation tests have been updated.

Reviewed By: stephan.yichao.zhao

Differential Revision: https://reviews.llvm.org/D100903
2021-04-20 18:10:32 -07:00
Fangrui Song
031c40dc3c [sanitizer] Fix glibc sparc build and add GetTls support
sanitizer_linux_libcdep.cpp doesn't build for Linux sparc (with minimum support
but can build) after D98926. I wasn't aware because the file didn't mention
`__sparc__`.

While here, add the relevant support since it does not add complexity
(the D99566 approach).  Adds an explicit `#error` for unsupported
non-Android Linux and FreeBSD architectures.

ThreadDescriptorSize is only used by lsan to scan thread-specific data keys in
the thread control block.

On TLS Variant II architectures (i386/x86_64/s390/sparc), our dl_iterate_phdr
based approach can cover the region from the first byte of the static TLS block
(static TLS surplus) to the thread pointer.
We just need to extend the range to include the first few members of struct
pthread. offsetof(struct pthread, specific_used) satisfies the requirement and
has not changed since 2007-05-10. We don't need to update ThreadDescriptorSize
for each glibc version.

Technically we could use the 524/1552 for x86_64 as well but there is potential
risk that large applications with thousands of shared object dependency may
dislike the time complexity increase if there are many threads, so I don't make
the simplification for now.

Differential Revision: https://reviews.llvm.org/D100892
2021-04-20 17:42:41 -07:00
Adrian Prantl
81cad0be68 Make sure PHIElimination doesn't copy debug locations across basic blocks.
PHIElimination may insert copy instructions in multiple basic
blocks. Moving debug locations across basic block boundaries would be
misleading as illustrated by the test case.

rdar://75463656

Differential Revision: https://reviews.llvm.org/D100886
2021-04-20 17:03:29 -07:00
Sam Clegg
103956170b [WebAssembly] Update README. NFC.
This is just a cleanup of the very high level stuff.  I'm sure there is
more to update here but I'll leave that to others and/or a followup.

Differential Revision: https://reviews.llvm.org/D100888
2021-04-20 16:59:08 -07:00
Jez Ng
7208bd4b32 [lld-macho] Skip platform checks for a few libSystem re-exports
XCode 12 ships with mismatched platforms for these libraries,
so this hack is necessary...

Fixes PR49799.

Reviewed By: #lld-macho, gkm, smeenai

Differential Revision: https://reviews.llvm.org/D100913
2021-04-20 19:54:53 -04:00