Commit Graph

484442 Commits

Author SHA1 Message Date
Nikita Popov
8b8f2ef06e [MergeFunc] Fix comparison of constant expressions
Functions using different constant expressions were incorrectly
merged, because a lot of state was missing from the comparison,
including the opcode, the comparison predicate, the GEP element
type, as well as the inbounds, inrange and nowrap poison flags.
2023-12-20 15:59:02 +01:00
Nico Weber
6cd296ed85 [gn] port e86a02ce89 (dladdr -> llvm-config.h)
Also set HAVE_DLADDR to 1 on non-Win instead of just on macOS.
That looked like an oversight.
2023-12-20 09:57:37 -05:00
Alexey Bataev
a13148a880 [SLP]Fix PR75995: drop wrapping flags for resized wrapped binops.
If decided to resize the instruction, need to drop wrapping flags from
the resulting vector instructions to avoid incorrect
optimizations/assumptions later.
Fixes PR75995.
2023-12-20 06:51:39 -08:00
David Spickett
7767c5856d [lldb][DWARF] Search for symbols in all external modules (#75927)
The way this code was updated in
dd95877958 meant that if the first module
did not have the symbol, the iteration stopped as returning true means
stop. So only if every module had the symbol would we find it, in the
last module.

Invert the condition to break when we find the first instance, which is
what the previous code did.
2023-12-20 14:48:01 +00:00
Nico Weber
f1156eb5a9 [gn] port 2fd4084fca 2023-12-20 09:46:33 -05:00
Hassnaa Hamdi
f3dcc0cba9 [LLVM][AArch64][tblgen]: Match clamp pattern (#75529)
Add isel pattern to replase min(max(v1,v2),v3) by clamp
Add tests for uclamp, sclamp, bfclamp, fclamp.
2023-12-20 14:36:58 +00:00
Alexey Bataev
8abf8c948c [SLP][NFC]Add a test with incorrect wrapping flags in the binops with
minbitwidth types.
2023-12-20 06:27:01 -08:00
Christian Sigg
7153fa3daa [mlir][bazel] Fix build after d9803841f2 2023-12-20 15:20:43 +01:00
bipmis
64987c648f [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (#68680)
When the sub arguments are ptr2int it is not possible to determine
computeKnownBits() of its arguments.
For scalar case generally sub of 2 ptr2int are converted to sub of
indexes.
However a loop with recursive GEP/PHI where the arguments to sub is of
type ptr2int, if it is possible to determine that a sub of this GEP and
another pointer with the same base is KnownNonZero we can return this.
This helps subsequent passes to optimize the loop further.
2023-12-20 14:11:58 +00:00
Nikita Popov
836e71a425 [MergeFunc] Adjust GEP indices in test (NFC)
Otherwise inbounds will be inferred, and we don't actually end
up testing the case of one gep without inbounds and one with.
2023-12-20 15:08:13 +01:00
David Spickett
a8af51dfa5 [lldb][test] Skip global module cache on Arm/AArch64 Linux (again)
This reverts commit 01c4ecb7ae,
d14d52158b and
a756dc4724.

This removes the logging and workaround I added earlier,
and puts back the skip for Arm/AArch64 Linux.

I've not seen it fail on AArch64 since, but let's not create
more noise if it does.

I've written up the issue as https://github.com/llvm/llvm-project/issues/76057.
It's something to do with trying to destroy a process while
a thread is doing a single sep. So my workaround wouldn't have
worked in any case. It needs a more involved fix.
2023-12-20 13:56:40 +00:00
Nikita Popov
3dd2db08a2 [MergeFunc] Add another test for incorrect constexpr merging (NFC)
Looks like we don't even check the opcode :(
2023-12-20 14:53:25 +01:00
Abhina Sree
e86a02ce89 Use llvm-config.h in CIndexer.cpp instead of private header (#75928)
Use llvm-config.h in CIndexer.cpp instead of private header
2023-12-20 08:44:40 -05:00
Nikita Popov
1ff9fb78c8 [MergeFunc] Add tests for incorrect const expr merging (NFC) 2023-12-20 14:42:21 +01:00
Gil Rapaport
d9803841f2 [mlir][emitc] Add op modelling C expressions (#71631)
Add an emitc.expression operation that models C expressions, and provide
transforms to form and fold expressions. The translator emits the body
of
emitc.expression ops as a single C expression.
This expression is emitted by default as the RHS of an EmitC SSA value,
but if
possible, expressions with a single use that is not another expression
are
instead inlined. Specific expression's inlining can be fine tuned by
lowering
passes and transforms.
2023-12-20 15:04:46 +02:00
Matt Arsenault
b01adc6bed AMDGPU: Strengthen some bfloat tests
Fix bitcast test, which was splitting apart phis intended to force
bitcasts that survive all the way to selection.

Disable the amdgpu-codegenprepare phi splitting, which defeats the technique
of using a phi to ensure a bitcast reaches all the way to selection. Also
add a variety of bfloat tests. These probably need revisiting to avoid the
cast folding into argument loads. Also round out set of bfloat bitcast and
ABI tests.

Add codegen tests for more bf16 operations The promotion of these works
contrary to the comment.
2023-12-20 19:33:45 +07:00
Matt Arsenault
9e574a3936 DAG: Fix expansion of bf16 sourced extloads
Also fix assorted vector extload failures for AMDGPU.
2023-12-20 19:24:27 +07:00
David Green
701f647905 [Flang] Allow Intrinsic simpification with min/maxloc dim and scalar result. (#75820)
This makes an adjustment to the existing fir minloc/maxloc generation
code to handle functions with a dim=1 that produce a scalar result. This
should allow us to get the same benefits as the existing generated
minmax reductions.
2023-12-20 12:12:12 +00:00
Andrzej Warzyński
354adb44c9 [mlir][vector] Extend CreateMaskFolder (#75842)
Extends `CreateMaskFolder` pattern so that the following:
```mlir
  %c8 = arith.constant 8 : index
  %c16 = arith.constant 16 : index
  %0 = vector.vscale
  %1 = arith.muli %0, %c16 : index
  %10 = vector.create_mask %c8, %1 : vector<8x[16]xi1>
```

is folded as:

```mlir
  %0 = vector.constant_mask [8, 16] : vector<8x[16]xi1>
```
2023-12-20 11:08:54 +00:00
David Spickett
83f8caeab4 [lldb][test] Skip runlocker test on AArch64 Linux
This has been flaky for a while, for example
https://lab.llvm.org/buildbot/#/builders/96/builds/50350

```
Command Output (stdout):
--
lldb version 18.0.0git (https://github.com/llvm/llvm-project.git revision 3974d89bde)
  clang revision 3974d89bde
  llvm revision 3974d89bde
"can't evaluate expressions when the process is running."
```

```
  PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
   #0 0x0000ffffa46191a0 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x529a1a0)
   #1 0x0000ffffa4617144 llvm::sys::RunSignalHandlers() (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x5298144)
   #2 0x0000ffffa46198d0 SignalHandler(int) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x529a8d0)
   #3 0x0000ffffab25b7dc (linux-vdso.so.1+0x7dc)
   #4 0x0000ffffab13d050 /build/glibc-Q8DG8B/glibc-2.31/string/../sysdeps/aarch64/multiarch/memcpy_advsimd.S:92:0
   #5 0x0000ffffa446f420 lldb_private::process_gdb_remote::GDBRemoteRegisterContext::PrivateSetRegisterValue(unsigned int, llvm::ArrayRef<unsigned char>) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x50f0420)
   #6 0x0000ffffa446f7b8 lldb_private::process_gdb_remote::GDBRemoteRegisterContext::GetPrimordialRegister(lldb_private::RegisterInfo const*, lldb_private::process_gdb_remote::GDBRemoteCommunicationClient&) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x50f07b8)
   #7 0x0000ffffa446f308 lldb_private::process_gdb_remote::GDBRemoteRegisterContext::ReadRegisterBytes(lldb_private::RegisterInfo const*) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x50f0308)
   #8 0x0000ffffa446ec1c lldb_private::process_gdb_remote::GDBRemoteRegisterContext::ReadRegister(lldb_private::RegisterInfo const*, lldb_private::RegisterValue&) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x50efc1c)
   #9 0x0000ffffa412eaa4 lldb_private::RegisterContext::ReadRegisterAsUnsigned(lldb_private::RegisterInfo const*, unsigned long) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x4dafaa4)
  #10 0x0000ffffa420861c ReadLinuxProcessAddressMask(std::shared_ptr<lldb_private::Process>, llvm::StringRef) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x4e8961c)
  #11 0x0000ffffa4208430 ABISysV_arm64::FixCodeAddress(unsigned long) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x4e89430)
```

Judging by the backtrace something is trying to read the pointer authentication address/code mask
registers. This explains why I've not seen this issue locally, as the buildbot runs on Graviton
3 with has the pointer authentication extension.

I will try to reproduce, fix and re-enable the test.
2023-12-20 11:05:52 +00:00
Florian Hahn
7cf499c63b [ConstraintElim] Check if second op implies first for And. (#75750)
Generalize checkAndSecondOpImpliedByFirst to also check if the second
operand implies the first.
2023-12-20 11:58:35 +01:00
Sanjay Marreddi
c37734d409 [libc++] Fix ability to explicitly instantiate std::midpoint (#74217)
std::midpoint is specified by having a pointer overload in
[numeric.ops.midpoint].
With the way the pointer overload is specified, users can expect that
calling
std::midpoint as `std::midpoint<T>(a, b)` should work, but it didn't in
libc++
due to the way the pointer overload was specified.

Fixes #67046
2023-12-20 11:53:19 +01:00
Andrzej Warzyński
d5abd8a1a9 [mlir][vector][nfc] Move tests for scalable outer-product (#76035)
Tests for vector.outerproduct for scalable vectors from
"vector-scalable-outerproduct.mlir" are moved to:

  * ops.mlir and invalid.mlir.

These files are effectively used to document what Ops are supported and
That's basically what the original file was testing (but specifically
for scalable vectors).
2023-12-20 10:53:00 +00:00
Nikita Popov
273a0c9c07 [PhaseOrdering] Add data layout to test (NFC)
Needed for switch to lookup table optimization.
2023-12-20 11:49:34 +01:00
Nikita Popov
5ab5810054 [PhaseOrdering] Add additional test for switch with GEPs (NFC) 2023-12-20 11:41:46 +01:00
Simon Pilgrim
3974d89bde [X86] getTargetConstantPoolFromBasePtr - drop const qualifier
Return ConstantPoolSDNode instead of const ConstantPoolSDNode - doesn't affect the accessors at all and makes it easier to use result in calls expecting a SDNode.
2023-12-20 10:40:13 +00:00
Momchil Velikov
52820bdd68 [AArch64] Update target feature requirements of SVE bfloat instructions (#75596)
According to the latest update of the ISA
https://developer.arm.com/documentation/ddi0602/2023-09/?lang=en all of
the affected instruction encodings now require

    (FEAT_SVE2 or FEAT_SME2) and FEAT_SVE_B16B16
2023-12-20 10:16:40 +00:00
Lucas Duarte Prates
b652674dd0 [AsmWriter] Ensure getMnemonic doesn't return invalid pointers (#75783)
For instructions that don't map to a mnemonic string, the implementation
of MCInstPrinter::getMnemonic would return an invalid pointer due to the
result of the calculation of the instruction's position in the `AsmStrs`
table. This patch fixes the issue by ensuring those cases return a
`nullptr` value instead.

Fixes #74177.
2023-12-20 10:09:29 +00:00
Nikita Popov
9d60e95bcd [AMDGPU] Use poison instead of undef for non-demanded elements (#75914)
Return poison instead of undef for non-demanded lanes in the AMDGPU
demanded element simplification hook.

Also bail out of dmask is 0, as this case has special semantics:

> If DMASK==0, the TA overrides DMASK=1 and puts zeros in VGPR followed by
> LWE status if exists. TFE status is not generated since the fetch is dropped.
2023-12-20 11:01:59 +01:00
Finn Plummer
4c83c27c91 [mlir][spirv] Add folding for [I|Logical][Not]Equal (#74194) 2023-12-20 11:00:28 +01:00
kadir çetinkaya
cf048e16a7 [clangd] Perform self-containedness check at EOF (#75965)
Header gurads are not detected until we hit EOF. Make sure we postpone
any such detection until then.
2023-12-20 10:48:18 +01:00
David Spickett
01c4ecb7ae [lldb][test] Remove Arm/AArch64 Linux skip for global modules test
So we can see it failing and get the extra logged information.
2023-12-20 09:42:07 +00:00
David Spickett
d14d52158b [lldb][test] Add extra logging for module cache test
And remove the workaround I was trying, as this logging may prove what
the actual issue is.

Which I think is that the thread plan map in Process is cleared before
the threads are destroyed. So Thread::ShouldStop could be getting
the current plan, then the plan map is cleared, then Thread::ShouldStop
is deciding based on that plan to pop a plan from the now empty stack.
2023-12-20 09:41:33 +00:00
Guillaume Chatelet
3ae5a9b67f [libc][NFC] Rename MAX_EXPONENT to MAX_BIASED_EXPONENT (#75932)
As currently defined `MAX_EXPONENT` actually corresponds to the biased
exponent (i.e. an unsigned value).
2023-12-20 10:30:09 +01:00
jeanPerier
36a073a5f4 [flang] Add option to skip struct argument rewrite in target-rewrite (#75939)
Be consistent with complex and character rewrite so that the pass can be
run selectively.
2023-12-20 10:15:09 +01:00
Haojian Wu
3b1f06e527 [AST] RecursiveASTVisitor: traverse the require clause for partial template specializations. (#75795)
This fixes tooling (clangd, include-cleaner) bugs where we miss
functionalities on concept AST nodes.
2023-12-20 10:08:43 +01:00
Paschalis Mpeis
2349731992 [TLI] Add SLEEFGNUABI mappings for fmod/fmodf fixed-width. (#75803)
Cleanup test sleef-calls-aarch64.ll:
- make the util update script's regex more clear
- eliminate scalar epilogues in tests
2023-12-20 09:08:17 +00:00
Yvan Roux
06d10d41ce [RISCV] Make Zcmt imply Zicsr. (#75464)
This patch fixes build attributes w/r to Zcmt extension dependency on
Zicsr.
2023-12-20 09:47:25 +01:00
David Spickett
a756dc4724 [lldb][test] Try a workaround for module cache test on Arm/AArch64 Linux
If this works it'll give me a clue for the underlying issue.
2023-12-20 08:46:10 +00:00
Chenyang Gao
f72b654991 [MC][x86] Allow non-MCTargetExpr RHS when the LHS of a MCBinaryExpr is MCTargetExpr (#75693)
This fixes #73109.
In instruction `addl %eax %rax`, because there is a missing comma in the
middle of two registers, the asm parser will treat it as a binary
expression.
```
%rax  %  rax --> register mod identifier
```
However, In `MCExpr::evaluateAsRelocatableImpl`, it only checks the left
side of the expression. This patch ensures the right side will also be
checked.
2023-12-20 16:43:18 +08:00
Nikita Popov
bbe6c81f80 [RISCV] Add missing REQUIRES asserts to test (NFC) 2023-12-20 09:42:14 +01:00
Igor Popov
2176af7a26 Fix __float128 only available on Linux for x86_64 (#75909) 2023-12-20 09:36:01 +01:00
Vladimir Vereschaka
7022a24771 [ClangRepl] Fix failed ClangReplInterpreter unit tests (#75556).
See more details: https://lab.llvm.org/buildbot/#/builders/119/builds/16346

Behalf of @vgvassilev
2023-12-20 00:11:12 -08:00
Cullen Rhodes
4db0bd28e8 [mlir][vector][nfc] remove unused template parameter (#75931) 2023-12-20 08:06:25 +00:00
Matthias Springer
fd59f07f6a [mlir] Code owners: sort file and add myself (#76019) 2023-12-20 16:35:09 +09:00
Yeting Kuo
b7376c3196 [RISCV][NFC] Add comments and tests for frint case of performFP_TO_INT_SATCombine. (#76014)
performFP_TO_INT_SATCombine could also serve pattern (fp_to_int_sat
(frint X)).
2023-12-20 14:56:28 +08:00
Mariusz Sikora
9a41a80e76 [AMDGPU] Handle object size and bail if assume-like intrinsic is used in PromoteAllocaToVector (#68744)
Attached test will cause crash without this change.

We should not remove isAssumeLikeIntrinsic instruction if it is used by
other instruction.
2023-12-20 07:47:49 +01:00
Brandon Wu
fb51aae702 [RISCV] Add missing lmul info for SiFive extensions (#76006) 2023-12-20 14:42:47 +08:00
Brandon Wu
379d32dab8 Recommit [RISCV] Implement multi-lib reuse rule for RISC-V bare-metal toolchain (#73765) (#75890)
Extend the multi-lib re-use selection mechanism for RISC-V.
This funciton will try to re-use multi-lib if they are compatible.
Definition of compatible:
  - ABI must be the same.
  - multi-lib is a subset of current arch, e.g. multi-lib=march=rv32im
    is a subset of march=rv32imc.
  - march that contains atomic extension can't reuse multi-lib that
    doesn't has atomic, vice versa. e.g. multi-lib=march=rv32im and
    march=rv32ima are not compatible, because software and hardware
    atomic operation can't work together correctly.
2023-12-20 14:42:11 +08:00
cor3ntin
c853676061 [Clang] Fix a crash when incorrectly calling an explicit object member function template (#75913)
Fixes #75732
2023-12-20 07:41:24 +01:00