Commit Graph

397598 Commits

Author SHA1 Message Date
Siva Chandra Reddy
8e284be04f [libc][Obvious] Add header guards for the generated linux syscall header file. 2021-08-27 16:17:53 +00:00
Fangrui Song
83dfa0d098 [MC] Change ELFOSABI_NONE to ELFOSABI_GNU for STB_GNU_UNIQUE
Similar to D97976.
On Linux, most GCC installations are configured with
`--enable-gnu-unique-object` and such GCC emits `@gnu_unique_object` assembly.

The feature is highly controversial and disliked by many folks.
(On glibc DF_1_NODELETE is implicitly enabled and makes dlclose a no-op).

In llvm-project STB_GNU_UNIQUE is assembly only. Clang does not use STB_GNU_UNIQUE.

Use ELFOSABI_GNU to match GNU as behavior and avoid collision with other
OSABI binding values.

Reviewed By: jrtc27

Differential Revision: https://reviews.llvm.org/D107861
2021-08-27 08:53:55 -07:00
Arthur Eubanks
77b6a4bde4 [gn build] Don't copy xray includes
The gn build doesn't support xray, so there's no reason to make the xray
headers available. Some CMake checks check if xray includes are
available to determine if xray is usable. Since we don't build the xray
runtime, there are link errors.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D108737
2021-08-27 08:51:27 -07:00
Louis Dionne
b91365e0f1 [libc++][NFC] Remove unused helper function in the test suite 2021-08-27 11:47:33 -04:00
Fanbo Meng
9d7a77c26d [MCParser][z/OS] Mark test as unsupported for the z/OS Target
Marking test as unsupported for the same reason as https://reviews.llvm.org/D105204

Reviewed By: abhina.sreeskantharajan

Differential Revision: https://reviews.llvm.org/D108819
2021-08-27 11:45:38 -04:00
Kazu Hirata
72bbd1559e [IR] Remove getWithOperandReplaced (NFC)
The function hasn't been used for at least 10 years.
2021-08-27 08:42:57 -07:00
Dmitry Preobrazhensky
8ea3e9d9a2 [AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description.
Summary of changes:
- Added f16 omod modifier (bug 51386).
- Corrected names of data types (bug 48638).
- Enabled a16 with most GFX10 MIMG opcodes (see https://reviews.llvm.org/D102231).
- Corrected description of integer operands (bug 51130).
- Corrected description of 8-bit DS offsets (bug 51536).
- Improved PERMLANE op_sel description.
- Corrected *SAD* opcode types.
2021-08-27 17:23:20 +03:00
Joe Loser
51414d9982 [libc++][NFC] Remove extra __ranges/take_view.h entry in CMakeLists.txt
Differential Revision: https://reviews.llvm.org/D108802
2021-08-27 10:08:33 -04:00
Louis Dionne
9ac45375f1 Revert "[CMake] Enable LLVM_ENABLE_PER_TARGET_RUNTIME_DIR by default on Linux"
This reverts commit abb956370e, which broke
the libc++ CI on Linux.
2021-08-27 10:01:29 -04:00
owenca
8a780a2f18 [clang-format] Group options that pack constructor initializers
Add a new option PackConstructorInitializers and deprecate the
related options ConstructorInitializerAllOnOneLineOrOnePerLine and
AllowAllConstructorInitializersOnNextLine. Below is the mapping:

PackConstructorInitializers  ConstructorInitializer... AllowAll...
        Never                            -                  -
        BinPack                        false                -
        CurrentLine                    true               false
        NextLine                       true               true

The option value Never fixes PR50549 by always placing each
constructor initializer on its own line.

Differential Revision: https://reviews.llvm.org/D108752
2021-08-27 06:27:46 -07:00
Matt Arsenault
1494298b51 GlobalISel: Remove check for empty functions as these are invalid IR 2021-08-27 09:27:06 -04:00
Nico Weber
34ac7a7ac1 [lld/COFF] Ignore /LTCG, /LTCG:, /LTCGOUT:, /ILK: flags
We currently complain "could not open /LTCG: no such file or directory",
which isn't very useful.  We could emit a warning when we see this flag, but
just ignoring it seems fine.

Final missing part of PR38799.

Differential Revision: https://reviews.llvm.org/D108799
2021-08-27 09:13:30 -04:00
Nico Weber
66dc44f703 [lld/COFF] Use P_priv more
P_priv does the same as the old QF further down. Standardize on P_priv.

No behavior change.

Differential Revision: https://reviews.llvm.org/D108798
2021-08-27 08:48:05 -04:00
Balazs Benics
68088563fb [analyzer] MallocOverflow should consider comparisons only preceding malloc
MallocOverflow works in two phases:

1) Collects suspicious malloc calls, whose argument is a multiplication
2) Filters the aggregated list of suspicious malloc calls by iterating
   over the BasicBlocks of the CFG looking for comparison binary
   operators over the variable constituting in any suspicious malloc.

Consequently, it suppressed true-positive cases when the comparison
check was after the malloc call.
In this patch the checker will consider the relative position of the
relation check to the malloc call.

E.g.:

```lang=C++
void *check_after_malloc(int n, int x) {
  int *p = NULL;
  if (x == 42)
    p = malloc(n * sizeof(int)); // Previously **no** warning, now it
                                 // warns about this.

  // The check is after the allocation!
  if (n > 10) {
    // Do something conditionally.
  }
  return p;
}
```

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D107804
2021-08-27 14:41:26 +02:00
Sanjay Patel
416a119f9e [GlobalOpt] don't hoist constant expressions that can trap
We try to forward a stored-once-constant-value from one global access
to another, but that's not safe if the constant value is an expression
that can trap.

The tests are reduced from the miscompile examples in:
https://llvm.org/PR47578

Differential Revision: https://reviews.llvm.org/D108771
2021-08-27 08:10:20 -04:00
Jun Ma
15b2a8e7fa [AArch64][SVE] Optimize ptrue predicate pattern with known sve register width.
For vectors that are exactly equal to getMaxSVEVectorSizeInBits, just use
AArch64SVEPredPattern::all, which can enable the use of unpredicated ptrue when available.

TestPlan: check-llvm

Differential Revision: https://reviews.llvm.org/D108706
2021-08-27 20:03:48 +08:00
Jun Ma
8c47103491 [AArch64][SVE] Add API for conversion between SVE predicate pattern and element number. NFC
This patch solely moves convert operation between SVE predicate pattern
and element number into two small functions. It's pre-commit patch for optimize
pture with known sve register width.

Differential Revision: https://reviews.llvm.org/D108705
2021-08-27 20:03:48 +08:00
Jun Ma
3f919dfe0d [AArch64][SVE] Use getPTrue uniformly.NFC. 2021-08-27 20:03:48 +08:00
Andrea Di Biagio
0dc5dc6531 [MCA][NFC] Removed unused method, and fixed a coverity issue.
The coverity issue was reported agaist class MCAOperand
due to the lack of proper initialization for field Index.

No functional change intended.
2021-08-27 12:49:49 +01:00
Jon Chesterfield
78f92c3810 [openmp][amdgpu] Initial gfx10 offloading implementation
Lets wavefront size be 32 for amdgpu openmp, as well as 64.

Fixes up as little as possible to pass that through the libraries. This change
is end to end, as opposed to updating clang/devicertl/plugin separately. It can
be broken up for review/commit if preferred. Posting as-is so that others with
a gfx10 can try it out. It works roughly as well as gfx9 for me, but there are
probably bugs remaining as well as the todo: for letting grid values vary more.

Reviewed By: ronlieb

Differential Revision: https://reviews.llvm.org/D108708
2021-08-27 12:34:03 +01:00
Serge Pavlov
cdbe569fb6 [X86] Implement llvm.isnan(x86_fp80) as unordered comparison
x86_fp80 format allows values that do not fit any of IEEE-754 category.
Previously they were recognized by intrinsic __builtin_isnan as NaNs.
Now this intrinsic is implemented using instruction FXAM, which
distinguish between NaNs and unsupported values. It can make some
programs behave differently.

As a solution, this fix changes lowering of the intrinsic. If floating
point exceptions are ignored, llvm.isnan is lowered into unordered
comparison, as __buildtin_isnan was implemented earlier. In strictfp
functions the intrinsic is lowered using FXAM, which does not raise
exceptions even for signaling NaN, as required by IEEE-754 and C
standards.

Differential Revision: https://reviews.llvm.org/D108037
2021-08-27 18:06:07 +07:00
Nathan Sidwell
199ac3a839 [NFC][X86] Sret return register cleanup
There are no paths into LowerFormalParms that have already specified
the sret register. We always materialize a virtual and then assign it
to the physical reg at the point of the return.

Differential Revision: https://reviews.llvm.org/D108762
2021-08-27 04:03:49 -07:00
Carl Ritson
5d9de3ea18 [DAGCombine] Allow FMA combine with both FMA and FMAD
Without this change only the preferred fusion opcode is tested
when attempting to combine FMA operations.
If both FMA and FMAD are available then FMA ops formed prior to
legalization will not be merged post legalization as FMAD becomes
the preferred fusion opcode.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D108619
2021-08-27 19:49:35 +09:00
Ricky Taylor
8d3f112f0c [M68k] Update pointer data layout
Fixes PR51626.

The M68k requires that all instruction, word and long word reads are
aligned to word boundaries. From the 68020 onwards, there is a
performance benefit from aligning long words to long word boundaries.

The M68k uses the same data layout for pointers and integers.

In line with this, this commit updates the pointer data layout to
match the layout already set for 32-bit integers: 32:16:32.

Differential Revision: https://reviews.llvm.org/D108792
2021-08-27 11:47:27 +01:00
Roman Lebedev
d4d459e747 [X86] AMD Zen 3: MULX w/ mem operand has the same throughput as with reg op
Exegesis is faulty and sometimes when measuring throughput^-1
produces snippets that have loop-carried dependencies,
which must be what caused me to incorrectly measure it originally.

After looking much more carefully, the inverse throughput should match
that of the MULX w/ reg op.

As per llvm-exegesis measurements.
2021-08-27 13:27:05 +03:00
Roman Lebedev
0f04936a2d [X86] AMD Zen 3: MULX produces low part of the result in 3cy, +1cy for high part
As per llvm-exegesis measurements.
2021-08-27 13:27:05 +03:00
Roman Lebedev
db2c6cd99c [NFC][X86][MCA] AMD Zen 3: improve MULX test coverage
Latency for MULX isn't right
2021-08-27 13:27:05 +03:00
Yaron Keren
692ebe5395 [docs] Add DIA register instructions to Getting Started with Visual Studio page
Since Visual Studio 2017 the DIA libs are not registered by default, see:
https://docs.microsoft.com/en-us/visualstudio/extensibility/breaking-changes-2017?view=vs-2019#change-reduce-registry-impact
LLDB building instruction already specify registering these DLLs, required
both the LLVM PDB tests and LLDB build.

Differential Revision: https://reviews.llvm.org/D108811
2021-08-27 13:10:19 +03:00
Balazs Benics
6ad47e1c4f [analyzer] Catch leaking stack addresses via stack variables
Not only global variables can hold references to dead stack variables.
Consider this example:

  void write_stack_address_to(char **q) {
    char local;
    *q = &local;
  }

  void test_stack() {
    char *p;
    write_stack_address_to(&p);
  }

The address of 'local' is assigned to 'p', which becomes a dangling
pointer after 'write_stack_address_to()' returns.

The StackAddrEscapeChecker was looking for bindings in the store which
referred to variables of the popped stack frame, but it only considered
global variables in this regard. This patch relaxes this, catching
stack variable bindings as well.

---

This patch also works for temporary objects like:

  struct Bar {
    const int &ref;
    explicit Bar(int y) : ref(y) {
      // Okay.
    } // End of the constructor call, `ref` is dangling now. Warning!
  };

  void test() {
    Bar{33}; // Temporary object, so the corresponding memregion is
             // *not* a VarRegion.
  }

---

The return value optimization aka. copy-elision might kick in but that
is modeled by passing an imaginary CXXThisRegion which refers to the
parent stack frame which is supposed to be the 'return slot'.
Objects residing in the 'return slot' outlive the scope of the inner
call, thus we should expect no warning about them - except if we
explicitly disable copy-elision.

Reviewed By: NoQ, martong

Differential Revision: https://reviews.llvm.org/D107078
2021-08-27 11:31:16 +02:00
Sylvestre Ledru
c22bd391bc polly: remove the old reference to svn in the doc 2021-08-27 10:46:50 +02:00
Sylvestre Ledru
fe611b1da8 [clang] Move the soname declaration in a variable at the top of the file
Currently, it is a bit buried in the file even if this is
pretty important for distro.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D108533
2021-08-27 09:07:12 +02:00
Chuanqi Xu
a52cfb3523 [NFC] [ASTReader] Remove unused variables 2021-08-27 14:00:03 +08:00
LLVM GN Syncbot
f8df807653 [gn build] Port b749ef9e22 2021-08-27 04:42:51 +00:00
Lang Hames
b749ef9e22 [ORC][ORC-RT] Reapply "Introduce ELF/*nix Platform and runtime..." with fixes.
This reapplies e256445bff, which was reverted in 45ac5f5441 due to bot errors
(e.g. https://lab.llvm.org/buildbot/#/builders/112/builds/8599). The issue that
caused the bot failure was fixed in 2e6a4fce35.
2021-08-27 14:41:58 +10:00
Lang Hames
2e6a4fce35 [ORC][JITLink][ELF] Treat STB_GNU_UNIQUE as Weak in the JIT.
This should fix the bot error in
https://lab.llvm.org/buildbot/#/builders/112/builds/8599
which forced reversion of the ELFNixPlatform in 45ac5f5441.

This should allow us to re-enable the ELFNixPlatform in a follow-up patch.
2021-08-27 14:41:28 +10:00
Matt Arsenault
ca4be0f9a1 AMDGPU: Fix hardcoded registers in test 2021-08-26 22:09:31 -04:00
Matt Arsenault
a020581f2e AMDGPU/GlobalISel: Add baseline test for new ABI attribute hints 2021-08-26 22:09:11 -04:00
Matt Arsenault
04ce2de330 AMDGPU: Remove implicit argument attributes when introducing new calls
In a future patch, a new set of amdgpu-no-* attributes will be
introduced to indicate when a function does not need an implicitly
passed input. This pass introduces new instances of these intrinsic
calls, and should remove the attributes if they were present before.
2021-08-26 22:08:04 -04:00
Matt Arsenault
a74278f21f AMDGPU: Fix broken test 2021-08-26 22:08:04 -04:00
Chen Zheng
324bd467a2 [PowerPC][ELF] make sure local variable space does not overlap with parameter save area
Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D105271
2021-08-27 01:58:41 +00:00
Matt Arsenault
088cc63640 AMDGPU: Invert AMDGPUAttributor
Switch to using BitIntegerState for each of the inputs, and invert
their meanings.

This now diverges more from the old AMDGPUAnnotateKernelFeatures, but
this isn't used yet anyway.
2021-08-26 21:32:13 -04:00
Matt Arsenault
0150597c67 AMDGPU: Fix broken check lines 2021-08-26 21:30:06 -04:00
Matt Arsenault
3fdcd9bb13 GlobalISel: Add CallBase to CallLoweringInfo
The DAG version has this, and is necessary for call lowering to take
advantage of any attributes at the call site.
2021-08-26 21:09:11 -04:00
Matt Arsenault
46d82e7357 AMDGPU: Restrict attributor transforms
We only really want this to add the custom attributes. Theoretically
the regular transforms were already run at this point. Touching
undefined behavior breaks a lot of tests when this is enabled by
default, many of which are expecting to test handling of undef
operations.
2021-08-26 21:08:51 -04:00
George Rokos
3819aae6dd [libomptarget][NFC] Replaced obsolete name "getOrAllocTgtPtr" with new "getTargetPointer" in debug messages. 2021-08-26 18:01:18 -07:00
Matt Arsenault
cf32d61a05 AMDGPU: Remove hacky attribute deduction from AMDGPUAttributor
amdgpu-calls and amdgpu-stack-objects don't really belong as
attributes, and are currently a hacky way of passing an analysis into
the DAG. These don't really belong in the IR, and don't really fit in
with the other attributes. Remove these to facilitate inverting the
pass.

I don't exactly understand the indirect call test changes. These tests
are using calls which are trivially replacable with a direct call, so
I'm not sure what the point is.
2021-08-26 20:31:14 -04:00
Matt Arsenault
98d7aa435f AMDGPU: Stop inferring use of llvm.amdgcn.kernarg.segment.ptr
We no longer use this intrinsic outside of the backend and no longer
support using it outside of kernels.
2021-08-26 20:30:03 -04:00
Heejin Ahn
f5cff292e2 [WebAssembly] Fix PHI when relaying longjmps
When doing Emscritpen EH, if SjLj is also enabled and used and if the
thrown exception has a possiblity being a longjmp instead of an
exception, we shouldn't swallow it; we should rethrow, or relay it. It
was done in D106525 and the code is here:
8441a8eea8/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp (L858-L898)

Here is the pseudocode of that part: (copied from comments)
```
if (%__THREW__.val == 0 || %__THREW__.val == 1)
  goto %tail
else
  goto %longjmp.rethrow

longjmp.rethrow: ;; This is longjmp. Rethrow it
  %__threwValue.val = __threwValue
  emscripten_longjmp(%__THREW__.val, %__threwValue.val);

tail: ;; Nothing happened or an exception is thrown
  ... Continue exception handling ...
```

If the current BB (where the `invoke` is created) has successors that
has the current BB as its PHI incoming node, now that has to change to
`tail` in the pseudocode, because `tail` is the latest BB that is
connected with the next BB, but this was missing.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D108785
2021-08-26 17:25:26 -07:00
David Blaikie
3784fc493e Remove set-but-unused variable 2021-08-26 16:58:47 -07:00
Vitaly Buka
f1bb30a495 [sanitizer] No THREADLOCAL in qsort and bsearch
qsort can reuse qsort_r if available.
bsearch always passes key as the first comparator argument, so we
can use it to wrap the original comparator.

Differential Revision: https://reviews.llvm.org/D108751
2021-08-26 16:55:06 -07:00