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Summary: Progressive lowering of vector.transpose into an operation that is closer to an intrinsic, and thus the hardware ISA. Currently under the common vector transform testing flag, as we prepare deploying this transformation in the LLVM lowering pipeline. Reviewers: nicolasvasilache, reidtatge, andydavis1, ftynse Reviewed By: nicolasvasilache, ftynse Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, llvm-commits Tags: #llvm, #mlir Differential Revision: https://reviews.llvm.org/D80772
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83 KiB