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d3f3d932ee
- Changes bit-field access policy to try to use (aligned) register sized accesses. The idea here is that by using larger accesses we expose more coalescing potential to the backend when we have situations like adjacent bit-fields in the same structure (which is common), and that the backend should be smart enough to narrow the accesses down when no coalescing is done or when it is shown not to be profitable. -- $ clang -m32 -O3 -S -o - t.c _f0: ## @f0 pushl %ebp movl %esp, %ebp movl 8(%ebp), %eax movb (%eax), %cl andb $-128, %cl orb $1, %cl movb %cl, (%eax) movb 1(%eax), %cl andb $-128, %cl orb $1, %cl movb %cl, 1(%eax) movb 2(%eax), %cl andb $-128, %cl orb $1, %cl movb %cl, 2(%eax) movb 3(%eax), %cl andb $-128, %cl orb $1, %cl movb %cl, 3(%eax) popl %ebp ret $ clang -m32 -O3 -S -o - t.c -Xclang -fuse-register-sized-bitfield-access _f0: ## @f0 pushl %ebp movl %esp, %ebp movl 8(%ebp), %eax movl $-2139062144, %ecx ## imm = 0xFFFFFFFF80808080 andl (%eax), %ecx orl $16843009, %ecx ## imm = 0x1010101 movl %ecx, (%eax) popl %ebp ret -- llvm-svn: 133532