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363dd3f394
Summary: Renamed QuantOps to Quant to avoid the Ops suffix. All dialects will contain ops, so the Ops suffix is redundant. Differential Revision: https://reviews.llvm.org/D76318
279 lines
11 KiB
C++
279 lines
11 KiB
C++
//===- FxpMathConfig.cpp - Reference fixed point config -------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines a TargetConfiguration for reference fixed-point math
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// quantization scheme based on the FxpMathOps (plus a small category of
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// extension ops that can be added from other dialects).
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Quantizer/Configurations/FxpMathConfig.h"
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#include "mlir/Dialect/FxpMathOps/FxpMathOps.h"
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#include "mlir/Dialect/Quant/QuantOps.h"
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#include "mlir/Dialect/Quant/QuantTypes.h"
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#include "mlir/Dialect/StandardOps/IR/Ops.h"
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#include "mlir/IR/Matchers.h"
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#include "mlir/IR/StandardTypes.h"
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#include "mlir/Quantizer/Support/ConstraintAnalysisGraph.h"
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#include "mlir/Quantizer/Support/Metadata.h"
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#include "mlir/Quantizer/Support/Statistics.h"
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#include "mlir/Quantizer/Support/UniformConstraints.h"
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using namespace mlir;
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using namespace mlir::quantizer;
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using namespace mlir::fxpmath;
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using namespace mlir::quant;
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using namespace std::placeholders;
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namespace {
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struct FxpMathTargetConfigImpl : public FxpMathTargetConfig {
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FxpMathTargetConfigImpl(SolverContext &context)
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: FxpMathTargetConfig(context) {
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Builder b(&context.getMlirContext());
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IntegerType i8Type = b.getIntegerType(8);
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IntegerType i16Type = b.getIntegerType(16);
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IntegerType i32Type = b.getIntegerType(32);
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q8 = addCandidateType(
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AnyQuantizedType::get(QuantizationFlags::Signed, i8Type, nullptr,
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std::numeric_limits<int8_t>::min(),
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std::numeric_limits<int8_t>::max()),
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CandidateQuantizedType::Scheme::UniformPerLayer);
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q16 = addCandidateType(
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AnyQuantizedType::get(QuantizationFlags::Signed, i16Type, nullptr,
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std::numeric_limits<int16_t>::min(),
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std::numeric_limits<int16_t>::max()),
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CandidateQuantizedType::Scheme::UniformPerLayer);
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q32ExplicitFixedPoint = addCandidateType(
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AnyQuantizedType::get(QuantizationFlags::Signed, i32Type, nullptr,
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std::numeric_limits<int32_t>::min(),
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std::numeric_limits<int32_t>::max()),
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CandidateQuantizedType::Scheme::UniformExplicitFixedPointScale);
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// Op handlers.
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addOpHandler<ConstantOp>(
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std::bind(&FxpMathTargetConfigImpl::handleConstant, this, _1, _2));
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addOpHandler<mlir::ReturnOp>(
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std::bind(&FxpMathTargetConfigImpl::handleTerminal, this, _1, _2));
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addOpHandler<quant::StatisticsOp>(
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std::bind(&FxpMathTargetConfigImpl::handleStats, this, _1, _2));
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// FxpMathOps.
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addOpHandler<RealAddEwOp>(
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std::bind(&FxpMathTargetConfigImpl::handleAdd, this, _1, _2));
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addOpHandler<RealMulEwOp>(
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std::bind(&FxpMathTargetConfigImpl::handleMul, this, _1, _2));
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addOpHandler<RealMatMulOp>(
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std::bind(&FxpMathTargetConfigImpl::handleMatMul, this, _1, _2));
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addOpHandler<RealMatMulBiasOp>(
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std::bind(&FxpMathTargetConfigImpl::handleMatMulBias, this, _1, _2));
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// Require stats ops.
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addRequireStatsOp<RealAddEwOp>();
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addRequireStatsOp<RealSubEwOp>();
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addRequireStatsOp<RealDivEwOp>();
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addRequireStatsOp<RealMulEwOp>();
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addRequireStatsOp<RealMatMulOp>();
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addRequireStatsOp<RealMatMulBiasOp>();
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}
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bool isHandledType(Type t) const final {
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if (t.isa<FloatType>())
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return true;
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return (t.isa<VectorType>() || t.isa<TensorType>()) &&
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t.cast<ShapedType>().getElementType().isa<FloatType>();
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}
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void finalizeAnchors(CAGSlice &cag) const override {
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cag.enumerateImpliedConnections(
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[&](CAGAnchorNode *from, CAGAnchorNode *to) {
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UniformConstraintsBuilder(cag).coupleAnchors(from, to);
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});
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}
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void addValueIdentityOpByName(StringRef opName) override {
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addOpHandlerByName(
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opName,
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std::bind(&FxpMathTargetConfigImpl::handleValueIdentity, this, _1, _2));
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}
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void handleValueIdentity(Operation *op, CAGSlice &cag) const {
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assert(op->getNumResults() == 1);
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if (!isHandledType(op->getResult(0).getType()))
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return;
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auto resultNode = cag.getResultAnchor(op, 0);
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resultNode->setTypeTransformRule(
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CAGAnchorNode::TypeTransformRule::DirectStorage);
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for (unsigned opIdx = 0, e = op->getNumOperands(); opIdx < e; ++opIdx) {
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if (!isHandledType(op->getOperand(opIdx).getType()))
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continue;
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auto operandNode = cag.getOperandAnchor(op, opIdx);
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operandNode->setTypeTransformRule(
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CAGAnchorNode::TypeTransformRule::DirectStorage);
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UniformConstraintsBuilder(cag).coupleAnchors(operandNode, resultNode);
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}
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}
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void handleConstant(Operation *op, CAGSlice &cag) const {
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if (!isHandledType(op->getResult(0).getType()))
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return;
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auto resultNode = cag.getResultAnchor(op, 0);
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resultNode->setTypeTransformRule(
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CAGAnchorNode::TypeTransformRule::ExpressedOnly);
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Attribute valueAttr;
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if (!matchPattern(op, m_Constant(&valueAttr))) {
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return;
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}
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AttributeTensorStatistics stats(valueAttr);
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TensorAxisStatistics layerStats;
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if (!stats.get(layerStats)) {
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op->emitOpError("could not compute statistics");
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return;
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}
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UniformConstraintsBuilder(cag).applyStats(resultNode, layerStats);
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}
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void handleTerminal(Operation *op, CAGSlice &cag) const {
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if (!isHandledType(op->getOperand(0).getType()))
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return;
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auto operandNode = cag.getOperandAnchor(op, 0);
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operandNode->setTypeTransformRule(
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CAGAnchorNode::TypeTransformRule::ExpressedOnly);
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}
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void handleStats(Operation *op, CAGSlice &cag) const {
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if (!isHandledType(op->getResult(0).getType()))
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return;
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auto argNode = cag.getOperandAnchor(op, 0);
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auto resultNode = cag.getResultAnchor(op, 0);
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UniformConstraintsBuilder(cag).coupleAnchors(argNode, resultNode);
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TensorAxisStatistics layerStats;
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auto statsOp = cast<quant::StatisticsOp>(op);
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auto layerStatsAttr = statsOp.layerStats();
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layerStats.minValue =
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layerStatsAttr.getValue<FloatAttr>(0).getValueAsDouble();
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layerStats.maxValue =
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layerStatsAttr.getValue<FloatAttr>(1).getValueAsDouble();
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UniformConstraintsBuilder(cag).applyStats(resultNode, layerStats);
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}
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void handleAdd(Operation *op, CAGSlice &cag) const {
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if (!isHandledType(op->getResult(0).getType()))
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return;
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auto lhs = cag.getOperandAnchor(op, 0);
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auto rhs = cag.getOperandAnchor(op, 1);
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auto resultNode = cag.getResultAnchor(op, 0);
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// Add supports 8/16 bit math.
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llvm::SmallBitVector disableMask =
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getCandidateTypeDisabledExceptMask({q8, q16});
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lhs->getUniformMetadata().disabledCandidateTypes = disableMask;
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rhs->getUniformMetadata().disabledCandidateTypes = disableMask;
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resultNode->getUniformMetadata().disabledCandidateTypes = disableMask;
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// NOTE: We couple the add such that the scale/zeroPoint match between
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// both args and the result. This is overly constrained in that it is
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// possible to write efficient add kernels with a bit more freedom (i.e.
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// zeroPoints can vary, scales can differ by a power of two, etc).
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// However, fully coupled yields the simples solutions on the fast path.
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// Further efficiency can be had by constraining the zeroPoint to 0, but
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// there isn't a constraint for this yet (and there are tradeoffs).
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UniformConstraintsBuilder(cag).coupleAnchors(lhs, resultNode);
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UniformConstraintsBuilder(cag).coupleAnchors(rhs, resultNode);
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addRealMathOptionalConstraints(op, resultNode, cag);
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}
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void handleMul(Operation *op, CAGSlice &cag) const {
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if (!isHandledType(op->getResult(0).getType()))
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return;
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auto lhs = cag.getOperandAnchor(op, 0);
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auto rhs = cag.getOperandAnchor(op, 1);
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auto resultNode = cag.getResultAnchor(op, 0);
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// Mul supports 8/16 bit math.
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llvm::SmallBitVector disableMask =
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getCandidateTypeDisabledExceptMask({q8, q16});
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lhs->getUniformMetadata().disabledCandidateTypes = disableMask;
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rhs->getUniformMetadata().disabledCandidateTypes = disableMask;
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resultNode->getUniformMetadata().disabledCandidateTypes = disableMask;
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addRealMathOptionalConstraints(op, resultNode, cag);
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}
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void handleMatMul(Operation *op, CAGSlice &cag) const {
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if (!isHandledType(op->getResult(0).getType()))
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return;
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auto lhs = cag.getOperandAnchor(op, 0);
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auto rhs = cag.getOperandAnchor(op, 1);
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auto resultNode = cag.getResultAnchor(op, 0);
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// Mul supports 8/16 bit math.
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llvm::SmallBitVector disableMask =
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getCandidateTypeDisabledExceptMask({q8, q16});
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lhs->getUniformMetadata().disabledCandidateTypes = disableMask;
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rhs->getUniformMetadata().disabledCandidateTypes = disableMask;
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resultNode->getUniformMetadata().disabledCandidateTypes = disableMask;
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addRealMathOptionalConstraints(op, resultNode, cag);
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}
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void handleMatMulBias(Operation *op, CAGSlice &cag) const {
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if (!isHandledType(op->getResult(0).getType()))
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return;
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auto lhs = cag.getOperandAnchor(op, 0);
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auto rhs = cag.getOperandAnchor(op, 1);
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auto bias = cag.getOperandAnchor(op, 2);
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bias->getUniformMetadata().disabledCandidateTypes =
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getCandidateTypeDisabledExceptMask({q32ExplicitFixedPoint});
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auto resultNode = cag.getResultAnchor(op, 0);
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UniformConstraintsBuilder(cag).propagateExplicitScale(resultNode, bias);
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// Mul supports 8/16 bit math.
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llvm::SmallBitVector disableMask =
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getCandidateTypeDisabledExceptMask({q8, q16});
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lhs->getUniformMetadata().disabledCandidateTypes = disableMask;
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rhs->getUniformMetadata().disabledCandidateTypes = disableMask;
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resultNode->getUniformMetadata().disabledCandidateTypes = disableMask;
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addRealMathOptionalConstraints(op, resultNode, cag);
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}
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void addRealMathOptionalConstraints(Operation *op, CAGAnchorNode *anchor,
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CAGSlice &cag) const {
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// TODO: It would be nice if these all extended some base trait instead
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// of requiring name lookup.
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auto clampMinAttr = op->getAttrOfType<FloatAttr>("clamp_min");
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auto clampMaxAttr = op->getAttrOfType<FloatAttr>("clamp_max");
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if (clampMinAttr || clampMaxAttr) {
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auto nan = APFloat::getQNaN(APFloat::IEEEdouble());
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auto clampMin = clampMinAttr ? clampMinAttr.getValue() : nan;
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auto clampMax = clampMaxAttr ? clampMaxAttr.getValue() : nan;
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UniformConstraintsBuilder(cag).clamp(anchor, clampMin, clampMax);
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}
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}
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unsigned q8;
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unsigned q16;
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unsigned q32ExplicitFixedPoint;
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};
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} // anonymous namespace
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std::unique_ptr<FxpMathTargetConfig>
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FxpMathTargetConfig::create(SolverContext &context) {
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return std::make_unique<FxpMathTargetConfigImpl>(context);
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}
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