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Bhushan D. Attarde f55a0a47cf [MIPS] Emulate microMIPS instructions

SUMMARY:
    This patch includes:

    1. Emulation of prologue/epilogue and branch instructions for microMIPS.
    2. Setting up alternate disassembler (to be used for microMIPS).
       So there will be two disassembler instances, one for microMIPS and other for MIPS.
       Appropriate disassembler will be used based on the address class of instruction address.

    3. Some of the branch instructions does not have fixed sized delay slot, that means delay slot instruction can be of 2-byte or 4-byte.
       For this "m_next_inst_size" has been introduced which stores the size of next instruction (i.e size of delay slot instruction in case of branch).
       This can be used wherever the size of next instruction is required.

    4. A minor change to use mips32 register names instead of mips64 names.
    
    Reviewers: clayborg, tberghammer
    Subscribers: mohit.bhakkad, sagar, jaydeep, nitesh.jain, lldb-commits
    Differential Revision: http://reviews.llvm.org/D13282 

llvm-svn: 249381

2015-10-06 08:52:08 +00:00

clang

Remove duplicated default arguments. NFC.

2015-10-05 21:20:19 +00:00

clang-tools-extra

Adding a checker (cert-dcl50-cpp) that detects the definition of a C-style variadic function in C++ code. Corresponds to the CERT C++ secure coding rule: https://www.securecoding.cert.org/confluence/display/cplusplus/DCL50-CPP.+Do+not+define+a+C-style+variadic+function

2015-10-05 20:08:59 +00:00

compiler-rt

builtins: fix build

2015-10-06 04:33:08 +00:00

debuginfo-tests

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