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https://github.com/linux-sunxi/u-boot-sunxi.git
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dm: ahci: Refactor to avoid static variables
With driver model we need each device to have its own state. As a step towards this, restrict use of the global 'probe_ent' to just a few places in the file. This will allow us to add driver-model functions which can pass the correct data around. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Simon Glass
@ -22,7 +22,7 @@
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#include <linux/ctype.h>
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#include <ahci.h>
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static int ata_io_flush(u8 port);
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static int ata_io_flush(struct ahci_uc_priv *uc_priv, u8 port);
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struct ahci_uc_priv *probe_ent = NULL;
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@ -165,19 +165,19 @@ int ahci_reset(void __iomem *base)
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return 0;
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}
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static int ahci_host_init(struct ahci_uc_priv *probe_ent)
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static int ahci_host_init(struct ahci_uc_priv *uc_priv)
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{
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#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
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# ifdef CONFIG_DM_PCI
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struct udevice *dev = probe_ent->dev;
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struct udevice *dev = uc_priv->dev;
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struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
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# else
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pci_dev_t pdev = probe_ent->dev;
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pci_dev_t pdev = uc_priv->dev;
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unsigned short vendor;
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# endif
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u16 tmp16;
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#endif
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void __iomem *mmio = probe_ent->mmio_base;
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void __iomem *mmio = uc_priv->mmio_base;
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u32 tmp, cap_save, cmd;
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int i, j, ret;
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void __iomem *port_mmio;
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@ -189,7 +189,7 @@ static int ahci_host_init(struct ahci_uc_priv *probe_ent)
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cap_save &= ((1 << 28) | (1 << 17));
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cap_save |= (1 << 27); /* Staggered Spin-up. Not needed. */
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ret = ahci_reset(probe_ent->mmio_base);
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ret = ahci_reset(uc_priv->mmio_base);
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if (ret)
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return ret;
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@ -216,23 +216,23 @@ static int ahci_host_init(struct ahci_uc_priv *probe_ent)
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}
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# endif
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#endif
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probe_ent->cap = readl(mmio + HOST_CAP);
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probe_ent->port_map = readl(mmio + HOST_PORTS_IMPL);
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port_map = probe_ent->port_map;
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probe_ent->n_ports = (probe_ent->cap & 0x1f) + 1;
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uc_priv->cap = readl(mmio + HOST_CAP);
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uc_priv->port_map = readl(mmio + HOST_PORTS_IMPL);
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port_map = uc_priv->port_map;
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uc_priv->n_ports = (uc_priv->cap & 0x1f) + 1;
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debug("cap 0x%x port_map 0x%x n_ports %d\n",
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probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
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uc_priv->cap, uc_priv->port_map, uc_priv->n_ports);
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if (probe_ent->n_ports > CONFIG_SYS_SCSI_MAX_SCSI_ID)
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probe_ent->n_ports = CONFIG_SYS_SCSI_MAX_SCSI_ID;
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if (uc_priv->n_ports > CONFIG_SYS_SCSI_MAX_SCSI_ID)
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uc_priv->n_ports = CONFIG_SYS_SCSI_MAX_SCSI_ID;
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for (i = 0; i < probe_ent->n_ports; i++) {
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for (i = 0; i < uc_priv->n_ports; i++) {
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if (!(port_map & (1 << i)))
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continue;
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probe_ent->port[i].port_mmio = ahci_port_base(mmio, i);
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port_mmio = (u8 *) probe_ent->port[i].port_mmio;
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ahci_setup_port(&probe_ent->port[i], mmio, i);
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uc_priv->port[i].port_mmio = ahci_port_base(mmio, i);
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port_mmio = (u8 *)uc_priv->port[i].port_mmio;
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ahci_setup_port(&uc_priv->port[i], mmio, i);
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/* make sure port is not active */
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tmp = readl(port_mmio + PORT_CMD);
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@ -261,7 +261,7 @@ static int ahci_host_init(struct ahci_uc_priv *probe_ent)
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writel_with_flush(cmd, port_mmio + PORT_CMD);
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/* Bring up SATA link. */
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ret = ahci_link_up(probe_ent, i);
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ret = ahci_link_up(uc_priv, i);
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if (ret) {
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printf("SATA link %d timeout.\n", i);
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continue;
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@ -318,7 +318,7 @@ static int ahci_host_init(struct ahci_uc_priv *probe_ent)
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tmp = readl(port_mmio + PORT_SCR_STAT);
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debug("SATA port %d status: 0x%x\n", i, tmp);
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if ((tmp & PORT_SCR_STAT_DET_MASK) == PORT_SCR_STAT_DET_PHYRDY)
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probe_ent->link_port_map |= (0x01 << i);
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uc_priv->link_port_map |= (0x01 << i);
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}
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tmp = readl(mmio + HOST_CTL);
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@ -343,25 +343,25 @@ static int ahci_host_init(struct ahci_uc_priv *probe_ent)
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}
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static void ahci_print_info(struct ahci_uc_priv *probe_ent)
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static void ahci_print_info(struct ahci_uc_priv *uc_priv)
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{
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#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
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# if defined(CONFIG_DM_PCI)
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struct udevice *dev = probe_ent->dev;
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struct udevice *dev = uc_priv->dev;
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# else
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pci_dev_t pdev = probe_ent->dev;
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pci_dev_t pdev = uc_priv->dev;
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# endif
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u16 cc;
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#endif
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void __iomem *mmio = probe_ent->mmio_base;
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void __iomem *mmio = uc_priv->mmio_base;
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u32 vers, cap, cap2, impl, speed;
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const char *speed_s;
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const char *scc_s;
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vers = readl(mmio + HOST_VERSION);
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cap = probe_ent->cap;
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cap = uc_priv->cap;
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cap2 = readl(mmio + HOST_CAP2);
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impl = probe_ent->port_map;
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impl = uc_priv->port_map;
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speed = (cap >> 20) & 0xf;
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if (speed == 1)
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@ -431,6 +431,7 @@ static int ahci_init_one(struct udevice *dev)
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static int ahci_init_one(pci_dev_t dev)
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# endif
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{
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struct ahci_uc_priv *uc_priv;
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#if !defined(CONFIG_DM_SCSI)
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u16 vendor;
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#endif
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@ -438,24 +439,25 @@ static int ahci_init_one(pci_dev_t dev)
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probe_ent = malloc(sizeof(struct ahci_uc_priv));
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if (!probe_ent) {
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printf("%s: No memory for probe_ent\n", __func__);
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printf("%s: No memory for uc_priv\n", __func__);
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return -ENOMEM;
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}
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memset(probe_ent, 0, sizeof(struct ahci_uc_priv));
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probe_ent->dev = dev;
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uc_priv = probe_ent;
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memset(uc_priv, 0, sizeof(struct ahci_uc_priv));
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uc_priv->dev = dev;
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probe_ent->host_flags = ATA_FLAG_SATA
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uc_priv->host_flags = ATA_FLAG_SATA
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| ATA_FLAG_NO_LEGACY
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| ATA_FLAG_MMIO
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| ATA_FLAG_PIO_DMA
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| ATA_FLAG_NO_ATAPI;
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probe_ent->pio_mask = 0x1f;
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probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
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uc_priv->pio_mask = 0x1f;
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uc_priv->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
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#if !defined(CONFIG_DM_SCSI)
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#ifdef CONFIG_DM_PCI
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probe_ent->mmio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_5,
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uc_priv->mmio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_5,
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PCI_REGION_MEM);
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/* Take from kernel:
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@ -466,7 +468,7 @@ static int ahci_init_one(pci_dev_t dev)
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if (vendor == 0x197b)
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dm_pci_write_config8(dev, 0x41, 0xa1);
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#else
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probe_ent->mmio_base = pci_map_bar(dev, PCI_BASE_ADDRESS_5,
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uc_priv->mmio_base = pci_map_bar(dev, PCI_BASE_ADDRESS_5,
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PCI_REGION_MEM);
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/* Take from kernel:
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@ -479,16 +481,16 @@ static int ahci_init_one(pci_dev_t dev)
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#endif
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#else
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struct scsi_platdata *plat = dev_get_uclass_platdata(dev);
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probe_ent->mmio_base = (void *)plat->base;
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uc_priv->mmio_base = (void *)plat->base;
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#endif
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debug("ahci mmio_base=0x%p\n", probe_ent->mmio_base);
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debug("ahci mmio_base=0x%p\n", uc_priv->mmio_base);
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/* initialize adapter */
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rc = ahci_host_init(probe_ent);
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rc = ahci_host_init(uc_priv);
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if (rc)
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goto err_out;
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ahci_print_info(probe_ent);
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ahci_print_info(uc_priv);
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return 0;
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@ -499,9 +501,10 @@ static int ahci_init_one(pci_dev_t dev)
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#define MAX_DATA_BYTE_COUNT (4*1024*1024)
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static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
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static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 port,
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unsigned char *buf, int buf_len)
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{
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struct ahci_ioports *pp = &(probe_ent->port[port]);
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struct ahci_ioports *pp = &(uc_priv->port[port]);
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struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
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u32 sg_count;
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int i;
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@ -554,9 +557,9 @@ static int wait_spinup(void __iomem *port_mmio)
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return -ETIMEDOUT;
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}
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static int ahci_port_start(struct ahci_uc_priv *probe_ent, u8 port)
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static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
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{
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struct ahci_ioports *pp = &(probe_ent->port[port]);
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struct ahci_ioports *pp = &(uc_priv->port[port]);
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void __iomem *port_mmio = pp->port_mmio;
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u32 port_status;
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void __iomem *mem;
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@ -629,11 +632,11 @@ static int ahci_port_start(struct ahci_uc_priv *probe_ent, u8 port)
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}
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static int ahci_device_data_io(u8 port, u8 *fis, int fis_len, u8 *buf,
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int buf_len, u8 is_write)
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static int ahci_device_data_io(struct ahci_uc_priv *uc_priv, u8 port, u8 *fis,
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int fis_len, u8 *buf, int buf_len, u8 is_write)
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{
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struct ahci_ioports *pp = &(probe_ent->port[port]);
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struct ahci_ioports *pp = &(uc_priv->port[port]);
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void __iomem *port_mmio = pp->port_mmio;
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u32 opts;
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u32 port_status;
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@ -641,7 +644,7 @@ static int ahci_device_data_io(u8 port, u8 *fis, int fis_len, u8 *buf,
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debug("Enter %s: for port %d\n", __func__, port);
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if (port > probe_ent->n_ports) {
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if (port > uc_priv->n_ports) {
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printf("Invalid port number %d\n", port);
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return -1;
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}
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@ -654,7 +657,7 @@ static int ahci_device_data_io(u8 port, u8 *fis, int fis_len, u8 *buf,
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memcpy((unsigned char *)pp->cmd_tbl, fis, fis_len);
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sg_count = ahci_fill_sg(port, buf, buf_len);
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sg_count = ahci_fill_sg(uc_priv, port, buf, buf_len);
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opts = (fis_len >> 2) | (sg_count << 16) | (is_write << 6);
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ahci_fill_cmd_slot(pp, opts);
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@ -720,8 +723,8 @@ static int ata_scsiop_inquiry(struct ahci_uc_priv *uc_priv,
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/* Read id from sata */
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port = pccb->target;
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if (ahci_device_data_io(port, (u8 *) &fis, sizeof(fis), (u8 *)tmpid,
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ATA_ID_WORDS * 2, 0)) {
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if (ahci_device_data_io(uc_priv, port, (u8 *)&fis, sizeof(fis),
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(u8 *)tmpid, ATA_ID_WORDS * 2, 0)) {
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debug("scsi_ahci: SCSI inquiry command failure.\n");
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return -EIO;
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}
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@ -753,7 +756,8 @@ static int ata_scsiop_inquiry(struct ahci_uc_priv *uc_priv,
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/*
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* SCSI READ10/WRITE10 command operation.
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*/
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static int ata_scsiop_read_write(struct scsi_cmd *pccb, u8 is_write)
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static int ata_scsiop_read_write(struct ahci_uc_priv *uc_priv,
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struct scsi_cmd *pccb, u8 is_write)
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{
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lbaint_t lba = 0;
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u16 blocks = 0;
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@ -833,8 +837,8 @@ static int ata_scsiop_read_write(struct scsi_cmd *pccb, u8 is_write)
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fis[13] = (now_blocks >> 8) & 0xff;
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/* Read/Write from ahci */
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if (ahci_device_data_io(pccb->target, (u8 *) &fis, sizeof(fis),
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user_buffer, transfer_size,
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if (ahci_device_data_io(uc_priv, pccb->target, (u8 *)&fis,
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sizeof(fis), user_buffer, transfer_size,
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is_write)) {
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debug("scsi_ahci: SCSI %s10 command failure.\n",
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is_write ? "WRITE" : "READ");
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@ -848,7 +852,7 @@ static int ata_scsiop_read_write(struct scsi_cmd *pccb, u8 is_write)
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* usually, one extra flush when the rare writes do happen.
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*/
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if (is_write) {
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if (-EIO == ata_io_flush(pccb->target))
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if (-EIO == ata_io_flush(uc_priv, pccb->target))
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return -EIO;
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}
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user_buffer += transfer_size;
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@ -937,10 +941,10 @@ int scsi_exec(struct scsi_cmd *pccb)
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switch (pccb->cmd[0]) {
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case SCSI_READ16:
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case SCSI_READ10:
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ret = ata_scsiop_read_write(pccb, 0);
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ret = ata_scsiop_read_write(uc_priv, pccb, 0);
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break;
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case SCSI_WRITE10:
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ret = ata_scsiop_read_write(pccb, 1);
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ret = ata_scsiop_read_write(uc_priv, pccb, 1);
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break;
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case SCSI_RD_CAPAC10:
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ret = ata_scsiop_read_capacity10(uc_priv, pccb);
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@ -973,6 +977,7 @@ void scsi_low_level_init(int busdevfunc, struct udevice *dev)
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void scsi_low_level_init(int busdevfunc)
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#endif
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{
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struct ahci_uc_priv *uc_priv;
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int i;
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u32 linkmap;
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@ -991,12 +996,13 @@ void scsi_low_level_init(int busdevfunc)
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ahci_init_one(busdevfunc);
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# endif
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#endif
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uc_priv = probe_ent;
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linkmap = probe_ent->link_port_map;
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linkmap = uc_priv->link_port_map;
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for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
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if (((linkmap >> i) & 0x01)) {
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if (ahci_port_start(probe_ent, (u8) i)) {
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if (ahci_port_start(uc_priv, (u8) i)) {
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printf("Can not start port %d\n", i);
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continue;
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}
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@ -1007,39 +1013,41 @@ void scsi_low_level_init(int busdevfunc)
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#ifdef CONFIG_SCSI_AHCI_PLAT
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int ahci_init(void __iomem *base)
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{
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struct ahci_uc_priv *uc_priv;
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int i, rc = 0;
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u32 linkmap;
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probe_ent = malloc(sizeof(struct ahci_uc_priv));
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if (!probe_ent) {
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printf("%s: No memory for probe_ent\n", __func__);
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printf("%s: No memory for uc_priv\n", __func__);
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return -ENOMEM;
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}
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memset(probe_ent, 0, sizeof(struct ahci_uc_priv));
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uc_priv = probe_ent;
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memset(uc_priv, 0, sizeof(struct ahci_uc_priv));
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probe_ent->host_flags = ATA_FLAG_SATA
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uc_priv->host_flags = ATA_FLAG_SATA
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| ATA_FLAG_NO_LEGACY
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| ATA_FLAG_MMIO
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| ATA_FLAG_PIO_DMA
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| ATA_FLAG_NO_ATAPI;
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probe_ent->pio_mask = 0x1f;
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probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
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uc_priv->pio_mask = 0x1f;
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uc_priv->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
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probe_ent->mmio_base = base;
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uc_priv->mmio_base = base;
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/* initialize adapter */
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rc = ahci_host_init(probe_ent);
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rc = ahci_host_init(uc_priv);
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if (rc)
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goto err_out;
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ahci_print_info(probe_ent);
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ahci_print_info(uc_priv);
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linkmap = probe_ent->link_port_map;
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linkmap = uc_priv->link_port_map;
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for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
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if (((linkmap >> i) & 0x01)) {
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if (ahci_port_start(probe_ent, (u8) i)) {
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if (ahci_port_start(uc_priv, (u8) i)) {
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printf("Can not start port %d\n", i);
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||||
continue;
|
||||
}
|
||||
@ -1064,10 +1072,10 @@ void __weak scsi_init(void)
|
||||
* is the last write is difficult. Because writing to the disk in u-boot is
|
||||
* very rare, this flush command will be invoked after every block write.
|
||||
*/
|
||||
static int ata_io_flush(u8 port)
|
||||
static int ata_io_flush(struct ahci_uc_priv *uc_priv, u8 port)
|
||||
{
|
||||
u8 fis[20];
|
||||
struct ahci_ioports *pp = &(probe_ent->port[port]);
|
||||
struct ahci_ioports *pp = &(uc_priv->port[port]);
|
||||
void __iomem *port_mmio = pp->port_mmio;
|
||||
u32 cmd_fis_len = 5; /* five dwords */
|
||||
|
||||
|
||||
Reference in New Issue
Block a user