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Merge branch 'master' of git://git.denx.de/u-boot into sunxi

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This commit is contained in:
Henrik Nordstrom
2013-08-21 22:24:14 +02:00
parent 7a63a68828 3fb8588912
commit f9b2df3ea3
36 changed files with 166 additions and 1477 deletions
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1
MAINTAINERS
View File

@ -184,7 +184,6 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
APC405 PPC405GP
AR405 PPC405GP
ASH405 PPC405EP
CANBT PPC405CR
CPCI2DP PPC405GP
CPCI405 PPC405GP
CPCI4052 PPC405GP

19
Makefile
View File

@ -624,6 +624,7 @@ updater:
# Explicitly make _depend in subdirs containing multiple targets to prevent
# parallel sub-makes creating .depend files simultaneously.
depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) \
$(obj)include/spl-autoconf.mk \
$(obj)include/autoconf.mk \
$(obj)include/generated/generic-asm-offsets.h \
$(obj)include/generated/asm-offsets.h
@ -705,12 +706,23 @@ $(obj)include/autoconf.mk: $(obj)include/config.h
sed -n -f tools/scripts/define2mk.sed > $@.tmp && \
mv $@.tmp $@
# Auto-generate the spl-autoconf.mk file (which is included by all makefiles for SPL)
$(obj)include/spl-autoconf.mk: $(obj)include/config.h
@$(XECHO) Generating $@ ; \
set -e ; \
: Extract the config macros ; \
$(CPP) $(CFLAGS) -DCONFIG_SPL_BUILD -DDO_DEPS_ONLY -dM include/common.h | \
sed -n -f tools/scripts/define2mk.sed > $@.tmp && \
mv $@.tmp $@
$(obj)include/generated/generic-asm-offsets.h: $(obj)include/autoconf.mk.dep \
$(obj)include/spl-autoconf.mk \
$(obj)lib/asm-offsets.s
@$(XECHO) Generating $@
tools/scripts/make-asm-offsets $(obj)lib/asm-offsets.s $@
$(obj)lib/asm-offsets.s: $(obj)include/autoconf.mk.dep \
$(obj)include/spl-autoconf.mk \
$(src)lib/asm-offsets.c
@mkdir -p $(obj)lib
$(CC) -DDO_DEPS_ONLY \
@ -718,11 +730,13 @@ $(obj)lib/asm-offsets.s: $(obj)include/autoconf.mk.dep \
-o $@ $(src)lib/asm-offsets.c -c -S
$(obj)include/generated/asm-offsets.h: $(obj)include/autoconf.mk.dep \
$(obj)include/spl-autoconf.mk \
$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
@$(XECHO) Generating $@
tools/scripts/make-asm-offsets $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s $@
$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s: $(obj)include/autoconf.mk.dep
$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s: $(obj)include/autoconf.mk.dep \
$(obj)include/spl-autoconf.mk
@mkdir -p $(obj)$(CPUDIR)/$(SOC)
if [ -f $(src)$(CPUDIR)/$(SOC)/asm-offsets.c ];then \
$(CC) -DDO_DEPS_ONLY \
@ -794,7 +808,8 @@ include/license.h: tools/bin2header COPYING
unconfig:
@rm -f $(obj)include/config.h $(obj)include/config.mk \
$(obj)board/*/config.tmp $(obj)board/*/*/config.tmp \
$(obj)include/autoconf.mk $(obj)include/autoconf.mk.dep
$(obj)include/autoconf.mk $(obj)include/autoconf.mk.dep \
$(obj)include/spl-autoconf.mk
%_config:: unconfig
@$(MKCONFIG) -A $(@:_config=)

5
arch/powerpc/cpu/mpc85xx/cmd_errata.c
View File

@ -247,6 +247,11 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A005812
puts("Work-around for Erratum A-005812 enabled\n");
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447
if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) ||
(SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV))
puts("Work-around for Erratum I2C-A004447 enabled\n");
#endif
return 0;
}

10
arch/powerpc/cpu/ppc4xx/4xx_uart.c
View File

@ -17,7 +17,7 @@
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
#if defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
defined(CONFIG_405EX) || defined(CONFIG_440)
@ -68,7 +68,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define UDIV_SUBTRACT 0
#define UART0_SDR SDR0_UART0
#define UART1_SDR SDR0_UART1
#else /* CONFIG_405GP || CONFIG_405CR */
#else /* CONFIG_405GP */
#define CR0_MASK 0x00001fff
#define CR0_EXTCLK_ENA 0x000000c0
#define CR0_UDIV_POS 1
@ -173,7 +173,7 @@ int get_serial_clock(void)
* Let's handle this in some #ifdef's for the SoC's.
*/
#if defined(CONFIG_405CR) || defined(CONFIG_405GP)
#if defined(CONFIG_405GP)
reg = mfdcr(CPC0_CR0) & ~CR0_MASK;
#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
@ -200,7 +200,7 @@ int get_serial_clock(void)
#else
clk = CONFIG_SYS_BASE_BAUD * 16;
#endif
#endif /* CONFIG_405CR */
#endif
#if defined(CONFIG_405EP)
{
@ -265,4 +265,4 @@ int get_serial_clock(void)
return clk;
}
#endif /* CONFIG_405GP || CONFIG_405CR */
#endif /* CONFIG_405GP */

18
arch/powerpc/cpu/ppc4xx/cpu.c
View File

@ -320,25 +320,9 @@ int checkcpu (void)
puts("405GP Rev. D");
break;
#ifdef CONFIG_405GP
case PVR_405GP_RE: /* 405GP rev E and 405CR rev C have same PVR */
case PVR_405GP_RE:
puts("405GP Rev. E");
break;
#endif
case PVR_405CR_RA:
puts("405CR Rev. A");
break;
case PVR_405CR_RB:
puts("405CR Rev. B");
break;
#ifdef CONFIG_405CR
case PVR_405CR_RC: /* 405GP rev E and 405CR rev C have same PVR */
puts("405CR Rev. C");
break;
#endif
case PVR_405GPR_RB:
puts("405GPr Rev. B");

2
arch/powerpc/cpu/ppc4xx/cpu_init.c
View File

@ -326,7 +326,7 @@ cpu_init_f (void)
* External Bus Controller (EBC) Setup
*/
#if (defined(CONFIG_SYS_EBC_PB0AP) && defined(CONFIG_SYS_EBC_PB0CR))
#if (defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
#if (defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
defined(CONFIG_405EX) || defined(CONFIG_405))
/*

4
arch/powerpc/cpu/ppc4xx/speed.c
View File

@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#if defined(CONFIG_405GP) || defined(CONFIG_405CR)
#if defined(CONFIG_405GP)
void get_sys_info (PPC4xx_SYS_INFO * sysInfo)
{
@ -1184,7 +1184,7 @@ ulong get_bus_freq (ulong dummy)
{
ulong val;
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
#if defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
defined(CONFIG_405EX) || defined(CONFIG_405) || \
defined(CONFIG_440)

4
arch/powerpc/cpu/ppc4xx/start.S
View File

@ -794,7 +794,7 @@ _start:
#endif /* CONFIG_440 */
/*****************************************************************************/
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
#if defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
defined(CONFIG_405EX) || defined(CONFIG_405)
/*----------------------------------------------------------------------- */
@ -1064,7 +1064,7 @@ _start:
#endif /* CONFIG_NAND_SPL */
#endif /* CONFIG_405GP || CONFIG_405CR || CONFIG_405 || CONFIG_405EP */
#endif /* CONFIG_405GP || CONFIG_405 || CONFIG_405EP */
/*----------------------------------------------------------------------- */

16
arch/powerpc/include/asm/config_mpc85xx.h
View File

@ -67,6 +67,8 @@
#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
#define CONFIG_SYS_FSL_RMU
#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x00
#elif defined(CONFIG_MPC8555)
#define CONFIG_MAX_CPUS 1
@ -132,6 +134,8 @@
#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
#define CONFIG_SYS_FSL_ERRATUM_P1010_A003549
#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
/* P1011 is single core version of P1020 */
#elif defined(CONFIG_P1011)
@ -249,6 +253,8 @@
#define CONFIG_SYS_FM_MURAM_SIZE 0x10000
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff600000
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
/* P1024 is lower end variant of P1020 */
#elif defined(CONFIG_P1024)
@ -334,6 +340,8 @@
#define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
#define CONFIG_SYS_FSL_ERRATUM_A004849
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
#elif defined(CONFIG_PPC_P3041)
#define CONFIG_SYS_FSL_QORIQ_CHASSIS1
@ -369,6 +377,8 @@
#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
#define CONFIG_SYS_FSL_ERRATUM_A004849
#define CONFIG_SYS_FSL_ERRATUM_A005812
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x20
#elif defined(CONFIG_PPC_P4080) /* also supports P4040 */
#define CONFIG_SYS_FSL_QORIQ_CHASSIS1
@ -415,6 +425,8 @@
#define CONFIG_SYS_FSL_ERRATUM_A004580
#define CONFIG_SYS_P4080_ERRATUM_PCIE_A003
#define CONFIG_SYS_FSL_ERRATUM_A005812
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x20
#elif defined(CONFIG_PPC_P5020) /* also supports P5010 */
#define CONFIG_SYS_PPC64 /* 64-bit core */
@ -446,6 +458,8 @@
#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10
#define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xc0000000
#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x20
#elif defined(CONFIG_PPC_P5040)
#define CONFIG_SYS_PPC64
@ -510,6 +524,8 @@
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
#elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160)
#define CONFIG_E6500

1
arch/powerpc/include/asm/fsl_i2c.h
View File

@ -54,6 +54,7 @@ typedef struct fsl_i2c {
#define I2C_CR_MTX 0x10
#define I2C_CR_TXAK 0x08
#define I2C_CR_RSTA 0x04
#define I2C_CR_BIT6 0x02 /* required for workaround A004447 */
#define I2C_CR_BCST 0x01
u8 sr; /* I2C status register */

92
arch/powerpc/include/asm/ppc405cr.h
View File

@ -1,92 +0,0 @@
/*
* (C) Copyright 2010
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _PPC405CR_H_
#define _PPC405CR_H_
#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM /* IBM SDRAM controller */
/* Memory mapped register */
#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* Internal Peripherals */
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
/* DCR's */
#define DCP0_CFGADDR 0x0014 /* Decompression controller addr reg */
#define DCP0_CFGDATA 0x0015 /* Decompression controller data reg */
#define OCM0_ISCNTL 0x0019 /* OCM I-side control reg */
#define OCM0_DSARC 0x001a /* OCM D-side address compare */
#define OCM0_DSCNTL 0x001b /* OCM D-side control */
#define CPC0_PLLMR 0x00b0 /* PLL mode register */
#define CPC0_CR0 0x00b1 /* chip control register 0 */
#define CPC0_CR1 0x00b2 /* chip control register 1 */
#define CPC0_PSR 0x00b4 /* chip pin strapping reg */
#define CPC0_EIRR 0x00b6 /* ext interrupt routing reg */
#define CPC0_SR 0x00b8 /* Power management status */
#define CPC0_ER 0x00b9 /* Power management enable */
#define CPC0_FR 0x00ba /* Power management force */
#define CPC0_ECR 0x00aa /* edge conditioner register */
#define PLLMR_FWD_DIV_MASK 0xE0000000 /* Forward Divisor */
#define PLLMR_FWD_DIV_BYPASS 0xE0000000
#define PLLMR_FWD_DIV_3 0xA0000000
#define PLLMR_FWD_DIV_4 0x80000000
#define PLLMR_FWD_DIV_6 0x40000000
#define PLLMR_FB_DIV_MASK 0x1E000000 /* Feedback Divisor */
#define PLLMR_FB_DIV_1 0x02000000
#define PLLMR_FB_DIV_2 0x04000000
#define PLLMR_FB_DIV_3 0x06000000
#define PLLMR_FB_DIV_4 0x08000000
#define PLLMR_TUNING_MASK 0x01F80000
#define PLLMR_CPU_TO_PLB_MASK 0x00060000 /* CPU:PLB Frequency Divisor */
#define PLLMR_CPU_PLB_DIV_1 0x00000000
#define PLLMR_CPU_PLB_DIV_2 0x00020000
#define PLLMR_CPU_PLB_DIV_3 0x00040000
#define PLLMR_CPU_PLB_DIV_4 0x00060000
#define PLLMR_OPB_TO_PLB_MASK 0x00018000 /* OPB:PLB Frequency Divisor */
#define PLLMR_OPB_PLB_DIV_1 0x00000000
#define PLLMR_OPB_PLB_DIV_2 0x00008000
#define PLLMR_OPB_PLB_DIV_3 0x00010000
#define PLLMR_OPB_PLB_DIV_4 0x00018000
#define PLLMR_PCI_TO_PLB_MASK 0x00006000 /* PCI:PLB Frequency Divisor */
#define PLLMR_PCI_PLB_DIV_1 0x00000000
#define PLLMR_PCI_PLB_DIV_2 0x00002000
#define PLLMR_PCI_PLB_DIV_3 0x00004000
#define PLLMR_PCI_PLB_DIV_4 0x00006000
#define PLLMR_EXB_TO_PLB_MASK 0x00001800 /* External Bus:PLB Divisor */
#define PLLMR_EXB_PLB_DIV_2 0x00000000
#define PLLMR_EXB_PLB_DIV_3 0x00000800
#define PLLMR_EXB_PLB_DIV_4 0x00001000
#define PLLMR_EXB_PLB_DIV_5 0x00001800
/* definitions for PPC405GPr (new mode strapping) */
#define PLLMR_FWDB_DIV_MASK 0x00000007 /* Forward Divisor B */
#define PSR_PLL_FWD_MASK 0xC0000000
#define PSR_PLL_FDBACK_MASK 0x30000000
#define PSR_PLL_TUNING_MASK 0x0E000000
#define PSR_PLB_CPU_MASK 0x01800000
#define PSR_OPB_PLB_MASK 0x00600000
#define PSR_PCI_PLB_MASK 0x00180000
#define PSR_EB_PLB_MASK 0x00060000
#define PSR_ROM_WIDTH_MASK 0x00018000
#define PSR_ROM_LOC 0x00004000
#define PSR_PCI_ASYNC_EN 0x00001000
#define PSR_PERCLK_SYNC_MODE_EN 0x00000800 /* PPC405GPr only */
#define PSR_PCI_ARBIT_EN 0x00000400
#define PSR_NEW_MODE_EN 0x00000020 /* PPC405GPr only */
#endif /* _PPC405CR_H_ */

6
arch/powerpc/include/asm/ppc4xx-ebc.h
View File

@ -14,12 +14,12 @@
* Within this group there is a slight variation concerning the bit field
* position of the EMPL and EMPH fields:
*/
#if defined(CONFIG_405CR) || defined(CONFIG_405GP) || \
#if defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || \
defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
#define CONFIG_EBC_PPC4xx_IBM_VER1
#if defined(CONFIG_405CR) || defined(CONFIG_405GP) || \
#if defined(CONFIG_405GP) || \
defined(CONFIG_405EP)
#define EBC_CFG_EMPH_POS 8
#define EBC_CFG_EMPL_POS 6
@ -32,7 +32,7 @@
/*
* Define the max number of EBC banks (chip selects)
*/
#if defined(CONFIG_405CR) || defined(CONFIG_405GP) || \
#if defined(CONFIG_405GP) || \
defined(CONFIG_405EZ) || \
defined(CONFIG_440GP) || defined(CONFIG_440GX)
#define EBC_NUM_BANKS 8

4
arch/powerpc/include/asm/ppc4xx.h
View File

@ -8,10 +8,6 @@
/*
* Include SoC specific headers
*/
#if defined(CONFIG_405CR)
#include <asm/ppc405cr.h>
#endif
#if defined(CONFIG_405EP)
#include <asm/ppc405ep.h>
#endif

8
arch/powerpc/include/asm/processor.h
View File

@ -847,7 +847,7 @@
/* System-On-Chip Version Register (SVR) field extraction */
#define SVR_VER(svr) (((svr) >> 16) & 0xFFFF) /* Version field */
#define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revision field */
#define SVR_REV(svr) (((svr) >> 0) & 0xFF) /* Revision field */
#define SVR_CID(svr) (((svr) >> 28) & 0x0F) /* Company or manufacturer ID */
#define SVR_SOCOP(svr) (((svr) >> 22) & 0x3F) /* SOC integration options */
@ -894,9 +894,6 @@
#define PVR_405GP_RC 0x40110082
#define PVR_405GP_RD 0x401100C4
#define PVR_405GP_RE 0x40110145 /* same as pc405cr rev c */
#define PVR_405CR_RA 0x40110041
#define PVR_405CR_RB 0x401100C5
#define PVR_405CR_RC 0x40110145 /* same as pc405gp rev e */
#define PVR_405EP_RA 0x51210950
#define PVR_405GPR_RB 0x50910951
#define PVR_405EZ_RA 0x41511460
@ -1043,9 +1040,6 @@
/* System Version Register (SVR) field extraction */
#define SVR_VER(svr) (((svr) >> 16) & 0xFFFF) /* Version field */
#define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revison field */
#define SVR_SUBVER(svr) (((svr) >> 8) & 0xFF) /* Process/MFG sub-version */
#define SVR_FAM(svr) (((svr) >> 20) & 0xFFF) /* Family field */

1
arch/powerpc/include/asm/u-boot.h
View File

@ -67,7 +67,6 @@ typedef struct bd_info {
unsigned int bi_baudrate; /* Console Baudrate */
#if defined(CONFIG_405) || \
defined(CONFIG_405GP) || \
defined(CONFIG_405CR) || \
defined(CONFIG_405EP) || \
defined(CONFIG_405EZ) || \
defined(CONFIG_405EX) || \

31
board/esd/canbt/Makefile
View File

@ -1,31 +0,0 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
LIB = $(obj)lib$(BOARD).o
COBJS = $(BOARD).o flash.o ../common/misc.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

164
board/esd/canbt/canbt.c
View File

@ -1,164 +0,0 @@
/*
* (C) Copyright 2001
* Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include "canbt.h"
#include <asm/processor.h>
#include <asm/io.h>
#include <command.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
#if 0
#define FPGA_DEBUG
#endif
/* fpga configuration data */
const unsigned char fpgadata[] = {
#include "fpgadata.c"
};
/*
* include common fpga code (for esd boards)
*/
#include "../common/fpga.c"
int board_early_init_f (void)
{
unsigned long CPC0_CR0Reg;
int index, len, i;
int status;
/*
* Setup GPIO pins
*/
CPC0_CR0Reg = mfdcr (CPC0_CR0) & 0xf0001fff;
CPC0_CR0Reg |= 0x0070f000;
mtdcr (CPC0_CR0, CPC0_CR0Reg);
#ifdef FPGA_DEBUG
/* set up serial port with default baudrate */
(void) get_clocks ();
gd->baudrate = CONFIG_BAUDRATE;
serial_init ();
console_init_f ();
#endif
/*
* Boot onboard FPGA
*/
status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
if (status != 0) {
/* booting FPGA failed */
#ifndef FPGA_DEBUG
/* set up serial port with default baudrate */
(void) get_clocks ();
gd->baudrate = CONFIG_BAUDRATE;
serial_init ();
console_init_f ();
#endif
printf ("\nFPGA: Booting failed ");
switch (status) {
case ERROR_FPGA_PRG_INIT_LOW:
printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
break;
case ERROR_FPGA_PRG_INIT_HIGH:
printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
break;
case ERROR_FPGA_PRG_DONE:
printf ("(Timeout: DONE not high after programming FPGA)\n ");
break;
}
/* display infos on fpgaimage */
index = 15;
for (i = 0; i < 4; i++) {
len = fpgadata[index];
printf ("FPGA: %s\n", &(fpgadata[index + 1]));
index += len + 3;
}
putc ('\n');
/* delayed reboot */
for (i = 20; i > 0; i--) {
printf ("Rebooting in %2d seconds \r", i);
for (index = 0; index < 1000; index++)
udelay (1000);
}
putc ('\n');
do_reset (NULL, 0, 0, NULL);
}
/*
* Setup port pins for normal operation
*/
out_be32 ((void *)GPIO0_ODR, 0x00000000); /* no open drain pins */
out_be32 ((void *)GPIO0_TCR, 0x07038100); /* setup for output */
out_be32 ((void *)GPIO0_OR, 0x07030100); /* set output pins to high (default) */
/*
* IRQ 0-15 405GP internally generated; active high; level sensitive
* IRQ 16 405GP internally generated; active low; level sensitive
* IRQ 17-24 RESERVED
* IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
* IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
* IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
* IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
* IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
* IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
* IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
*/
mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
mtdcr (UIC0ER, 0x00000000); /* disable all ints */
mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */
mtdcr (UIC0PR, 0xFFFFFF81); /* set int polarities */
mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
return 0;
}
/* ------------------------------------------------------------------------- */
/*
* Check Board Identity:
*/
int checkboard (void)
{
int index;
int len;
char str[64];
int i = getenv_f("serial#", str, sizeof (str));
puts ("Board: ");
if (!i || strncmp (str, "CANBT", 5)) {
puts ("### No HW ID - assuming CANBT\n");
return (0);
}
puts (str);
puts ("\nFPGA: ");
/* display infos on fpgaimage */
index = 15;
for (i = 0; i < 4; i++) {
len = fpgadata[index];
printf ("%s ", &(fpgadata[index + 1]));
index += len + 3;
}
putc ('\n');
return 0;
}

28
board/esd/canbt/canbt.h
View File

@ -1,28 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/****************************************************************************
* FLASH Memory Map as used by TQ Monitor:
*
* Start Address Length
* +-----------------------+ 0x4000_0000 Start of Flash -----------------
* | MON8xx code | 0x4000_0100 Reset Vector
* +-----------------------+ 0x400?_????
* | (unused) |
* +-----------------------+ 0x4001_FF00
* | Ethernet Addresses | 0x78
* +-----------------------+ 0x4001_FF78
* | (Reserved for MON8xx) | 0x44
* +-----------------------+ 0x4001_FFBC
* | Lock Address | 0x04
* +-----------------------+ 0x4001_FFC0 ^
* | Hardware Information | 0x40 | MON8xx
* +=======================+ 0x4002_0000 (sector border) -----------------
* | Autostart Header | | Applications
* | ... | v
*
*****************************************************************************/

68
board/esd/canbt/flash.c
View File

@ -1,68 +0,0 @@
/*
* (C) Copyright 2001
* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/ppc4xx.h>
#include <asm/processor.h>
/*
* include common flash code (for esd boards)
*/
#include "../common/flash.c"
/*-----------------------------------------------------------------------
* Functions
*/
static ulong flash_get_size (vu_long *addr, flash_info_t *info);
static void flash_get_offsets (ulong base, flash_info_t *info);
/*-----------------------------------------------------------------------
*/
unsigned long flash_init (void)
{
unsigned long size_b0;
int i;
uint pbcr;
unsigned long base_b0;
/* Init: no FLASHes known */
for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here - FIXME XXX */
size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0<<20);
}
/* Setup offsets */
flash_get_offsets (-size_b0, &flash_info[0]);
/* Re-do sizing to get full correct info */
mtdcr(EBC0_CFGADDR, PB0CR);
pbcr = mfdcr(EBC0_CFGDATA);
mtdcr(EBC0_CFGADDR, PB0CR);
base_b0 = -size_b0;
pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
mtdcr(EBC0_CFGDATA, pbcr);
/* printf("PB1CR = %x\n", pbcr); */
/* Monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
-monitor_flash_len,
0xffffffff,
&flash_info[0]);
flash_info[0].size = size_b0;
return (size_b0);
}

807
board/esd/canbt/fpgadata.c
View File

@ -1,807 +0,0 @@
0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0,
0x0f, 0xf0, 0x00, 0x00, 0x01, 0x61, 0x00, 0x0c,
0x69, 0x6f, 0x5f, 0x63, 0x68, 0x69, 0x70, 0x2e,
0x6e, 0x63, 0x64, 0x00, 0x62, 0x00, 0x0b, 0x73,
0x30, 0x35, 0x78, 0x6c, 0x76, 0x71, 0x31, 0x30,
0x30, 0x00, 0x63, 0x00, 0x0b, 0x32, 0x30, 0x30,
0x31, 0x2f, 0x31, 0x31, 0x2f, 0x32, 0x33, 0x00,
0x64, 0x00, 0x09, 0x31, 0x33, 0x3a, 0x33, 0x34,
0x3a, 0x34, 0x33, 0x00, 0x65, 0xe2, 0x01, 0x00,
0x00, 0x18, 0xe6, 0xff, 0x30, 0xe8, 0x01, 0x01,
0x01, 0x01, 0xe7, 0xe6, 0x04, 0x01, 0x0d, 0x04,
0x07, 0x03, 0x05, 0x03, 0x05, 0x03, 0xe5, 0xe5,
0x05, 0x09, 0x04, 0x06, 0x01, 0x07, 0x09, 0x01,
0x07, 0x0b, 0x0f, 0x07, 0x03, 0x05, 0x03, 0x05,
0x03, 0x11, 0x03, 0x0f, 0x09, 0x03, 0x05, 0x10,
0xe5, 0xe6, 0x1a, 0x0a, 0x13, 0x29, 0x19, 0x05,
0x09, 0x04, 0x04, 0x09, 0x09, 0x09, 0x0b, 0x04,
0x04, 0x09, 0x09, 0x09, 0x0e, 0xe5, 0x01, 0x14,
0x09, 0x09, 0x09, 0x03, 0x05, 0x0b, 0x03, 0x05,
0x09, 0x09, 0x09, 0x09, 0x01, 0xe6, 0x7b, 0x01,
0x01, 0x02, 0x75, 0xe8, 0x3e, 0x3b, 0x02, 0x34,
0x0a, 0x09, 0x07, 0x09, 0x01, 0x11, 0x0a, 0xe5,
0xe6, 0x5c, 0x1e, 0xe6, 0xe5, 0x0a, 0xe5, 0x50,
0x1d, 0x0d, 0x31, 0x09, 0x14, 0x13, 0x07, 0x01,
0x01, 0x2a, 0x08, 0x0b, 0x1e, 0x1c, 0x01, 0xe5,
0x0f, 0x09, 0x09, 0xe5, 0x07, 0x09, 0xe6, 0x08,
0x05, 0x03, 0x01, 0x07, 0x09, 0x09, 0x0d, 0xe8,
0x0f, 0x09, 0xe5, 0x07, 0x09, 0x04, 0x05, 0x0a,
0x01, 0x07, 0x01, 0x07, 0x09, 0x09, 0x0d, 0xe5,
0xe6, 0x0c, 0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x07,
0xe5, 0x03, 0x03, 0xe5, 0x06, 0xe5, 0xe6, 0x03,
0x03, 0xe5, 0x04, 0x02, 0xe5, 0x01, 0x05, 0xe5,
0x07, 0xe5, 0x01, 0x07, 0x05, 0xe7, 0x0f, 0x09,
0x09, 0x09, 0x10, 0x04, 0x05, 0x03, 0x03, 0x05,
0x09, 0x09, 0x08, 0x08, 0x04, 0x01, 0x06, 0xe5,
0x07, 0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x07, 0xe5,
0x02, 0xe5, 0x04, 0xe5, 0x07, 0xe5, 0x07, 0xe5,
0x07, 0xe5, 0x02, 0x04, 0xe5, 0x07, 0x02, 0x03,
0x02, 0xe5, 0x0e, 0x09, 0x09, 0x09, 0x15, 0x09,
0x09, 0x09, 0x09, 0x0e, 0xe6, 0xe5, 0x0c, 0x09,
0x09, 0x09, 0x09, 0x04, 0x04, 0x01, 0x09, 0x06,
0x02, 0x09, 0x09, 0x11, 0xe7, 0x0c, 0x02, 0x06,
0x02, 0x04, 0x01, 0x02, 0x01, 0x01, 0x02, 0x02,
0x06, 0x02, 0x03, 0x02, 0x01, 0x02, 0x06, 0x02,
0x01, 0x04, 0x02, 0x06, 0x02, 0x03, 0x02, 0x02,
0x11, 0x03, 0x17, 0x03, 0x05, 0x12, 0x15, 0x02,
0x23, 0x08, 0x16, 0x06, 0x0c, 0x05, 0x15, 0x07,
0x01, 0x0a, 0x02, 0x0f, 0x01, 0x07, 0x02, 0xe5,
0xe5, 0x08, 0x07, 0x02, 0x07, 0x02, 0x10, 0x03,
0x11, 0x03, 0x2b, 0x05, 0xe6, 0x2b, 0x0a, 0x06,
0x01, 0x01, 0x11, 0x0b, 0x0e, 0xe5, 0x08, 0xe6,
0xe5, 0x0f, 0x09, 0x09, 0x09, 0x09, 0x0b, 0x09,
0x09, 0x01, 0x07, 0x09, 0x0e, 0x01, 0xe5, 0x0f,
0x0d, 0x22, 0xe5, 0xe5, 0x27, 0x0e, 0xe6, 0x47,
0x11, 0x17, 0x02, 0x04, 0x01, 0x01, 0x0d, 0x0d,
0x1f, 0x04, 0x01, 0x24, 0x10, 0x03, 0x01, 0x2a,
0x12, 0x0c, 0x06, 0xe5, 0x0a, 0x09, 0x11, 0xe5,
0x01, 0x1c, 0x09, 0x17, 0x0b, 0x09, 0x09, 0x04,
0x19, 0xe5, 0x0c, 0x01, 0x0d, 0x22, 0x0a, 0x01,
0x0d, 0xe5, 0x04, 0x18, 0x01, 0xe5, 0x01, 0x05,
0x04, 0x01, 0x02, 0xe5, 0x14, 0x10, 0x0b, 0x02,
0x01, 0x02, 0x02, 0xe5, 0x19, 0x0d, 0xe5, 0xe5,
0x0e, 0x09, 0x09, 0x02, 0x06, 0x09, 0x02, 0x03,
0x04, 0x03, 0x05, 0x09, 0x15, 0x0c, 0x02, 0xe5,
0x01, 0x0b, 0x04, 0x04, 0x09, 0x09, 0x02, 0x06,
0x09, 0xe5, 0x01, 0x06, 0x05, 0x03, 0x06, 0x1e,
0x02, 0x1c, 0x1d, 0x08, 0xe5, 0x05, 0x02, 0x06,
0x02, 0x03, 0xe5, 0x1b, 0x03, 0x17, 0xe5, 0x08,
0x02, 0x09, 0xe5, 0x09, 0x0f, 0xe5, 0x08, 0x07,
0x09, 0x06, 0x0b, 0x02, 0x17, 0xe5, 0x09, 0x01,
0x1f, 0x05, 0xe5, 0x02, 0x05, 0x03, 0x1f, 0xe5,
0xe6, 0x0e, 0x09, 0x03, 0x05, 0x03, 0x05, 0x09,
0x11, 0x01, 0x01, 0x04, 0x0c, 0x01, 0x0a, 0x0e,
0x01, 0xe5, 0x0c, 0xe6, 0x06, 0xe6, 0x06, 0xe6,
0x06, 0xe6, 0x02, 0x03, 0xe6, 0x03, 0x03, 0x02,
0x09, 0x06, 0xe5, 0xe5, 0x25, 0x14, 0x1a, 0x12,
0x05, 0x04, 0x02, 0x13, 0x16, 0xe7, 0xe5, 0x11,
0xe5, 0x11, 0xe5, 0x06, 0xe5, 0x14, 0xe5, 0x11,
0xe5, 0x03, 0xe5, 0x08, 0xe5, 0x06, 0x01, 0x02,
0x02, 0x02, 0x01, 0x2c, 0xe5, 0x08, 0x01, 0x1d,
0xe5, 0xe6, 0x01, 0x02, 0x01, 0x04, 0x09, 0x01,
0x02, 0xe6, 0x03, 0x04, 0xe5, 0x02, 0x01, 0x02,
0xe5, 0x02, 0x01, 0x07, 0x01, 0x07, 0x01, 0x07,
0x01, 0x02, 0xe5, 0x04, 0x01, 0x07, 0x05, 0xe5,
0x01, 0x01, 0x02, 0xe5, 0x07, 0xe5, 0x01, 0x01,
0xe5, 0x09, 0xe5, 0xe5, 0xe7, 0x01, 0x0e, 0x08,
0x03, 0xe5, 0x04, 0x02, 0x06, 0x02, 0xe5, 0x04,
0x0d, 0xe5, 0x07, 0xe5, 0x08, 0xe5, 0x07, 0x05,
0x07, 0x02, 0x01, 0x01, 0xe8, 0xe5, 0x10, 0x01,
0x05, 0x0c, 0x10, 0xe5, 0x01, 0x06, 0xe5, 0x08,
0x08, 0xe6, 0x01, 0x02, 0x05, 0xe5, 0x04, 0xe5,
0x01, 0x06, 0xe5, 0x01, 0xe5, 0x01, 0x10, 0x02,
0x05, 0xe5, 0x01, 0x06, 0x02, 0x06, 0x02, 0x05,
0x03, 0x07, 0xe5, 0x01, 0x05, 0xe5, 0x01, 0x05,
0x04, 0x03, 0x03, 0xe5, 0x04, 0x08, 0xe6, 0xe5,
0xe6, 0x01, 0x0b, 0x05, 0x03, 0x09, 0x09, 0x09,
0x06, 0x04, 0x05, 0x01, 0x01, 0x09, 0x05, 0x0a,
0x01, 0x01, 0x02, 0x08, 0x02, 0xe5, 0xe6, 0x01,
0x11, 0xe5, 0x31, 0x14, 0x10, 0x0a, 0x02, 0xe8,
0x0c, 0x03, 0xe6, 0x02, 0x03, 0x05, 0x03, 0x05,
0x03, 0x02, 0x02, 0x03, 0x02, 0x04, 0x03, 0x01,
0x03, 0x03, 0x05, 0x0d, 0xe5, 0x06, 0x0b, 0x01,
0x01, 0x11, 0x0c, 0x01, 0x04, 0x02, 0x01, 0x04,
0x02, 0x09, 0x0b, 0x01, 0x07, 0x01, 0x07, 0x09,
0x13, 0xe6, 0xe6, 0x0a, 0x02, 0x06, 0x02, 0x03,
0x02, 0x02, 0x04, 0xe6, 0x01, 0x05, 0xe5, 0x01,
0x03, 0x07, 0x03, 0x02, 0x02, 0x05, 0xe5, 0x01,
0x03, 0x02, 0x02, 0x03, 0xe5, 0xe5, 0x01, 0x06,
0x04, 0x01, 0x01, 0xe5, 0xe5, 0x01, 0x08, 0xe5,
0x07, 0xe5, 0x07, 0xe5, 0x08, 0x08, 0xe5, 0x08,
0x0a, 0xe5, 0x05, 0x09, 0x02, 0x09, 0x05, 0xe5,
0x01, 0x07, 0xe5, 0xe6, 0x08, 0x05, 0x03, 0x05,
0x03, 0x05, 0x05, 0x03, 0x03, 0x05, 0x03, 0x07,
0x03, 0x05, 0x09, 0x03, 0x0a, 0x08, 0x0d, 0xe5,
0x5e, 0x06, 0x07, 0x0b, 0xe8, 0x10, 0x01, 0x07,
0x09, 0x01, 0x07, 0x01, 0x07, 0x0b, 0x09, 0x09,
0x08, 0x03, 0x06, 0x0c, 0xe8, 0x09, 0x54, 0x01,
0x0d, 0x02, 0x07, 0x01, 0x01, 0x15, 0xe5, 0x05,
0xe7, 0x05, 0xe7, 0x07, 0xe5, 0x06, 0xe6, 0x08,
0xe6, 0x05, 0xe7, 0x06, 0xe7, 0xe5, 0x02, 0xe7,
0x05, 0xe7, 0x0a, 0x10, 0xe5, 0x07, 0x09, 0x33,
0x06, 0x0b, 0x0f, 0xe7, 0x19, 0x05, 0x03, 0x02,
0x02, 0x13, 0x0b, 0x09, 0x03, 0x05, 0x06, 0x02,
0xe5, 0x07, 0x08, 0x02, 0xe5, 0x1b, 0xe6, 0x07,
0xe5, 0x11, 0xe5, 0x01, 0x07, 0xe5, 0x06, 0xe6,
0x07, 0xe5, 0xe5, 0xe5, 0x03, 0xe5, 0x02, 0x03,
0xe6, 0x0a, 0xe5, 0x02, 0x0e, 0x09, 0xe5, 0xe6,
0x04, 0xe8, 0x04, 0x09, 0xe5, 0xe6, 0x06, 0xe5,
0xe6, 0x04, 0xe5, 0xe6, 0x04, 0xe5, 0xe7, 0xe6,
0x01, 0x01, 0xe6, 0x03, 0xe8, 0x06, 0x01, 0x01,
0x0e, 0x01, 0x03, 0x03, 0x01, 0x07, 0x01, 0x07,
0x01, 0xe5, 0x05, 0x01, 0x09, 0x01, 0x07, 0x01,
0x07, 0x01, 0x01, 0x08, 0x08, 0x01, 0x0a, 0xe9,
0x10, 0x01, 0x01, 0x05, 0x01, 0xe5, 0x05, 0x01,
0xe6, 0x04, 0x01, 0xe6, 0x04, 0x01, 0x01, 0x02,
0x03, 0xe5, 0xe5, 0xe5, 0x03, 0xe5, 0xe5, 0x06,
0x01, 0x02, 0x04, 0x01, 0x07, 0x01, 0xe5, 0x08,
0x01, 0xe6, 0x0e, 0xe5, 0x02, 0x0e, 0xe5, 0x07,
0xe5, 0x07, 0xe5, 0xe5, 0x0d, 0x09, 0xe5, 0x06,
0x04, 0xe5, 0x05, 0x01, 0xe5, 0x0c, 0xe6, 0xe6,
0x1e, 0x07, 0x15, 0x07, 0x09, 0xe5, 0x0d, 0xe5,
0xe5, 0xe5, 0x01, 0x01, 0x09, 0x04, 0xe6, 0xe6,
0x04, 0x02, 0x04, 0x01, 0x02, 0x09, 0x04, 0x01,
0x02, 0x04, 0x01, 0x07, 0x01, 0x04, 0x02, 0x08,
0x0b, 0x06, 0x0e, 0x10, 0xe5, 0xe6, 0x0b, 0x01,
0x07, 0x01, 0x03, 0xe5, 0x01, 0x01, 0x07, 0x01,
0x07, 0x01, 0x02, 0x05, 0x09, 0x17, 0x04, 0x03,
0x03, 0x09, 0xe7, 0xe5, 0x0d, 0x01, 0x07, 0x01,
0x07, 0x01, 0x04, 0x02, 0x01, 0x07, 0x01, 0x04,
0x01, 0x0a, 0x07, 0x06, 0x01, 0x02, 0x0a, 0x13,
0xe6, 0x0d, 0x03, 0x05, 0x09, 0x03, 0x05, 0x09,
0x03, 0x03, 0x03, 0x02, 0x05, 0xe5, 0x02, 0x04,
0xe5, 0x07, 0xe5, 0x01, 0x03, 0x02, 0x0d, 0x01,
0x02, 0x0d, 0x02, 0x02, 0x03, 0x09, 0x02, 0x06,
0x04, 0x04, 0x02, 0xe5, 0x04, 0x01, 0x05, 0x03,
0x01, 0xe5, 0x05, 0x01, 0x07, 0x01, 0x08, 0x0c,
0x06, 0x06, 0x02, 0x05, 0xe6, 0x06, 0xe6, 0x06,
0xe5, 0x07, 0xe5, 0x07, 0xe5, 0xe5, 0x03, 0xe5,
0x01, 0xe5, 0xe5, 0xe5, 0x06, 0x09, 0x01, 0xe5,
0x17, 0x03, 0x01, 0xe6, 0x09, 0x02, 0xe5, 0x07,
0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x07,
0x01, 0xe6, 0x07, 0x11, 0xe5, 0xe5, 0x09, 0x02,
0x0e, 0x0b, 0x04, 0x01, 0x03, 0x03, 0x09, 0x01,
0x07, 0x04, 0x04, 0x02, 0xe5, 0xe6, 0x03, 0x07,
0x18, 0xe5, 0x13, 0xe5, 0xe6, 0x0c, 0xe5, 0x03,
0x03, 0xe5, 0x07, 0xe5, 0x02, 0x04, 0xe5, 0x07,
0xe5, 0x0a, 0x03, 0xe5, 0x01, 0x01, 0x07, 0x01,
0xe5, 0x03, 0xe5, 0x09, 0x01, 0x0a, 0x02, 0x03,
0xe5, 0x0c, 0xe6, 0x06, 0xe6, 0x01, 0x04, 0xe6,
0x06, 0xe7, 0xe5, 0x03, 0xe6, 0x01, 0x05, 0x02,
0x09, 0x05, 0x03, 0x07, 0x01, 0x02, 0x06, 0x0a,
0x03, 0xe5, 0xe6, 0xe5, 0x06, 0x1c, 0x1a, 0xe5,
0x02, 0x05, 0x0a, 0x12, 0x02, 0x0c, 0xe5, 0x01,
0x01, 0x1b, 0xe5, 0x04, 0x03, 0x01, 0x06, 0xe5,
0x10, 0xe5, 0x01, 0xe5, 0x03, 0xe5, 0x12, 0xe5,
0x06, 0xe5, 0x07, 0x01, 0x03, 0xe9, 0xe5, 0x17,
0xe5, 0x08, 0xe5, 0x06, 0xe5, 0x08, 0xe5, 0x09,
0xe5, 0x17, 0x03, 0x01, 0x0e, 0x01, 0x01, 0x02,
0x02, 0x01, 0x04, 0xe5, 0x02, 0x04, 0xe5, 0x02,
0x09, 0x09, 0x09, 0x04, 0xe5, 0x04, 0x01, 0xe5,
0x05, 0x01, 0xe5, 0x05, 0x01, 0x08, 0xe5, 0x01,
0xe5, 0x05, 0xe5, 0x07, 0xe5, 0x01, 0x01, 0xe5,
0x01, 0x1b, 0x09, 0xe5, 0x07, 0x14, 0xe5, 0x05,
0x01, 0xe5, 0x04, 0x02, 0xe5, 0x01, 0x06, 0x0d,
0x02, 0x01, 0xe5, 0x02, 0xe5, 0xe5, 0x06, 0x01,
0x05, 0xe5, 0x01, 0x05, 0x02, 0x10, 0xe5, 0xe6,
0x04, 0x01, 0x01, 0x06, 0x01, 0x02, 0x0f, 0xe5,
0x01, 0xe5, 0x02, 0xe5, 0x01, 0x08, 0x01, 0x06,
0xe5, 0xe7, 0x01, 0x06, 0x02, 0x05, 0x01, 0x01,
0x05, 0x03, 0x07, 0x01, 0x05, 0x01, 0x01, 0x05,
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0xe5, 0xe5, 0x05, 0xe5, 0xe5, 0x07, 0xe5, 0xe5,
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0x18, 0x09, 0x04, 0x04, 0x04, 0x04, 0x08, 0x0c,
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0xe5, 0x02, 0x1d, 0xe5, 0xe6, 0x01, 0x02, 0x18,
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0x07, 0x01, 0x0c, 0x01, 0xe5, 0x02, 0x01, 0x02,
0x25, 0x01, 0x02, 0x01, 0x18, 0xe5, 0x07, 0xe5,
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0xe5, 0xe5, 0xe5, 0x03, 0xe5, 0xe5, 0x06, 0xe5,
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0xe5, 0xe5, 0x06, 0xe6, 0xe5, 0x04, 0x01, 0xe5,
0x05, 0x01, 0x04, 0x04, 0xe7, 0x01, 0x03, 0x01,
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0xe6, 0xe6, 0x01, 0x04, 0xe5, 0x0c, 0x0a, 0x06,
0x02, 0x01, 0xe7, 0x13, 0x07, 0xe5, 0x01, 0x01,
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0xe5, 0x01, 0x03, 0xe5, 0x02, 0x04, 0x28, 0xe5,
0x03, 0x01, 0x03, 0x02, 0x02, 0x07, 0x02, 0x01,
0x04, 0xe5, 0xe5, 0xe6, 0x0c, 0xe5, 0xe5, 0xe5,
0x03, 0xe5, 0x02, 0x04, 0x32, 0xe5, 0x05, 0x02,
0x01, 0x01, 0x0b, 0x01, 0x01, 0x02, 0x04, 0x21,
0xe5, 0x01, 0xe5, 0xe5, 0x05, 0x02, 0x2d, 0xe7,
0xe6, 0x01, 0x0a, 0x01, 0x02, 0x04, 0x13, 0x01,
0x01, 0x01, 0x02, 0x05, 0x02, 0xe5, 0x05, 0x2e,
0x02, 0x03, 0x01, 0xe6, 0x17, 0x11, 0x01, 0x07,
0x07, 0x03, 0x35, 0x02, 0xe8, 0x11, 0x06, 0x11,
0x01, 0x09, 0x03, 0xe5, 0x3d, 0x01, 0xe5, 0x11,
0x09, 0x14, 0x02, 0x05, 0x3e, 0xe7, 0xe5, 0x1a,
0xe5, 0x1e, 0x3d, 0xe5, 0x01, 0xe5, 0x0a, 0x02,
0x09, 0x09, 0x09, 0x06, 0x02, 0x03, 0x02, 0x04,
0x09, 0x09, 0x09, 0x09, 0x0d, 0xe9, 0x01, 0x08,
0xe5, 0x04, 0x09, 0x14, 0x02, 0x05, 0x02, 0xe5,
0x3a, 0xe5, 0xe6, 0x0a, 0x26, 0x08, 0x40, 0xe6,
0x0c, 0x04, 0x04, 0x01, 0x02, 0x15, 0x0b, 0x04,
0x36, 0xe8, 0x0e, 0x01, 0x02, 0x02, 0x01, 0xe6,
0xe5, 0x0f, 0x0a, 0x09, 0xe5, 0x35, 0xe8, 0x08,
0x02, 0x09, 0x01, 0x10, 0x07, 0x08, 0x07, 0x2e,
0x08, 0xe7, 0x0e, 0x05, 0xe6, 0xe5, 0x04, 0xe5,
0x07, 0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x09, 0xe5,
0x07, 0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x07, 0xe5,
0x09, 0xe5, 0x0c, 0x09, 0x01, 0x14, 0x14, 0x36,
0x02, 0xe5, 0x0e, 0x07, 0x16, 0x4d, 0x01, 0xe5,
0x0b, 0x09, 0x01, 0x11, 0x0b, 0x01, 0x06, 0x02,
0x36, 0xe5, 0xe6, 0x02, 0x0b, 0x02, 0x04, 0x04,
0x0e, 0x02, 0x11, 0x39, 0xe5, 0x01, 0x2b, 0x15,
0x01, 0xe5, 0x20, 0x12, 0xe5, 0xe7, 0x10, 0x01,
0x02, 0x03, 0xe5, 0xe5, 0x06, 0x01, 0x02, 0x04,
0x01, 0x07, 0x01, 0x05, 0x03, 0x01, 0x07, 0x01,
0x07, 0x01, 0x07, 0x01, 0x07, 0x01, 0x0b, 0xe5,
0xe5, 0x18, 0x12, 0x02, 0x09, 0x21, 0x01, 0x1c,
0xe6, 0xe6, 0x13, 0x1c, 0x0b, 0x01, 0x13, 0x24,
0xe5, 0x01, 0xe5, 0x18, 0x14, 0x10, 0x3b, 0x02,
0x17, 0x01, 0x0e, 0x02, 0x01, 0x07, 0xe5, 0x09,
0x01, 0x16, 0x1a, 0x05, 0x02, 0x17, 0x01, 0x13,
0x0d, 0x03, 0x04, 0x03, 0x10, 0x1c, 0x02, 0x02,
0xe6, 0x19, 0x09, 0x06, 0x05, 0x0f, 0x37, 0x01,
0xe7, 0x25, 0x04, 0x01, 0x11, 0x08, 0x10, 0x1f,
0x02, 0x01, 0x26, 0x08, 0x0f, 0x06, 0x33, 0x01,
0x01, 0x0a, 0x10, 0x0f, 0x13, 0x07, 0x31, 0x02,
0xe6, 0x11, 0x16, 0x01, 0x03, 0x0f, 0x3b, 0x02,
0x14, 0x01, 0x16, 0xe5, 0x0c, 0x28, 0x13, 0x04,
0xe5, 0x2b, 0x0a, 0x36, 0x0a, 0x01, 0x01, 0x2b,
0xe5, 0x0d, 0x3e, 0xe8, 0xe5, 0x75, 0xe5, 0x03,
0x02, 0x01, 0x28, 0x47, 0x01, 0x02, 0xe6, 0xe5,
0x03, 0x23, 0x01, 0x4a, 0x04, 0xe5, 0x01, 0x02,
0x74, 0x02, 0xe6, 0xe6, 0x04, 0x05, 0x21, 0x01,
0x01, 0x01, 0x45, 0x01, 0xe6, 0x01, 0x08, 0x25,
0x02, 0x3f, 0x02, 0x05, 0xe6, 0x72, 0x04, 0xe5,
0xe5, 0xe5, 0x01, 0x2c, 0x4a, 0x03, 0xe6, 0x2d,
0x43, 0x06, 0x01, 0xe5, 0x7a, 0xe8, 0x0d, 0x09,
0x09, 0x09, 0x09, 0x0b, 0x09, 0x09, 0x09, 0x09,
0x0d, 0x03, 0xe5, 0x01, 0x27, 0x4c, 0x06, 0x29,
0x52, 0x01, 0x2d, 0xe5, 0x48, 0x03, 0x01, 0x16,
0x03, 0x14, 0x4a, 0xe6, 0xe5, 0x2c, 0x03, 0x4a,
0xe6, 0x03, 0x10, 0xe5, 0x07, 0xe5, 0x07, 0xe5,
0x07, 0xe5, 0x07, 0xe5, 0x09, 0xe5, 0x07, 0xe5,
0x07, 0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x06, 0x02,
0xe5, 0x16, 0x01, 0x13, 0x4c, 0x03, 0x17, 0x01,
0x63, 0xe6, 0x15, 0x01, 0x13, 0x12, 0x39, 0x03,
0x03, 0x13, 0x01, 0x16, 0x49, 0xe5, 0xe6, 0x2a,
0x01, 0xe5, 0x49, 0x02, 0xe6, 0x10, 0x01, 0x01,
0x05, 0x01, 0x02, 0x03, 0xe5, 0xe5, 0x02, 0x03,
0x01, 0x01, 0x05, 0x01, 0x01, 0x02, 0x03, 0xe5,
0xe5, 0x06, 0x01, 0x07, 0x01, 0x07, 0x01, 0x07,
0x01, 0x0a, 0xe5, 0x01, 0x5b, 0x22, 0xe5, 0x09,
0x34, 0x07, 0x09, 0x0b, 0x1a, 0x02, 0x01, 0x3f,
0x3a, 0xe6, 0xe5, 0x16, 0x10, 0x17, 0x07, 0x2b,
0x08, 0xe5, 0x19, 0x16, 0x09, 0x03, 0x3b, 0xe7,
0x23, 0x1a, 0x04, 0xe5, 0x33, 0x01, 0xe6, 0x1b,
0x22, 0x0a, 0x0d, 0x23, 0x01, 0x3f, 0x3c, 0xe6,
0x20, 0xe6, 0x15, 0x04, 0x2a, 0x09, 0x06, 0xe5,
0xe5, 0x23, 0x1a, 0xe5, 0x28, 0x0f, 0x02, 0xe5,
0x38, 0x41, 0xe5, 0xe6, 0xe5, 0x24, 0x04, 0x1a,
0x30, 0x01, 0xe5, 0xe5, 0x2c, 0x4c, 0xe5, 0x01,
0xe6, 0x75, 0xe8, 0xe5, 0x01, 0x01, 0x70, 0x01,
0x03, 0xe5, 0xe5, 0x03, 0x70, 0x04, 0xe5, 0x01,
0x02, 0x74, 0x02, 0x01, 0xe6, 0x01, 0x78, 0x02,
0x74, 0x02, 0x02, 0xe8, 0x13, 0x5f, 0x04, 0x03,
0xe5, 0x13, 0xe5, 0x63, 0x01, 0xe6, 0x08, 0x02,
0x08, 0x64, 0xe5, 0x01, 0x0a, 0xe5, 0x6e, 0xe5,
0xe6, 0x0d, 0x09, 0x09, 0x09, 0x09, 0x0b, 0x09,
0x09, 0x09, 0x09, 0x0d, 0xe9, 0x01, 0x74, 0x06,
0x7a, 0x03, 0x01, 0x2b, 0x4d, 0xe5, 0xe5, 0x23,
0x08, 0xe5, 0x47, 0x02, 0xe8, 0x2c, 0x4b, 0xe5,
0x01, 0xe5, 0x12, 0x01, 0x07, 0xe6, 0x07, 0xe5,
0x02, 0x03, 0x01, 0x09, 0xe5, 0x09, 0xe5, 0x07,
0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x06,
0x01, 0xe6, 0x0f, 0xe5, 0x02, 0x09, 0x01, 0x01,
0xe5, 0x03, 0x03, 0x03, 0x01, 0x38, 0x0b, 0x01,
0x01, 0x01, 0x13, 0x02, 0x09, 0xe5, 0xe6, 0x02,
0x01, 0x02, 0x06, 0x37, 0x0d, 0x01, 0x01, 0x15,
0x07, 0xe6, 0xe5, 0xe5, 0x04, 0x03, 0x05, 0x47,
0xe5, 0xe5, 0x0f, 0x02, 0xe5, 0x07, 0xe5, 0x01,
0x01, 0xe5, 0x01, 0xe5, 0x03, 0x03, 0xe5, 0x38,
0x0e, 0x01, 0xe5, 0x2e, 0x33, 0x15, 0xe5, 0xe5,
0xe5, 0x10, 0x01, 0x07, 0x01, 0x07, 0x01, 0xe5,
0xe5, 0x03, 0x01, 0xe5, 0xe5, 0x02, 0xe5, 0xe6,
0x07, 0x01, 0xe5, 0x05, 0x01, 0xe6, 0x04, 0xe7,
0x05, 0x01, 0x07, 0x01, 0x0b, 0xe7, 0x3d, 0x15,
0x21, 0x03, 0x03, 0xe5, 0x3e, 0x38, 0xe5, 0xe5,
0xe5, 0x12, 0x02, 0x09, 0x1e, 0x07, 0x32, 0x03,
0xe5, 0x19, 0x05, 0x01, 0x0a, 0x09, 0x06, 0x3a,
0xe5, 0x01, 0x23, 0x03, 0x17, 0x3a, 0x03, 0xe5,
0x1f, 0x1d, 0x16, 0xe5, 0x24, 0xe5, 0x1e, 0x09,
0x12, 0x02, 0x15, 0x01, 0x23, 0xe7, 0x3e, 0x23,
0x17, 0x01, 0xe5, 0x3e, 0x3c, 0xe6, 0x24, 0x19,
0x3d, 0xe6, 0x1b, 0xe5, 0x04, 0x02, 0xe5, 0x08,
0x38, 0x12, 0x33, 0x36, 0xe6, 0x0b, 0x01, 0xe5,
0xe5, 0x6a, 0x10, 0xe6, 0x02, 0x0b, 0xe5, 0xe5,
0x05, 0xe5, 0x07, 0xe5, 0x07, 0xe6, 0x06, 0xe5,
0x07, 0xe7, 0x07, 0xe5, 0x07, 0xe5, 0x07, 0xe5,
0x07, 0xe5, 0x0b, 0x03, 0xe5, 0x0f, 0x09, 0x09,
0x09, 0x09, 0x04, 0x04, 0x01, 0x09, 0x09, 0x09,
0x01, 0x07, 0x0d, 0xe5, 0xe6, 0x0e, 0x09, 0x03,
0x05, 0x09, 0x09, 0x04, 0x06, 0x04, 0x04, 0x04,
0x04, 0x04, 0x04, 0x09, 0x0e, 0x03, 0x26, 0x57,
0x0f, 0x09, 0x09, 0x09, 0x09, 0x0b, 0x01, 0x07,
0x09, 0x09, 0x02, 0x06, 0x0e, 0xe5, 0xe6, 0x0c,
0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x07,
0xe5, 0x09, 0xe5, 0x07, 0xe5, 0x07, 0xe5, 0x07,
0xe5, 0x07, 0xe5, 0x0e, 0x03, 0x03, 0x09, 0x09,
0x09, 0x09, 0x09, 0x0b, 0x09, 0x09, 0x09, 0x09,
0x12, 0xe6, 0x0d, 0xe5, 0xe5, 0x05, 0xe5, 0xe5,
0x05, 0xe5, 0xe5, 0x05, 0xe5, 0xe5, 0x05, 0xe5,
0xe5, 0x07, 0xe5, 0xe5, 0x05, 0xe5, 0xe5, 0x05,
0xe5, 0xe5, 0x05, 0xe5, 0xe5, 0x05, 0xe5, 0xe5,
0x0b, 0x03, 0x0e, 0x09, 0x09, 0x09, 0x09, 0x03,
0x07, 0x09, 0x09, 0x09, 0x09, 0x0f, 0x02, 0xe5,
0x79, 0xe5, 0x01, 0x0e, 0x09, 0x09, 0x09, 0x09,
0x08, 0x02, 0x09, 0x09, 0x09, 0x09, 0x11, 0xe6,
0x3e, 0x3b, 0x02, 0x10, 0x09, 0x09, 0x09, 0x09,
0x0b, 0x09, 0x09, 0x09, 0x09, 0x10, 0xe5, 0x7d,
0x3f, 0x3a, 0xe5, 0x01, 0x3f, 0x36, 0x04, 0x02,
0x7a, 0x01, 0x01, 0x13, 0x3d, 0x28, 0x01, 0x01,
0x3f, 0x33, 0x0a, 0x3f, 0x34, 0x08, 0xe5, 0x79,
0x01, 0x01, 0x14, 0x09, 0x09, 0x09, 0x09, 0x0b,
0x09, 0x09, 0x09, 0x09, 0x09, 0xe5, 0x01, 0x0f,
0x09, 0x09, 0x09, 0x09, 0x07, 0x03, 0x09, 0x09,
0x09, 0x08, 0xe5, 0x0d, 0x03, 0x3a, 0x04, 0x3a,
0x02, 0xe5, 0x0c, 0x09, 0x03, 0x05, 0x09, 0x09,
0x03, 0x07, 0x09, 0x09, 0x07, 0x01, 0x1b, 0x01,
0xe5, 0x0a, 0x02, 0x07, 0x05, 0x03, 0x01, 0x03,
0x03, 0x01, 0x03, 0x03, 0x09, 0x06, 0xe5, 0x02,
0x04, 0x04, 0x04, 0x02, 0x06, 0xe5, 0x02, 0x02,
0x06, 0x02, 0xe5, 0x02, 0x03, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff,

14
board/samsung/common/multi_i2c.c
View File

@ -11,13 +11,12 @@
/* Handle multiple I2C buses instances */
int get_multi_scl_pin(void)
{
unsigned int bus = I2C_GET_BUS();
unsigned int bus = i2c_get_bus_num();
switch (bus) {
case I2C_0: /* I2C_0 definition - compatibility layer */
case I2C_5:
case I2C_0:
return CONFIG_SOFT_I2C_I2C5_SCL;
case I2C_9:
case I2C_1:
return CONFIG_SOFT_I2C_I2C9_SCL;
default:
printf("I2C_%d not supported!\n", bus);
@ -28,13 +27,12 @@ int get_multi_scl_pin(void)
int get_multi_sda_pin(void)
{
unsigned int bus = I2C_GET_BUS();
unsigned int bus = i2c_get_bus_num();
switch (bus) {
case I2C_0: /* I2C_0 definition - compatibility layer */
case I2C_5:
case I2C_0:
return CONFIG_SOFT_I2C_I2C5_SDA;
case I2C_9:
case I2C_1:
return CONFIG_SOFT_I2C_I2C9_SDA;
default:
printf("I2C_%d not supported!\n", bus);

6
board/samsung/goni/goni.c
View File

@ -32,7 +32,11 @@ int power_init_board(void)
{
int ret;
ret = pmic_init(I2C_5);
/*
* For PMIC the I2C bus is named as I2C5, but it is connected
* to logical I2C adapter 0
*/
ret = pmic_init(I2C_0);
if (ret)
return ret;

17
board/samsung/trats/trats.c
View File

@ -61,10 +61,10 @@ void i2c_init_board(void)
struct exynos4_gpio_part2 *gpio2 =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
/* I2C_5 -> PMIC */
/* I2C_5 -> PMIC -> Adapter 0 */
s5p_gpio_direction_output(&gpio1->b, 7, 1);
s5p_gpio_direction_output(&gpio1->b, 6, 1);
/* I2C_9 -> FG */
/* I2C_9 -> FG -> Adapter 1 */
s5p_gpio_direction_output(&gpio2->y4, 0, 1);
s5p_gpio_direction_output(&gpio2->y4, 1, 1);
}
@ -282,10 +282,17 @@ int power_init_board(void)
struct power_battery *pb;
struct pmic *p_fg, *p_chrg, *p_muic, *p_bat;
ret = pmic_init(I2C_5);
/*
* For PMIC/MUIC the I2C bus is named as I2C5, but it is connected
* to logical I2C adapter 0
*
* The FUEL_GAUGE is marked as I2C9 on the schematic, but connected
* to logical I2C adapter 1
*/
ret = pmic_init(I2C_0);
ret |= pmic_init_max8997();
ret |= power_fg_init(I2C_9);
ret |= power_muic_init(I2C_5);
ret |= power_fg_init(I2C_1);
ret |= power_muic_init(I2C_0);
ret |= power_bat_init(0);
if (ret)
return ret;

4
board/samsung/universal_c210/universal.c
View File

@ -45,6 +45,10 @@ int power_init_board(void)
{
int ret;
/*
* For PMIC the I2C bus is named as I2C5, but it is connected
* to logical I2C adapter 0
*/
ret = pmic_init(I2C_5);
if (ret)
return ret;

1
boards.cfg
View File

@ -1183,7 +1183,6 @@ PPChameleonEVB_ME_33 powerpc ppc4xx PPChameleonEVB dave
APC405 powerpc ppc4xx apc405 esd
AR405 powerpc ppc4xx ar405 esd
ASH405 powerpc ppc4xx ash405 esd
CANBT powerpc ppc4xx canbt esd
CMS700 powerpc ppc4xx cms700 esd
CPCI2DP powerpc ppc4xx cpci2dp esd
CPCI405 powerpc ppc4xx cpci405 esd

6
common/cmd_bdinfo.c
View File

@ -92,7 +92,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
print_num("immr_base", bd->bi_immr_base);
#endif
print_num("bootflags", bd->bi_bootflags);
#if defined(CONFIG_405CR) || defined(CONFIG_405EP) || \
#if defined(CONFIG_405EP) || \
defined(CONFIG_405GP) || \
defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
@ -106,7 +106,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405)
print_mhz("pci_busfreq", bd->bi_pci_busfreq);
#endif
#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
#else /* ! CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
#if defined(CONFIG_CPM2)
print_mhz("vco", bd->bi_vco);
print_mhz("sccfreq", bd->bi_sccfreq);
@ -117,7 +117,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
print_mhz("cpmfreq", bd->bi_cpmfreq);
#endif
print_mhz("busfreq", bd->bi_busfreq);
#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
#endif /* CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
#ifdef CONFIG_ENABLE_36BIT_PHYS
#ifdef CONFIG_PHYS_64BIT

6
config.mk
View File

@ -145,7 +145,13 @@ CHECK = sparse
#########################################################################
# Load generated board configuration
ifeq ($(CONFIG_SPL_BUILD),y)
# Include SPL autoconf
sinclude $(OBJTREE)/include/spl-autoconf.mk
else
# Include normal autoconf
sinclude $(OBJTREE)/include/autoconf.mk
endif
sinclude $(OBJTREE)/include/config.mk
# Some architecture config.mk files need to know what CPUDIR is set to,

7
doc/README.scrapyard
View File

@ -11,9 +11,10 @@ easily if here is something they might want to dig for...
Board Arch CPU Commit Removed Last known maintainer/contact
=================================================================================================
Alaska8220 powerpc mpc8220 - -
Yukon8220 powerpc mpc8220 - -
sorcery powerpc mpc8220 - -
CANBT powerpc 405CR - - Matthias Fuchs <matthias.fuchs@esd.eu>
Alaska8220 powerpc mpc8220 d6ed322 2013-05-11
Yukon8220 powerpc mpc8220 d6ed322 2013-05-11
sorcery powerpc mpc8220 d6ed322 2013-05-11
smdk6400 arm arm1176 52587f1 2013-04-12 Zhong Hongbo <bocui107@gmail.com>
ns9750dev arm arm926ejs 4cfc611 2013-02-28 Markus Pietrek <mpietrek@fsforth.de>
AMX860 powerpc mpc860 1b0757e 2012-10-28 Wolfgang Denk <wd@denx.de>

67
drivers/i2c/fsl_i2c.c
View File

@ -206,9 +206,58 @@ static unsigned int get_i2c_clock(int bus)
return gd->arch.i2c1_clk; /* I2C1 clock */
}
static int fsl_i2c_fixup(const struct fsl_i2c *dev)
{
const unsigned long long timeout = usec2ticks(CONFIG_I2C_MBB_TIMEOUT);
unsigned long long timeval = 0;
int ret = -1;
unsigned int flags = 0;
#ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447
unsigned int svr = get_svr();
if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) ||
(SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV))
flags = I2C_CR_BIT6;
#endif
writeb(I2C_CR_MEN | I2C_CR_MSTA, &dev->cr);
timeval = get_ticks();
while (!(readb(&dev->sr) & I2C_SR_MBB)) {
if ((get_ticks() - timeval) > timeout)
goto err;
}
if (readb(&dev->sr) & I2C_SR_MAL) {
/* SDA is stuck low */
writeb(0, &dev->cr);
udelay(100);
writeb(I2C_CR_MSTA | flags, &dev->cr);
writeb(I2C_CR_MEN | I2C_CR_MSTA | flags, &dev->cr);
}
readb(&dev->dr);
timeval = get_ticks();
while (!(readb(&dev->sr) & I2C_SR_MIF)) {
if ((get_ticks() - timeval) > timeout)
goto err;
}
ret = 0;
err:
writeb(I2C_CR_MEN | flags, &dev->cr);
writeb(0, &dev->sr);
udelay(100);
return ret;
}
static void fsl_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
{
const struct fsl_i2c *dev;
const unsigned long long timeout = usec2ticks(CONFIG_I2C_MBB_TIMEOUT);
unsigned long long timeval;
#ifdef CONFIG_SYS_I2C_INIT_BOARD
/* Call board specific i2c bus reset routine before accessing the
@ -226,6 +275,18 @@ static void fsl_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
writeb(0x0, &dev->sr); /* clear status register */
writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */
timeval = get_ticks();
while (readb(&dev->sr) & I2C_SR_MBB) {
if ((get_ticks() - timeval) < timeout)
continue;
if (fsl_i2c_fixup(dev))
debug("i2c_init: BUS#%d failed to init\n",
adap->hwadapnr);
break;
}
#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
/* Call board specific i2c bus reset routine AFTER the bus has been
* initialized. Use either this callpoint or i2c_init_board;
@ -394,8 +455,10 @@ fsl_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr, int alen,
int i = -1; /* signal error */
u8 *a = (u8*)&addr;
if (i2c_wait4bus(adap) >= 0 &&
i2c_write_addr(adap, dev, I2C_WRITE_BIT, 0) != 0 &&
if (i2c_wait4bus(adap) < 0)
return -1;
if (i2c_write_addr(adap, dev, I2C_WRITE_BIT, 0) != 0 &&
__i2c_write(adap, &a[4 - alen], alen) == alen) {
i = __i2c_write(adap, data, length);
}

2
drivers/power/power_i2c.c
View File

@ -98,7 +98,7 @@ int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
int pmic_probe(struct pmic *p)
{
I2C_SET_BUS(p->bus);
i2c_set_bus_num(p->bus);
debug("Bus: %d PMIC:%s probed!\n", p->bus, p->name);
if (i2c_probe(pmic_i2c_addr)) {
printf("Can't find PMIC:%s\n", p->name);

1
include/asm-generic/u-boot.h
View File

@ -69,7 +69,6 @@ typedef struct bd_info {
unsigned int bi_baudrate; /* Console Baudrate */
#if defined(CONFIG_405) || \
defined(CONFIG_405GP) || \
defined(CONFIG_405CR) || \
defined(CONFIG_405EP) || \
defined(CONFIG_405EZ) || \
defined(CONFIG_405EX) || \

215
include/configs/CANBT.h
View File

@ -1,215 +0,0 @@
/*
* (C) Copyright 2001
* Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* board/config.h - configuration options, board specific
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_405CR 1 /* This is a PPC405CR CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_CANBT 1 /* ...on a CANBT board */
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTDELAY 1 /* autoboot after 1 seconds */
#undef CONFIG_BOOTARGS
#define CONFIG_BOOTCOMMAND \
"setenv bootargs root=/dev/ram rw console=ttyS0,115200; " \
"bootm ffe00000 ffe80000"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
#undef CONFIG_PCI_PNP /* no pci plug-and-play */
#define CONFIG_PHY_ADDR 0 /* PHY address */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_EEPROM
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* don't print console @ startup*/
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#define CONFIG_SYS_EXT_SERIAL_CLOCK 14745600 /* use external serial clock */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
57600, 115200, 230400, 460800, 921600 }
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* (Set up by the startup code)
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* FLASH organization
*/
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short /* flash word size (width) */
#define CONFIG_SYS_FLASH_ADDR0 0x5555 /* 1st address for flash config cycles */
#define CONFIG_SYS_FLASH_ADDR1 0x2AAA /* 2nd address for flash config cycles */
/*
* The following defines are added for buggy IOP480 byte interface.
* All other boards should use the standard values (CPCI405 etc.)
*/
#define CONFIG_SYS_FLASH_READ0 0x0000 /* 0 is standard */
#define CONFIG_SYS_FLASH_READ1 0x0001 /* 1 is standard */
#define CONFIG_SYS_FLASH_READ2 0x0002 /* 2 is standard */
#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
#if 0 /* Use FLASH for environment variables */
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_OFFSET 0x00010000 /* Offset of Environment Sector */
#define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
#else /* Use EEPROM for environment variables */
#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
#define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */
#define CONFIG_ENV_SIZE 0x400 /* 1024 bytes may be used for env vars */
/* total size of a CAT24WC08 is 1024 bytes */
#endif
/*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC08) for environment
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
/* mask of address bits that overflow into the "EEPROM chip address" */
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
/*
* Init Memory Controller:
*
* BR0/1 and OR0/1 (FLASH)
*/
#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */
#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
/*-----------------------------------------------------------------------
* External Bus Controller (EBC) Setup
*/
/* Memory Bank 0 (Flash Bank 0) initialization */
#define CONFIG_SYS_EBC_PB0AP 0x92015480
#define CONFIG_SYS_EBC_PB0CR 0xFFC5A000 /* BAS=0xFFC,BS=4MB,BU=R/W,BW=16bit */
/* Memory Bank 1 (CAN/USB) initialization */
#define CONFIG_SYS_EBC_PB1AP 0x010053C0 /* enable Ready, BEM=1 */
#define CONFIG_SYS_EBC_PB1CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
/* Memory Bank 2 (Misc-IO/LEDs) initialization */
#define CONFIG_SYS_EBC_PB2AP 0x000004c0 /* no Ready, BEM=1 */
#define CONFIG_SYS_EBC_PB2CR 0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */
/* Memory Bank 3 (CAN Features) initialization */
#define CONFIG_SYS_EBC_PB3AP 0x80000040 /* no Ready, BEM=1 */
#define CONFIG_SYS_EBC_PB3CR 0xF021C000 /* BAS=0xF02,BS=1MB,BU=R/W,BW=32bit */
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in RAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x00ef0000 /* inside of SDRAM */
#define CONFIG_SYS_INIT_RAM_SIZE 0x0f00 /* Size of used area in RAM */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#endif /* __CONFIG_H */

3
include/configs/trats.h
View File

@ -263,6 +263,9 @@
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
#define I2C_SOFT_DECLARATIONS2
#define CONFIG_SYS_I2C_SOFT_SPEED_2 50000
#define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x7F
#define CONFIG_SOFT_I2C_READ_REPEATED_START
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_I2C_MULTI_BUS

2
include/i2c.h
View File

@ -390,7 +390,7 @@ unsigned int i2c_get_bus_speed(void);
# if !defined(CONFIG_SYS_MAX_I2C_BUS)
# define CONFIG_SYS_MAX_I2C_BUS 2
# endif
# define I2C_MULTI_BUS 0
# define I2C_MULTI_BUS 1
#else
# define CONFIG_SYS_MAX_I2C_BUS 1
# define I2C_MULTI_BUS 0

2
include/serial.h
View File

@ -26,7 +26,7 @@ extern struct serial_device serial_smc_device;
extern struct serial_device serial_scc_device;
extern struct serial_device *default_serial_console(void);
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
#if defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
defined(CONFIG_405EX) || defined(CONFIG_440) || \
defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) || \

1
spl/Makefile
View File

@ -80,6 +80,7 @@ LIBS-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/memory.o
LIBS-$(CONFIG_SPL_NET_SUPPORT) += net/libnet.o
LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/libnet.o
LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/phy/libphy.o
LIBS-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/net/phy/libphy.o
LIBS-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += drivers/usb/musb-new/libusb_musb-new.o
LIBS-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/libusb_gadget.o