RK806: Configure shutdown pin

PWRCTRL1 on RK806 is connected to GPIO0_A2, which gets set high by PSCI
SYSTEM_OFF.

This fixes shutdown from UEFI/ACPI.

Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com>

.gitmodules

@@ -4,9 +4,6 @@
 [submodule "edk2-non-osi"]
 	path = edk2-non-osi
 	url = https://github.com/tianocore/edk2-non-osi.git
-[submodule "edk2-platforms"]
-	path = edk2-platforms
-	url = https://github.com/tianocore/edk2-platforms.git
 [submodule "misc/rkbin"]
 	path = misc/rkbin
 	url = https://github.com/rockchip-linux/rkbin.git

README.md

@@ -12,7 +12,7 @@ Platinum devices are considered to have the best overall support, based on facto
 - Device Tree and peripherals compatible with mainline Linux. [**Required**]
 - Active interest from the vendor in supporting their hardware.
 - Hardware design choices:
-  - If an Ethernet port is present, Realtek PCIe NIC (for netboot) or RK GMAC. [**Required**]
+  - If an Ethernet port is present, Realtek PCIe NIC or integrated GMAC. [**Required**]
   - SPI NOR flash for dedicated firmware storage. [Preferred]
 
 Bronze devices may have limitations such as:
@@ -69,7 +69,7 @@ Note that this list is subject to change at any time as devices gain better supp
 ### Mainline compatibility mode
 | OS | Version | Tested/supported hardware | Notes |
 | --- | --- | --- | --- |
-| Generic upstream Linux | Kernel 6.10 or newer.<br> Tested with:<br> - Ubuntu 24.10<br> - Fedora Workstation 41 | Platform and kernel version dependent, see [Collabora's RK3588 upstream status](https://gitlab.collabora.com/hardware-enablement/rockchip-3588/notes-for-rockchip-3588/-/blob/main/mainline-status.md). | * Kernels older than 6.13 lack HDMI output. To work around this, see: [Device Tree configuration](#device-tree-configuration). |
+| Generic upstream Linux | Kernel 6.10 or newer.<br> Tested with:<br> - Ubuntu 24.10<br> - Fedora Workstation 41<br> - Fedora Workstation Rawhide | Platform and kernel version dependent, see [Collabora's RK3588 upstream status](https://gitlab.collabora.com/hardware-enablement/rockchip-3588/notes-for-rockchip-3588/-/blob/main/mainline-status.md). | * Kernels older than 6.13 lack HDMI output. To work around this, see: [Device Tree configuration](#device-tree-configuration). |
 
 > [!NOTE]
 > Mainline support is only available on [Platinum](#platinum) platforms.
@@ -87,11 +87,11 @@ Note that this list is subject to change at any time as devices gain better supp
 | PCIe 3.0 / 2.1                        | 🟢 Working     | |
 | SATA                                  | 🟢 Working     | |
 | SD/eMMC                               | 🟢 Working     | |
-| HDMI output                           | 🟡 Partial     | Single display with mode limited at 1080p 60 Hz |
-| DisplayPort output (USB-C)            | 🟡 Partial     | Mode fixed at 1080p 60 Hz, only works in one orientation of the Type-C port. Some displays may not work regardless. |
+| HDMI output                           | 🟢 Working     | |
+| DisplayPort output (USB-C)            | 🟡 Partial     | No hot-plug detect & EDID. Only works in one orientation of the Type-C port. Some displays may not work regardless. |
 | eDP output                            | 🟡 Partial     | Disabled, requires manual configuration depending on the platform and panel. |
 | DSI output                            | 🟢 Working     | Only enabled on Fydetab Duo. Requires manual configuration depending on the platform and panel. |
-| GMAC Ethernet                         | 🔴 Not working | Only brought-up for OS usage |
+| GMAC Ethernet                         | 🟢 Working     | |
 | Realtek PCIe Ethernet                 | 🟢 Working     | Some platforms don't have MAC addresses set, networking may not work in that case. |
 | Low-speed (GPIO/UART/I2C/SPI/PWM)     | 🟢 Working     | UART2 console available at 1500000 baud rate |
 | SPI NOR Flash                         | 🟢 Working     | |
@@ -109,7 +109,7 @@ Note that this list is subject to change at any time as devices gain better supp
 * Quality power supply that can provide at least 15 W. Depending on the peripherals you use, more may be needed.
 
   Note: on Mixtile Blade 3, a fixed voltage *higher than* 5V must be supplied. The board cannot power any external peripherals if the input voltage is just 5V. USB-PD negotiation is not supported by firmware.
-* HDMI or DisplayPort (USB-C) screen capable of at least 1080p 60Hz.
+* HDMI (preferred) or DisplayPort (USB-C) screen.
 * Optionally, if display is not available or for debugging purposes, an UART adapter capable of 1500000 baud rate (e.g. USB CH340, CP2104).
 
 ## 2. Download the firmware image
@@ -142,15 +142,27 @@ Also check the configuration options described below, some of which may need to
 If you experience any issues, please see the [Troubleshooting](#troubleshooting) section.
 
 # Configuration settings
-The UEFI provides a few configuration options, like CPU frequency, PCIe/SATA selection for an M.2 port, fan control, etc. These can be viewed and changed using the UI configuration menu (under `Device Manager` -> `Rockchip Platform Configuration`).
+The UEFI provides a few configuration options, like CPU frequency, PCIe/SATA selection for an M.2 port, fan control, etc. These can be viewed and changed using the UI configuration menu (under `Device Manager`->`Rockchip Platform Configuration`).
 
 Configuration through the user interface is fairly straightforward and help/navigation information is provided around the menus.
 
 ## Tips
-* CPU clocks are set to 816 MHz (boot default) on platforms without a cooling fan included. If you have adequate cooling, go to the configuration menu -> `CPU Performance` and set all Cluster Presets to `Maximum`.
+### Boot time optimization
+* If there are unused M.2/PCIe slots, you can disable them to skip initialization: `Device Manager`->`Rockchip Platform Configuration`->`PCIe/SATA/USB Combo PIPE PHY` and set the relevant PHYs to `Unconnected`. Do the same for `PCI Express 3.0` by setting `Support State` to `Disabled`.
+
+* Auto boot time-out can be decreased from `Boot Maintenance Manager`.
+
+* If network boot is not used, it can be disabled: `Device Manager`->`Network Stack Configuration` then uncheck `Network Stack`.
+
+* If you do not need the ability to hot-plug displays or use DisplayPort while in the firmware: `Device Manager`->`Rockchip Platform Configuration`->`Display` and set `Force Output` to `Disabled`. This will skip display initialization when none is connected.
+
+* By default, the firmware connects all boot devices regardless of whether they are needed for the current boot. This is done to address potential compatibility issues and generally takes a negligible amount of time, thus it is recommended to not change it. However, it is still possible to do so: `Boot Maintenance Manager`->`Boot Discovery Policy`.
+
+### Linux boot
+* If you're getting a Synchronous Exception when booting certain distros, go to `Device Manager`->`EFI Memory Attribute Protocol` and uncheck `Enable Protocol`.
 
 ## Device Tree configuration
-For rich Linux support, it is recommended to enable Device Tree mode. You can do so by going to the configuration menu -> `ACPI / Device Tree` and setting `Config Table Mode` to `Device Tree`.
+For rich Linux support, it is recommended to enable Device Tree mode. You can do so by going to `Device Manager`->`Rockchip Platform Configuration`->`ACPI / Device Tree` and setting `Config Table Mode` to `Device Tree`.
 
 The firmware provides two compatibility modes:
 * `Vendor` - compatible with Rockchip SDK Linux 5.10/6.1 kernel only.
@@ -159,10 +171,10 @@ The firmware provides two compatibility modes:
 [Platinum](#platinum) platforms will have the `Mainline` option enabled by default, while [Bronze](#bronze) ones will fall back to `Vendor`.
 
 > [!TIP]
-> In `Mainline` mode with generic Linux kernels older than 6.13, the HDMI output will not be usable. To use the UEFI-initialized display instead, go to the configuration menu -> `ACPI / Device Tree` and enable `Force UEFI GOP Display`. Note that GPU acceleration cannot work in this mode.
+> In `Mainline` mode with generic Linux kernels older than 6.13, the HDMI output will not be usable. To use the UEFI-initialized display instead, go to `Device Manager`->`Rockchip Platform Configuration`->`ACPI / Device Tree` and enable `Force UEFI GOP Display`. Note that GPU acceleration cannot work in this mode.
 
 ### Custom Device Tree Blob (DTB) override and overlays
-It is also possible to provide a custom DTB and overlays. To enable this, go to the configuration menu -> `ACPI / Device Tree` and set `Support DTB override & overlays` to `Enabled`.
+It is also possible to provide a custom DTB and overlays. To enable this, go to `Device Manager`->`Rockchip Platform Configuration`->`ACPI / Device Tree` and set `Support DTB override & overlays` to `Enabled`.
 
 The firmware will now look for overrides in the partition of a selected boot option / OS loader. In most cases, this will be the first FAT32 EFI System Partition.
 
@@ -226,6 +238,20 @@ dd if=FIRMWARE.img of=DESTINATION bs=512 skip=64 seek=64 conv=notrunc
 
 Here we skip the GPT and copy the firmware starting at offset 0x8000 (`64` blocks * `512` bytes block size) until its end. See [Flash layout](#flash-layout) for more details.
 
+## Flash SPI NOR from the UEFI Shell
+1) Copy the firmware image to a FAT32 partition on a storage drive and connect it to the device.
+
+2) Launch the UEFI Shell (press <kbd>F1</kbd> during boot or go to `Boot Manager`->`UEFI Shell`).
+
+3) Navigate to the partition / file system containing the firmware image:
+   * Use the `map` command to list all mounted file systems, e.g. `fs0:`, `fs1:`, etc. Type the file system name and press <kbd>Enter</kbd> to change directory to it.
+
+   * If you're unsure which file system to use, run `ls fsX:` (replace `X` with the actual number) to list its contents.
+
+4) Run `sf updatefile FIRMWARE.img 0x0` and wait for the update process to complete.
+
+5) Reboot the device.
+
 # Troubleshooting
 
 > [!IMPORTANT]
@@ -260,11 +286,13 @@ Additionally, holding the Recovery (or volume up) button while powering on the d
 Make sure you've flashed the firmware correctly and that it is the version designed for your device. In most cases this is the culprit.
 
 Assuming the firmware loads fine:
-* The display must support a resolution of at least 1080p at 60 Hz.
-* If you're using HDMI and the system has two ports, only one will work. Try both.
+* The display must support a resolution of at least 640 x 480 at 60 Hz.
+
+* Try booting without any display connected, then plug it in after a couple of seconds (when the status LED pattern changes). This will force the firmware to output at the minimum supported resolution. You can then increase the resolution by going to `Device Manager`->`Rockchip Platform Configuration`->`Display`.
+
 * If you're using USB-C to DisplayPort, only one orientation of the USB-C connector will work. Check both.
 
-If you are not able to get any display output, the only way to interact with UEFI is via the [serial console](#advanced-troubleshooting).
+If you are still not able to get any display output, the only way to interact with UEFI is via the [serial console](#advanced-troubleshooting).
 
 ### Configuration settings do not get saved
 This has been observed in cases where firmware was present on more than one device (SPI NOR, eMMC or SD). This is not a supported scenario, because UEFI will be unable to accurately determine the boot device it belongs to. The solution is to unplug or erase devices that may have other firmware on them.
@@ -275,7 +303,7 @@ This has been observed in cases where firmware was present on more than one devi
 * Make sure the power supply and cable are good.
 
 ### Networking does not work
-* Only Realtek PCIe and USB controllers are supported. Native Gigabit provided by RK3588 isn't.
+* Only integrated Gigabit Ethernet (GMAC), Realtek PCIe and USB controllers are supported.
 
 * Some boards with Realtek NICs do not have a MAC address set at factory and will show-up as being all zeros in UEFI, possibly preventing the adapter from obtaining an IP address.
 

build.sh

@@ -138,7 +138,7 @@ function _build(){
 
     export GCC_AARCH64_PREFIX="${CROSS_COMPILE}"
     export CLANG38_AARCH64_PREFIX="${CROSS_COMPILE}"
-    export PACKAGES_PATH="${ROOTDIR}/edk2:${ROOTDIR}/edk2-platforms:${ROOTDIR}/edk2-rockchip:${ROOTDIR}/devicetree:${ROOTDIR}/edk2-non-osi:${ROOTDIR}"
+    export PACKAGES_PATH="${ROOTDIR}/edk2:${ROOTDIR}/edk2-rockchip:${ROOTDIR}/devicetree:${ROOTDIR}/edk2-non-osi:${ROOTDIR}"
 
     make -C "${ROOTDIR}/edk2/BaseTools"
     source "${ROOTDIR}/edk2/edksetup.sh"
@@ -151,6 +151,9 @@ function _build(){
         -p "${ROOTDIR}/${DSC_FILE}" \
         -b "${RELEASE_TYPE}" \
         -D FIRMWARE_VER="${GIT_COMMIT}" \
+        -D NETWORK_ALLOW_HTTP_CONNECTIONS=TRUE \
+        -D NETWORK_ISCSI_ENABLE=TRUE \
+        -D INCLUDE_TFTP_COMMAND=TRUE \
         --pcd gRockchipTokenSpaceGuid.PcdFitImageFlashAddress=0x100000 \
         ${EDK2_FLAGS}
 

devicetree/mainline/rk3588-orangepi-5-plus-fixup.dts

@@ -1,140 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-#include "rk3588-orangepi-5-plus.dts"
-
-/ {
-	vbus5v0_typec: regulator-vbus5v0-typec {
-		compatible = "regulator-fixed";
-		regulator-name = "vbus5v0_typec";
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		enable-active-high;
-		gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&typec5v_pwren>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-};
-
-&i2c6 {
-	fusb302: typec-portc@22 {
-		compatible = "fcs,fusb302";
-		reg = <0x22>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&usbc0_int>;
-		vbus-supply = <&vbus5v0_typec>;
-
-		usb_con: connector {
-			compatible = "usb-c-connector";
-			data-role = "dual";
-			label = "USB-C";
-			power-role = "source";
-			source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
-
-			ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				port@0 {
-					reg = <0>;
-
-					usbc0_orien_sw: endpoint {
-						remote-endpoint = <&usbdp_phy0_orientation_switch>;
-					};
-				};
-
-				port@1 {
-					reg = <1>;
-
-					usbc0_role_sw: endpoint {
-						remote-endpoint = <&dwc3_0_role_switch>;
-					};
-				};
-
-				port@2 {
-					reg = <2>;
-
-					dp_altmode_mux: endpoint {
-						remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
-					};
-				};
-			};
-		};
-	};
-};
-
-&pinctrl {
-	usb-typec {
-		usbc0_int: usbc0-int {
-			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-
-		typec5v_pwren: typec5v-pwren {
-			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&u2phy0 {
-	status = "okay";
-};
-
-&u2phy0_otg {
-	status = "okay";
-};
-
-&u2phy1 {
-	status = "okay";
-};
-
-&u2phy1_otg {
-	phy-supply = <&vcc5v0_usb20>;
-	status = "okay";
-};
-
-&usbdp_phy0 {
-	mode-switch;
-	orientation-switch;
-	sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
-	sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
-	status = "okay";
-
-	port {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		usbdp_phy0_orientation_switch: endpoint@0 {
-			reg = <0>;
-			remote-endpoint = <&usbc0_orien_sw>;
-		};
-
-		usbdp_phy0_dp_altmode_mux: endpoint@1 {
-			reg = <1>;
-			remote-endpoint = <&dp_altmode_mux>;
-		};
-	};
-};
-
-&usbdp_phy1 {
-	phy-supply = <&vcc5v0_usb20>;
-	status = "okay";
-};
-
-&usb_host0_xhci {
-	usb-role-switch;
-	status = "okay";
-
-	port {
-		dwc3_0_role_switch: endpoint {
-			remote-endpoint = <&usbc0_role_sw>;
-		};
-	};
-};
-
-&usb_host1_xhci {
-	dr_mode = "host";
-	status = "okay";
-};

devicetree/mainline/rk3588-rock-5-itx-fixup.dts

@@ -1,21 +1,9 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 
-#include <dt-bindings/soc/rockchip,vop2.h>
 #include "rk3588-rock-5-itx.dts"
 
 / {
 	/delete-node/ pcie-oscillator;
-
-	hdmi0-con {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi0_con_in: endpoint {
-				remote-endpoint = <&hdmi0_out_con>;
-			};
-		};
-	};
 };
 
 /*
@@ -43,38 +31,3 @@
 		      "aclk_dbi", "pclk",
 		      "aux", "pipe";
 };
-
-&hdmi0 {
-	status = "okay";
-};
-
-&hdmi0_in {
-	hdmi0_in_vp0: endpoint {
-		remote-endpoint = <&vp0_out_hdmi0>;
-	};
-};
-
-&hdmi0_out {
-	hdmi0_out_con: endpoint {
-		remote-endpoint = <&hdmi0_con_in>;
-	};
-};
-
-&hdptxphy_hdmi0 {
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vop {
-	status = "okay";
-};
-
-&vp0 {
-	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-		remote-endpoint = <&hdmi0_in_vp0>;
-	};
-};

edk2-rockchip/Platform/Ameridroid/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/Ameridroid/IndiedroidNova/IndiedroidNova.dsc

@@ -27,6 +27,9 @@
   FLASH_DEFINITION               = Silicon/Rockchip/RK3588/RK3588.fdf
   RK_PLATFORM_FVMAIN_MODULES     = $(PLATFORM_DIRECTORY)/$(PLATFORM_NAME).Modules.fdf.inc
 
+  # GMAC is not exposed
+  DEFINE RK3588_GMAC_ENABLE = FALSE
+
   # No status LED on this platform.
   DEFINE RK_STATUS_LED_ENABLE = FALSE
 
@@ -74,13 +77,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -103,6 +99,14 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Ameridroid/IndiedroidNova/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -17,29 +17,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
- // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -51,9 +51,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -66,9 +66,9 @@ SdhciEmmcIoMux (
   /* Do not override, set by earlier boot stages. */
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -77,11 +77,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -90,24 +90,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -123,7 +126,7 @@ NorFspiIomux (
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   /* No GMAC here */
@@ -132,51 +135,51 @@ GmacIomux (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    break;
-  case 4:
-    GpioPinSetFunction(1, GPIO_PIN_PA3, 9); //i2c4_scl_m3
-    GpioPinSetFunction(1, GPIO_PIN_PA2, 9); //i2c4_sda_m3
-    break;
-  case 5:
-    GpioPinSetFunction(3, GPIO_PIN_PC7, 9); //i2c5_scl_m0
-    GpioPinSetFunction(3, GPIO_PIN_PD0, 9); //i2c5_sda_m0
-    break;
-  case 6:
-    GpioPinSetFunction(4, GPIO_PIN_PB1, 9); //i2c6_scl_m3
-    GpioPinSetFunction(4, GPIO_PIN_PB0, 9); //i2c6_sda_m3
-    break;
-  case 7:
-    GpioPinSetFunction(1, GPIO_PIN_PD0, 9); //i2c7_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PD1, 9); //i2c7_sda_m0
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      break;
+    case 4:
+      GpioPinSetFunction (1, GPIO_PIN_PA3, 9); // i2c4_scl_m3
+      GpioPinSetFunction (1, GPIO_PIN_PA2, 9); // i2c4_sda_m3
+      break;
+    case 5:
+      GpioPinSetFunction (3, GPIO_PIN_PC7, 9); // i2c5_scl_m0
+      GpioPinSetFunction (3, GPIO_PIN_PD0, 9); // i2c5_sda_m0
+      break;
+    case 6:
+      GpioPinSetFunction (4, GPIO_PIN_PB1, 9); // i2c6_scl_m3
+      GpioPinSetFunction (4, GPIO_PIN_PB0, 9); // i2c6_sda_m3
+      break;
+    case 7:
+      GpioPinSetFunction (1, GPIO_PIN_PD0, 9); // i2c7_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PD1, 9); // i2c7_sda_m0
+      break;
+    default:
+      break;
   }
 }
 
@@ -186,7 +189,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
 
   /* Set GPIO4 PA5 output high to enable USB-C VBUS */
   GpioPinWrite (4, GPIO_PIN_PA5, TRUE);
@@ -199,22 +202,23 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset to gpio output mode */
-  if(Segment == PCIE_SEGMENT_PCIE20L2) { // RTL8111
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
+    // RTL8111
     GpioPinSetDirection (3, GPIO_PIN_PD1, GPIO_PIN_OUTPUT);
   }
 }
@@ -222,8 +226,8 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   /* nothing to power on */
@@ -232,21 +236,41 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L2) {
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
     GpioPinWrite (3, GPIO_PIN_PD1, !Enable);
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER2,
-  .ChannelID = PWM_CHANNEL3,
-  .PeriodNs = 4000000,
-  .DutyNs = 4000000,
-  .Polarity = FALSE,
+  .ChannelID    = PWM_CHANNEL3,
+  .PeriodNs     = 4000000,
+  .DutyNs       = 4000000,
+  .Polarity     = FALSE,
 }; // PWM2_CH3
 
 VOID
@@ -263,7 +287,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
   pwm_data.DutyNs = pwm_data.PeriodNs * Percentage / 100;
@@ -282,7 +306,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   // No controllable LEDs on this platform
@@ -291,13 +315,15 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 
@@ -318,5 +344,5 @@ PlatformEarlyInit (
   )
 {
   // Configure various things specific to this platform
-  GpioPinSetFunction(4, GPIO_PIN_PA7, 0); //jdet
+  GpioPinSetFunction (4, GPIO_PIN_PA7, 0); // jdet
 }

edk2-rockchip/Platform/BuzzTV/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/BuzzTV/PowerStation6/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -16,29 +16,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 837500),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  837500),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -50,9 +50,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 
   /* vcc_3v3_sd_s0 */
   GpioPinWrite (4, GPIO_PIN_PA5, TRUE);
@@ -66,14 +66,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdmmc0 iomux */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -82,11 +82,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -95,24 +95,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -122,31 +125,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -186,45 +191,45 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    GpioPinSetFunction(0, GPIO_PIN_PD4, 9); //i2c1_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD5, 9); //i2c1_sda_m2
-    break;
-  case 2:
-    break;
-  case 3:
-    break;
-  case 4:
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      GpioPinSetFunction (0, GPIO_PIN_PD4, 9); // i2c1_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD5, 9); // i2c1_sda_m2
+      break;
+    case 2:
+      break;
+    case 3:
+      break;
+    case 4:
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      break;
+    default:
+      break;
   }
 }
 
@@ -234,10 +239,10 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
 
   /* vcc5v0-host */
-  GpioPinWrite(4, GPIO_PIN_PB0, TRUE);
+  GpioPinWrite (4, GPIO_PIN_PB0, TRUE);
   GpioPinSetDirection (4, GPIO_PIN_PB0, GPIO_PIN_OUTPUT);
 }
 
@@ -247,21 +252,21 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4: // M.2 M Key
       /* reset */
       GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT);
@@ -280,11 +285,11 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (2, GPIO_PIN_PC5, Enable);
       break;
@@ -298,11 +303,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (4, GPIO_PIN_PB6, !Enable);
       break;
@@ -314,6 +319,26 @@ PciePeReset (
   }
 }
 
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
 VOID
 EFIAPI
 PwmFanIoSetup (
@@ -325,7 +350,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
 }
@@ -347,7 +372,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (3, GPIO_PIN_PD0, !Enable);
@@ -357,13 +382,15 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 

edk2-rockchip/Platform/BuzzTV/PowerStation6/PowerStation6.dsc

@@ -71,13 +71,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -102,6 +95,14 @@
   gRK3588TokenSpaceGuid.PcdGmac1Supported|TRUE
   gRK3588TokenSpaceGuid.PcdGmac1TxDelay|0x43
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Firefly/AIO-3588Q/AIO-3588Q.dsc.inc

@@ -72,13 +72,6 @@
   gRockchipTokenSpaceGuid.PcdPca9555Address|0x21
   gRockchipTokenSpaceGuid.PcdPca9555Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -115,6 +108,15 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_DP0,
+    VOP_OUTPUT_IF_DP1
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Firefly/AIO-3588Q/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -20,29 +20,29 @@
 
 #include <Protocol/Pca9555.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
- // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -50,39 +50,45 @@ static struct regulator_init_data rk806_init_data[] = {
 EFI_STATUS
 EFIAPI
 GetPca9555Protocol (
-  IN OUT PCA95XX_PROTOCOL        **Pca95xxProtocl
+  IN OUT PCA95XX_PROTOCOL  **Pca95xxProtocl
   )
 {
-  EFI_HANDLE          *HandleBuffer;
-  EFI_STATUS           Status;
-  UINTN                HandleCount;
+  EFI_HANDLE  *HandleBuffer;
+  EFI_STATUS  Status;
+  UINTN       HandleCount;
 
   /* Locate Handles of all PCA95XX_PROTOCOL producers */
-  Status = gBS->LocateHandleBuffer (ByProtocol,
+  Status = gBS->LocateHandleBuffer (
+                  ByProtocol,
                   &gPca95xxProtocolGuid,
                   NULL,
                   &HandleCount,
-                  &HandleBuffer);
+                  &HandleBuffer
+                  );
   if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "%a: Unable to locate handles\n", __FUNCTION__));
     return Status;
   }
 
-  DEBUG ((DEBUG_INFO,
-          "%a: got %d PCA95XX_PROTOCOLs\n",
-          __FUNCTION__,
-          HandleCount));
+  DEBUG ((
+    DEBUG_INFO,
+    "%a: got %d PCA95XX_PROTOCOLs\n",
+    __FUNCTION__,
+    HandleCount
+    ));
 
   /*
    * Open Pca95xxProtocl. With EFI_OPEN_PROTOCOL_GET_PROTOCOL attribute
    * the consumer is not obliged to call CloseProtocol.
    */
-  Status = gBS->OpenProtocol (HandleBuffer[0],
+  Status = gBS->OpenProtocol (
+                  HandleBuffer[0],
                   &gPca95xxProtocolGuid,
                   (VOID **)Pca95xxProtocl,
                   HandleBuffer[0],
                   NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
 
   return Status;
 }
@@ -94,9 +100,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -109,9 +115,9 @@ SdhciEmmcIoMux (
   /* Do not override, set by earlier boot stages. */
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -120,11 +126,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -133,24 +139,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -166,7 +175,7 @@ NorFspiIomux (
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -222,39 +231,39 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); // I2C0_SCL_M2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); // I2C0_SDA_M2
-    break;
-  case 1:
-    GpioPinSetFunction(0, GPIO_PIN_PD4, 9); // I2C1_SCL_M2
-    GpioPinSetFunction(0, GPIO_PIN_PD5, 9); // I2C1_SDA_M2
-    break;
-  case 3:
-    GpioPinSetFunction(1, GPIO_PIN_PC1, 9); // I2C3_SCL_M0
-    GpioPinSetFunction(1, GPIO_PIN_PC0, 9); // I2C3_SDA_M0
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); // I2C6_SCL_M0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); // I2C6_SDA_M0
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // I2C0_SCL_M2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // I2C0_SDA_M2
+      break;
+    case 1:
+      GpioPinSetFunction (0, GPIO_PIN_PD4, 9); // I2C1_SCL_M2
+      GpioPinSetFunction (0, GPIO_PIN_PD5, 9); // I2C1_SDA_M2
+      break;
+    case 3:
+      GpioPinSetFunction (1, GPIO_PIN_PC1, 9); // I2C3_SCL_M0
+      GpioPinSetFunction (1, GPIO_PIN_PC0, 9); // I2C3_SDA_M0
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // I2C6_SCL_M0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // I2C6_SDA_M0
+      break;
+    default:
+      break;
   }
 }
 
@@ -264,53 +273,53 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  EFI_STATUS Status = EFI_SUCCESS;
-  PCA95XX_PROTOCOL *Pca95xxProtocol;
+  EFI_STATUS        Status = EFI_SUCCESS;
+  PCA95XX_PROTOCOL  *Pca95xxProtocol;
 
   /* On Firefly AIO-3588Q this is controlled via the PCA9555. */
-  Status = GetPca9555Protocol(&Pca95xxProtocol);
-  if (EFI_ERROR(Status)) {
+  Status = GetPca9555Protocol (&Pca95xxProtocol);
+  if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "UsbPortPowerEnable failed to get PCA9555! (%d)\n", Status));
   } else {
     /* USB-C */
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      12, /* vbus5v0_typec_pwr_en */
-      GPIO_MODE_OUTPUT_0
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    12, /* vbus5v0_typec_pwr_en */
+                                    GPIO_MODE_OUTPUT_0
+                                    );
 
-    gBS->Stall(1200000);
+    gBS->Stall (1200000);
 
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      12, /* vbus5v0_typec_pwr_en */
-      GPIO_MODE_OUTPUT_1
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    12, /* vbus5v0_typec_pwr_en */
+                                    GPIO_MODE_OUTPUT_1
+                                    );
 
     /* other USB stuff */
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      5, /* vcc5v0_host */
-      GPIO_MODE_OUTPUT_1
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    5, /* vcc5v0_host */
+                                    GPIO_MODE_OUTPUT_1
+                                    );
 
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      4, /* vcc_hub_reset */
-      GPIO_MODE_OUTPUT_1
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    4, /* vcc_hub_reset */
+                                    GPIO_MODE_OUTPUT_1
+                                    );
 
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      6, /* vcc_hub3_reset */
-      GPIO_MODE_OUTPUT_1
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    6, /* vcc_hub3_reset */
+                                    GPIO_MODE_OUTPUT_1
+                                    );
 
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      7, /* vcc5v0_host3 */
-      GPIO_MODE_OUTPUT_1
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    7, /* vcc5v0_host3 */
+                                    GPIO_MODE_OUTPUT_1
+                                    );
   }
 }
 
@@ -320,95 +329,116 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   switch (Segment) {
-  case PCIE_SEGMENT_PCIE30X4:
-    GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT); // PCIE30X4_PERSTN_M1
-    GpioPinSetDirection (4, GPIO_PIN_PC6, GPIO_PIN_OUTPUT); // vcc3v3_pcie30
-    break;
-  case PCIE_SEGMENT_PCIE20L0:
-    GpioPinSetDirection (1, GPIO_PIN_PB4, GPIO_PIN_OUTPUT);
-    break;
-  case PCIE_SEGMENT_PCIE20L1:
-    break;
-  case PCIE_SEGMENT_PCIE20L2:
-    break;
+    case PCIE_SEGMENT_PCIE30X4:
+      GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT); // PCIE30X4_PERSTN_M1
+      GpioPinSetDirection (4, GPIO_PIN_PC6, GPIO_PIN_OUTPUT); // vcc3v3_pcie30
+      break;
+    case PCIE_SEGMENT_PCIE20L0:
+      GpioPinSetDirection (1, GPIO_PIN_PB4, GPIO_PIN_OUTPUT);
+      break;
+    case PCIE_SEGMENT_PCIE20L1:
+      break;
+    case PCIE_SEGMENT_PCIE20L2:
+      break;
   }
 }
 
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   switch (Segment) {
-  case PCIE_SEGMENT_PCIE30X4:
-    GpioPinWrite (4, GPIO_PIN_PC6, Enable); // vcc3v3_pcie30
-    break;
-  case PCIE_SEGMENT_PCIE20L0:
-    break;
-  case PCIE_SEGMENT_PCIE20L1:
-    break;
-  case PCIE_SEGMENT_PCIE20L2:
-    break;
+    case PCIE_SEGMENT_PCIE30X4:
+      GpioPinWrite (4, GPIO_PIN_PC6, Enable); // vcc3v3_pcie30
+      break;
+    case PCIE_SEGMENT_PCIE20L0:
+      break;
+    case PCIE_SEGMENT_PCIE20L1:
+      break;
+    case PCIE_SEGMENT_PCIE20L2:
+      break;
   }
 }
 
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  EFI_STATUS Status = EFI_SUCCESS;
-  PCA95XX_PROTOCOL *Pca95xxProtocol;
+  EFI_STATUS        Status = EFI_SUCCESS;
+  PCA95XX_PROTOCOL  *Pca95xxProtocol;
 
   switch (Segment) {
-  case PCIE_SEGMENT_PCIE30X4:
-    GpioPinWrite (4, GPIO_PIN_PB6, !Enable); // PCIE30X4_PERSTN_M1
-    break;
-  case PCIE_SEGMENT_PCIE20L0:
-    GpioPinWrite (1, GPIO_PIN_PB4, !Enable);
-    break;
-  case PCIE_SEGMENT_PCIE20L1:
-    break;
-  case PCIE_SEGMENT_PCIE20L2:
-    Status = GetPca9555Protocol(&Pca95xxProtocol);
-    if (EFI_ERROR(Status)) {
-      DEBUG ((DEBUG_ERROR, "PciePeReset(L2) failed to get PCA9555! (%d)\n", Status));
-    } else {
-      Pca95xxProtocol->GpioProtocol.Set(
-        &Pca95xxProtocol->GpioProtocol,
-        14, /* PCA_IO1_6 */
-        Enable ? GPIO_MODE_OUTPUT_0 : GPIO_MODE_OUTPUT_1
-      );
-    }
-    break;
+    case PCIE_SEGMENT_PCIE30X4:
+      GpioPinWrite (4, GPIO_PIN_PB6, !Enable); // PCIE30X4_PERSTN_M1
+      break;
+    case PCIE_SEGMENT_PCIE20L0:
+      GpioPinWrite (1, GPIO_PIN_PB4, !Enable);
+      break;
+    case PCIE_SEGMENT_PCIE20L1:
+      break;
+    case PCIE_SEGMENT_PCIE20L2:
+      Status = GetPca9555Protocol (&Pca95xxProtocol);
+      if (EFI_ERROR (Status)) {
+        DEBUG ((DEBUG_ERROR, "PciePeReset(L2) failed to get PCA9555! (%d)\n", Status));
+      } else {
+        Pca95xxProtocol->GpioProtocol.Set (
+                                        &Pca95xxProtocol->GpioProtocol,
+                                        14, /* PCA_IO1_6 */
+                                        Enable ? GPIO_MODE_OUTPUT_0 : GPIO_MODE_OUTPUT_1
+                                        );
+      }
+
+      break;
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER3,
-  .ChannelID = PWM_CHANNEL3,
-  .PeriodNs = 50000,
-  .DutyNs = 50000,
-  .Polarity = FALSE,
+  .ChannelID    = PWM_CHANNEL3,
+  .PeriodNs     = 50000,
+  .DutyNs       = 50000,
+  .Polarity     = FALSE,
 }; // PWM15
 
 VOID
@@ -425,7 +455,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
   pwm_data.DutyNs = pwm_data.PeriodNs * Percentage / 100;
@@ -445,7 +475,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (3, GPIO_PIN_PB2, Enable);
@@ -454,10 +484,11 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
 

edk2-rockchip/Platform/Firefly/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/Firefly/ITX-3588J/ITX-3588J.dsc.inc

@@ -69,13 +69,6 @@
   gRockchipTokenSpaceGuid.PcdPca9555Address|0x21
   gRockchipTokenSpaceGuid.PcdPca9555Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -106,6 +99,16 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_HDMI1,
+    VOP_OUTPUT_IF_DP0,
+    VOP_OUTPUT_IF_DP1
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Firefly/ITX-3588J/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -20,29 +20,29 @@
 
 #include <Protocol/Pca9555.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
- // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -50,40 +50,45 @@ static struct regulator_init_data rk806_init_data[] = {
 EFI_STATUS
 EFIAPI
 GetPca9555Protocol (
-  IN OUT PCA95XX_PROTOCOL        **Pca95xxProtocl
+  IN OUT PCA95XX_PROTOCOL  **Pca95xxProtocl
   )
 {
-  EFI_HANDLE          *HandleBuffer;
-  EFI_STATUS           Status;
-  UINTN                HandleCount;
-  UINTN                Index;
+  EFI_HANDLE  *HandleBuffer;
+  EFI_STATUS  Status;
+  UINTN       HandleCount;
 
   /* Locate Handles of all PCA95XX_PROTOCOL producers */
-  Status = gBS->LocateHandleBuffer (ByProtocol,
+  Status = gBS->LocateHandleBuffer (
+                  ByProtocol,
                   &gPca95xxProtocolGuid,
                   NULL,
                   &HandleCount,
-                  &HandleBuffer);
+                  &HandleBuffer
+                  );
   if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "%a: Unable to locate handles\n", __FUNCTION__));
     return Status;
   }
 
-  DEBUG ((DEBUG_INFO,
-          "%a: got %d PCA95XX_PROTOCOLs\n",
-          __FUNCTION__,
-          HandleCount));
+  DEBUG ((
+    DEBUG_INFO,
+    "%a: got %d PCA95XX_PROTOCOLs\n",
+    __FUNCTION__,
+    HandleCount
+    ));
 
   /*
    * Open Pca95xxProtocl. With EFI_OPEN_PROTOCOL_GET_PROTOCOL attribute
    * the consumer is not obliged to call CloseProtocol.
    */
-  Status = gBS->OpenProtocol (HandleBuffer[0],
+  Status = gBS->OpenProtocol (
+                  HandleBuffer[0],
                   &gPca95xxProtocolGuid,
                   (VOID **)Pca95xxProtocl,
                   HandleBuffer[0],
                   NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
 
   return Status;
 }
@@ -95,9 +100,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -107,14 +112,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdmmc0 iomux */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -123,11 +128,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -136,24 +141,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -163,31 +171,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -243,53 +253,53 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    /* io mux M2 */
-    PMU2_IOC->GPIO0D_IOMUX_SEL_L = (0x0F00UL << 16) | 0x0300;
-    PMU2_IOC->GPIO0D_IOMUX_SEL_L = (0x00F0UL << 16) | 0x0030;
-    break;
-  case 1:
-    /* io mux */
-    //BUS_IOC->GPIO0B_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0990;
-    //PMU2_IOC->GPIO0B_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0880;
-    break;
-  case 2:
-    /* io mux */
-    BUS_IOC->GPIO0B_IOMUX_SEL_H = (0xF000UL << 16) | 0x9000;
-    BUS_IOC->GPIO0C_IOMUX_SEL_L = (0x000FUL << 16) | 0x0009;
-    PMU2_IOC->GPIO0B_IOMUX_SEL_H = (0xF000UL << 16) | 0x8000;
-    PMU2_IOC->GPIO0C_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
-    break;
-  case 3:
-    break;
-  case 4:
-    break;
-  case 5:
-    break;
-  case 6:
-    /* io mux M0 */
-    BUS_IOC->GPIO0C_IOMUX_SEL_H = (0xF000UL << 16) | 0x9000;
-    BUS_IOC->GPIO0D_IOMUX_SEL_L = (0x000FUL << 16) | 0x0009;
-    PMU2_IOC->GPIO0C_IOMUX_SEL_H = (0xF000UL << 16) | 0x8000;
-    PMU2_IOC->GPIO0D_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
-    break;
-  default:
-    break;
+    case 0:
+      /* io mux M2 */
+      PMU2_IOC->GPIO0D_IOMUX_SEL_L = (0x0F00UL << 16) | 0x0300;
+      PMU2_IOC->GPIO0D_IOMUX_SEL_L = (0x00F0UL << 16) | 0x0030;
+      break;
+    case 1:
+      /* io mux */
+      // BUS_IOC->GPIO0B_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0990;
+      // PMU2_IOC->GPIO0B_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0880;
+      break;
+    case 2:
+      /* io mux */
+      BUS_IOC->GPIO0B_IOMUX_SEL_H  = (0xF000UL << 16) | 0x9000;
+      BUS_IOC->GPIO0C_IOMUX_SEL_L  = (0x000FUL << 16) | 0x0009;
+      PMU2_IOC->GPIO0B_IOMUX_SEL_H = (0xF000UL << 16) | 0x8000;
+      PMU2_IOC->GPIO0C_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+      break;
+    case 3:
+      break;
+    case 4:
+      break;
+    case 5:
+      break;
+    case 6:
+      /* io mux M0 */
+      BUS_IOC->GPIO0C_IOMUX_SEL_H  = (0xF000UL << 16) | 0x9000;
+      BUS_IOC->GPIO0D_IOMUX_SEL_L  = (0x000FUL << 16) | 0x0009;
+      PMU2_IOC->GPIO0C_IOMUX_SEL_H = (0xF000UL << 16) | 0x8000;
+      PMU2_IOC->GPIO0D_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+      break;
+    default:
+      break;
   }
 }
 
@@ -299,53 +309,53 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  EFI_STATUS Status = EFI_SUCCESS;
-  PCA95XX_PROTOCOL *Pca95xxProtocol;
+  EFI_STATUS        Status = EFI_SUCCESS;
+  PCA95XX_PROTOCOL  *Pca95xxProtocol;
 
   /* On Firefly ITX-3588J this is controlled via the PCA9555. */
-  Status = GetPca9555Protocol(&Pca95xxProtocol);
-  if (EFI_ERROR(Status)) {
+  Status = GetPca9555Protocol (&Pca95xxProtocol);
+  if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "Failed to get PCA9555! (%d)\n", Status));
   } else {
     /* USB-C */
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      12, /* vbus5v0_typec_pwr_en */
-      GPIO_MODE_OUTPUT_0
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    12, /* vbus5v0_typec_pwr_en */
+                                    GPIO_MODE_OUTPUT_0
+                                    );
 
-    gBS->Stall(1200000);
+    gBS->Stall (1200000);
 
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      12, /* vbus5v0_typec_pwr_en */
-      GPIO_MODE_OUTPUT_1
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    12, /* vbus5v0_typec_pwr_en */
+                                    GPIO_MODE_OUTPUT_1
+                                    );
 
     /* other USB stuff */
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      5, /* vcc5v0_host */
-      GPIO_MODE_OUTPUT_1
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    5, /* vcc5v0_host */
+                                    GPIO_MODE_OUTPUT_1
+                                    );
 
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      4, /* vcc_hub_reset */
-      GPIO_MODE_OUTPUT_1
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    4, /* vcc_hub_reset */
+                                    GPIO_MODE_OUTPUT_1
+                                    );
 
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      6, /* vcc_hub3_reset */
-      GPIO_MODE_OUTPUT_1
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    6, /* vcc_hub3_reset */
+                                    GPIO_MODE_OUTPUT_1
+                                    );
 
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      7, /* vcc5v0_host3 */
-      GPIO_MODE_OUTPUT_1
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    7, /* vcc5v0_host3 */
+                                    GPIO_MODE_OUTPUT_1
+                                    );
   }
 }
 
@@ -355,22 +365,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  if(Segment == PCIE_SEGMENT_PCIE30X4) {
+  if (Segment == PCIE_SEGMENT_PCIE30X4) {
     /* reset */
     GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT);
     /* vcc3v3_pcie30 */
@@ -381,11 +391,11 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE30X4) {
+  if (Segment == PCIE_SEGMENT_PCIE30X4) {
     /* vcc3v3_pcie30 */
     GpioPinWrite (2, GPIO_PIN_PC5, Enable);
   }
@@ -394,21 +404,51 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE30X4) {
+  if (Segment == PCIE_SEGMENT_PCIE30X4) {
     GpioPinWrite (4, GPIO_PIN_PB6, !Enable);
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+    case 1:
+      GpioPinSetFunction (3, GPIO_PIN_PC4, 5); // hdmim2_tx1_cec
+      GpioPinSetPull (3, GPIO_PIN_PC4, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA6, 5); // hdmim0_tx1_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC6, 5); // hdmim1_tx1_scl
+      GpioPinSetPull (3, GPIO_PIN_PC6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC5, 5); // hdmim1_tx1_sda
+      GpioPinSetPull (3, GPIO_PIN_PC5, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER2,
-  .ChannelID = PWM_CHANNEL3,
-  .PeriodNs = 50000,
-  .DutyNs = 50000,
-  .Polarity = TRUE,
+  .ChannelID    = PWM_CHANNEL3,
+  .PeriodNs     = 50000,
+  .DutyNs       = 50000,
+  .Polarity     = TRUE,
 }; // PWM2_CH3
 
 VOID
@@ -417,42 +457,42 @@ PwmFanIoSetup (
   VOID
   )
 {
-  EFI_STATUS Status = EFI_SUCCESS;
-  PCA95XX_PROTOCOL *Pca95xxProtocol;
+  EFI_STATUS        Status = EFI_SUCCESS;
+  PCA95XX_PROTOCOL  *Pca95xxProtocol;
 
-  Status = GetPca9555Protocol(&Pca95xxProtocol);
-  if (EFI_ERROR(Status)) {
+  Status = GetPca9555Protocol (&Pca95xxProtocol);
+  if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "Failed to get PCA9555! (%d)\n", Status));
   } else {
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      11, /* vcc_fan_pwr_en */
-      GPIO_MODE_OUTPUT_1
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    11, /* vcc_fan_pwr_en */
+                                    GPIO_MODE_OUTPUT_1
+                                    );
   }
 }
 
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
-  EFI_STATUS Status = EFI_SUCCESS;
-  PCA95XX_PROTOCOL *Pca95xxProtocol;
+  EFI_STATUS        Status = EFI_SUCCESS;
+  PCA95XX_PROTOCOL  *Pca95xxProtocol;
 
-  Status = GetPca9555Protocol(&Pca95xxProtocol);
-  if (EFI_ERROR(Status)) {
+  Status = GetPca9555Protocol (&Pca95xxProtocol);
+  if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "Failed to get PCA9555! (%d)\n", Status));
   } else {
     /* (SS) NB: (TBA?) It doesn't *appear* we can regulate the fan speed,
      *      only power up/down, but I could be wrong
      */
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      11, /* vcc_fan_pwr_en */
-      (Percentage > 0) ? GPIO_MODE_OUTPUT_1 : GPIO_MODE_OUTPUT_0
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    11, /* vcc_fan_pwr_en */
+                                    (Percentage > 0) ? GPIO_MODE_OUTPUT_1 : GPIO_MODE_OUTPUT_0
+                                    );
   }
 }
 
@@ -466,7 +506,7 @@ PlatformInitLeds (
   GpioPinWrite (1, GPIO_PIN_PB3, TRUE);
   GpioPinSetDirection (1, GPIO_PIN_PB3, GPIO_PIN_OUTPUT);
 
-#if 0
+ #if 0
   /* Red off, Green for status, Blue for power */
   GpioPinWrite (3, GPIO_PIN_PB2, FALSE);
   GpioPinSetDirection (3, GPIO_PIN_PB2, GPIO_PIN_OUTPUT);
@@ -474,43 +514,45 @@ PlatformInitLeds (
   GpioPinSetDirection (3, GPIO_PIN_PC0, GPIO_PIN_OUTPUT);
   GpioPinWrite (1, GPIO_PIN_PD5, TRUE);
   GpioPinSetDirection (1, GPIO_PIN_PD5, GPIO_PIN_OUTPUT);
-#endif
+ #endif
 }
 
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   /* (SS) does not seem to work and causes errors on I2C complaining
    * about something being too high
    */
-#if 0
-  EFI_STATUS Status = EFI_SUCCESS;
-  PCA95XX_PROTOCOL *Pca95xxProtocol;
+ #if 0
+  EFI_STATUS        Status = EFI_SUCCESS;
+  PCA95XX_PROTOCOL  *Pca95xxProtocol;
 
   /* On Firefly ITX-3588J this is controlled via the PCA9555. */
-  Status = GetPca9555Protocol(&Pca95xxProtocol);
-  if (EFI_ERROR(Status)) {
+  Status = GetPca9555Protocol (&Pca95xxProtocol);
+  if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "Failed to get PCA9555! (%d)\n", Status));
   } else {
-    Pca95xxProtocol->GpioProtocol.Set(
-      &Pca95xxProtocol->GpioProtocol,
-      3, /* user_led */
-      Enable ? GPIO_MODE_OUTPUT_1 : GPIO_MODE_OUTPUT_0
-    );
+    Pca95xxProtocol->GpioProtocol.Set (
+                                    &Pca95xxProtocol->GpioProtocol,
+                                    3, /* user_led */
+                                    Enable ? GPIO_MODE_OUTPUT_1 : GPIO_MODE_OUTPUT_0
+                                    );
   }
-#endif
+
+ #endif
 }
 
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
 
@@ -528,5 +570,4 @@ PlatformEarlyInit (
   VOID
   )
 {
-
 }

edk2-rockchip/Platform/Firefly/ROC-RK3588S-PC/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -18,29 +18,29 @@
 #include <VarStoreData.h>
 #include <Library/UefiBootServicesTableLib.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
- // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -52,9 +52,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -64,14 +64,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdmmc0 iomux */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -80,11 +80,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -93,24 +93,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -120,31 +123,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -184,51 +189,51 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    GpioPinSetFunction(1, GPIO_PIN_PC1, 9); //i2c3_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PC0, 9); //i2c3_sda_m0
-    break;
-  case 4:
-    GpioPinSetFunction(1, GPIO_PIN_PA3, 9); //i2c4_scl_m3
-    GpioPinSetFunction(1, GPIO_PIN_PA2, 9); //i2c4_sda_m3
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(4, GPIO_PIN_PB1, 9); //i2c6_scl_m3
-    GpioPinSetFunction(4, GPIO_PIN_PB0, 9); //i2c6_sda_m3
-    break;
-  case 7:
-    GpioPinSetFunction(1, GPIO_PIN_PD0, 9); //i2c7_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PD1, 9); //i2c7_sda_m0
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      GpioPinSetFunction (1, GPIO_PIN_PC1, 9); // i2c3_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PC0, 9); // i2c3_sda_m0
+      break;
+    case 4:
+      GpioPinSetFunction (1, GPIO_PIN_PA3, 9); // i2c4_scl_m3
+      GpioPinSetFunction (1, GPIO_PIN_PA2, 9); // i2c4_sda_m3
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (4, GPIO_PIN_PB1, 9); // i2c6_scl_m3
+      GpioPinSetFunction (4, GPIO_PIN_PB0, 9); // i2c6_sda_m3
+      break;
+    case 7:
+      GpioPinSetFunction (1, GPIO_PIN_PD0, 9); // i2c7_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PD1, 9); // i2c7_sda_m0
+      break;
+    default:
+      break;
   }
 }
 
@@ -238,7 +243,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
 
   /* Enable USB-C VBUS */
   GpioPinWrite (1, GPIO_PIN_PB1, TRUE);
@@ -260,22 +265,23 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  if(Segment == PCIE_SEGMENT_PCIE20L2) { // M.2 M Key
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
+    // M.2 M Key
     /* reset */
     GpioPinSetDirection (3, GPIO_PIN_PD1, GPIO_PIN_OUTPUT);
     /* vcc3v3_pcie20 */
@@ -286,11 +292,11 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L2) {
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
     /* vcc3v3_pcie20 */
     GpioPinWrite (1, GPIO_PIN_PD7, Enable);
   }
@@ -299,21 +305,41 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L2) {
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
     GpioPinWrite (3, GPIO_PIN_PD1, !Enable);
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER2,
-  .ChannelID = PWM_CHANNEL3,
-  .PeriodNs = 50000,
-  .DutyNs = 50000,
-  .Polarity = TRUE,
+  .ChannelID    = PWM_CHANNEL3,
+  .PeriodNs     = 50000,
+  .DutyNs       = 50000,
+  .Polarity     = TRUE,
 }; // PWM2_CH3
 
 VOID
@@ -330,7 +356,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
   pwm_data.DutyNs = pwm_data.PeriodNs * Percentage / 100;
@@ -355,7 +381,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (3, GPIO_PIN_PC0, Enable);
@@ -364,10 +390,11 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
 
@@ -385,5 +412,5 @@ PlatformEarlyInit (
   VOID
   )
 {
-  GpioPinSetFunction(1, GPIO_PIN_PA6, 0); //jdet
+  GpioPinSetFunction (1, GPIO_PIN_PA6, 0); // jdet
 }

edk2-rockchip/Platform/Firefly/ROC-RK3588S-PC/ROC-RK3588S-PC.dsc.inc

@@ -57,13 +57,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x2
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -94,6 +87,14 @@
   #
   gRK3588TokenSpaceGuid.PcdI2S0Supported|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/FriendlyElec/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/FriendlyElec/NanoPC-CM3588-NAS/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -17,29 +17,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -51,9 +51,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -63,14 +63,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdhci0 iomux (eMMC socket) */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -79,11 +79,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -92,24 +92,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -119,31 +122,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   /* No GMAC here */
@@ -152,51 +157,51 @@ GmacIomux (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    break;
-  case 3:
-    break;
-  case 4:
-    GpioPinSetFunction(1, GPIO_PIN_PA3, 9); //i2c4_scl_m3
-    GpioPinSetFunction(1, GPIO_PIN_PA2, 9); //i2c4_sda_m3
-    break;
-  case 5:
-    GpioPinSetFunction(3, GPIO_PIN_PC7, 9); //i2c5_scl_m0
-    GpioPinSetFunction(3, GPIO_PIN_PD0, 9); //i2c5_sda_m0
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    break;
-  case 8:
-    GpioPinSetFunction(1, GPIO_PIN_PD6, 9); //i2c8_scl_m2
-    GpioPinSetFunction(1, GPIO_PIN_PD7, 9); //i2c8_sda_m2
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      break;
+    case 3:
+      break;
+    case 4:
+      GpioPinSetFunction (1, GPIO_PIN_PA3, 9); // i2c4_scl_m3
+      GpioPinSetFunction (1, GPIO_PIN_PA2, 9); // i2c4_sda_m3
+      break;
+    case 5:
+      GpioPinSetFunction (3, GPIO_PIN_PC7, 9); // i2c5_scl_m0
+      GpioPinSetFunction (3, GPIO_PIN_PD0, 9); // i2c5_sda_m0
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      break;
+    case 8:
+      GpioPinSetFunction (1, GPIO_PIN_PD6, 9); // i2c8_scl_m2
+      GpioPinSetFunction (1, GPIO_PIN_PD7, 9); // i2c8_sda_m2
+      break;
+    default:
+      break;
   }
 }
 
@@ -206,7 +211,8 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+
   /* The "pinctrl/usb" section in the dts lists three _en pins for power.
      They appear to correspond to the three usb ports on the NAS carrier board. */
   GpioPinWrite (1, GPIO_PIN_PA4, TRUE);
@@ -231,22 +237,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT);
       break;
@@ -259,7 +265,7 @@ PcieIoInit (
     case PCIE_SEGMENT_PCIE20L1: // m.2 a+e key
       GpioPinSetDirection (4, GPIO_PIN_PA2, GPIO_PIN_OUTPUT);
       break;
-    case PCIE_SEGMENT_PCIE20L2: //rtl8152b
+    case PCIE_SEGMENT_PCIE20L2: // rtl8152b
       GpioPinSetDirection (4, GPIO_PIN_PA4, GPIO_PIN_OUTPUT);
       break;
     default:
@@ -270,13 +276,13 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   /* output high to enable power */
 
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       break;
     case PCIE_SEGMENT_PCIE20L0:
@@ -293,11 +299,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (4, GPIO_PIN_PB6, !Enable);
       break;
@@ -318,12 +324,42 @@ PciePeReset (
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+    case 1:
+      GpioPinSetFunction (3, GPIO_PIN_PC4, 5); // hdmim2_tx1_cec
+      GpioPinSetPull (3, GPIO_PIN_PC4, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA6, 5); // hdmim0_tx1_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC6, 5); // hdmim1_tx1_scl
+      GpioPinSetPull (3, GPIO_PIN_PC6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC5, 5); // hdmim1_tx1_sda
+      GpioPinSetPull (3, GPIO_PIN_PC5, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER0,
-  .ChannelID = PWM_CHANNEL1,
-  .PeriodNs = 4000000,
-  .DutyNs = 4000000,
-  .Polarity = FALSE,
+  .ChannelID    = PWM_CHANNEL1,
+  .PeriodNs     = 4000000,
+  .DutyNs       = 4000000,
+  .Polarity     = FALSE,
 }; // PWM0_CH1
 
 VOID
@@ -340,14 +376,13 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
   pwm_data.DutyNs = pwm_data.PeriodNs * Percentage / 100;
   RkPwmSetConfig (&pwm_data);
 }
 
-
 VOID
 EFIAPI
 PlatformInitLeds (
@@ -362,7 +397,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (1, GPIO_PIN_PC6, Enable);
@@ -371,13 +406,15 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 

edk2-rockchip/Platform/FriendlyElec/NanoPC-CM3588-NAS/NanoPC-CM3588-NAS.dsc

@@ -28,6 +28,9 @@
   FLASH_DEFINITION               = Silicon/Rockchip/RK3588/RK3588.fdf
   RK_PLATFORM_FVMAIN_MODULES     = $(PLATFORM_DIRECTORY)/$(PLATFORM_NAME).Modules.fdf.inc
 
+  # GMAC is not exposed
+  DEFINE RK3588_GMAC_ENABLE = FALSE
+
   #
   # HYM8563 RTC support
   # I2C location configured by PCDs below.
@@ -72,13 +75,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   # NanoPC CM3588 has one 2.5 GBE wired to the first PCIE2 port
@@ -107,6 +103,15 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_HDMI1,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/FriendlyElec/NanoPC-T6/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -16,29 +16,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -50,9 +50,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -62,14 +62,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdhci0 iomux (eMMC socket) */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -78,11 +78,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -91,24 +91,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -118,31 +121,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   /* No GMAC here */
@@ -151,47 +156,47 @@ GmacIomux (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    GpioPinSetFunction(1, GPIO_PIN_PC1, 9); //i2c3_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PC0, 9); //i2c3_sda_m0
-    break;
-  case 4:
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      GpioPinSetFunction (1, GPIO_PIN_PC1, 9); // i2c3_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PC0, 9); // i2c3_sda_m0
+      break;
+    case 4:
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      break;
+    default:
+      break;
   }
 }
 
@@ -201,7 +206,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
   /* Set GPIO4 PB0 (USB_HOST_PWREN) output high to power USB ports */
   GpioPinWrite (4, GPIO_PIN_PB0, TRUE);
   GpioPinSetDirection (4, GPIO_PIN_PB0, GPIO_PIN_OUTPUT);
@@ -228,22 +233,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT);
       GpioPinSetDirection (2, GPIO_PIN_PC5, GPIO_PIN_OUTPUT);
@@ -255,7 +260,7 @@ PcieIoInit (
       GpioPinSetDirection (4, GPIO_PIN_PC2, GPIO_PIN_OUTPUT);
       GpioPinSetDirection (4, GPIO_PIN_PA2, GPIO_PIN_OUTPUT);
       break;
-    case PCIE_SEGMENT_PCIE20L2: //rtl8152b
+    case PCIE_SEGMENT_PCIE20L2: // rtl8152b
       GpioPinSetDirection (4, GPIO_PIN_PA4, GPIO_PIN_OUTPUT);
       break;
     default:
@@ -266,13 +271,13 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   /* output high to enable power */
 
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (2, GPIO_PIN_PC5, Enable);
       break;
@@ -291,11 +296,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (4, GPIO_PIN_PB6, !Enable);
       break;
@@ -313,6 +318,36 @@ PciePeReset (
   }
 }
 
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+    case 1:
+      GpioPinSetFunction (3, GPIO_PIN_PC4, 5); // hdmim2_tx1_cec
+      GpioPinSetPull (3, GPIO_PIN_PC4, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA6, 5); // hdmim0_tx1_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC6, 5); // hdmim1_tx1_scl
+      GpioPinSetPull (3, GPIO_PIN_PC6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC5, 5); // hdmim1_tx1_sda
+      GpioPinSetPull (3, GPIO_PIN_PC5, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
 VOID
 EFIAPI
 PwmFanIoSetup (
@@ -324,7 +359,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
 }
@@ -343,7 +378,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (2, GPIO_PIN_PB7, Enable);
@@ -352,13 +387,15 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 
@@ -379,5 +416,5 @@ PlatformEarlyInit (
   )
 {
   // Configure various things specific to this platform
-  GpioPinSetFunction(1, GPIO_PIN_PC4, 0); //jdet
+  GpioPinSetFunction (1, GPIO_PIN_PC4, 0); // jdet
 }

edk2-rockchip/Platform/FriendlyElec/NanoPC-T6/NanoPC-T6.dsc

@@ -28,6 +28,9 @@
   FLASH_DEFINITION               = Silicon/Rockchip/RK3588/RK3588.fdf
   RK_PLATFORM_FVMAIN_MODULES     = $(PLATFORM_DIRECTORY)/$(PLATFORM_NAME).Modules.fdf.inc
 
+  # GMAC is not exposed
+  DEFINE RK3588_GMAC_ENABLE = FALSE
+
   #
   # HYM8563 RTC support
   # I2C location configured by PCDs below.
@@ -72,13 +75,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   # NanoPC T6 has two 2.5 GBE wired to the first two PCIE2 ports, while the third one is wired to m.2 a+e key
@@ -103,6 +99,15 @@
   #
   gRK3588TokenSpaceGuid.PcdI2S0Supported|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_HDMI1,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/FriendlyElec/NanoPi-M6/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -16,29 +16,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
   /* No dual PMICs on this platform */
 };
 
@@ -49,9 +49,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -61,14 +61,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdhci0 iomux (eMMC socket) */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -77,11 +77,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -90,24 +90,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -123,7 +126,7 @@ NorFspiIomux (
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -163,47 +166,47 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    GpioPinSetFunction(1, GPIO_PIN_PC1, 9); //i2c3_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PC0, 9); //i2c3_sda_m0
-    break;
-  case 4:
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      GpioPinSetFunction (1, GPIO_PIN_PC1, 9); // i2c3_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PC0, 9); // i2c3_sda_m0
+      break;
+    case 4:
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      break;
+    default:
+      break;
   }
 }
 
@@ -213,7 +216,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
   /* Set GPIO4 PB5 (USB_HOST_PWREN) output high to power USB ports */
   GpioPinWrite (4, GPIO_PIN_PB5, TRUE);
   GpioPinSetDirection (4, GPIO_PIN_PB5, GPIO_PIN_OUTPUT);
@@ -241,22 +244,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE20L1: // RTL8152BG
       // GPIO1_A7_u - PCIE20x1_1_PERSTn_M2
       GpioPinSetDirection (1, GPIO_PIN_PA7, GPIO_PIN_OUTPUT);
@@ -273,8 +276,8 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   /* nothing to power on */
@@ -283,11 +286,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE20L1:
       GpioPinWrite (1, GPIO_PIN_PA7, !Enable);
       break;
@@ -299,6 +302,26 @@ PciePeReset (
   }
 }
 
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
 VOID
 EFIAPI
 PwmFanIoSetup (
@@ -310,7 +333,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
 }
@@ -329,7 +352,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (1, GPIO_PIN_PC1, Enable);
@@ -338,10 +361,11 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
 

edk2-rockchip/Platform/FriendlyElec/NanoPi-M6/NanoPi-M6.dsc

@@ -74,13 +74,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -101,6 +94,13 @@
   gRK3588TokenSpaceGuid.PcdGmac1Supported|TRUE
   gRK3588TokenSpaceGuid.PcdGmac1TxDelay|0x42
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/FriendlyElec/NanoPi-R6C/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -16,29 +16,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
   /* No dual PMICs on this platform */
 };
 
@@ -49,9 +49,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -61,14 +61,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdhci0 iomux (eMMC socket) */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -77,11 +77,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -90,24 +90,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -123,7 +126,7 @@ NorFspiIomux (
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -163,47 +166,47 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    GpioPinSetFunction(1, GPIO_PIN_PC1, 9); //i2c3_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PC0, 9); //i2c3_sda_m0
-    break;
-  case 4:
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      GpioPinSetFunction (1, GPIO_PIN_PC1, 9); // i2c3_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PC0, 9); // i2c3_sda_m0
+      break;
+    case 4:
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      break;
+    default:
+      break;
   }
 }
 
@@ -213,7 +216,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
   /* Set GPIO4 PB5 (USB_HOST_PWREN) output high to power USB ports */
   GpioPinWrite (4, GPIO_PIN_PB5, TRUE);
   GpioPinSetDirection (4, GPIO_PIN_PB5, GPIO_PIN_OUTPUT);
@@ -241,22 +244,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE20L1: // RTL8152BG
       // GPIO1_A7_u - PCIE20x1_1_PERSTn_M2
       GpioPinSetDirection (1, GPIO_PIN_PA7, GPIO_PIN_OUTPUT);
@@ -273,8 +276,8 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   /* nothing to power on */
@@ -283,11 +286,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE20L1:
       GpioPinWrite (1, GPIO_PIN_PA7, !Enable);
       break;
@@ -299,6 +302,26 @@ PciePeReset (
   }
 }
 
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
 VOID
 EFIAPI
 PwmFanIoSetup (
@@ -310,7 +333,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
 }
@@ -329,7 +352,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (1, GPIO_PIN_PC1, Enable);
@@ -338,13 +361,15 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 

edk2-rockchip/Platform/FriendlyElec/NanoPi-R6C/NanoPi-R6C.dsc

@@ -73,13 +73,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -100,6 +93,13 @@
   gRK3588TokenSpaceGuid.PcdGmac1Supported|TRUE
   gRK3588TokenSpaceGuid.PcdGmac1TxDelay|0x42
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/FriendlyElec/NanoPi-R6S/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -16,29 +16,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
   /* No dual PMICs on this platform */
 };
 
@@ -49,9 +49,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -64,9 +64,9 @@ SdhciEmmcIoMux (
   /* Do not override, set by earlier boot stages. */
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -75,11 +75,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -88,24 +88,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -121,7 +124,7 @@ NorFspiIomux (
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -161,47 +164,47 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    GpioPinSetFunction(1, GPIO_PIN_PC1, 9); //i2c3_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PC0, 9); //i2c3_sda_m0
-    break;
-  case 4:
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      GpioPinSetFunction (1, GPIO_PIN_PC1, 9); // i2c3_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PC0, 9); // i2c3_sda_m0
+      break;
+    case 4:
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      break;
+    default:
+      break;
   }
 }
 
@@ -211,7 +214,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
 
   /* Set GPIO4 PB5 (USB_HOST_PWREN) output high to power USB ports */
   GpioPinSetDirection (4, GPIO_PIN_PB5, GPIO_PIN_OUTPUT);
@@ -228,22 +231,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* found info from nanopi r6s dtb */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE20L1: // rtl8152b
       // PCIE20x1_1_PERSTn_M2
       GpioPinSetDirection (1, GPIO_PIN_PA7, GPIO_PIN_OUTPUT);
@@ -260,8 +263,8 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   /* nothing to power on */
@@ -270,11 +273,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE20L1: // rtl8152b
       GpioPinWrite (1, GPIO_PIN_PA7, !Enable);
       break;
@@ -286,6 +289,26 @@ PciePeReset (
   }
 }
 
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
 VOID
 EFIAPI
 PwmFanIoSetup (
@@ -297,7 +320,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
 }
@@ -316,7 +339,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (1, GPIO_PIN_PC1, Enable);
@@ -325,13 +348,15 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 

edk2-rockchip/Platform/FriendlyElec/NanoPi-R6S/NanoPi-R6S.dsc

@@ -72,13 +72,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -99,6 +92,13 @@
   gRK3588TokenSpaceGuid.PcdGmac1Supported|TRUE
   gRK3588TokenSpaceGuid.PcdGmac1TxDelay|0x42
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/FydeInnovations/FydetabDuo/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/FydeInnovations/FydetabDuo/FydetabDuo.dsc

@@ -27,6 +27,9 @@
   FLASH_DEFINITION               = Silicon/Rockchip/RK3588/RK3588.fdf
   RK_PLATFORM_FVMAIN_MODULES     = $(PLATFORM_DIRECTORY)/$(PLATFORM_NAME).Modules.fdf.inc
 
+  # GMAC is not exposed
+  DEFINE RK3588_GMAC_ENABLE = FALSE
+
   #
   # HYM8563 RTC support
   # I2C location configured by PCDs below.
@@ -74,13 +77,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -100,6 +96,15 @@
   # SD card detect signal is inverted
   gRockchipTokenSpaceGuid.PcdRkSdmmcCardDetectBroken|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_DP0,
+    VOP_OUTPUT_IF_MIPI0
+  })}
+  gRK3588TokenSpaceGuid.PcdDisplayRotationDefault|90
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/FydeInnovations/FydetabDuo/Library/RockchipPlatformLib/CsotDsiPanel.c

@@ -1,6 +1,6 @@
 /** @file
  *
- *  Copyright (c) 2024, Mario Bălănică <mariobalanica02@gmail.com>
+ *  Copyright (c) 2024-2025, Mario Bălănică <mariobalanica02@gmail.com>
  *
  *  SPDX-License-Identifier: BSD-2-Clause-Patent
  *
@@ -130,25 +130,17 @@ STATIC ROCKCHIP_DSI_PANEL_PROTOCOL  mCsotDsiPanel = {
   .InitSequenceLength = ARRAY_SIZE (mCsotDsiInitSequence),
 
   .NativeMode         = {
-    .CrtcId     = 2,
-    .OscFreq    = 275000000,
-    .Horizontal = {
-      .Resolution = 1600,
-      .Sync       = 20,
-      .BackPorch  = 40,
-      .FrontPorch = 60
-    },
-    .Vertical         = {
-      .Resolution = 2560,
-      .Sync       = 4,
-      .BackPorch  = 18,
-      .FrontPorch = 112
-    },
-    .HsyncActive     = 0,
-    .VsyncActive     = 0,
-    .DenActive       = 0,
-    .ClkActive       = 0,
-    .VpsConfigModeID = 1
+    .OscFreq     = 275000,
+    .HActive     = 1600,
+    .HFrontPorch = 60,
+    .HSync       = 20,
+    .HBackPorch  = 40,
+    .HSyncActive = 0,
+    .VActive     = 2560,
+    .VFrontPorch = 112,
+    .VSync       = 4,
+    .VBackPorch  = 18,
+    .VSyncActive = 0,
   },
 
   .Prepare            = CsotDsiPanelPrepare,

edk2-rockchip/Platform/FydeInnovations/FydetabDuo/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -17,29 +17,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
- // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -51,9 +51,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -66,9 +66,9 @@ SdhciEmmcIoMux (
   /* Do not override, set by earlier boot stages. */
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -77,11 +77,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -90,24 +90,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -123,7 +126,7 @@ NorFspiIomux (
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   /* No GMAC here */
@@ -132,53 +135,53 @@ GmacIomux (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    GpioPinSetFunction(3, GPIO_PIN_PB7, 9); //i2c3_scl_m1
-    GpioPinSetFunction(3, GPIO_PIN_PC0, 9); //i2c3_sda_m1
-    break;
-  case 4:
-    GpioPinSetFunction(1, GPIO_PIN_PA3, 9); //i2c4_scl_m3
-    GpioPinSetFunction(1, GPIO_PIN_PA2, 9); //i2c4_sda_m3
-    break;
-  case 5:
-    GpioPinSetFunction(1, GPIO_PIN_PB6, 9); //i2c5_scl_m3
-    GpioPinSetFunction(1, GPIO_PIN_PB7, 9); //i2c5_sda_m3
-    break;
-  case 6:
-    GpioPinSetFunction(4, GPIO_PIN_PB1, 9); //i2c6_scl_m3
-    GpioPinSetFunction(4, GPIO_PIN_PB0, 9); //i2c6_sda_m3
-    break;
-  case 7:
-    GpioPinSetFunction(1, GPIO_PIN_PD0, 9); //i2c7_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PD1, 9); //i2c7_sda_m0
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      GpioPinSetFunction (3, GPIO_PIN_PB7, 9); // i2c3_scl_m1
+      GpioPinSetFunction (3, GPIO_PIN_PC0, 9); // i2c3_sda_m1
+      break;
+    case 4:
+      GpioPinSetFunction (1, GPIO_PIN_PA3, 9); // i2c4_scl_m3
+      GpioPinSetFunction (1, GPIO_PIN_PA2, 9); // i2c4_sda_m3
+      break;
+    case 5:
+      GpioPinSetFunction (1, GPIO_PIN_PB6, 9); // i2c5_scl_m3
+      GpioPinSetFunction (1, GPIO_PIN_PB7, 9); // i2c5_sda_m3
+      break;
+    case 6:
+      GpioPinSetFunction (4, GPIO_PIN_PB1, 9); // i2c6_scl_m3
+      GpioPinSetFunction (4, GPIO_PIN_PB0, 9); // i2c6_sda_m3
+      break;
+    case 7:
+      GpioPinSetFunction (1, GPIO_PIN_PD0, 9); // i2c7_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PD1, 9); // i2c7_sda_m0
+      break;
+    default:
+      break;
   }
 }
 
@@ -188,7 +191,6 @@ UsbPortPowerEnable (
   VOID
   )
 {
-
 }
 
 VOID
@@ -197,22 +199,23 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset to gpio output mode */
-  if(Segment == PCIE_SEGMENT_PCIE20L2) { // AP6275P Wi-Fi
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
+    // AP6275P Wi-Fi
     GpioPinSetDirection (3, GPIO_PIN_PD1, GPIO_PIN_OUTPUT);
 
     /* wifi_poweren_gpio */
@@ -223,11 +226,11 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L2) {
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
     /* wifi_poweren_gpio */
     GpioPinWrite (0, GPIO_PIN_PC7, Enable);
   }
@@ -236,31 +239,37 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L2) {
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
     GpioPinWrite (3, GPIO_PIN_PD1, !Enable);
   }
 }
 
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+}
+
 VOID
 EFIAPI
 PwmFanIoSetup (
   VOID
   )
 {
-
 }
 
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
-
 }
 
 VOID
@@ -276,7 +285,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (3, GPIO_PIN_PC2, Enable);
@@ -292,10 +301,11 @@ AttachCsotDsiPanel (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
 
@@ -317,11 +327,11 @@ PlatformEarlyInit (
   GpioPinWrite (4, GPIO_PIN_PA2, TRUE);
   GpioPinSetDirection (4, GPIO_PIN_PA2, GPIO_PIN_OUTPUT);
 
-  GpioPinSetFunction(1, GPIO_PIN_PC0, 0); //jdet
+  GpioPinSetFunction (1, GPIO_PIN_PC0, 0); // jdet
 
   /* spk-con-gpio */
   GpioPinWrite (4, GPIO_PIN_PA5, TRUE);
   GpioPinSetDirection (4, GPIO_PIN_PA5, GPIO_PIN_OUTPUT);
 
-  AttachCsotDsiPanel();
+  AttachCsotDsiPanel ();
 }

edk2-rockchip/Platform/Hinlink/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/Hinlink/H88K/H88K.dsc

@@ -73,13 +73,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x2
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -109,6 +102,15 @@
   #
   gRK3588TokenSpaceGuid.PcdI2S0Supported|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_HDMI1,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Hinlink/H88K/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -17,29 +17,29 @@
 #include <VarStoreData.h>
 #include <Library/TimerLib.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -51,9 +51,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -63,14 +63,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdhci0 iomux (eMMC socket) */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -79,11 +79,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -92,24 +92,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -119,31 +122,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -184,55 +189,55 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    GpioPinSetFunction(0, GPIO_PIN_PB5, 9); //i2c1_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PB6, 9); //i2c1_sda_m0
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    GpioPinSetFunction(1, GPIO_PIN_PC1, 9); //i2c3_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PC0, 9); //i2c3_sda_m0
-    break;
-  case 4:
-    GpioPinSetFunction(3, GPIO_PIN_PA6, 9); //i2c4_scl_m0
-    GpioPinSetFunction(3, GPIO_PIN_PA5, 9); //i2c4_sda_m0
-    break;
-  case 5:
-    GpioPinSetFunction(3, GPIO_PIN_PC7, 9); //i2c5_scl_m0
-    GpioPinSetFunction(3, GPIO_PIN_PD0, 9); //i2c5_sda_m0
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    GpioPinSetFunction(1, GPIO_PIN_PD0, 9); //i2c7_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PD1, 9); //i2c7_sda_m0
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      GpioPinSetFunction (0, GPIO_PIN_PB5, 9); // i2c1_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PB6, 9); // i2c1_sda_m0
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      GpioPinSetFunction (1, GPIO_PIN_PC1, 9); // i2c3_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PC0, 9); // i2c3_sda_m0
+      break;
+    case 4:
+      GpioPinSetFunction (3, GPIO_PIN_PA6, 9); // i2c4_scl_m0
+      GpioPinSetFunction (3, GPIO_PIN_PA5, 9); // i2c4_sda_m0
+      break;
+    case 5:
+      GpioPinSetFunction (3, GPIO_PIN_PC7, 9); // i2c5_scl_m0
+      GpioPinSetFunction (3, GPIO_PIN_PD0, 9); // i2c5_sda_m0
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      GpioPinSetFunction (1, GPIO_PIN_PD0, 9); // i2c7_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PD1, 9); // i2c7_sda_m0
+      break;
+    default:
+      break;
   }
 }
 
@@ -242,7 +247,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
   /* Set GPIO4 PB0 (USB_HOST_PWREN) output high to power USB ports */
   GpioPinSetDirection (4, GPIO_PIN_PB0, GPIO_PIN_OUTPUT);
   GpioPinWrite (4, GPIO_PIN_PB0, TRUE);
@@ -259,22 +264,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT);
       GpioPinSetDirection (3, GPIO_PIN_PD5, GPIO_PIN_OUTPUT);
@@ -296,13 +301,13 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   /* output high to enable power */
 
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (3, GPIO_PIN_PD5, Enable);
       break;
@@ -320,11 +325,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (4, GPIO_PIN_PB6, !Enable);
       break;
@@ -342,6 +347,36 @@ PciePeReset (
   }
 }
 
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+    case 1:
+      GpioPinSetFunction (3, GPIO_PIN_PC4, 5); // hdmim2_tx1_cec
+      GpioPinSetPull (3, GPIO_PIN_PC4, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA6, 5); // hdmim0_tx1_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC6, 5); // hdmim1_tx1_scl
+      GpioPinSetPull (3, GPIO_PIN_PC6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC5, 5); // hdmim1_tx1_sda
+      GpioPinSetPull (3, GPIO_PIN_PC5, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
 VOID
 EFIAPI
 PwmFanIoSetup (
@@ -353,7 +388,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
 }
@@ -372,7 +407,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (3, GPIO_PIN_PB7, Enable);
@@ -381,10 +416,11 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
 
@@ -403,5 +439,5 @@ PlatformEarlyInit (
   )
 {
   // Configure various things specific to this platform
-  GpioPinSetFunction(1, GPIO_PIN_PD5, 0); //jdet
+  GpioPinSetFunction (1, GPIO_PIN_PD5, 0); // jdet
 }

edk2-rockchip/Platform/Khadas/Drivers/KhadasMcuDxe/KhadasMcuDxe.c

@@ -25,7 +25,7 @@
 
 #include "KhadasMcuDxe.h"
 
-STATIC CONST EFI_GUID I2cGuid = I2C_GUID;
+STATIC CONST EFI_GUID  I2cGuid = I2C_GUID;
 
 STATIC
 EFI_STATUS
@@ -46,21 +46,21 @@ KhadasMcuRead (
   ASSERT (KhadasMcuContext != NULL);
   ASSERT (KhadasMcuContext->I2cIo != NULL);
 
-  RequestPacketSize = sizeof(UINTN) + sizeof (EFI_I2C_OPERATION) * 2;
-  RequestPacket = AllocateZeroPool (RequestPacketSize);
+  RequestPacketSize = sizeof (UINTN) + sizeof (EFI_I2C_OPERATION) * 2;
+  RequestPacket     = AllocateZeroPool (RequestPacketSize);
   if (RequestPacket == NULL) {
     return EFI_OUT_OF_RESOURCES;
   }
 
   RequestPacket->OperationCount = 2;
 
-  RequestPacket->Operation[0].Flags = 0;
+  RequestPacket->Operation[0].Flags         = 0;
   RequestPacket->Operation[0].LengthInBytes = RegAddressLength;
-  RequestPacket->Operation[0].Buffer = RegAddress;
+  RequestPacket->Operation[0].Buffer        = RegAddress;
 
-  RequestPacket->Operation[1].Flags = I2C_FLAG_READ;
+  RequestPacket->Operation[1].Flags         = I2C_FLAG_READ;
   RequestPacket->Operation[1].LengthInBytes = Length;
-  RequestPacket->Operation[1].Buffer = Buffer;
+  RequestPacket->Operation[1].Buffer        = Buffer;
 
   Status = KhadasMcuContext->I2cIo->QueueRequest (KhadasMcuContext->I2cIo, 0, NULL, RequestPacket, NULL);
   if (EFI_ERROR (Status)) {
@@ -93,8 +93,8 @@ KhadasMcuWrite (
   ASSERT (KhadasMcuContext != NULL);
   ASSERT (KhadasMcuContext->I2cIo != NULL);
 
-  RequestPacketSize = sizeof(UINTN) + sizeof (EFI_I2C_OPERATION);
-  RequestPacket = AllocateZeroPool (RequestPacketSize);
+  RequestPacketSize = sizeof (UINTN) + sizeof (EFI_I2C_OPERATION);
+  RequestPacket     = AllocateZeroPool (RequestPacketSize);
   if (RequestPacket == NULL) {
     return EFI_OUT_OF_RESOURCES;
   }
@@ -114,9 +114,9 @@ KhadasMcuWrite (
 
   RequestPacket->OperationCount = 1;
 
-  RequestPacket->Operation[0].Flags = 0;
+  RequestPacket->Operation[0].Flags         = 0;
   RequestPacket->Operation[0].LengthInBytes = RegAddressLength + Length;
-  RequestPacket->Operation[0].Buffer = Data;
+  RequestPacket->Operation[0].Buffer        = Data;
 
   Status = KhadasMcuContext->I2cIo->QueueRequest (KhadasMcuContext->I2cIo, 0, NULL, RequestPacket, NULL);
   if (EFI_ERROR (Status)) {
@@ -133,9 +133,9 @@ STATIC
 EFI_STATUS
 EFIAPI
 KhadasMcuReadRegister (
-  IN  CONST KHADAS_MCU_PROTOCOL   *This,
-  IN  UINT8                       Address,
-  OUT UINT8                       *Value
+  IN  CONST KHADAS_MCU_PROTOCOL  *This,
+  IN  UINT8                      Address,
+  OUT UINT8                      *Value
   )
 {
   return KhadasMcuRead (This, &Address, sizeof (UINT8), Value, sizeof (UINT8));
@@ -157,15 +157,18 @@ STATIC
 EFI_STATUS
 EFIAPI
 KhadasMcuSetFanSpeedPercentage (
-  IN KHADAS_MCU_PROTOCOL      *This,
-  IN UINT8                    Percentage
+  IN KHADAS_MCU_PROTOCOL  *This,
+  IN UINT8                Percentage
   )
 {
-  return KhadasMcuWriteRegister (This, MCU_CMD_FAN_STATUS_CTRL_REGv2,
-                                 MIN (Percentage, 100));
+  return KhadasMcuWriteRegister (
+           This,
+           MCU_CMD_FAN_STATUS_CTRL_REGv2,
+           MIN (Percentage, 100)
+           );
 }
 
-EFI_DRIVER_BINDING_PROTOCOL mDriverBindingProtocol = {
+EFI_DRIVER_BINDING_PROTOCOL  mDriverBindingProtocol = {
   KhadasMcuSupported,
   KhadasMcuStart,
   KhadasMcuStop
@@ -179,15 +182,15 @@ KhadasMcuSupported (
   IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath OPTIONAL
   )
 {
-  EFI_STATUS            Status;
-  EFI_I2C_IO_PROTOCOL   *TmpI2cIo;
-  UINT8                 KhadasMcuAddress;
-  UINT8                 KhadasMcuBus;
+  EFI_STATUS           Status;
+  EFI_I2C_IO_PROTOCOL  *TmpI2cIo;
+  UINT8                KhadasMcuAddress;
+  UINT8                KhadasMcuBus;
 
   Status = gBS->OpenProtocol (
                   ControllerHandle,
                   &gEfiI2cIoProtocolGuid,
-                  (VOID **) &TmpI2cIo,
+                  (VOID **)&TmpI2cIo,
                   gImageHandle,
                   ControllerHandle,
                   EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -197,22 +200,23 @@ KhadasMcuSupported (
   }
 
   KhadasMcuAddress = PcdGet8 (PcdKhadasMcuAddress);
-  KhadasMcuBus = PcdGet8 (PcdKhadasMcuBus);
+  KhadasMcuBus     = PcdGet8 (PcdKhadasMcuBus);
 
   Status = EFI_UNSUPPORTED;
 
-  if (CompareGuid(TmpI2cIo->DeviceGuid, &I2cGuid) &&
-      TmpI2cIo->DeviceIndex == I2C_DEVICE_INDEX(KhadasMcuBus, KhadasMcuAddress)) {
+  if (CompareGuid (TmpI2cIo->DeviceGuid, &I2cGuid) &&
+      (TmpI2cIo->DeviceIndex == I2C_DEVICE_INDEX (KhadasMcuBus, KhadasMcuAddress)))
+  {
     DEBUG ((DEBUG_INFO, "%a: attached to Khadas MCU device\n", __func__));
     Status = EFI_SUCCESS;
   }
 
   gBS->CloseProtocol (
-        ControllerHandle,
-        &gEfiI2cIoProtocolGuid,
-        gImageHandle,
-        ControllerHandle
-        );
+         ControllerHandle,
+         &gEfiI2cIoProtocolGuid,
+         gImageHandle,
+         ControllerHandle
+         );
 
   return Status;
 }
@@ -225,26 +229,26 @@ KhadasMcuStart (
   IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath OPTIONAL
   )
 {
-  EFI_STATUS            Status;
-  KHADAS_MCU_CONTEXT    *KhadasMcuContext;
-  KHADAS_MCU_PROTOCOL   *KhadasMcuProtocol;
+  EFI_STATUS           Status;
+  KHADAS_MCU_CONTEXT   *KhadasMcuContext;
+  KHADAS_MCU_PROTOCOL  *KhadasMcuProtocol;
 
-  KhadasMcuContext = AllocateZeroPool (sizeof(KHADAS_MCU_CONTEXT));
+  KhadasMcuContext = AllocateZeroPool (sizeof (KHADAS_MCU_CONTEXT));
   if (KhadasMcuContext == NULL) {
     DEBUG ((DEBUG_ERROR, "%a: context allocation failed\n", __func__));
     return EFI_OUT_OF_RESOURCES;
   }
 
   KhadasMcuContext->ControllerHandle = ControllerHandle;
-  KhadasMcuContext->Signature = KHADAS_MCU_SIGNATURE;
+  KhadasMcuContext->Signature        = KHADAS_MCU_SIGNATURE;
 
-  KhadasMcuProtocol = &KhadasMcuContext->KhadasMcuProtocol;
+  KhadasMcuProtocol                        = &KhadasMcuContext->KhadasMcuProtocol;
   KhadasMcuProtocol->SetFanSpeedPercentage = KhadasMcuSetFanSpeedPercentage;
 
   Status = gBS->OpenProtocol (
                   ControllerHandle,
                   &gEfiI2cIoProtocolGuid,
-                  (VOID **) &KhadasMcuContext->I2cIo,
+                  (VOID **)&KhadasMcuContext->I2cIo,
                   gImageHandle,
                   ControllerHandle,
                   EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -257,7 +261,8 @@ KhadasMcuStart (
 
   Status = gBS->InstallMultipleProtocolInterfaces (
                   &ControllerHandle,
-                  &gKhadasMcuProtocolGuid, KhadasMcuProtocol,
+                  &gKhadasMcuProtocolGuid,
+                  KhadasMcuProtocol,
                   NULL
                   );
   if (EFI_ERROR (Status)) {
@@ -270,11 +275,11 @@ KhadasMcuStart (
 fail:
   FreePool (KhadasMcuContext);
   gBS->CloseProtocol (
-        ControllerHandle,
-        &gEfiI2cIoProtocolGuid,
-        gImageHandle,
-        ControllerHandle
-        );
+         ControllerHandle,
+         &gEfiI2cIoProtocolGuid,
+         gImageHandle,
+         ControllerHandle
+         );
 
   return Status;
 }
@@ -288,14 +293,14 @@ KhadasMcuStop (
   IN EFI_HANDLE                   *ChildHandleBuffer OPTIONAL
   )
 {
-  EFI_STATUS            Status;
-  KHADAS_MCU_PROTOCOL   *KhadasMcuProtocol;
-  KHADAS_MCU_CONTEXT    *KhadasMcuContext;
+  EFI_STATUS           Status;
+  KHADAS_MCU_PROTOCOL  *KhadasMcuProtocol;
+  KHADAS_MCU_CONTEXT   *KhadasMcuContext;
 
   Status = gBS->OpenProtocol (
                   ControllerHandle,
                   &gKhadasMcuProtocolGuid,
-                  (VOID **) &KhadasMcuProtocol,
+                  (VOID **)&KhadasMcuProtocol,
                   This->DriverBindingHandle,
                   ControllerHandle,
                   EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -304,20 +309,22 @@ KhadasMcuStop (
     return EFI_DEVICE_ERROR;
   }
 
-  KhadasMcuContext = KHADAS_MCU_FROM_PROTOCOL(KhadasMcuProtocol);
+  KhadasMcuContext = KHADAS_MCU_FROM_PROTOCOL (KhadasMcuProtocol);
 
   gBS->UninstallMultipleProtocolInterfaces (
-        &ControllerHandle,
-        &gKhadasMcuProtocolGuid, &KhadasMcuContext->KhadasMcuProtocol,
-        &gEfiDriverBindingProtocolGuid, &mDriverBindingProtocol,
-        NULL
-        );
+         &ControllerHandle,
+         &gKhadasMcuProtocolGuid,
+         &KhadasMcuContext->KhadasMcuProtocol,
+         &gEfiDriverBindingProtocolGuid,
+         &mDriverBindingProtocol,
+         NULL
+         );
   gBS->CloseProtocol (
-        ControllerHandle,
-        &gEfiI2cIoProtocolGuid,
-        gImageHandle,
-        ControllerHandle
-        );
+         ControllerHandle,
+         &gEfiI2cIoProtocolGuid,
+         gImageHandle,
+         ControllerHandle
+         );
   FreePool (KhadasMcuContext);
 
   return EFI_SUCCESS;
@@ -326,15 +333,16 @@ KhadasMcuStop (
 EFI_STATUS
 EFIAPI
 KhadasMcuDxeInitialize (
-  IN EFI_HANDLE         ImageHandle,
-  IN EFI_SYSTEM_TABLE   *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS Status;
+  EFI_STATUS  Status;
 
   Status = gBS->InstallMultipleProtocolInterfaces (
                   &ImageHandle,
-                  &gEfiDriverBindingProtocolGuid, &mDriverBindingProtocol,
+                  &gEfiDriverBindingProtocolGuid,
+                  &mDriverBindingProtocol,
                   NULL
                   );
   return Status;

edk2-rockchip/Platform/Khadas/Drivers/KhadasMcuDxe/KhadasMcuDxe.h

@@ -13,7 +13,7 @@
 
 #include <Uefi.h>
 
-#define KHADAS_MCU_SIGNATURE          SIGNATURE_32 ('K', 'M', 'C', 'U')
+#define KHADAS_MCU_SIGNATURE  SIGNATURE_32 ('K', 'M', 'C', 'U')
 
 #define I2C_GUID \
   { \
@@ -21,20 +21,20 @@
   }
 
 typedef struct {
-  UINT32                      Signature;
-  EFI_HANDLE                  ControllerHandle;
-  EFI_I2C_IO_PROTOCOL         *I2cIo;
-  KHADAS_MCU_PROTOCOL         KhadasMcuProtocol;
+  UINT32                 Signature;
+  EFI_HANDLE             ControllerHandle;
+  EFI_I2C_IO_PROTOCOL    *I2cIo;
+  KHADAS_MCU_PROTOCOL    KhadasMcuProtocol;
 } KHADAS_MCU_CONTEXT;
 
-#define KHADAS_MCU_FROM_IO(a) CR (a, KHADAS_MCU_CONTEXT, I2cIo, KHADAS_MCU_SIGNATURE)
-#define KHADAS_MCU_FROM_PROTOCOL(a) CR (a, KHADAS_MCU_CONTEXT, KhadasMcuProtocol, KHADAS_MCU_SIGNATURE)
+#define KHADAS_MCU_FROM_IO(a)        CR (a, KHADAS_MCU_CONTEXT, I2cIo, KHADAS_MCU_SIGNATURE)
+#define KHADAS_MCU_FROM_PROTOCOL(a)  CR (a, KHADAS_MCU_CONTEXT, KhadasMcuProtocol, KHADAS_MCU_SIGNATURE)
 
 //
 // Registers & fields
 // https://docs.khadas.com/products/sbc/edge2/hardware/edge2-boot-flow
 //
-#define MCU_CMD_FAN_STATUS_CTRL_REGv2   0x8A
+#define MCU_CMD_FAN_STATUS_CTRL_REGv2  0x8A
 
 EFI_STATUS
 EFIAPI

edk2-rockchip/Platform/Khadas/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/Khadas/Edge2/Edge2.dsc

@@ -27,6 +27,9 @@
   FLASH_DEFINITION               = Silicon/Rockchip/RK3588/RK3588.fdf
   RK_PLATFORM_FVMAIN_MODULES     = $(PLATFORM_DIRECTORY)/$(PLATFORM_NAME).Modules.fdf.inc
 
+  # GMAC is not exposed
+  DEFINE RK3588_GMAC_ENABLE = FALSE
+
   #
   # HYM8563 RTC support
   # I2C location configured by PCDs below.
@@ -73,13 +76,6 @@
   gKhadasTokenSpaceGuid.PcdKhadasMcuAddress|0x18
   gKhadasTokenSpaceGuid.PcdKhadasMcuBus|0x2
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -104,6 +100,14 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Khadas/Edge2/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -21,33 +21,33 @@
 
 #include <Protocol/KhadasMcu.h>
 
-STATIC VOID                   *mKhadasMcuEventRegistration;
-STATIC KHADAS_MCU_PROTOCOL    *mKhadasMcu;
-STATIC UINT8                  mTargetFanSpeed;
+STATIC VOID                 *mKhadasMcuEventRegistration;
+STATIC KHADAS_MCU_PROTOCOL  *mKhadasMcu;
+STATIC UINT8                mTargetFanSpeed;
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -59,9 +59,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -71,14 +71,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdmmc0 iomux */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -87,11 +87,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -100,24 +100,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -127,31 +130,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   /* No GMAC here */
@@ -160,49 +165,49 @@ GmacIomux (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    GpioPinSetFunction(1, GPIO_PIN_PC1, 9); //i2c3_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PC0, 9); //i2c3_sda_m0
-    break;
-  case 4:
-    GpioPinSetFunction(1, GPIO_PIN_PA3, 9); //i2c4_scl_m3
-    GpioPinSetFunction(1, GPIO_PIN_PA2, 9); //i2c4_sda_m3
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      GpioPinSetFunction (1, GPIO_PIN_PC1, 9); // i2c3_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PC0, 9); // i2c3_sda_m0
+      break;
+    case 4:
+      GpioPinSetFunction (1, GPIO_PIN_PA3, 9); // i2c4_scl_m3
+      GpioPinSetFunction (1, GPIO_PIN_PA2, 9); // i2c4_sda_m3
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      break;
+    default:
+      break;
   }
 }
 
@@ -212,11 +217,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
-
-  /* Set VCC_5V0_PWREN_H */
-  GpioPinWrite (4, GPIO_PIN_PA2, TRUE);
-  GpioPinSetDirection (4, GPIO_PIN_PA2, GPIO_PIN_OUTPUT);
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
 
   /* Set USB_HOST_PWREN_H */
   GpioPinWrite (1, GPIO_PIN_PB1, TRUE);
@@ -233,22 +234,23 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset to gpio output mode */
-  if(Segment == PCIE_SEGMENT_PCIE20L2) { // AP6275P Wi-Fi
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
+    // AP6275P Wi-Fi
     GpioPinSetDirection (3, GPIO_PIN_PD1, GPIO_PIN_OUTPUT);
 
     /* wifi_poweren_gpio */
@@ -259,11 +261,11 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L2) {
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
     /* wifi_poweren_gpio */
     GpioPinWrite (0, GPIO_PIN_PC4, Enable);
   }
@@ -272,43 +274,72 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L2) {
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
     GpioPinWrite (3, GPIO_PIN_PD1, !Enable);
   }
 }
 
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
 STATIC
 VOID
 KhadasMcuRegistrationEventHandler (
-  IN  EFI_EVENT       Event,
-  IN  VOID            *Context
+  IN  EFI_EVENT  Event,
+  IN  VOID       *Context
   )
 {
-  EFI_HANDLE     Handle;
-  UINTN          BufferSize;
-  EFI_STATUS     Status;
+  EFI_HANDLE  Handle;
+  UINTN       BufferSize;
+  EFI_STATUS  Status;
 
   BufferSize = sizeof (EFI_HANDLE);
-  Status = gBS->LocateHandle (
-                    ByRegisterNotify,
-                    NULL,
-                    mKhadasMcuEventRegistration,
-                    &BufferSize,
-                    &Handle);
+  Status     = gBS->LocateHandle (
+                      ByRegisterNotify,
+                      NULL,
+                      mKhadasMcuEventRegistration,
+                      &BufferSize,
+                      &Handle
+                      );
   if (EFI_ERROR (Status)) {
     if (Status != EFI_NOT_FOUND) {
-      DEBUG ((DEBUG_WARN, "%a: Failed to locate gKhadasMcuProtocol. Status=%r\n",
-              __func__, Status));
+      DEBUG ((
+        DEBUG_WARN,
+        "%a: Failed to locate gKhadasMcuProtocol. Status=%r\n",
+        __func__,
+        Status
+        ));
     }
+
     return;
   }
 
-  Status = gBS->HandleProtocol (Handle,
-              &gKhadasMcuProtocolGuid, (VOID **) &mKhadasMcu);
+  Status = gBS->HandleProtocol (
+                  Handle,
+                  &gKhadasMcuProtocolGuid,
+                  (VOID **)&mKhadasMcu
+                  );
   ASSERT_EFI_ERROR (Status);
 
   PwmFanSetSpeed (mTargetFanSpeed);
@@ -323,20 +354,21 @@ PwmFanIoSetup (
   )
 {
   EfiCreateProtocolNotifyEvent (
-          &gKhadasMcuProtocolGuid,
-          TPL_CALLBACK,
-          KhadasMcuRegistrationEventHandler,
-          NULL,
-          &mKhadasMcuEventRegistration);
+    &gKhadasMcuProtocolGuid,
+    TPL_CALLBACK,
+    KhadasMcuRegistrationEventHandler,
+    NULL,
+    &mKhadasMcuEventRegistration
+    );
 }
 
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  UINT32 Percentage
+  UINT32  Percentage
   )
 {
-  mTargetFanSpeed = (UINT8) Percentage;
+  mTargetFanSpeed = (UINT8)Percentage;
 
   //
   // If the protocol is installed, set the speed now.
@@ -366,7 +398,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (4, GPIO_PIN_PB2, Enable);
@@ -375,13 +407,15 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 
@@ -402,6 +436,11 @@ PlatformEarlyInit (
   )
 {
   // Configure various things specific to this platform
-  GpioPinSetFunction(1, GPIO_PIN_PD3, 0); //jdet
-  GpioPinSetFunction(1, GPIO_PIN_PD0, 0); //spk_con
+
+  /* Set VCC_5V0_PWREN_H */
+  GpioPinWrite (4, GPIO_PIN_PA2, TRUE);
+  GpioPinSetDirection (4, GPIO_PIN_PA2, GPIO_PIN_OUTPUT);
+
+  GpioPinSetFunction (1, GPIO_PIN_PD3, 0); // jdet
+  GpioPinSetFunction (1, GPIO_PIN_PD0, 0); // spk_con
 }

edk2-rockchip/Platform/Khadas/Include/Protocol/KhadasMcu.h

@@ -16,15 +16,15 @@ typedef struct _KHADAS_MCU_PROTOCOL KHADAS_MCU_PROTOCOL;
 
 typedef
 EFI_STATUS
-(EFIAPI *KHADAS_MCU_SET_FAN_SPEED_PERCENTAGE) (
+(EFIAPI *KHADAS_MCU_SET_FAN_SPEED_PERCENTAGE)(
   IN KHADAS_MCU_PROTOCOL      *This,
   IN UINT8                    Percentage
   );
 
 struct _KHADAS_MCU_PROTOCOL {
-  KHADAS_MCU_SET_FAN_SPEED_PERCENTAGE   SetFanSpeedPercentage;
+  KHADAS_MCU_SET_FAN_SPEED_PERCENTAGE    SetFanSpeedPercentage;
 };
 
-extern EFI_GUID gKhadasMcuProtocolGuid;
+extern EFI_GUID  gKhadasMcuProtocolGuid;
 
 #endif // __KHADAS_MCU_H__

edk2-rockchip/Platform/Mekotronics/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/Mekotronics/R58-Mini/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -16,29 +16,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -50,9 +50,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -62,14 +62,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdhci0 iomux (eMMC socket) */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -78,11 +78,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -91,24 +91,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -118,31 +121,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -183,47 +188,47 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    break;
-  case 4:
-    break;
-  case 5:
-    GpioPinSetFunction(1, GPIO_PIN_PB6, 9); //i2c5_scl_m3
-    GpioPinSetFunction(1, GPIO_PIN_PB7, 9); //i2c5_sda_m3
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      break;
+    case 4:
+      break;
+    case 5:
+      GpioPinSetFunction (1, GPIO_PIN_PB6, 9); // i2c5_scl_m3
+      GpioPinSetFunction (1, GPIO_PIN_PB7, 9); // i2c5_sda_m3
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      break;
+    default:
+      break;
   }
 }
 
@@ -233,7 +238,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
 
   /* Enable USB-C VBUS */
   GpioPinWrite (4, GPIO_PIN_PA7, TRUE);
@@ -250,22 +255,23 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset to gpio output mode */
-  if(Segment == PCIE_SEGMENT_PCIE20L0) { // AP6275P Wi-Fi
+  if (Segment == PCIE_SEGMENT_PCIE20L0) {
+    // AP6275P Wi-Fi
     GpioPinSetDirection (1, GPIO_PIN_PB4, GPIO_PIN_OUTPUT);
 
     /* wifi_poweren_gpio */
@@ -276,11 +282,11 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L0) {
+  if (Segment == PCIE_SEGMENT_PCIE20L0) {
     /* wifi_poweren_gpio */
     GpioPinWrite (1, GPIO_PIN_PB1, Enable);
   }
@@ -289,15 +295,45 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L0) {
+  if (Segment == PCIE_SEGMENT_PCIE20L0) {
     GpioPinWrite (1, GPIO_PIN_PB4, !Enable);
   }
 }
 
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+    case 1:
+      GpioPinSetFunction (3, GPIO_PIN_PC4, 5); // hdmim2_tx1_cec
+      GpioPinSetPull (3, GPIO_PIN_PC4, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA6, 5); // hdmim0_tx1_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC6, 5); // hdmim1_tx1_scl
+      GpioPinSetPull (3, GPIO_PIN_PC6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC5, 5); // hdmim1_tx1_sda
+      GpioPinSetPull (3, GPIO_PIN_PC5, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
 VOID
 EFIAPI
 PwmFanIoSetup (
@@ -309,7 +345,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
 }
@@ -328,7 +364,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (3, GPIO_PIN_PB7, Enable);
@@ -337,10 +373,11 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
 
@@ -358,5 +395,4 @@ PlatformEarlyInit (
   VOID
   )
 {
-
 }

edk2-rockchip/Platform/Mekotronics/R58-Mini/R58-Mini.dsc

@@ -75,13 +75,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -111,6 +104,16 @@
   gRK3588TokenSpaceGuid.PcdGmac0Supported|TRUE
   gRK3588TokenSpaceGuid.PcdGmac0TxDelay|0x44
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_HDMI1,
+    VOP_OUTPUT_IF_DP0,
+    VOP_OUTPUT_IF_DP1
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Mekotronics/R58X/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -16,29 +16,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -50,9 +50,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -62,14 +62,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdhci0 iomux (eMMC socket) */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -78,11 +78,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -91,24 +91,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -118,31 +121,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -198,49 +203,49 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    GpioPinSetFunction(1, GPIO_PIN_PC1, 9); //i2c3_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PC0, 9); //i2c3_sda_m0
-    break;
-  case 4:
-    break;
-  case 5:
-    GpioPinSetFunction(1, GPIO_PIN_PB6, 9); //i2c5_scl_m3
-    GpioPinSetFunction(1, GPIO_PIN_PB7, 9); //i2c5_sda_m3
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      GpioPinSetFunction (1, GPIO_PIN_PC1, 9); // i2c3_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PC0, 9); // i2c3_sda_m0
+      break;
+    case 4:
+      break;
+    case 5:
+      GpioPinSetFunction (1, GPIO_PIN_PB6, 9); // i2c5_scl_m3
+      GpioPinSetFunction (1, GPIO_PIN_PB7, 9); // i2c5_sda_m3
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      break;
+    default:
+      break;
   }
 }
 
@@ -250,7 +255,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
 
   /* Enable USB-C VBUS */
   GpioPinWrite (4, GPIO_PIN_PA7, TRUE);
@@ -267,22 +272,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4: // M.2 M Key
       /* reset */
       GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT);
@@ -304,11 +309,11 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       /* vcc3v3_pcie30 */
       GpioPinWrite (1, GPIO_PIN_PC4, Enable);
@@ -325,11 +330,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (4, GPIO_PIN_PB6, !Enable);
       break;
@@ -341,6 +346,26 @@ PciePeReset (
   }
 }
 
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
 VOID
 EFIAPI
 PwmFanIoSetup (
@@ -352,7 +377,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
 }
@@ -371,7 +396,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (3, GPIO_PIN_PB7, Enable);
@@ -380,10 +405,11 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
 
@@ -401,5 +427,5 @@ PlatformEarlyInit (
   VOID
   )
 {
-  GpioPinSetFunction(3, GPIO_PIN_PB2, 0); //jdet
+  GpioPinSetFunction (3, GPIO_PIN_PB2, 0); // jdet
 }

edk2-rockchip/Platform/Mekotronics/R58X/R58X.dsc

@@ -75,13 +75,6 @@
   # Disable HS400 for now, otherwise eMMC is unusable.
   gRockchipTokenSpaceGuid.PcdDwcSdhciDisableHs400|TRUE
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -113,6 +106,15 @@
   #
   gRK3588TokenSpaceGuid.PcdI2S0Supported|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_DP0,
+    VOP_OUTPUT_IF_DP1
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Mixtile/Blade3/Blade3.dsc

@@ -27,6 +27,9 @@
   FLASH_DEFINITION               = Silicon/Rockchip/RK3588/RK3588.fdf
   RK_PLATFORM_FVMAIN_MODULES     = $(PLATFORM_DIRECTORY)/$(PLATFORM_NAME).Modules.fdf.inc
 
+  # GMAC is not exposed
+  DEFINE RK3588_GMAC_ENABLE = FALSE
+
   # No status LED on this platform.
   DEFINE RK_STATUS_LED_ENABLE = FALSE
 
@@ -66,13 +69,6 @@
   gRockchipTokenSpaceGuid.PcdRk860xRegulatorBuses|{ 0x0, 0x0 }
   gRockchipTokenSpaceGuid.PcdRk860xRegulatorTags|{ $(SCMI_CLK_CPUB01), $(SCMI_CLK_CPUB23) }
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -96,6 +92,15 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_DP0,
+    VOP_OUTPUT_IF_DP1
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Mixtile/Blade3/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -17,29 +17,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -51,9 +51,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -63,14 +63,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdhci0 iomux (eMMC socket) */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -79,11 +79,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -92,24 +92,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -119,31 +122,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   /* No GMAC here */
@@ -152,49 +157,49 @@ GmacIomux (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    GpioPinSetFunction(0, GPIO_PIN_PD4, 9); //i2c1_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD5, 9); //i2c1_sda_m2
-    break;
-  case 2:
-    break;
-  case 3:
-    break;
-  case 4:
-    GpioPinSetFunction(3, GPIO_PIN_PA6, 9); //i2c4_scl_m0
-    GpioPinSetFunction(3, GPIO_PIN_PA5, 9); //i2c4_sda_m0
-    break;
-  case 5:
-    GpioPinSetFunction(1, GPIO_PIN_PB6, 9); //i2c5_scl_m3
-    GpioPinSetFunction(1, GPIO_PIN_PB7, 9); //i2c5_sda_m3
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      GpioPinSetFunction (0, GPIO_PIN_PD4, 9); // i2c1_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD5, 9); // i2c1_sda_m2
+      break;
+    case 2:
+      break;
+    case 3:
+      break;
+    case 4:
+      GpioPinSetFunction (3, GPIO_PIN_PA6, 9); // i2c4_scl_m0
+      GpioPinSetFunction (3, GPIO_PIN_PA5, 9); // i2c4_sda_m0
+      break;
+    case 5:
+      GpioPinSetFunction (1, GPIO_PIN_PB6, 9); // i2c5_scl_m3
+      GpioPinSetFunction (1, GPIO_PIN_PB7, 9); // i2c5_sda_m3
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      break;
+    default:
+      break;
   }
 }
 
@@ -204,7 +209,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
 
   /* vbus5v0_typec0 (data-only port) */
   GpioPinWrite (4, GPIO_PIN_PB0, TRUE);
@@ -224,22 +229,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4: // U.2
       /* reset */
       GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT);
@@ -260,11 +265,11 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (1, GPIO_PIN_PB2, Enable);
       break;
@@ -274,11 +279,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (4, GPIO_PIN_PB6, !Enable);
       break;
@@ -291,12 +296,32 @@ PciePeReset (
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER2,
-  .ChannelID = PWM_CHANNEL0,
-  .PeriodNs = 4000000,
-  .DutyNs = 4000000,
-  .Polarity = FALSE,
+  .ChannelID    = PWM_CHANNEL0,
+  .PeriodNs     = 4000000,
+  .DutyNs       = 4000000,
+  .Polarity     = FALSE,
 }; // PWM2_CH0
 
 VOID
@@ -313,7 +338,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
   pwm_data.DutyNs = pwm_data.PeriodNs * Percentage / 100;
@@ -332,7 +357,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   // No controllable LEDs on this platform
@@ -341,10 +366,11 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
 

edk2-rockchip/Platform/Mixtile/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/OrangePi/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/OrangePi/OrangePi5/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -17,31 +17,32 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+
   /* This is not configured in the OrangePi5's Linux device tree
   RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 1100000), */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
   /* The OPi is officially configured for the 837500 voltage, but is still marked as avdd_0v75_s0 in the schematic and Linux device tree. rockchip says this voltage is set to improve HDMI stability. */
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 837500),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  837500),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
   /* No dual PMICs on this platform */
 };
 
@@ -52,9 +53,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -67,9 +68,9 @@ SdhciEmmcIoMux (
   /* Do not override, set by earlier boot stages. */
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -78,11 +79,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -91,24 +92,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -124,7 +128,7 @@ NorFspiIomux (
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -164,49 +168,49 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    break;
-  case 4:
-    GpioPinSetFunction(3, GPIO_PIN_PA6, 9); //i2c4_scl_m0
-    GpioPinSetFunction(3, GPIO_PIN_PA5, 9); //i2c4_sda_m0
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(4, GPIO_PIN_PB1, 9); //i2c6_scl_m3
-    GpioPinSetFunction(4, GPIO_PIN_PB0, 9); //i2c6_sda_m3
-    break;
-  case 7:
-    GpioPinSetFunction(1, GPIO_PIN_PD0, 9); //i2c7_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PD1, 9); //i2c7_sda_m0
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      break;
+    case 4:
+      GpioPinSetFunction (3, GPIO_PIN_PA6, 9); // i2c4_scl_m0
+      GpioPinSetFunction (3, GPIO_PIN_PA5, 9); // i2c4_sda_m0
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (4, GPIO_PIN_PB1, 9); // i2c6_scl_m3
+      GpioPinSetFunction (4, GPIO_PIN_PB0, 9); // i2c6_sda_m3
+      break;
+    case 7:
+      GpioPinSetFunction (1, GPIO_PIN_PD0, 9); // i2c7_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PD1, 9); // i2c7_sda_m0
+      break;
+    default:
+      break;
   }
 }
 
@@ -216,7 +220,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
   /* Set GPIO3 PC0 (TYPEC_EN) output high to power Type-C/USB2.0 ports */
   GpioPinWrite (3, GPIO_PIN_PC0, TRUE);
   GpioPinSetDirection (3, GPIO_PIN_PC0, GPIO_PIN_OUTPUT);
@@ -232,22 +236,23 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset to gpio output mode */
-  if(Segment == PCIE_SEGMENT_PCIE20L2) { // M.2 M Key
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
+    // M.2 M Key
     GpioPinSetDirection (3, GPIO_PIN_PD1, GPIO_PIN_OUTPUT);
   }
 }
@@ -255,8 +260,8 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   /* nothing to power on */
@@ -265,21 +270,41 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L2) {
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
     GpioPinWrite (3, GPIO_PIN_PD1, !Enable);
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER3,
-  .ChannelID = PWM_CHANNEL2,
-  .PeriodNs = 4000000,
-  .DutyNs = 4000000,
-  .Polarity = FALSE,
+  .ChannelID    = PWM_CHANNEL2,
+  .PeriodNs     = 4000000,
+  .DutyNs       = 4000000,
+  .Polarity     = FALSE,
 }; // PWM3_CH2
 
 VOID
@@ -296,7 +321,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
   pwm_data.DutyNs = pwm_data.PeriodNs * Percentage / 100;
@@ -317,7 +342,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (1, GPIO_PIN_PA2, Enable);
@@ -326,13 +351,15 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 
@@ -354,5 +381,5 @@ PlatformEarlyInit (
 {
   // Configure various things specific to this platform
 
-  GpioPinSetFunction(1, GPIO_PIN_PD5, 0); //jdet
+  GpioPinSetFunction (1, GPIO_PIN_PD5, 0); // jdet
 }

edk2-rockchip/Platform/OrangePi/OrangePi5/OrangePi5.dsc

@@ -72,13 +72,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -109,6 +102,14 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/OrangePi/OrangePi5Plus/DeviceTree/Mainline.inf

@@ -14,7 +14,7 @@
   VERSION_STRING                 = 1.0
 
 [Sources]
-  devicetree/mainline/rk3588-orangepi-5-plus-fixup.dts
+  devicetree/mainline/upstream/src/arm64/rockchip/rk3588-orangepi-5-plus.dts
 
 [Packages]
   MdePkg/MdePkg.dec

edk2-rockchip/Platform/OrangePi/OrangePi5Plus/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -17,29 +17,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -51,9 +51,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -63,14 +63,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdmmc0 iomux */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -79,11 +79,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -92,24 +92,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -119,31 +122,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   /* No GMAC here */
@@ -152,49 +157,49 @@ GmacIomux (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    GpioPinSetFunction(0, GPIO_PIN_PD4, 9); //i2c1_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD5, 9); //i2c1_sda_m2
-    break;
-  case 2:
-    break;
-  case 3:
-    GpioPinSetFunction(1, GPIO_PIN_PC1, 9); //i2c3_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PC0, 9); //i2c3_sda_m0
-    break;
-  case 4:
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    GpioPinSetFunction(1, GPIO_PIN_PD0, 9); //i2c7_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PD1, 9); //i2c7_sda_m0
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      GpioPinSetFunction (0, GPIO_PIN_PD4, 9); // i2c1_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD5, 9); // i2c1_sda_m2
+      break;
+    case 2:
+      break;
+    case 3:
+      GpioPinSetFunction (1, GPIO_PIN_PC1, 9); // i2c3_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PC0, 9); // i2c3_sda_m0
+      break;
+    case 4:
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      GpioPinSetFunction (1, GPIO_PIN_PD0, 9); // i2c7_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PD1, 9); // i2c7_sda_m0
+      break;
+    default:
+      break;
   }
 }
 
@@ -204,7 +209,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
 
   /* vcc5v0_host_en */
   GpioPinWrite (3, GPIO_PIN_PB7, TRUE);
@@ -221,22 +226,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4: // M.2 M Key
       /* reset */
       GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT);
@@ -260,7 +265,8 @@ PcieIoInit (
     default:
       break;
   }
-  if (Segment == PCIE_SEGMENT_PCIE20L1 || Segment == PCIE_SEGMENT_PCIE20L2) {
+
+  if ((Segment == PCIE_SEGMENT_PCIE20L1) || (Segment == PCIE_SEGMENT_PCIE20L2)) {
     /* vcc3v3_pcie_eth */
     GpioPinSetDirection (3, GPIO_PIN_PB4, GPIO_PIN_OUTPUT);
   }
@@ -269,11 +275,11 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (2, GPIO_PIN_PB6, Enable);
       break;
@@ -293,11 +299,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (4, GPIO_PIN_PB6, !Enable);
       break;
@@ -315,12 +321,42 @@ PciePeReset (
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+    case 1:
+      GpioPinSetFunction (3, GPIO_PIN_PC4, 5); // hdmim2_tx1_cec
+      GpioPinSetPull (3, GPIO_PIN_PC4, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA6, 5); // hdmim0_tx1_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC6, 5); // hdmim1_tx1_scl
+      GpioPinSetPull (3, GPIO_PIN_PC6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC5, 5); // hdmim1_tx1_sda
+      GpioPinSetPull (3, GPIO_PIN_PC5, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER0,
-  .ChannelID = PWM_CHANNEL3,
-  .PeriodNs = 4000000,
-  .DutyNs = 4000000,
-  .Polarity = FALSE,
+  .ChannelID    = PWM_CHANNEL3,
+  .PeriodNs     = 4000000,
+  .DutyNs       = 4000000,
+  .Polarity     = FALSE,
 }; // PWM0_CH3
 
 VOID
@@ -337,7 +373,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
   pwm_data.DutyNs = pwm_data.PeriodNs * Percentage / 100;
@@ -358,7 +394,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (3, GPIO_PIN_PA6, Enable);
@@ -367,7 +403,7 @@ PlatformSetStatusLed (
 VOID
 EFIAPI
 PlatformWiFiEnable (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   // WiFi - enable
@@ -378,13 +414,15 @@ PlatformWiFiEnable (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 
@@ -407,5 +445,5 @@ PlatformEarlyInit (
   // Configure various things specific to this platform
   PlatformWiFiEnable (TRUE);
 
-  GpioPinSetFunction(1, GPIO_PIN_PD3, 0); //jdet
+  GpioPinSetFunction (1, GPIO_PIN_PD3, 0); // jdet
 }

edk2-rockchip/Platform/OrangePi/OrangePi5Plus/OrangePi5Plus.dsc

@@ -27,6 +27,9 @@
   FLASH_DEFINITION               = Silicon/Rockchip/RK3588/RK3588.fdf
   RK_PLATFORM_FVMAIN_MODULES     = $(PLATFORM_DIRECTORY)/$(PLATFORM_NAME).Modules.fdf.inc
 
+  # GMAC is not exposed
+  DEFINE RK3588_GMAC_ENABLE = FALSE
+
   #
   # HYM8563 RTC support
   # I2C location configured by PCDs below.
@@ -71,13 +74,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -106,6 +102,15 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_HDMI1,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Radxa/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/Radxa/ROCK5A/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -17,29 +17,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
   /* No dual PMICs on this platform */
 };
 
@@ -50,9 +50,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -65,9 +65,9 @@ SdhciEmmcIoMux (
   /* Do not override, set by earlier boot stages. */
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -76,11 +76,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -89,24 +89,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -122,7 +125,7 @@ NorFspiIomux (
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   switch (Id) {
@@ -162,45 +165,45 @@ GmacIoPhyReset (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    break;
-  case 2:
-    GpioPinSetFunction(0, GPIO_PIN_PB7, 9); //i2c2_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC0, 9); //i2c2_sda_m0
-    break;
-  case 3:
-    break;
-  case 4:
-    break;
-  case 5:
-    break;
-  case 6:
-    break;
-  case 7:
-    GpioPinSetFunction(1, GPIO_PIN_PD0, 9); //i2c7_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PD1, 9); //i2c7_sda_m0
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      break;
+    case 2:
+      GpioPinSetFunction (0, GPIO_PIN_PB7, 9); // i2c2_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC0, 9); // i2c2_sda_m0
+      break;
+    case 3:
+      break;
+    case 4:
+      break;
+    case 5:
+      break;
+    case 6:
+      break;
+    case 7:
+      GpioPinSetFunction (1, GPIO_PIN_PD0, 9); // i2c7_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PD1, 9); // i2c7_sda_m0
+      break;
+    default:
+      break;
   }
 }
 
@@ -210,7 +213,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
 
   /* vcc5v0_host */
   GpioPinSetDirection (4, GPIO_PIN_PB5, GPIO_PIN_OUTPUT);
@@ -227,21 +230,21 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L2) {
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
     // Set reset and power IO to gpio output mode
     GpioPinSetDirection (0, GPIO_PIN_PC5, GPIO_PIN_OUTPUT);
     GpioPinSetDirection (3, GPIO_PIN_PD1, GPIO_PIN_OUTPUT);
@@ -251,11 +254,11 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L2) {
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
     /* output high to enable power */
     GpioPinWrite (0, GPIO_PIN_PC5, Enable);
   }
@@ -264,21 +267,41 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  if(Segment == PCIE_SEGMENT_PCIE20L2) {
+  if (Segment == PCIE_SEGMENT_PCIE20L2) {
     GpioPinWrite (3, GPIO_PIN_PD1, !Enable);
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PD4, 3); // hdmim1_tx0_hpd
+      GpioPinSetPull (3, GPIO_PIN_PD4, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER0,
-  .ChannelID = PWM_CHANNEL3,
-  .PeriodNs = 4000000,
-  .DutyNs = 4000000,
-  .Polarity = FALSE,
+  .ChannelID    = PWM_CHANNEL3,
+  .PeriodNs     = 4000000,
+  .DutyNs       = 4000000,
+  .Polarity     = FALSE,
 }; // PWM0_CH3
 
 VOID
@@ -295,7 +318,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
   pwm_data.DutyNs = pwm_data.PeriodNs * Percentage / 100;
@@ -316,7 +339,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (3, GPIO_PIN_PD5, Enable);
@@ -325,13 +348,15 @@ PlatformSetStatusLed (
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 
@@ -352,5 +377,5 @@ PlatformEarlyInit (
   )
 {
   // Configure various things specific to this platform
-  GpioPinSetFunction(1, GPIO_PIN_PC4, 0); //jdet
+  GpioPinSetFunction (1, GPIO_PIN_PC4, 0); // jdet
 }

edk2-rockchip/Platform/Radxa/ROCK5A/ROCK5A.dsc

@@ -64,13 +64,6 @@
   gRockchipTokenSpaceGuid.PcdRk860xRegulatorBuses|{ 0x0, 0x0 }
   gRockchipTokenSpaceGuid.PcdRk860xRegulatorTags|{ $(SCMI_CLK_CPUB01), $(SCMI_CLK_CPUB23) }
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -102,6 +95,14 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Radxa/ROCK5B/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -17,29 +17,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -51,9 +51,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -63,14 +63,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdhci0 iomux (eMMC socket) */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -79,11 +79,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -92,24 +92,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -119,31 +122,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   /* No GMAC here */
@@ -152,49 +157,49 @@ GmacIomux (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    GpioPinSetFunction(0, GPIO_PIN_PD4, 9); //i2c1_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD5, 9); //i2c1_sda_m2
-    break;
-  case 2:
-    break;
-  case 3:
-    break;
-  case 4:
-    GpioPinSetFunction(2, GPIO_PIN_PB5, 9); //i2c4_scl_m1
-    GpioPinSetFunction(2, GPIO_PIN_PB4, 9); //i2c4_sda_m1
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    GpioPinSetFunction(1, GPIO_PIN_PD0, 9); //i2c7_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PD1, 9); //i2c7_sda_m0
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      GpioPinSetFunction (0, GPIO_PIN_PD4, 9); // i2c1_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD5, 9); // i2c1_sda_m2
+      break;
+    case 2:
+      break;
+    case 3:
+      break;
+    case 4:
+      GpioPinSetFunction (2, GPIO_PIN_PB5, 9); // i2c4_scl_m1
+      GpioPinSetFunction (2, GPIO_PIN_PB4, 9); // i2c4_sda_m1
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      GpioPinSetFunction (1, GPIO_PIN_PD0, 9); // i2c7_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PD1, 9); // i2c7_sda_m0
+      break;
+    default:
+      break;
   }
 }
 
@@ -204,7 +209,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
   /* Set GPIO4 PB0 (USB_HOST_PWREN) output high to power USB ports */
   GpioPinWrite (4, GPIO_PIN_PB0, TRUE);
   GpioPinSetDirection (4, GPIO_PIN_PB0, GPIO_PIN_OUTPUT);
@@ -220,22 +225,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT);
       GpioPinSetDirection (1, GPIO_PIN_PA4, GPIO_PIN_OUTPUT);
@@ -260,13 +265,13 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   /* output high to enable power */
 
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (1, GPIO_PIN_PA4, Enable);
       break;
@@ -285,11 +290,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (4, GPIO_PIN_PB6, !Enable);
       break;
@@ -306,12 +311,42 @@ PciePeReset (
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+    case 1:
+      GpioPinSetFunction (2, GPIO_PIN_PC4, 4); // hdmim0_tx1_cec
+      GpioPinSetPull (2, GPIO_PIN_PC4, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA6, 5); // hdmim0_tx1_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC6, 5); // hdmim1_tx1_scl
+      GpioPinSetPull (3, GPIO_PIN_PC6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC5, 5); // hdmim1_tx1_sda
+      GpioPinSetPull (3, GPIO_PIN_PC5, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER0,
-  .ChannelID = PWM_CHANNEL1,
-  .PeriodNs = 4000000,
-  .DutyNs = 4000000,
-  .Polarity = FALSE,
+  .ChannelID    = PWM_CHANNEL1,
+  .PeriodNs     = 4000000,
+  .DutyNs       = 4000000,
+  .Polarity     = FALSE,
 }; // PWM0_CH1
 
 VOID
@@ -328,7 +363,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
   pwm_data.DutyNs = pwm_data.PeriodNs * Percentage / 100;
@@ -349,7 +384,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (0, GPIO_PIN_PB7, Enable);
@@ -358,7 +393,7 @@ PlatformSetStatusLed (
 VOID
 EFIAPI
 PlatformPcieWiFiEnable (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   // WiFi - enable
@@ -372,19 +407,20 @@ PlatformPcieWiFiEnable (
   GpioPinSetDirection (3, GPIO_PIN_PD5, GPIO_PIN_OUTPUT);
   GpioPinWrite (3, GPIO_PIN_PA6, Enable);
   GpioPinSetDirection (3, GPIO_PIN_PA6, GPIO_PIN_OUTPUT);
-
 }
 
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 
@@ -405,6 +441,6 @@ PlatformEarlyInit (
   )
 {
   // Configure various things specific to this platform
-  PlatformPcieWiFiEnable(TRUE);
-  GpioPinSetFunction(1, GPIO_PIN_PD5, 0); //jdet
+  PlatformPcieWiFiEnable (TRUE);
+  GpioPinSetFunction (1, GPIO_PIN_PD5, 0); // jdet
 }

edk2-rockchip/Platform/Radxa/ROCK5B/ROCK5B.dsc

@@ -28,6 +28,9 @@
   FLASH_DEFINITION               = Silicon/Rockchip/RK3588/RK3588.fdf
   RK_PLATFORM_FVMAIN_MODULES     = $(PLATFORM_DIRECTORY)/$(PLATFORM_NAME).Modules.fdf.inc
 
+  # GMAC is not exposed
+  DEFINE RK3588_GMAC_ENABLE = FALSE
+
   #
   # HYM8563 RTC support
   # I2C location configured by PCDs below.
@@ -72,13 +75,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -107,6 +103,15 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_HDMI1,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Radxa/ROCK5BPlus/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -17,29 +17,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -51,9 +51,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -63,14 +63,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdhci0 iomux (eMMC socket) */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -79,11 +79,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -92,24 +92,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -119,31 +122,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   /* No GMAC here */
@@ -152,49 +157,49 @@ GmacIomux (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    GpioPinSetFunction(0, GPIO_PIN_PD4, 9); //i2c1_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD5, 9); //i2c1_sda_m2
-    break;
-  case 2:
-    break;
-  case 3:
-    break;
-  case 4:
-    GpioPinSetFunction(2, GPIO_PIN_PB5, 9); //i2c4_scl_m1
-    GpioPinSetFunction(2, GPIO_PIN_PB4, 9); //i2c4_sda_m1
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    GpioPinSetFunction(1, GPIO_PIN_PD0, 9); //i2c7_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PD1, 9); //i2c7_sda_m0
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      GpioPinSetFunction (0, GPIO_PIN_PD4, 9); // i2c1_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD5, 9); // i2c1_sda_m2
+      break;
+    case 2:
+      break;
+    case 3:
+      break;
+    case 4:
+      GpioPinSetFunction (2, GPIO_PIN_PB5, 9); // i2c4_scl_m1
+      GpioPinSetFunction (2, GPIO_PIN_PB4, 9); // i2c4_sda_m1
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      GpioPinSetFunction (1, GPIO_PIN_PD0, 9); // i2c7_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PD1, 9); // i2c7_sda_m0
+      break;
+    default:
+      break;
   }
 }
 
@@ -204,7 +209,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
   /* Set GPIO1 PA1 (USB_HOST_PWREN) output high to power USB ports */
   GpioPinWrite (1, GPIO_PIN_PA1, TRUE);
   GpioPinSetDirection (1, GPIO_PIN_PA1, GPIO_PIN_OUTPUT);
@@ -223,22 +228,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT);
       GpioPinSetDirection (1, GPIO_PIN_PA4, GPIO_PIN_OUTPUT);
@@ -268,15 +273,15 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   /* output high to enable power */
 
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
-      /* fall through */
+    /* fall through */
     case PCIE_SEGMENT_PCIE30X2:
       GpioPinWrite (1, GPIO_PIN_PA4, Enable);
       break;
@@ -295,11 +300,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (4, GPIO_PIN_PB6, !Enable);
       break;
@@ -319,12 +324,42 @@ PciePeReset (
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 0:
+      GpioPinSetFunction (4, GPIO_PIN_PC1, 5); // hdmim0_tx0_cec
+      GpioPinSetPull (4, GPIO_PIN_PC1, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA5, 5); // hdmim0_tx0_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA5, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PB7, 5); // hdmim0_tx0_scl
+      GpioPinSetPull (4, GPIO_PIN_PB7, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (4, GPIO_PIN_PC0, 5); // hdmim0_tx0_sda
+      GpioPinSetPull (4, GPIO_PIN_PC0, GPIO_PIN_PULL_NONE);
+      break;
+    case 1:
+      GpioPinSetFunction (2, GPIO_PIN_PC4, 4); // hdmim0_tx1_cec
+      GpioPinSetPull (2, GPIO_PIN_PC4, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA6, 5); // hdmim0_tx1_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC6, 5); // hdmim1_tx1_scl
+      GpioPinSetPull (3, GPIO_PIN_PC6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC5, 5); // hdmim1_tx1_sda
+      GpioPinSetPull (3, GPIO_PIN_PC5, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER0,
-  .ChannelID = PWM_CHANNEL1,
-  .PeriodNs = 4000000,
-  .DutyNs = 4000000,
-  .Polarity = FALSE,
+  .ChannelID    = PWM_CHANNEL1,
+  .PeriodNs     = 4000000,
+  .DutyNs       = 4000000,
+  .Polarity     = FALSE,
 }; // PWM0_CH1
 
 VOID
@@ -341,7 +376,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
   pwm_data.DutyNs = pwm_data.PeriodNs * Percentage / 100;
@@ -362,7 +397,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (0, GPIO_PIN_PB7, Enable);
@@ -371,7 +406,7 @@ PlatformSetStatusLed (
 VOID
 EFIAPI
 PlatformPcieWiFiEnable (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   // WiFi - enable
@@ -383,16 +418,16 @@ PlatformPcieWiFiEnable (
   // bluetooth - enable
   GpioPinWrite (3, GPIO_PIN_PD5, Enable);
   GpioPinSetDirection (3, GPIO_PIN_PD5, GPIO_PIN_OUTPUT);
-
 }
 
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
 
@@ -411,6 +446,6 @@ PlatformEarlyInit (
   )
 {
   // Configure various things specific to this platform
-  PlatformPcieWiFiEnable(TRUE);
-  GpioPinSetFunction(1, GPIO_PIN_PD5, 0); //jdet
+  PlatformPcieWiFiEnable (TRUE);
+  GpioPinSetFunction (1, GPIO_PIN_PD5, 0); // jdet
 }

edk2-rockchip/Platform/Radxa/ROCK5BPlus/ROCK5BPlus.dsc

@@ -29,6 +29,9 @@
   FLASH_DEFINITION               = Silicon/Rockchip/RK3588/RK3588.fdf
   RK_PLATFORM_FVMAIN_MODULES     = $(PLATFORM_DIRECTORY)/$(PLATFORM_NAME).Modules.fdf.inc
 
+  # GMAC is not exposed
+  DEFINE RK3588_GMAC_ENABLE = FALSE
+
   #
   # HYM8563 RTC support
   # I2C location configured by PCDs below.
@@ -73,13 +76,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -111,6 +107,15 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI0,
+    VOP_OUTPUT_IF_HDMI1,
+    VOP_OUTPUT_IF_DP0
+  })}
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.

edk2-rockchip/Platform/Radxa/ROCK5ITX/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -17,29 +17,29 @@
 #include <Soc.h>
 #include <VarStoreData.h>
 
-static struct regulator_init_data rk806_init_data[] = {
+static struct regulator_init_data  rk806_init_data[] = {
   /* Master PMIC */
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 850000),
-  //RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK4,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK5,  850000),
+  // RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK7,  2000000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK8,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_BUCK10, 1800000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 850000),
-  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO1,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO2,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO3,  750000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO4,  850000),
+  RK8XX_VOLTAGE_INIT (MASTER_NLDO5,  750000),
 
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1200000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 3300000),
-  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO1,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO2,  1800000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO3,  1200000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO4,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO5,  3300000),
+  RK8XX_VOLTAGE_INIT (MASTER_PLDO6,  1800000),
 
   /* No dual PMICs on this platform */
 };
@@ -51,9 +51,9 @@ SdmmcIoMux (
   )
 {
   /* sdmmc0 iomux (microSD socket) */
-  BUS_IOC->GPIO4D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
-  BUS_IOC->GPIO4D_IOMUX_SEL_H = (0x00FFUL << 16) | (0x0011); //SDMMC_CLK,SDMMC_CMD
-  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); //SDMMC_DET
+  BUS_IOC->GPIO4D_IOMUX_SEL_L  = (0xFFFFUL << 16) | (0x1111); // SDMMC_D0,SDMMC_D1,SDMMC_D2,SDMMC_D3
+  BUS_IOC->GPIO4D_IOMUX_SEL_H  = (0x00FFUL << 16) | (0x0011); // SDMMC_CLK,SDMMC_CMD
+  PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x000FUL << 16) | (0x0001); // SDMMC_DET
 }
 
 VOID
@@ -63,14 +63,14 @@ SdhciEmmcIoMux (
   )
 {
   /* sdhci0 iomux (eMMC socket) */
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); //EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); //EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_CMD,EMMC_CLKOUT,EMMC_DATASTROBE,EMMC_RSTN
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x1111); // EMMC_D0,EMMC_D1,EMMC_D2,EMMC_D3
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = (0xFFFFUL << 16) | (0x1111); // EMMC_D4,EMMC_D5,EMMC_D6,EMMC_D7
 }
 
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON59    0x03EC
-#define CRU_CLKSEL_CON78    0x0438
+#define NS_CRU_BASE       0xFD7C0000
+#define CRU_CLKSEL_CON59  0x03EC
+#define CRU_CLKSEL_CON78  0x0438
 
 VOID
 EFIAPI
@@ -79,11 +79,11 @@ Rk806SpiIomux (
   )
 {
   /* io mux */
-  //BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
-  //BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
+  // BUS_IOC->GPIO1A_IOMUX_SEL_H = (0xFFFFUL << 16) | 0x8888;
+  // BUS_IOC->GPIO1B_IOMUX_SEL_L = (0x000FUL << 16) | 0x0008;
   PMU1_IOC->GPIO0A_IOMUX_SEL_H = (0x0FF0UL << 16) | 0x0110;
   PMU1_IOC->GPIO0B_IOMUX_SEL_L = (0xF0FFUL << 16) | 0x1011;
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
+  MmioWrite32 (NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
 VOID
@@ -92,24 +92,27 @@ Rk806Configure (
   VOID
   )
 {
-  UINTN RegCfgIndex;
+  UINTN  RegCfgIndex;
 
-  RK806Init();
+  RK806Init ();
 
-  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
-    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+  RK806PinSetFunction (MASTER, 1, 2); // rk806_dvs1_pwrdn
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE (rk806_init_data); RegCfgIndex++) {
+    RK806RegulatorInit (rk806_init_data[RegCfgIndex]);
+  }
 }
 
 VOID
 EFIAPI
 SetCPULittleVoltage (
-  IN UINT32 Microvolts
+  IN UINT32  Microvolts
   )
 {
-  struct regulator_init_data Rk806CpuLittleSupply =
-        RK8XX_VOLTAGE_INIT(MASTER_BUCK2, Microvolts);
+  struct regulator_init_data  Rk806CpuLittleSupply =
+    RK8XX_VOLTAGE_INIT (MASTER_BUCK2, Microvolts);
 
-  RK806RegulatorInit(Rk806CpuLittleSupply);
+  RK806RegulatorInit (Rk806CpuLittleSupply);
 }
 
 VOID
@@ -119,31 +122,33 @@ NorFspiIomux (
   )
 {
   /* io mux */
-  MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON78,
-             (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6));
-#define FSPI_M1
-#if defined(FSPI_M0)
-   /*FSPI M0*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0); //FSPI_CLK_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222); //FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
-  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); //FSPI_CS0N_M0
-#elif defined(FSPI_M1)
+  MmioWrite32 (
+    NS_CRU_BASE + CRU_CLKSEL_CON78,
+    (((0x3 << 12) | (0x3f << 6)) << 16) | (0x0 << 12) | (0x3f << 6)
+    );
+  #define FSPI_M1
+ #if defined (FSPI_M0)
+  /*FSPI M0*/
+  BUS_IOC->GPIO2A_IOMUX_SEL_L = ((0xF << 0) << 16) | (2 << 0);   // FSPI_CLK_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x2222);     // FSPI_D0_M0,FSPI_D1_M0,FSPI_D2_M0,FSPI_D3_M0
+  BUS_IOC->GPIO2D_IOMUX_SEL_H = ((0xF << 8) << 16) | (0x2 << 8); // FSPI_CS0N_M0
+ #elif defined (FSPI_M1)
   /*FSPI M1*/
-  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); //FSPI_D0_M1,FSPI_D1_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); //FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
-  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3); //FSPI_CS0N_M1
-#else
+  BUS_IOC->GPIO2A_IOMUX_SEL_H = (0xFF00UL << 16) | (0x3300); // FSPI_D0_M1,FSPI_D1_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_L = (0xF0FFUL << 16) | (0x3033); // FSPI_D2_M1,FSPI_D3_M1,FSPI_CLK_M1
+  BUS_IOC->GPIO2B_IOMUX_SEL_H = (0xF << 16) | (0x3);         // FSPI_CS0N_M1
+ #else
   /*FSPI M2*/
-  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); //[FSPI_D0_M2-FSPI_D3_M2]
-  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50); //FSPI_CLK_M2
-  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2); //FSPI_CS0_M2
-#endif
+  BUS_IOC->GPIO3A_IOMUX_SEL_L = (0xFFFFUL << 16) | (0x5555); // [FSPI_D0_M2-FSPI_D3_M2]
+  BUS_IOC->GPIO3A_IOMUX_SEL_H = (0xF0UL << 16) | (0x50);     // FSPI_CLK_M2
+  BUS_IOC->GPIO3C_IOMUX_SEL_H = (0xF << 16) | (0x2);         // FSPI_CS0_M2
+ #endif
 }
 
 VOID
 EFIAPI
 GmacIomux (
-  IN UINT32 Id
+  IN UINT32  Id
   )
 {
   /* No GMAC here */
@@ -152,49 +157,49 @@ GmacIomux (
 VOID
 EFIAPI
 NorFspiEnableClock (
-  UINT32 *CruBase
+  UINT32  *CruBase
   )
 {
-  UINTN BaseAddr = (UINTN) CruBase;
+  UINTN  BaseAddr = (UINTN)CruBase;
 
-  MmioWrite32(BaseAddr + 0x087C, 0x0E000000);
+  MmioWrite32 (BaseAddr + 0x087C, 0x0E000000);
 }
 
 VOID
 EFIAPI
 I2cIomux (
-   UINT32 id
+  UINT32  id
   )
 {
   switch (id) {
-  case 0:
-    GpioPinSetFunction(0, GPIO_PIN_PD1, 3); //i2c0_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD2, 3); //i2c0_sda_m2
-    break;
-  case 1:
-    GpioPinSetFunction(0, GPIO_PIN_PD4, 9); //i2c1_scl_m2
-    GpioPinSetFunction(0, GPIO_PIN_PD5, 9); //i2c1_sda_m2
-    break;
-  case 2:
-    break;
-  case 3:
-    break;
-  case 4:
-    GpioPinSetFunction(2, GPIO_PIN_PB5, 9); //i2c4_scl_m1
-    GpioPinSetFunction(2, GPIO_PIN_PB4, 9); //i2c4_sda_m1
-    break;
-  case 5:
-    break;
-  case 6:
-    GpioPinSetFunction(0, GPIO_PIN_PD0, 9); //i2c6_scl_m0
-    GpioPinSetFunction(0, GPIO_PIN_PC7, 9); //i2c6_sda_m0
-    break;
-  case 7:
-    GpioPinSetFunction(1, GPIO_PIN_PD0, 9); //i2c7_scl_m0
-    GpioPinSetFunction(1, GPIO_PIN_PD1, 9); //i2c7_sda_m0
-    break;
-  default:
-    break;
+    case 0:
+      GpioPinSetFunction (0, GPIO_PIN_PD1, 3); // i2c0_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD2, 3); // i2c0_sda_m2
+      break;
+    case 1:
+      GpioPinSetFunction (0, GPIO_PIN_PD4, 9); // i2c1_scl_m2
+      GpioPinSetFunction (0, GPIO_PIN_PD5, 9); // i2c1_sda_m2
+      break;
+    case 2:
+      break;
+    case 3:
+      break;
+    case 4:
+      GpioPinSetFunction (2, GPIO_PIN_PB5, 9); // i2c4_scl_m1
+      GpioPinSetFunction (2, GPIO_PIN_PB4, 9); // i2c4_sda_m1
+      break;
+    case 5:
+      break;
+    case 6:
+      GpioPinSetFunction (0, GPIO_PIN_PD0, 9); // i2c6_scl_m0
+      GpioPinSetFunction (0, GPIO_PIN_PC7, 9); // i2c6_sda_m0
+      break;
+    case 7:
+      GpioPinSetFunction (1, GPIO_PIN_PD0, 9); // i2c7_scl_m0
+      GpioPinSetFunction (1, GPIO_PIN_PD1, 9); // i2c7_sda_m0
+      break;
+    default:
+      break;
   }
 }
 
@@ -204,7 +209,7 @@ UsbPortPowerEnable (
   VOID
   )
 {
-  DEBUG((DEBUG_INFO, "UsbPortPowerEnable called\n"));
+  DEBUG ((DEBUG_INFO, "UsbPortPowerEnable called\n"));
   /* Set GPIO4 PB0 (USB_HOST_PWREN) output high to power USB ports */
   GpioPinWrite (3, GPIO_PIN_PB7, TRUE);
   GpioPinSetDirection (3, GPIO_PIN_PB7, GPIO_PIN_OUTPUT);
@@ -220,22 +225,22 @@ Usb2PhyResume (
   VOID
   )
 {
-  MmioWrite32(0xfd5d0008, 0x20000000);
-  MmioWrite32(0xfd5d4008, 0x20000000);
-  MmioWrite32(0xfd5d8008, 0x20000000);
-  MmioWrite32(0xfd5dc008, 0x20000000);
-  MmioWrite32(0xfd7f0a10, 0x07000700);
-  MmioWrite32(0xfd7f0a10, 0x07000000);
+  MmioWrite32 (0xfd5d0008, 0x20000000);
+  MmioWrite32 (0xfd5d4008, 0x20000000);
+  MmioWrite32 (0xfd5d8008, 0x20000000);
+  MmioWrite32 (0xfd5dc008, 0x20000000);
+  MmioWrite32 (0xfd7f0a10, 0x07000700);
+  MmioWrite32 (0xfd7f0a10, 0x07000000);
 }
 
 VOID
 EFIAPI
 PcieIoInit (
-  UINT32 Segment
+  UINT32  Segment
   )
 {
   /* Set reset and power IO to gpio output mode */
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinSetDirection (4, GPIO_PIN_PB6, GPIO_PIN_OUTPUT);
       GpioPinSetDirection (1, GPIO_PIN_PA4, GPIO_PIN_OUTPUT);
@@ -265,13 +270,13 @@ PcieIoInit (
 VOID
 EFIAPI
 PciePowerEn (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
   /* output high to enable power */
 
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (1, GPIO_PIN_PA4, Enable);
       break;
@@ -291,11 +296,11 @@ PciePowerEn (
 VOID
 EFIAPI
 PciePeReset (
-  UINT32 Segment,
-  BOOLEAN Enable
+  UINT32   Segment,
+  BOOLEAN  Enable
   )
 {
-  switch(Segment) {
+  switch (Segment) {
     case PCIE_SEGMENT_PCIE30X4:
       GpioPinWrite (4, GPIO_PIN_PB6, !Enable);
       break;
@@ -316,12 +321,32 @@ PciePeReset (
   }
 }
 
-PWM_DATA pwm_data = {
+VOID
+EFIAPI
+HdmiTxIomux (
+  IN UINT32  Id
+  )
+{
+  switch (Id) {
+    case 1:
+      GpioPinSetFunction (2, GPIO_PIN_PC4, 4); // hdmim0_tx1_cec
+      GpioPinSetPull (2, GPIO_PIN_PC4, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (1, GPIO_PIN_PA6, 5); // hdmim0_tx1_hpd
+      GpioPinSetPull (1, GPIO_PIN_PA6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC6, 5); // hdmim1_tx1_scl
+      GpioPinSetPull (3, GPIO_PIN_PC6, GPIO_PIN_PULL_NONE);
+      GpioPinSetFunction (3, GPIO_PIN_PC5, 5); // hdmim1_tx1_sda
+      GpioPinSetPull (3, GPIO_PIN_PC5, GPIO_PIN_PULL_NONE);
+      break;
+  }
+}
+
+PWM_DATA  pwm_data = {
   .ControllerID = PWM_CONTROLLER0,
-  .ChannelID = PWM_CHANNEL1,
-  .PeriodNs = 4000000,
-  .DutyNs = 4000000,
-  .Polarity = FALSE,
+  .ChannelID    = PWM_CHANNEL1,
+  .PeriodNs     = 4000000,
+  .DutyNs       = 4000000,
+  .Polarity     = FALSE,
 }; // PWM0_CH1
 
 VOID
@@ -338,7 +363,7 @@ PwmFanIoSetup (
 VOID
 EFIAPI
 PwmFanSetSpeed (
-  IN UINT32 Percentage
+  IN UINT32  Percentage
   )
 {
   pwm_data.DutyNs = pwm_data.PeriodNs * Percentage / 100;
@@ -359,7 +384,7 @@ PlatformInitLeds (
 VOID
 EFIAPI
 PlatformSetStatusLed (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   GpioPinWrite (0, GPIO_PIN_PC0, Enable);
@@ -368,7 +393,7 @@ PlatformSetStatusLed (
 VOID
 EFIAPI
 PlatformPcieWiFiEnable (
-  IN BOOLEAN Enable
+  IN BOOLEAN  Enable
   )
 {
   // WiFi - enable
@@ -382,19 +407,20 @@ PlatformPcieWiFiEnable (
   GpioPinSetDirection (4, GPIO_PIN_PC5, GPIO_PIN_OUTPUT);
   GpioPinWrite (2, GPIO_PIN_PC5, Enable);
   GpioPinSetDirection (2, GPIO_PIN_PC5, GPIO_PIN_OUTPUT);
-
 }
 
 CONST EFI_GUID *
 EFIAPI
 PlatformGetDtbFileGuid (
-  IN UINT32 CompatMode
+  IN UINT32  CompatMode
   )
 {
-  STATIC CONST EFI_GUID VendorDtbFileGuid = {         // DeviceTree/Vendor.inf
+  STATIC CONST EFI_GUID  VendorDtbFileGuid = {
+    // DeviceTree/Vendor.inf
     0xd58b4028, 0x43d8, 0x4e97, { 0x87, 0xd4, 0x4e, 0x37, 0x16, 0x13, 0x65, 0x80 }
   };
-  STATIC CONST EFI_GUID MainlineDtbFileGuid = {       // DeviceTree/Mainline.inf
+  STATIC CONST EFI_GUID  MainlineDtbFileGuid = {
+    // DeviceTree/Mainline.inf
     0x84492e97, 0xa10f, 0x49a7, { 0x85, 0xe9, 0x02, 0x5d, 0x19, 0x66, 0xb3, 0x43 }
   };
 
@@ -415,6 +441,6 @@ PlatformEarlyInit (
   )
 {
   // Configure various things specific to this platform
-  PlatformPcieWiFiEnable(TRUE);
-  GpioPinSetFunction(1, GPIO_PIN_PD5, 0); //jdet
+  PlatformPcieWiFiEnable (TRUE);
+  GpioPinSetFunction (1, GPIO_PIN_PD5, 0); // jdet
 }

edk2-rockchip/Platform/Radxa/ROCK5ITX/ROCK5ITX.dsc

@@ -28,6 +28,9 @@
   FLASH_DEFINITION               = Silicon/Rockchip/RK3588/RK3588.fdf
   RK_PLATFORM_FVMAIN_MODULES     = $(PLATFORM_DIRECTORY)/$(PLATFORM_NAME).Modules.fdf.inc
 
+  # GMAC is not exposed
+  DEFINE RK3588_GMAC_ENABLE = FALSE
+
   #
   # HYM8563 RTC support
   # I2C location configured by PCDs below.
@@ -72,18 +75,6 @@
   gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51
   gRockchipTokenSpaceGuid.PcdRtc8563Bus|0x6
 
-  #
-  # HDMI1 Display
-  #
-  gRockchipTokenSpaceGuid.PcdHdmiId|0x00000001 #hdmi1
-
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT)
-
   #
   # PCIe/SATA/USB Combo PIPE PHY support flags and default values
   #
@@ -114,6 +105,13 @@
   #
   gRK3588TokenSpaceGuid.PcdHasOnBoardFanOutput|TRUE
 
+  #
+  # Display support flags and default values
+  #
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors|{CODE({
+    VOP_OUTPUT_IF_HDMI1,
+    VOP_OUTPUT_IF_DP0
+  })}
 
 ################################################################################
 #

edk2-rockchip/Platform/StationPC/Drivers/LogoDxe/Logo.c

@@ -19,15 +19,15 @@
 #include <Library/DebugLib.h>
 
 typedef struct {
-  EFI_IMAGE_ID                          ImageId;
-  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
-  INTN                                  OffsetX;
-  INTN                                  OffsetY;
+  EFI_IMAGE_ID                             ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE    Attribute;
+  INTN                                     OffsetX;
+  INTN                                     OffsetY;
 } LOGO_ENTRY;
 
-STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-STATIC EFI_HII_HANDLE            mHiiHandle;
-STATIC LOGO_ENTRY                mLogos[] = {
+STATIC EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;
+STATIC EFI_HII_HANDLE             mHiiHandle;
+STATIC LOGO_ENTRY                 mLogos[] = {
   {
     IMAGE_TOKEN (IMG_LOGO),
     EdkiiPlatformLogoDisplayAttributeCenter,
@@ -53,18 +53,19 @@ STATIC
 EFI_STATUS
 EFIAPI
 GetImage (
-  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
-  IN OUT UINT32                                *Instance,
-     OUT EFI_IMAGE_INPUT                       *Image,
-     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
-     OUT INTN                                  *OffsetX,
-     OUT INTN                                  *OffsetY
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL        *This,
+  IN OUT UINT32                              *Instance,
+  OUT EFI_IMAGE_INPUT                        *Image,
+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
+  OUT INTN                                   *OffsetX,
+  OUT INTN                                   *OffsetY
   )
 {
-  UINT32 Current;
+  UINT32  Current;
 
-  if (Instance == NULL || Image == NULL ||
-      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+  if ((Instance == NULL) || (Image == NULL) ||
+      (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
@@ -78,11 +79,15 @@ GetImage (
   *OffsetX   = mLogos[Current].OffsetX;
   *OffsetY   = mLogos[Current].OffsetY;
 
-  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
-                        mLogos[Current].ImageId, Image);
+  return mHiiImageEx->GetImageEx (
+                        mHiiImageEx,
+                        mHiiHandle,
+                        mLogos[Current].ImageId,
+                        Image
+                        );
 }
 
-STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {
   GetImage
 };
 
@@ -101,44 +106,66 @@ STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
 EFI_STATUS
 EFIAPI
 InitializeLogo (
-  IN EFI_HANDLE               ImageHandle,
-  IN EFI_SYSTEM_TABLE         *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                  Status;
-  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
-  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
-  EFI_HANDLE                  Handle;
+  EFI_STATUS                   Status;
+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;
+  EFI_HII_DATABASE_PROTOCOL    *HiiDatabase;
+  EFI_HANDLE                   Handle;
 
-  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
-                  (VOID **) &HiiDatabase);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiDatabaseProtocolGuid,
+                  NULL,
+                  (VOID **)&HiiDatabase
+                  );
   ASSERT_EFI_ERROR (Status);
 
-  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
-                  (VOID **) &mHiiImageEx);
+  Status = gBS->LocateProtocol (
+                  &gEfiHiiImageExProtocolGuid,
+                  NULL,
+                  (VOID **)&mHiiImageEx
+                  );
   ASSERT_EFI_ERROR (Status);
 
   //
   // Retrieve HII package list from ImageHandle
   //
-  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
-                  (VOID **) &PackageList, ImageHandle, NULL,
-                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  Status = gBS->OpenProtocol (
+                  ImageHandle,
+                  &gEfiHiiPackageListProtocolGuid,
+                  (VOID **)&PackageList,
+                  ImageHandle,
+                  NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR,
-      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    DEBUG ((
+      DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"
+      ));
     return Status;
   }
 
   //
   // Publish HII package list to HII Database.
   //
-  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
-                          &mHiiHandle);
+  Status = HiiDatabase->NewPackageList (
+                          HiiDatabase,
+                          PackageList,
+                          NULL,
+                          &mHiiHandle
+                          );
   if (!EFI_ERROR (Status)) {
     Handle = NULL;
-    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
-                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Handle,
+                    &gEdkiiPlatformLogoProtocolGuid,
+                    &mPlatformLogo,
+                    NULL
+                    );
   }
+
   return Status;
 }

edk2-rockchip/Platform/StationPC/StationM3/StationM3.dsc

@@ -43,10 +43,3 @@
   gRockchipTokenSpaceGuid.PcdFamilyName|"Station M"
   gRockchipTokenSpaceGuid.PcdProductUrl|"https://www.stationpc.com/product/stationm3"
   gRockchipTokenSpaceGuid.PcdDeviceTreeName|"roc-rk3588s-pc"
-
-  #
-  # CPU Performance default values
-  #
-  gRK3588TokenSpaceGuid.PcdCPULClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
-  gRK3588TokenSpaceGuid.PcdCPUB01ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)
-  gRK3588TokenSpaceGuid.PcdCPUB23ClusterClockPresetDefault|$(CPU_PERF_CLUSTER_CLOCK_PRESET_MAX)

edk2-rockchip/Silicon/Rockchip/Applications/I2cDemoTest/I2cDemoTest.c

@@ -26,16 +26,16 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Protocol/I2cDemo.h>
 #include <Protocol/I2c.h>
 
-CONST CHAR16 ShellI2cDemoFileName[] = L"I2cDemoTestShellCommand";
-EFI_HANDLE ShellI2cDemoHiiHandle = NULL;
+CONST CHAR16  ShellI2cDemoFileName[] = L"I2cDemoTestShellCommand";
+EFI_HANDLE    ShellI2cDemoHiiHandle  = NULL;
 
-STATIC CONST SHELL_PARAM_ITEM ParamList[] = {
-  {L"read", TypeFlag},
-  {L"write", TypeFlag},
-  {L"list", TypeFlag},
-  {L"help", TypeFlag},
-  {NULL , TypeMax}
-  };
+STATIC CONST SHELL_PARAM_ITEM  ParamList[] = {
+  { L"read",  TypeFlag },
+  { L"write", TypeFlag },
+  { L"list",  TypeFlag },
+  { L"help",  TypeFlag },
+  { NULL,     TypeMax  }
+};
 
 /**
   Return the file name of the help text file if not using HII.
@@ -43,7 +43,7 @@ STATIC CONST SHELL_PARAM_ITEM ParamList[] = {
   @return The string pointer to the file name.
 **/
 STATIC
-CONST CHAR16*
+CONST CHAR16 *
 EFIAPI
 ShellCommandGetManFileNameI2cDemo (
   VOID
@@ -58,44 +58,47 @@ Usage (
   VOID
   )
 {
-  Print (L"I2C DEMO TEST commands:\n"
-         "i2cdemo [read] [write] [list] [<Bus>][<Address>] [<Length>] [<RegAddress>] [<RegAddressLength>] [<Data>] \n"
-         "All modes except 'list' require Address, Length and Chip set.\n\n"
-         "read    - read from i2cdemo device\n"
-         "write   - write Data to i2cdemo device\\n"
-         "list    - list available i2cdemo devices\n\n"
-         "Bus    - I2C bus address\n"
-	 "Address    - i2cdemo bus address\n"
-         "Length	  - data byte length to read/write\\n"
-         "RegAddress - address in i2cdemo to read/write\n"
-         "RegAddressLength - address in i2cdemo length\n"
-         "Data    - data byte to be written\n"
-         "Examples:\n"
-         "List devices:\n"
-         " i2cdemo list\n"
-         "Read 2 bytes from address 0x10 in chip 0x51@bus2:\n"
-         " i2cdemo read 2 0x51 2 0x10 1\n"
-         "Fill 16 bytes with 0xab at address 0x0 in chip 0x57:\n"
-         " i2cdemo write 2 0x51 1 0x10 1 0x00\n"
-  );
+  Print (
+    L"I2C DEMO TEST commands:\n"
+    "i2cdemo [read] [write] [list] [<Bus>][<Address>] [<Length>] [<RegAddress>] [<RegAddressLength>] [<Data>] \n"
+    "All modes except 'list' require Address, Length and Chip set.\n\n"
+    "read    - read from i2cdemo device\n"
+    "write   - write Data to i2cdemo device\\n"
+    "list    - list available i2cdemo devices\n\n"
+    "Bus    - I2C bus address\n"
+    "Address    - i2cdemo bus address\n"
+    "Length\t  - data byte length to read/write\\n"
+    "RegAddress - address in i2cdemo to read/write\n"
+    "RegAddressLength - address in i2cdemo length\n"
+    "Data    - data byte to be written\n"
+    "Examples:\n"
+    "List devices:\n"
+    " i2cdemo list\n"
+    "Read 2 bytes from address 0x10 in chip 0x51@bus2:\n"
+    " i2cdemo read 2 0x51 2 0x10 1\n"
+    "Fill 16 bytes with 0xab at address 0x0 in chip 0x57:\n"
+    " i2cdemo write 2 0x51 1 0x10 1 0x00\n"
+    );
 }
 
 STATIC
 EFI_STATUS
 I2cDemoList (
-    )
+  )
 {
-  EFI_HANDLE *HandleBuffer;
-  EFI_STATUS Status;
-  UINTN ProtocolCount;
-  ROCKCHIP_I2CDEMO_PROTOCOL *I2cDemoProtocol;
-  UINTN i;
-  Status = gBS->LocateHandleBuffer ( ByProtocol,
-                                     &gRockchipI2cDemoProtocolGuid,
-                                     NULL,
-                                     &ProtocolCount,
-                                     &HandleBuffer
-                                   );
+  EFI_HANDLE                 *HandleBuffer;
+  EFI_STATUS                 Status;
+  UINTN                      ProtocolCount;
+  ROCKCHIP_I2CDEMO_PROTOCOL  *I2cDemoProtocol;
+  UINTN                      i;
+
+  Status = gBS->LocateHandleBuffer (
+                  ByProtocol,
+                  &gRockchipI2cDemoProtocolGuid,
+                  NULL,
+                  &ProtocolCount,
+                  &HandleBuffer
+                  );
   if (ProtocolCount == 0) {
     Print (L"0 devices found.\n");
   } else {
@@ -106,17 +109,24 @@ I2cDemoList (
     Status = gBS->OpenProtocol (
                     HandleBuffer[i],
                     &gRockchipI2cDemoProtocolGuid,
-                    (VOID **) &I2cDemoProtocol,
+                    (VOID **)&I2cDemoProtocol,
                     gImageHandle,
                     NULL,
-                    EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL );
-    Print (L"0x%x at bus %d\n", I2C_DEVICE_ADDRESS(I2cDemoProtocol->Identifier),
-        I2C_DEVICE_BUS(I2cDemoProtocol->Identifier));
-    Status = gBS->CloseProtocol ( HandleBuffer[i],
-                                  &gRockchipI2cDemoProtocolGuid,
-                                  gImageHandle,
-                                  NULL );
+                    EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL
+                    );
+    Print (
+      L"0x%x at bus %d\n",
+      I2C_DEVICE_ADDRESS (I2cDemoProtocol->Identifier),
+      I2C_DEVICE_BUS (I2cDemoProtocol->Identifier)
+      );
+    Status = gBS->CloseProtocol (
+                    HandleBuffer[i],
+                    &gRockchipI2cDemoProtocolGuid,
+                    gImageHandle,
+                    NULL
+                    );
   }
+
   Print (L"\n");
   return Status;
 }
@@ -124,44 +134,52 @@ I2cDemoList (
 STATIC
 EFI_STATUS
 I2cDemoLocateProtocol (
- IN  UINT32 Identifier,
- OUT EFI_HANDLE *FoundHandle,
- OUT ROCKCHIP_I2CDEMO_PROTOCOL **FoundI2cDemoProtocol
- )
+  IN  UINT32                     Identifier,
+  OUT EFI_HANDLE                 *FoundHandle,
+  OUT ROCKCHIP_I2CDEMO_PROTOCOL  **FoundI2cDemoProtocol
+  )
 {
-  EFI_HANDLE *HandleBuffer;
-  EFI_STATUS Status;
-  UINTN ProtocolCount;
-  ROCKCHIP_I2CDEMO_PROTOCOL *I2cDemoProtocol;
-  UINTN i;
-  Status = gBS->LocateHandleBuffer ( ByProtocol,
-                                     &gRockchipI2cDemoProtocolGuid,
-                                     NULL,
-                                     &ProtocolCount,
-                                     &HandleBuffer
-                                   );
-  if (EFI_ERROR(Status)) {
+  EFI_HANDLE                 *HandleBuffer;
+  EFI_STATUS                 Status;
+  UINTN                      ProtocolCount;
+  ROCKCHIP_I2CDEMO_PROTOCOL  *I2cDemoProtocol;
+  UINTN                      i;
+
+  Status = gBS->LocateHandleBuffer (
+                  ByProtocol,
+                  &gRockchipI2cDemoProtocolGuid,
+                  NULL,
+                  &ProtocolCount,
+                  &HandleBuffer
+                  );
+  if (EFI_ERROR (Status)) {
     return Status;
   }
+
   for (i = 0; i < ProtocolCount; i++) {
     Status = gBS->OpenProtocol (
                     HandleBuffer[i],
                     &gRockchipI2cDemoProtocolGuid,
-                    (VOID **) &I2cDemoProtocol,
+                    (VOID **)&I2cDemoProtocol,
                     gImageHandle,
                     NULL,
-                    EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL );
+                    EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL
+                    );
 
     if (I2cDemoProtocol->Identifier == Identifier) {
       *FoundI2cDemoProtocol = I2cDemoProtocol;
-      *FoundHandle = HandleBuffer[i];
+      *FoundHandle          = HandleBuffer[i];
       return EFI_SUCCESS;
     }
-    Status = gBS->CloseProtocol ( HandleBuffer[i],
-                                  &gRockchipI2cDemoProtocolGuid,
-                                  gImageHandle,
-                                  NULL );
+
+    Status = gBS->CloseProtocol (
+                    HandleBuffer[i],
+                    &gRockchipI2cDemoProtocolGuid,
+                    gImageHandle,
+                    NULL
+                    );
   }
+
   *FoundI2cDemoProtocol = NULL;
 
   return EFI_UNSUPPORTED;
@@ -174,34 +192,45 @@ ShellCommandRunI2cDemo (
   IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS              Status;
-  LIST_ENTRY              *CheckPackage;
-  CHAR16                  *ProblemParam;
-  CONST CHAR16            *ValueStr;
-  UINTN                   Bus, Address, XferLength, RegAddress, RegAddressLength, Source;
-  UINT8                   *Buffer;
-  BOOLEAN                 ReadMode, WriteMode;
-  EFI_HANDLE              Handle, ProtHandle;
-  ROCKCHIP_I2CDEMO_PROTOCOL *I2cDemoProtocol = NULL;
-  UINTN                   HandleSize, i;
-  UINTN                   TxData;
+  EFI_STATUS                 Status;
+  LIST_ENTRY                 *CheckPackage;
+  CHAR16                     *ProblemParam;
+  CONST CHAR16               *ValueStr;
+  UINTN                      Bus, Address, XferLength, RegAddress, RegAddressLength, Source;
+  UINT8                      *Buffer;
+  BOOLEAN                    ReadMode, WriteMode;
+  EFI_HANDLE                 Handle, ProtHandle;
+  ROCKCHIP_I2CDEMO_PROTOCOL  *I2cDemoProtocol = NULL;
+  UINTN                      HandleSize, i;
+  UINTN                      TxData;
 
-  Handle = NULL;
-  Source = 0;
+  Handle     = NULL;
+  Source     = 0;
   HandleSize = 2 * sizeof (EFI_HANDLE);
 
-  Status = gBS->LocateHandle (ByProtocol, &gRockchipI2cDemoProtocolGuid, NULL,
-    &HandleSize, &ProtHandle);
-  if (EFI_ERROR(Status)) {
+  Status = gBS->LocateHandle (
+                  ByProtocol,
+                  &gRockchipI2cDemoProtocolGuid,
+                  NULL,
+                  &HandleSize,
+                  &ProtHandle
+                  );
+  if (EFI_ERROR (Status)) {
     Print (L"No I2cDemo protocol, connect I2C stack\n");
-    Status = gBS->LocateHandle (ByProtocol, &gEfiI2cMasterProtocolGuid, NULL,
-      &HandleSize, &ProtHandle);
-    if (EFI_ERROR(Status)) {
+    Status = gBS->LocateHandle (
+                    ByProtocol,
+                    &gEfiI2cMasterProtocolGuid,
+                    NULL,
+                    &HandleSize,
+                    &ProtHandle
+                    );
+    if (EFI_ERROR (Status)) {
       Print (L"Failed to locate I2cMaster protocol, abort!\n");
       return SHELL_ABORTED;
     }
+
     Status = gBS->ConnectController (ProtHandle, NULL, NULL, TRUE);
-    if (EFI_ERROR(Status)) {
+    if (EFI_ERROR (Status)) {
       Print (L"Cannot connect I2C stack, abort!\n");
       return SHELL_ABORTED;
     }
@@ -220,83 +249,84 @@ ShellCommandRunI2cDemo (
   }
 
   if (ShellCommandLineGetFlag (CheckPackage, L"list")) {
-    I2cDemoList();
+    I2cDemoList ();
     return SHELL_SUCCESS;
   }
 
   if (ShellCommandLineGetFlag (CheckPackage, L"help")) {
-    Usage();
+    Usage ();
     return SHELL_SUCCESS;
   }
 
-  ReadMode = ShellCommandLineGetFlag (CheckPackage, L"read");
+  ReadMode  = ShellCommandLineGetFlag (CheckPackage, L"read");
   WriteMode = ShellCommandLineGetFlag (CheckPackage, L"write");
 
   if (!ReadMode && !WriteMode) {
     Print (L"Not support mode given.\n");
-    Usage();
+    Usage ();
     return SHELL_ABORTED;
   }
 
-  if (ShellCommandLineGetCount(CheckPackage) != 6 && ReadMode) {
+  if ((ShellCommandLineGetCount (CheckPackage) != 6) && ReadMode) {
     Print (L"Not enough arguments given.\n");
-    Usage();
+    Usage ();
     return SHELL_ABORTED;
   }
 
-  if (ShellCommandLineGetCount(CheckPackage) != 7 && WriteMode) {
+  if ((ShellCommandLineGetCount (CheckPackage) != 7) && WriteMode) {
     Print (L"Not enough arguments given.\n");
-    Usage();
+    Usage ();
     return SHELL_ABORTED;
   }
 
-  ValueStr = ShellCommandLineGetRawValue(CheckPackage, 1);
-  Bus = ShellHexStrToUintn (ValueStr);
+  ValueStr = ShellCommandLineGetRawValue (CheckPackage, 1);
+  Bus      = ShellHexStrToUintn (ValueStr);
 
-  ValueStr = ShellCommandLineGetRawValue(CheckPackage, 2);
-  Address = ShellHexStrToUintn (ValueStr);
+  ValueStr = ShellCommandLineGetRawValue (CheckPackage, 2);
+  Address  = ShellHexStrToUintn (ValueStr);
 
-  ValueStr = ShellCommandLineGetRawValue(CheckPackage, 3);
+  ValueStr   = ShellCommandLineGetRawValue (CheckPackage, 3);
   XferLength = ShellHexStrToUintn (ValueStr);
 
-  ValueStr = ShellCommandLineGetRawValue(CheckPackage, 4);
+  ValueStr   = ShellCommandLineGetRawValue (CheckPackage, 4);
   RegAddress = ShellHexStrToUintn (ValueStr);
 
-  ValueStr = ShellCommandLineGetRawValue(CheckPackage, 5);
+  ValueStr         = ShellCommandLineGetRawValue (CheckPackage, 5);
   RegAddressLength = ShellHexStrToUintn (ValueStr);
 
   if (WriteMode) {
-    ValueStr = ShellCommandLineGetRawValue(CheckPackage, 6);
-    TxData = ShellHexStrToUintn (ValueStr);
+    ValueStr = ShellCommandLineGetRawValue (CheckPackage, 6);
+    TxData   = ShellHexStrToUintn (ValueStr);
   }
 
-  I2cDemoLocateProtocol (I2C_DEVICE_INDEX(Bus, Address), &Handle, &I2cDemoProtocol);
+  I2cDemoLocateProtocol (I2C_DEVICE_INDEX (Bus, Address), &Handle, &I2cDemoProtocol);
   if (I2cDemoProtocol == NULL) {
     Print (L"Failed to locate I2CDEMO protocol.\n");
     return SHELL_INVALID_PARAMETER;
   }
 
-    Buffer = AllocateZeroPool (XferLength);
-    if (Buffer == NULL) {
-      Status = SHELL_OUT_OF_RESOURCES;
-      Print (L"Error - out of resources.\n");
-      goto out_close;
-    }
+  Buffer = AllocateZeroPool (XferLength);
+  if (Buffer == NULL) {
+    Status = SHELL_OUT_OF_RESOURCES;
+    Print (L"Error - out of resources.\n");
+    goto out_close;
+  }
 
   if (ReadMode) {
-    Status = I2cDemoProtocol->Read(I2cDemoProtocol, (UINT8 *)&RegAddress, RegAddressLength,  Buffer, XferLength);
-    if (!EFI_ERROR(Status)) {
+    Status = I2cDemoProtocol->Read (I2cDemoProtocol, (UINT8 *)&RegAddress, RegAddressLength, Buffer, XferLength);
+    if (!EFI_ERROR (Status)) {
       Print (L"Read data[0 ~ %d]:", XferLength - 1);
-      for (i = 0; i <XferLength; i++ ) {
+      for (i = 0; i < XferLength; i++ ) {
         Print (L" 0x%x", Buffer[i]);
       }
+
       Print (L"\n");
     }
   } else {
-    Status = I2cDemoProtocol->Write(I2cDemoProtocol, (UINT8 *)&RegAddress, RegAddressLength,  (UINT8 *)&TxData, XferLength);
+    Status = I2cDemoProtocol->Write (I2cDemoProtocol, (UINT8 *)&RegAddress, RegAddressLength, (UINT8 *)&TxData, XferLength);
   }
 
-  if (EFI_ERROR(Status)) {
+  if (EFI_ERROR (Status)) {
     Print (L"I2c Operation failed %d.\n", Status);
   } else {
     Print (L"I2c Operation successfully.\n");
@@ -304,12 +334,14 @@ ShellCommandRunI2cDemo (
 
   Status = SHELL_SUCCESS;
 
-    FreePool(Buffer);
+  FreePool (Buffer);
 out_close:
-  gBS->CloseProtocol ( Handle,
-                       &gRockchipI2cDemoProtocolGuid,
-                       gImageHandle,
-                       NULL );
+  gBS->CloseProtocol (
+         Handle,
+         &gRockchipI2cDemoProtocolGuid,
+         gImageHandle,
+         NULL
+         );
 
   return Status;
 }
@@ -321,22 +353,30 @@ ShellI2cDemoTestLibConstructor (
   IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-
   Print (L"~Filed to add Hii package\n");
   ShellI2cDemoHiiHandle = NULL;
 
   ShellI2cDemoHiiHandle = HiiAddPackages (
-                          &gShellI2cDemoHiiGuid, gImageHandle,
-                          UefiShellI2cDemoLibStrings, NULL
-                          );
+                            &gShellI2cDemoHiiGuid,
+                            gImageHandle,
+                            UefiShellI2cDemoLibStrings,
+                            NULL
+                            );
   if (ShellI2cDemoHiiHandle == NULL) {
     Print (L"Filed to add Hii package\n");
     return EFI_DEVICE_ERROR;
   }
+
   ShellCommandRegisterCommandName (
-     L"i2cdemo", ShellCommandRunI2cDemo, ShellCommandGetManFileNameI2cDemo, 0,
-     L"i2cdemo", TRUE , ShellI2cDemoHiiHandle, STRING_TOKEN (STR_GET_HELP_I2CDEMO)
-     );
+    L"i2cdemo",
+    ShellCommandRunI2cDemo,
+    ShellCommandGetManFileNameI2cDemo,
+    0,
+    L"i2cdemo",
+    TRUE,
+    ShellI2cDemoHiiHandle,
+    STRING_TOKEN (STR_GET_HELP_I2CDEMO)
+    );
 
   return EFI_SUCCESS;
 }
@@ -348,9 +388,9 @@ ShellI2cDemoTestLibDestructor (
   IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-
   if (ShellI2cDemoHiiHandle != NULL) {
     HiiRemovePackages (ShellI2cDemoHiiHandle);
   }
+
   return EFI_SUCCESS;
 }

edk2-rockchip/Silicon/Rockchip/Applications/SpiTool/SpiFlashCmd.c

@@ -23,22 +23,22 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Protocol/FirmwareVolumeBlock.h>
 #include <Protocol/NorFlashProtocol.h>
 
-UNI_NOR_FLASH_PROTOCOL *SpiFlashProtocol;
+UNI_NOR_FLASH_PROTOCOL  *SpiFlashProtocol;
 
-CONST CHAR16 gShellSpiFlashFileName[] = L"ShellCommand";
-EFI_HANDLE gShellSfHiiHandle = NULL;
+CONST CHAR16  gShellSpiFlashFileName[] = L"ShellCommand";
+EFI_HANDLE    gShellSfHiiHandle        = NULL;
 
-STATIC CONST SHELL_PARAM_ITEM ParamList[] = {
-  {L"read", TypeFlag},
-  {L"readfile", TypeFlag},
-  {L"write", TypeFlag},
-  {L"writefile", TypeFlag},
-  {L"erase", TypeFlag},
-  {L"update", TypeFlag},
-  {L"updatefile", TypeFlag},
-  {L"help", TypeFlag},
-  {NULL , TypeMax}
-  };
+STATIC CONST SHELL_PARAM_ITEM  ParamList[] = {
+  { L"read",       TypeFlag },
+  { L"readfile",   TypeFlag },
+  { L"write",      TypeFlag },
+  { L"writefile",  TypeFlag },
+  { L"erase",      TypeFlag },
+  { L"update",     TypeFlag },
+  { L"updatefile", TypeFlag },
+  { L"help",       TypeFlag },
+  { NULL,          TypeMax  }
+};
 
 typedef enum {
   READ        = 2,
@@ -55,13 +55,12 @@ typedef enum {
 
   @return The string pointer to the file name.
 **/
-CONST CHAR16*
+CONST CHAR16 *
 EFIAPI
 ShellCommandGetManFileNameSpiFlash (
   VOID
   )
 {
-
   return gShellSpiFlashFileName;
 }
 
@@ -70,42 +69,43 @@ SfUsage (
   VOID
   )
 {
-  Print (L"\nBasic SPI command\n"
-         "sf [read | readfile | write | writefile | erase |"
-         "update | updatefile]"
-         "[<Address> | <FilePath>] <Offset> <Length>\n\n"
-         "Address  - Address in RAM to store/load data\n"
-         "FilePath - Path to file to read/write data from/to\n"
-         "Offset   - Offset from beginning of SPI flash to store/load data\n"
-         "Length   - Number of bytes to send\n"
-         "Examples:\n"
-         "Check if there is response from SPI flash\n"
-         "Read 32 bytes from 0xe00000 of SPI flash into RAM at address 0x100000\n"
-         "  sf read 0x100000 0xe00000 32\n"
-         "Read 0x20 bytes from 0x200000 of SPI flash into RAM at address 0x300000\n"
-         "  sf read 0x300000 0x200000 0x20\n"
-         "Erase 0x10000 bytes from offset 0x100000 of SPI flash\n"
-         "  sf erase 0x100000 0x100000\n"
-         "Write 16 bytes from 0x200000 at RAM into SPI flash at address 0x4000000\n"
-         "  sf write 0x200000 0x4000000 16\n"
-         "Update 100 bytes from 0x100000 at RAM in SPI flash at address 0xe00000\n"
-         "  sf update 0x100000 0xe00000 100\n"
-         "Read 0x3000 bytes from 0x0 of SPI flash into file fs2:file.bin\n"
-         "  sf readfile fs2:file.bin 0x0 0x3000 \n"
-         "Update data in SPI flash at 0x3000000 from file Linux.efi\n"
-         "  sf updatefile Linux.efi 0x3000000\n"
-  );
+  Print (
+    L"\nBasic SPI command\n"
+    "sf [read | readfile | write | writefile | erase |"
+    "update | updatefile]"
+    "[<Address> | <FilePath>] <Offset> <Length>\n\n"
+    "Address  - Address in RAM to store/load data\n"
+    "FilePath - Path to file to read/write data from/to\n"
+    "Offset   - Offset from beginning of SPI flash to store/load data\n"
+    "Length   - Number of bytes to send\n"
+    "Examples:\n"
+    "Check if there is response from SPI flash\n"
+    "Read 32 bytes from 0xe00000 of SPI flash into RAM at address 0x100000\n"
+    "  sf read 0x100000 0xe00000 32\n"
+    "Read 0x20 bytes from 0x200000 of SPI flash into RAM at address 0x300000\n"
+    "  sf read 0x300000 0x200000 0x20\n"
+    "Erase 0x10000 bytes from offset 0x100000 of SPI flash\n"
+    "  sf erase 0x100000 0x100000\n"
+    "Write 16 bytes from 0x200000 at RAM into SPI flash at address 0x4000000\n"
+    "  sf write 0x200000 0x4000000 16\n"
+    "Update 100 bytes from 0x100000 at RAM in SPI flash at address 0xe00000\n"
+    "  sf update 0x100000 0xe00000 100\n"
+    "Read 0x3000 bytes from 0x0 of SPI flash into file fs2:file.bin\n"
+    "  sf readfile fs2:file.bin 0x0 0x3000 \n"
+    "Update data in SPI flash at 0x3000000 from file Linux.efi\n"
+    "  sf updatefile Linux.efi 0x3000000\n"
+    );
 }
 
 STATIC
 EFI_STATUS
 OpenAndPrepareFile (
-  IN CHAR16 *FilePath,
-  SHELL_FILE_HANDLE *FileHandle
+  IN CHAR16          *FilePath,
+  SHELL_FILE_HANDLE  *FileHandle
   )
 {
-  EFI_STATUS Status;
-  UINT64 OpenMode;
+  EFI_STATUS  Status;
+  UINT64      OpenMode;
 
   OpenMode = EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE;
 
@@ -115,9 +115,9 @@ OpenAndPrepareFile (
     return Status;
   }
 
-  Status = FileHandleSetPosition(*FileHandle, 0);
+  Status = FileHandleSetPosition (*FileHandle, 0);
 
-  if (EFI_ERROR(Status)) {
+  if (EFI_ERROR (Status)) {
     Print (L"sf: Cannot set file position to first byte\n");
     ShellCloseFile (FileHandle);
     return Status;
@@ -133,7 +133,7 @@ ShellCommandRunSpiFlash (
   IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-EFI_STATUS              Status;
+  EFI_STATUS            Status;
   LIST_ENTRY            *CheckPackage;
   EFI_PHYSICAL_ADDRESS  Address = 0, Offset = 0;
   SHELL_FILE_HANDLE     FileHandle = NULL;
@@ -147,11 +147,11 @@ EFI_STATUS              Status;
   UINT8                 Flag = 0, CheckFlag = 0;
 
   Status = gBS->LocateProtocol (
-    &gUniNorFlashProtocolGuid,
-    NULL,
-    (VOID **)&SpiFlashProtocol
-  );
-  if (EFI_ERROR(Status)) {
+                  &gUniNorFlashProtocolGuid,
+                  NULL,
+                  (VOID **)&SpiFlashProtocol
+                  );
+  if (EFI_ERROR (Status)) {
     Print (L"sf: Cannot locate SpiFlash protocol\n");
     return SHELL_ABORTED;
   }
@@ -171,7 +171,7 @@ EFI_STATUS              Status;
   }
 
   if (ShellCommandLineGetFlag (CheckPackage, L"help")) {
-    SfUsage();
+    SfUsage ();
     return EFI_SUCCESS;
   }
 
@@ -189,37 +189,37 @@ EFI_STATUS              Status;
     I += CheckFlag & 1;
     if (I > 1) {
       Print (L"sf: Too many flags\n");
-      SfUsage();
+      SfUsage ();
       return SHELL_ABORTED;
     }
   }
 
   switch (Flag) {
-  case READ:
-  case WRITE:
-  case UPDATE:
-    AddressStr = ShellCommandLineGetRawValue (CheckPackage, 1);
-    OffsetStr = ShellCommandLineGetRawValue (CheckPackage, 2);
-    LengthStr = ShellCommandLineGetRawValue (CheckPackage, 3);
-    AddrFlag = TRUE;
-    break;
-  case ERASE:
-    OffsetStr = ShellCommandLineGetRawValue (CheckPackage, 1);
-    LengthStr = ShellCommandLineGetRawValue (CheckPackage, 2);
-    break;
-  case READ_FILE:
-    FileStr = ShellCommandLineGetRawValue (CheckPackage, 1);
-    OffsetStr = ShellCommandLineGetRawValue (CheckPackage, 2);
-    LengthStr = ShellCommandLineGetRawValue (CheckPackage, 3);
-    FileFlag = TRUE;
-    break;
-  case WRITE_FILE:
-  case UPDATE_FILE:
-    FileStr = ShellCommandLineGetRawValue (CheckPackage, 1);
-    OffsetStr = ShellCommandLineGetRawValue (CheckPackage, 2);
-    LengthFlag = FALSE;
-    FileFlag = TRUE;
-    break;
+    case READ:
+    case WRITE:
+    case UPDATE:
+      AddressStr = ShellCommandLineGetRawValue (CheckPackage, 1);
+      OffsetStr  = ShellCommandLineGetRawValue (CheckPackage, 2);
+      LengthStr  = ShellCommandLineGetRawValue (CheckPackage, 3);
+      AddrFlag   = TRUE;
+      break;
+    case ERASE:
+      OffsetStr = ShellCommandLineGetRawValue (CheckPackage, 1);
+      LengthStr = ShellCommandLineGetRawValue (CheckPackage, 2);
+      break;
+    case READ_FILE:
+      FileStr   = ShellCommandLineGetRawValue (CheckPackage, 1);
+      OffsetStr = ShellCommandLineGetRawValue (CheckPackage, 2);
+      LengthStr = ShellCommandLineGetRawValue (CheckPackage, 3);
+      FileFlag  = TRUE;
+      break;
+    case WRITE_FILE:
+    case UPDATE_FILE:
+      FileStr    = ShellCommandLineGetRawValue (CheckPackage, 1);
+      OffsetStr  = ShellCommandLineGetRawValue (CheckPackage, 2);
+      LengthFlag = FALSE;
+      FileFlag   = TRUE;
+      break;
   }
 
   // Read address parameter
@@ -264,8 +264,8 @@ EFI_STATUS              Status;
       Print (L"sf: No FilePath parameter!\n");
       return SHELL_ABORTED;
     } else {
-      FilePath = (CHAR16 *) FileStr;
-      Status = ShellIsFile (FilePath);
+      FilePath = (CHAR16 *)FileStr;
+      Status   = ShellIsFile (FilePath);
       // When read file into flash, file doesn't have to exist
       if (EFI_ERROR (Status) && !(Flag & READ_FILE)) {
         Print (L"sf: Wrong FilePath parameter!\n");
@@ -274,7 +274,7 @@ EFI_STATUS              Status;
     }
 
     Status = OpenAndPrepareFile (FilePath, &FileHandle);
-    if (EFI_ERROR(Status)) {
+    if (EFI_ERROR (Status)) {
       Print (L"sf: Error while preparing file\n");
       return SHELL_ABORTED;
     }
@@ -285,10 +285,11 @@ EFI_STATUS              Status;
       if (EFI_ERROR (Status)) {
         Print (L"sf: Cannot get file size\n");
       }
-      ByteCount = (UINTN) FileSize;
+
+      ByteCount = (UINTN)FileSize;
     }
 
-    FileBuffer = AllocateZeroPool ((UINTN) ByteCount);
+    FileBuffer = AllocateZeroPool ((UINTN)ByteCount);
     if (FileBuffer == NULL) {
       Print (L"sf: Cannot allocate memory\n");
       goto Error_Close_File;
@@ -300,7 +301,7 @@ EFI_STATUS              Status;
       if (EFI_ERROR (Status)) {
         Print (L"sf: Read from file error\n");
         goto Error_Free_Buffer;
-      } else if (ByteCount != (UINTN) FileSize) {
+      } else if (ByteCount != (UINTN)FileSize) {
         Print (L"sf: Not whole file read. Abort\n");
         goto Error_Free_Buffer;
       }
@@ -313,21 +314,21 @@ EFI_STATUS              Status;
   }
 
   switch (Flag) {
-  case READ:
-  case READ_FILE:
-    Status = SpiFlashProtocol->Read (SpiFlashProtocol, Offset, Buffer, ByteCount);
-    break;
-  case ERASE:
-    Status = SpiFlashProtocol->Erase (SpiFlashProtocol, Offset, ByteCount);
-    break;
-  case WRITE:
-  case WRITE_FILE:
-    Status = SpiFlashProtocol->Write (SpiFlashProtocol, Offset, Buffer, ByteCount);
-    break;
-  case UPDATE:
-  case UPDATE_FILE:
-    Status = SpiFlashProtocol->Update (SpiFlashProtocol, Offset, Buffer, ByteCount);
-    break;
+    case READ:
+    case READ_FILE:
+      Status = SpiFlashProtocol->Read (SpiFlashProtocol, Offset, Buffer, ByteCount);
+      break;
+    case ERASE:
+      Status = SpiFlashProtocol->Erase (SpiFlashProtocol, Offset, ByteCount);
+      break;
+    case WRITE:
+    case WRITE_FILE:
+      Status = SpiFlashProtocol->Write (SpiFlashProtocol, Offset, Buffer, ByteCount);
+      break;
+    case UPDATE:
+    case UPDATE_FILE:
+      Status = SpiFlashProtocol->Update (SpiFlashProtocol, Offset, Buffer, ByteCount);
+      break;
   }
 
   if (EFI_ERROR (Status)) {
@@ -336,28 +337,32 @@ EFI_STATUS              Status;
   }
 
   switch (Flag) {
-  case ERASE:
-    Print (L"sf: %d bytes succesfully erased at offset 0x%x\n", ByteCount,
-      Offset);
-    break;
-  case WRITE:
-  case WRITE_FILE:
-    Print (L"sf: Write %d bytes at offset 0x%x\n", ByteCount, Offset);
-    break;
-  case UPDATE:
-  case UPDATE_FILE:
-    Print (L"sf: Update %d bytes at offset 0x%x\n", ByteCount, Offset);
-    break;
-  case READ:
-    Print (L"sf: Read %d bytes from offset 0x%x\n", ByteCount, Offset);
-    break;
-  case READ_FILE:
-    Status = FileHandleWrite (FileHandle, &ByteCount, FileBuffer);
-    if (EFI_ERROR(Status)) {
-      Print (L"sf: Error while writing into file\n");
-      goto Error_Free_Buffer;
-    }
-    break;
+    case ERASE:
+      Print (
+        L"sf: %d bytes succesfully erased at offset 0x%x\n",
+        ByteCount,
+        Offset
+        );
+      break;
+    case WRITE:
+    case WRITE_FILE:
+      Print (L"sf: Write %d bytes at offset 0x%x\n", ByteCount, Offset);
+      break;
+    case UPDATE:
+    case UPDATE_FILE:
+      Print (L"sf: Update %d bytes at offset 0x%x\n", ByteCount, Offset);
+      break;
+    case READ:
+      Print (L"sf: Read %d bytes from offset 0x%x\n", ByteCount, Offset);
+      break;
+    case READ_FILE:
+      Status = FileHandleWrite (FileHandle, &ByteCount, FileBuffer);
+      if (EFI_ERROR (Status)) {
+        Print (L"sf: Error while writing into file\n");
+        goto Error_Free_Buffer;
+      }
+
+      break;
   }
 
   if (FileFlag) {
@@ -387,17 +392,25 @@ ShellSpiFlashLibConstructor (
   gShellSfHiiHandle = NULL;
 
   gShellSfHiiHandle = HiiAddPackages (
-                        &gShellSfHiiGuid, gImageHandle,
-                        UefiShellSpiFlashLibStrings, NULL
+                        &gShellSfHiiGuid,
+                        gImageHandle,
+                        UefiShellSpiFlashLibStrings,
+                        NULL
                         );
   if (gShellSfHiiHandle == NULL) {
     return EFI_DEVICE_ERROR;
   }
 
   ShellCommandRegisterCommandName (
-     L"sf", ShellCommandRunSpiFlash, ShellCommandGetManFileNameSpiFlash, 0,
-     L"sf", TRUE , gShellSfHiiHandle, STRING_TOKEN (STR_GET_HELP_SF)
-     );
+    L"sf",
+    ShellCommandRunSpiFlash,
+    ShellCommandGetManFileNameSpiFlash,
+    0,
+    L"sf",
+    TRUE,
+    gShellSfHiiHandle,
+    STRING_TOKEN (STR_GET_HELP_SF)
+    );
 
   return EFI_SUCCESS;
 }
@@ -409,9 +422,9 @@ ShellSpiFlashLibDestructor (
   IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-
   if (gShellSfHiiHandle != NULL) {
     HiiRemovePackages (gShellSfHiiHandle);
   }
+
   return EFI_SUCCESS;
 }

edk2-rockchip/Silicon/Rockchip/Drivers/DwcSdhciDxe/DwcSdhciDxe.c

@@ -21,10 +21,10 @@
 
 #include "DwcSdhciDxe.h"
 
-#define EMMC_FORCE_HIGH_SPEED   FixedPcdGetBool(PcdDwcSdhciForceHighSpeed)
-#define EMMC_DISABLE_HS400      FixedPcdGetBool(PcdDwcSdhciDisableHs400)
+#define EMMC_FORCE_HIGH_SPEED  FixedPcdGetBool(PcdDwcSdhciForceHighSpeed)
+#define EMMC_DISABLE_HS400     FixedPcdGetBool(PcdDwcSdhciDisableHs400)
 
-STATIC EFI_HANDLE mSdMmcControllerHandle;
+STATIC EFI_HANDLE  mSdMmcControllerHandle;
 
 /**
   Override function for SDHCI capability bits
@@ -44,17 +44,18 @@ STATIC
 EFI_STATUS
 EFIAPI
 EmmcSdMmcCapability (
-  IN      EFI_HANDLE                      ControllerHandle,
-  IN      UINT8                           Slot,
-  IN OUT  VOID                            *SdMmcHcSlotCapability,
-  IN OUT  UINT32                          *BaseClkFreq
+  IN      EFI_HANDLE  ControllerHandle,
+  IN      UINT8       Slot,
+  IN OUT  VOID        *SdMmcHcSlotCapability,
+  IN OUT  UINT32      *BaseClkFreq
   )
 {
-  SD_MMC_HC_SLOT_CAP *Capability = SdMmcHcSlotCapability;
+  SD_MMC_HC_SLOT_CAP  *Capability = SdMmcHcSlotCapability;
 
   if (SdMmcHcSlotCapability == NULL) {
     return EFI_INVALID_PARAMETER;
   }
+
   if (ControllerHandle != mSdMmcControllerHandle) {
     return EFI_NOT_FOUND;
   }
@@ -72,10 +73,10 @@ EmmcSdMmcCapability (
 
   if (EMMC_FORCE_HIGH_SPEED) {
     Capability->BaseClkFreq = 52;
-    Capability->Sdr50 = 0;
-    Capability->Ddr50 = 0;
-    Capability->Sdr104 = 0;
-    Capability->Hs400 = 0;
+    Capability->Sdr50       = 0;
+    Capability->Ddr50       = 0;
+    Capability->Sdr104      = 0;
+    Capability->Hs400       = 0;
   }
 
   return EFI_SUCCESS;
@@ -101,16 +102,16 @@ STATIC
 EFI_STATUS
 EFIAPI
 EmmcSdMmcNotifyPhase (
-  IN      EFI_HANDLE                      ControllerHandle,
-  IN      UINT8                           Slot,
-  IN      EDKII_SD_MMC_PHASE_TYPE         PhaseType,
-  IN OUT  VOID                            *PhaseData
+  IN      EFI_HANDLE               ControllerHandle,
+  IN      UINT8                    Slot,
+  IN      EDKII_SD_MMC_PHASE_TYPE  PhaseType,
+  IN OUT  VOID                     *PhaseData
   )
 {
-  SD_MMC_BUS_MODE                 *Timing;
-  UINTN                            MaxClockFreq;
-  UINT32                           Value, i;
-  UINT32                           TxClkTapNum;
+  SD_MMC_BUS_MODE  *Timing;
+  UINTN            MaxClockFreq;
+  UINT32           Value, i;
+  UINT32           TxClkTapNum;
 
   DEBUG ((DEBUG_INFO, "%a\n", __FUNCTION__));
 
@@ -121,110 +122,129 @@ EmmcSdMmcNotifyPhase (
   ASSERT (Slot == 0);
 
   switch (PhaseType) {
-  case EdkiiSdMmcInitHostPost:
-    /*
-     * Just before this Notification POWER_CTRL is toggled to power off
-     * and on the card.  On this controller implementation, toggling
-     * power off also removes SDCLK_ENABLE (BIT2) from from CLOCK_CTRL.
-     * Since the clock has already been set up prior to the power toggle,
-     * re-add the SDCLK_ENABLE bit to start the clock.
-     */
-    MmioOr16((UINT32) SD_MMC_HC_CLOCK_CTRL, CLOCK_CTRL_SDCLK_ENABLE);
-    break;
-
-  case EdkiiSdMmcUhsSignaling:
-    if (PhaseData == NULL) {
-      return EFI_INVALID_PARAMETER;
-    }
-
-    Timing = (SD_MMC_BUS_MODE *)PhaseData;
-    if (*Timing == SdMmcMmcHs400) {
-      /* HS400 uses a non-standard setting */
-      MmioOr16((UINT32) SD_MMC_HC_HOST_CTRL2, HOST_CTRL2_HS400);
-    }
-    break;
-
-  case EdkiiSdMmcSwitchClockFreqPost:
-    if (PhaseData == NULL) {
-      return EFI_INVALID_PARAMETER;
-    }
-
-    Timing = (SD_MMC_BUS_MODE *)PhaseData;
-    switch (*Timing) {
-    case SdMmcMmcHs400:
-    case SdMmcMmcHs200:
-      MaxClockFreq = 200000000UL;
+    case EdkiiSdMmcInitHostPost:
+      /*
+       * Just before this Notification POWER_CTRL is toggled to power off
+       * and on the card.  On this controller implementation, toggling
+       * power off also removes SDCLK_ENABLE (BIT2) from from CLOCK_CTRL.
+       * Since the clock has already been set up prior to the power toggle,
+       * re-add the SDCLK_ENABLE bit to start the clock.
+       */
+      MmioOr16 ((UINT32)SD_MMC_HC_CLOCK_CTRL, CLOCK_CTRL_SDCLK_ENABLE);
       break;
-    case SdMmcMmcHsSdr:
-    case SdMmcMmcHsDdr:
-      MaxClockFreq = 52000000UL;
+
+    case EdkiiSdMmcUhsSignaling:
+      if (PhaseData == NULL) {
+        return EFI_INVALID_PARAMETER;
+      }
+
+      Timing = (SD_MMC_BUS_MODE *)PhaseData;
+      if (*Timing == SdMmcMmcHs400) {
+        /* HS400 uses a non-standard setting */
+        MmioOr16 ((UINT32)SD_MMC_HC_HOST_CTRL2, HOST_CTRL2_HS400);
+      }
+
       break;
-    default:
-      MaxClockFreq = 26000000UL;
-      break;
-    }
 
-    DwcSdhciSetClockRate (MaxClockFreq);
+    case EdkiiSdMmcSwitchClockFreqPost:
+      if (PhaseData == NULL) {
+        return EFI_INVALID_PARAMETER;
+      }
 
-    if (MaxClockFreq <= 52000000UL) {
-      MmioWrite32 (EMMC_DLL_CTRL, 0);
-      MmioWrite32 (EMMC_DLL_RXCLK, 0);
-      MmioWrite32 (EMMC_DLL_TXCLK, 0);
-      MmioWrite32 (EMMC_DLL_CMDOUT, 0);
-      MmioWrite32 (EMMC_DLL_STRBIN, EMMC_DLL_DLYENA |
-                   EMMC_DLL_STRBIN_DELAY_NUM_SEL |
-                   EMMC_DLL_STRBIN_DELAY_NUM_DEFAULT << EMMC_DLL_STRBIN_DELAY_NUM_OFFSET);
-      break;
-    }
+      Timing = (SD_MMC_BUS_MODE *)PhaseData;
+      switch (*Timing) {
+        case SdMmcMmcHs400:
+        case SdMmcMmcHs200:
+          MaxClockFreq = 200000000UL;
+          break;
+        case SdMmcMmcHsSdr:
+        case SdMmcMmcHsDdr:
+          MaxClockFreq = 52000000UL;
+          break;
+        default:
+          MaxClockFreq = 26000000UL;
+          break;
+      }
 
-    /* Switch to eMMC mode */
-    MmioOr32 (EMMC_EMMC_CTRL, EMMC_CTRL_CARD_IS_EMMC);
+      DwcSdhciSetClockRate (MaxClockFreq);
 
-    MmioWrite32(EMMC_DLL_CTRL, EMMC_DLL_CTRL_SRST);
-    gBS->Stall (1);
-    MmioWrite32(EMMC_DLL_CTRL, 0);
-
-    MmioWrite32(EMMC_DLL_CTRL, EMMC_DLL_CTRL_START_POINT_DEFAULT |
-      EMMC_DLL_CTRL_INCREMENT_DEFAULT | EMMC_DLL_CTRL_START);
-
-    for (i = 0; i < 500; i++) {
-      Value = MmioRead32(EMMC_DLL_STATUS0);
-      if (Value & EMMC_DLL_STATUS0_DLL_LOCK &&
-          !(Value & EMMC_DLL_STATUS0_DLL_TIMEOUT)) {
+      if (MaxClockFreq <= 52000000UL) {
+        MmioWrite32 (EMMC_DLL_CTRL, 0);
+        MmioWrite32 (EMMC_DLL_RXCLK, 0);
+        MmioWrite32 (EMMC_DLL_TXCLK, 0);
+        MmioWrite32 (EMMC_DLL_CMDOUT, 0);
+        MmioWrite32 (
+          EMMC_DLL_STRBIN,
+          EMMC_DLL_DLYENA |
+          EMMC_DLL_STRBIN_DELAY_NUM_SEL |
+          EMMC_DLL_STRBIN_DELAY_NUM_DEFAULT << EMMC_DLL_STRBIN_DELAY_NUM_OFFSET
+          );
         break;
       }
+
+      /* Switch to eMMC mode */
+      MmioOr32 (EMMC_EMMC_CTRL, EMMC_CTRL_CARD_IS_EMMC);
+
+      MmioWrite32 (EMMC_DLL_CTRL, EMMC_DLL_CTRL_SRST);
       gBS->Stall (1);
-    }
+      MmioWrite32 (EMMC_DLL_CTRL, 0);
 
-    TxClkTapNum = EMMC_DLL_TXCLK_TAPNUM_DEFAULT;
+      MmioWrite32 (
+        EMMC_DLL_CTRL,
+        EMMC_DLL_CTRL_START_POINT_DEFAULT |
+        EMMC_DLL_CTRL_INCREMENT_DEFAULT | EMMC_DLL_CTRL_START
+        );
 
-    if (*Timing == SdMmcMmcHs400) {
-      TxClkTapNum = EMMC_DLL_TXCLK_TAPNUM_90_DEGREES;
+      for (i = 0; i < 500; i++) {
+        Value = MmioRead32 (EMMC_DLL_STATUS0);
+        if (Value & EMMC_DLL_STATUS0_DLL_LOCK &&
+            !(Value & EMMC_DLL_STATUS0_DLL_TIMEOUT))
+        {
+          break;
+        }
 
-      MmioWrite32 (EMMC_DLL_CMDOUT, EMMC_DLL_CMDOUT_SRC_CLK_NEG |
-                                    EMMC_DLL_CMDOUT_EN_SRC_CLK_NEG |
-                                    EMMC_DLL_DLYENA |
-                                    EMMC_DLL_CMDOUT_TAPNUM_90_DEGREES |
-                                    EMMC_DLL_TAPNUM_FROM_SW);
-    }
+        gBS->Stall (1);
+      }
 
-    MmioWrite32(EMMC_DLL_RXCLK, EMMC_DLL_DLYENA);
+      TxClkTapNum = EMMC_DLL_TXCLK_TAPNUM_DEFAULT;
 
-    MmioWrite32(EMMC_DLL_TXCLK, EMMC_DLL_DLYENA |
-      TxClkTapNum | EMMC_DLL_TAPNUM_FROM_SW |
-      EMMC_DLL_NO_INVERTER);
+      if (*Timing == SdMmcMmcHs400) {
+        TxClkTapNum = EMMC_DLL_TXCLK_TAPNUM_90_DEGREES;
 
-    MmioWrite32(EMMC_DLL_STRBIN, EMMC_DLL_DLYENA |
-      EMMC_DLL_STRBIN_TAPNUM_DEFAULT | EMMC_DLL_TAPNUM_FROM_SW);
-    break;
+        MmioWrite32 (
+          EMMC_DLL_CMDOUT,
+          EMMC_DLL_CMDOUT_SRC_CLK_NEG |
+          EMMC_DLL_CMDOUT_EN_SRC_CLK_NEG |
+          EMMC_DLL_DLYENA |
+          EMMC_DLL_CMDOUT_TAPNUM_90_DEGREES |
+          EMMC_DLL_TAPNUM_FROM_SW
+          );
+      }
 
-  default:
-    break;
+      MmioWrite32 (EMMC_DLL_RXCLK, EMMC_DLL_DLYENA);
+
+      MmioWrite32 (
+        EMMC_DLL_TXCLK,
+        EMMC_DLL_DLYENA |
+        TxClkTapNum | EMMC_DLL_TAPNUM_FROM_SW |
+        EMMC_DLL_NO_INVERTER
+        );
+
+      MmioWrite32 (
+        EMMC_DLL_STRBIN,
+        EMMC_DLL_DLYENA |
+        EMMC_DLL_STRBIN_TAPNUM_DEFAULT | EMMC_DLL_TAPNUM_FROM_SW
+        );
+      break;
+
+    default:
+      break;
   }
+
   return EFI_SUCCESS;
 }
 
-STATIC EDKII_SD_MMC_OVERRIDE mSdMmcOverride = {
+STATIC EDKII_SD_MMC_OVERRIDE  mSdMmcOverride = {
   EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION,
   EmmcSdMmcCapability,
   EmmcSdMmcNotifyPhase,
@@ -233,12 +253,12 @@ STATIC EDKII_SD_MMC_OVERRIDE mSdMmcOverride = {
 EFI_STATUS
 EFIAPI
 DwcSdhciDxeInitialize (
-  IN EFI_HANDLE         ImageHandle,
-  IN EFI_SYSTEM_TABLE   *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS                      Status;
-  EFI_HANDLE                      Handle;
+  EFI_STATUS  Status;
+  EFI_HANDLE  Handle;
 
   DEBUG ((DEBUG_BLKIO, "%a\n", __FUNCTION__));
 
@@ -263,13 +283,18 @@ DwcSdhciDxeInitialize (
              NULL,
              &mSdMmcControllerHandle,
              1,
-             DWC_SDHCI_BASE, 0x10000);
+             DWC_SDHCI_BASE,
+             0x10000
+             );
   ASSERT_EFI_ERROR (Status);
 
   Handle = NULL;
-  Status = gBS->InstallProtocolInterface (&Handle,
+  Status = gBS->InstallProtocolInterface (
+                  &Handle,
                   &gEdkiiSdMmcOverrideProtocolGuid,
-                  EFI_NATIVE_INTERFACE, (VOID **)&mSdMmcOverride);
+                  EFI_NATIVE_INTERFACE,
+                  (VOID **)&mSdMmcOverride
+                  );
   ASSERT_EFI_ERROR (Status);
 
   return EFI_SUCCESS;

edk2-rockchip/Silicon/Rockchip/Drivers/DwcSdhciDxe/DwcSdhciDxe.h

@@ -12,39 +12,39 @@
 #ifndef __DWCSDHCIDXE_H__
 #define __DWCSDHCIDXE_H__
 
-#define DWC_SDHCI_BASE          PcdGet32 (PcdDwcSdhciBaseAddress)
+#define DWC_SDHCI_BASE  PcdGet32 (PcdDwcSdhciBaseAddress)
 
-#define SD_MMC_HC_CLOCK_CTRL    (DWC_SDHCI_BASE + 0x2C)
-#define SD_MMC_HC_HOST_CTRL2    (DWC_SDHCI_BASE + 0x3E)
+#define SD_MMC_HC_CLOCK_CTRL  (DWC_SDHCI_BASE + 0x2C)
+#define SD_MMC_HC_HOST_CTRL2  (DWC_SDHCI_BASE + 0x3E)
 
 // eMMC Registers
-#define EMMC_HOST_CTRL3         (DWC_SDHCI_BASE + 0x508)
-#define EMMC_EMMC_CTRL          (DWC_SDHCI_BASE + 0x52C)
-#define EMMC_DLL_CTRL           (DWC_SDHCI_BASE + 0x800)
-#define EMMC_DLL_RXCLK          (DWC_SDHCI_BASE + 0x804)
-#define EMMC_DLL_TXCLK          (DWC_SDHCI_BASE + 0x808)
-#define EMMC_DLL_STRBIN         (DWC_SDHCI_BASE + 0x80C)
-#define EMMC_DLL_CMDOUT         (DWC_SDHCI_BASE + 0x810)
-#define EMMC_DLL_STATUS0        (DWC_SDHCI_BASE + 0x840)
-#define EMMC_DLL_STATUS1        (DWC_SDHCI_BASE + 0x844)
+#define EMMC_HOST_CTRL3   (DWC_SDHCI_BASE + 0x508)
+#define EMMC_EMMC_CTRL    (DWC_SDHCI_BASE + 0x52C)
+#define EMMC_DLL_CTRL     (DWC_SDHCI_BASE + 0x800)
+#define EMMC_DLL_RXCLK    (DWC_SDHCI_BASE + 0x804)
+#define EMMC_DLL_TXCLK    (DWC_SDHCI_BASE + 0x808)
+#define EMMC_DLL_STRBIN   (DWC_SDHCI_BASE + 0x80C)
+#define EMMC_DLL_CMDOUT   (DWC_SDHCI_BASE + 0x810)
+#define EMMC_DLL_STATUS0  (DWC_SDHCI_BASE + 0x840)
+#define EMMC_DLL_STATUS1  (DWC_SDHCI_BASE + 0x844)
 
-#define CLOCK_CTRL_SDCLK_ENABLE            BIT2
+#define CLOCK_CTRL_SDCLK_ENABLE  BIT2
 
-#define HOST_CTRL2_HS400                   (BIT2 | BIT1 | BIT0)
+#define HOST_CTRL2_HS400  (BIT2 | BIT1 | BIT0)
 
-#define EMMC_CTRL_CARD_IS_EMMC             BIT0
+#define EMMC_CTRL_CARD_IS_EMMC  BIT0
 
 #define EMMC_DLL_CTRL_SRST                 BIT1
 #define EMMC_DLL_CTRL_START                BIT0
 #define EMMC_DLL_CTRL_START_POINT_DEFAULT  (5 << 16)
 #define EMMC_DLL_CTRL_INCREMENT_DEFAULT    (2 << 8)
 
-#define EMMC_DLL_NO_INVERTER               BIT29
-#define EMMC_DLL_DLYENA                    BIT27
-#define EMMC_DLL_TAPNUM_FROM_SW            BIT24
+#define EMMC_DLL_NO_INVERTER     BIT29
+#define EMMC_DLL_DLYENA          BIT27
+#define EMMC_DLL_TAPNUM_FROM_SW  BIT24
 
-#define EMMC_DLL_TXCLK_TAPNUM_DEFAULT      (0x10 << 0)
-#define EMMC_DLL_TXCLK_TAPNUM_90_DEGREES   0x9
+#define EMMC_DLL_TXCLK_TAPNUM_DEFAULT     (0x10 << 0)
+#define EMMC_DLL_TXCLK_TAPNUM_90_DEGREES  0x9
 
 #define EMMC_DLL_STRBIN_TAPNUM_DEFAULT     (0x3 << 0)
 #define EMMC_DLL_STRBIN_DELAY_NUM_SEL      BIT26
@@ -55,8 +55,8 @@
 #define EMMC_DLL_CMDOUT_SRC_CLK_NEG        BIT28
 #define EMMC_DLL_CMDOUT_EN_SRC_CLK_NEG     BIT29
 
-#define EMMC_DLL_STATUS0_DLL_LOCK          BIT8
-#define EMMC_DLL_STATUS0_DLL_TIMEOUT       BIT9
+#define EMMC_DLL_STATUS0_DLL_LOCK     BIT8
+#define EMMC_DLL_STATUS0_DLL_TIMEOUT  BIT9
 
 typedef struct {
   UINT32    TimeoutFreq   : 6; // bit 0:5

edk2-rockchip/Silicon/Rockchip/Drivers/I2c/I2cDemoDxe/I2cDemoDxe.c

@@ -23,9 +23,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 #include "I2cDemoDxe.h"
 
-STATIC CONST EFI_GUID I2cGuid = I2C_GUID;
+STATIC CONST EFI_GUID  I2cGuid = I2C_GUID;
 
-EFI_DRIVER_BINDING_PROTOCOL gDriverBindingProtocol = {
+EFI_DRIVER_BINDING_PROTOCOL  gDriverBindingProtocol = {
   I2cDemoSupported,
   I2cDemoStart,
   I2cDemoStop
@@ -34,46 +34,49 @@ EFI_DRIVER_BINDING_PROTOCOL gDriverBindingProtocol = {
 EFI_STATUS
 EFIAPI
 I2cDemoSupported (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN EFI_HANDLE ControllerHandle,
-  IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN EFI_HANDLE                   ControllerHandle,
+  IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath OPTIONAL
   )
 {
-  EFI_STATUS Status = EFI_UNSUPPORTED;
-  EFI_I2C_IO_PROTOCOL *TmpI2cIo;
-  UINT8 *I2cDemoAddresses;
-  UINT8 *I2cDemoBuses;
-  UINTN i;
+  EFI_STATUS           Status = EFI_UNSUPPORTED;
+  EFI_I2C_IO_PROTOCOL  *TmpI2cIo;
+  UINT8                *I2cDemoAddresses;
+  UINT8                *I2cDemoBuses;
+  UINTN                i;
 
   Status = gBS->OpenProtocol (
-      ControllerHandle,
-      &gEfiI2cIoProtocolGuid,
-      (VOID **) &TmpI2cIo,
-      gImageHandle,
-      ControllerHandle,
-      EFI_OPEN_PROTOCOL_BY_DRIVER
-      );
-  if (EFI_ERROR(Status)) {
+                  ControllerHandle,
+                  &gEfiI2cIoProtocolGuid,
+                  (VOID **)&TmpI2cIo,
+                  gImageHandle,
+                  ControllerHandle,
+                  EFI_OPEN_PROTOCOL_BY_DRIVER
+                  );
+  if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_INFO, "I2cDemoSupported Error status: %d\n", Status));
     return EFI_UNSUPPORTED;
   }
 
   /* get I2CDEMO devices' addresses from PCD */
   I2cDemoAddresses = PcdGetPtr (PcdI2cDemoAddresses);
-  I2cDemoBuses = PcdGetPtr (PcdI2cDemoBuses);
+  I2cDemoBuses     = PcdGetPtr (PcdI2cDemoBuses);
   if (I2cDemoAddresses == 0) {
     Status = EFI_UNSUPPORTED;
-    DEBUG((DEBUG_INFO, "I2cDemoSupported: I2C device found, but it's not I2CDEMO\n"));
+    DEBUG ((DEBUG_INFO, "I2cDemoSupported: I2C device found, but it's not I2CDEMO\n"));
     goto out;
   }
 
   Status = EFI_UNSUPPORTED;
   for (i = 0; I2cDemoAddresses[i] != '\0'; i++) {
     /* I2C guid must fit and valid DeviceIndex must be provided */
-    if (CompareGuid(TmpI2cIo->DeviceGuid, &I2cGuid) &&
-        TmpI2cIo->DeviceIndex == I2C_DEVICE_INDEX(I2cDemoBuses[i],
-          I2cDemoAddresses[i])) {
-      DEBUG ((DEBUG_INFO,  "I2cDemoSupported: attached to I2CDEMO device\n"));
+    if (CompareGuid (TmpI2cIo->DeviceGuid, &I2cGuid) &&
+        (TmpI2cIo->DeviceIndex == I2C_DEVICE_INDEX (
+                                    I2cDemoBuses[i],
+                                    I2cDemoAddresses[i]
+                                    )))
+    {
+      DEBUG ((DEBUG_INFO, "I2cDemoSupported: attached to I2CDEMO device\n"));
       Status = EFI_SUCCESS;
       break;
     }
@@ -81,11 +84,11 @@ I2cDemoSupported (
 
 out:
   gBS->CloseProtocol (
-      ControllerHandle,
-      &gEfiI2cIoProtocolGuid,
-      gImageHandle,
-      ControllerHandle
-      );
+         ControllerHandle,
+         &gEfiI2cIoProtocolGuid,
+         gImageHandle,
+         ControllerHandle
+         );
 
   return Status;
 }
@@ -93,41 +96,43 @@ out:
 EFI_STATUS
 EFIAPI
 I2cDemoRead (
-  IN CONST ROCKCHIP_I2CDEMO_PROTOCOL *This,
-  IN UINT8 *RegAddress,
-  IN UINT16 RegAddressLength,
-  IN UINT8 *Buffer,
-  IN UINT16 Length
+  IN CONST ROCKCHIP_I2CDEMO_PROTOCOL  *This,
+  IN UINT8                            *RegAddress,
+  IN UINT16                           RegAddressLength,
+  IN UINT8                            *Buffer,
+  IN UINT16                           Length
   )
 {
-  EFI_I2C_REQUEST_PACKET *RequestPacket;
-  UINTN RequestPacketSize;
-  EFI_STATUS Status = EFI_SUCCESS;
-  I2CDEMO_CONTEXT *I2cDemoContext = I2CDEMO_SC_FROM_I2CDEMO(This);
+  EFI_I2C_REQUEST_PACKET  *RequestPacket;
+  UINTN                   RequestPacketSize;
+  EFI_STATUS              Status          = EFI_SUCCESS;
+  I2CDEMO_CONTEXT         *I2cDemoContext = I2CDEMO_SC_FROM_I2CDEMO (This);
 
-  ASSERT(I2cDemoContext != NULL);
-  ASSERT(I2cDemoContext->I2cIo != NULL);
+  ASSERT (I2cDemoContext != NULL);
+  ASSERT (I2cDemoContext->I2cIo != NULL);
 
-  RequestPacketSize = sizeof(UINTN) + sizeof (EFI_I2C_OPERATION) * 2;
-  RequestPacket = AllocateZeroPool (RequestPacketSize);
-  if (RequestPacket == NULL)
+  RequestPacketSize = sizeof (UINTN) + sizeof (EFI_I2C_OPERATION) * 2;
+  RequestPacket     = AllocateZeroPool (RequestPacketSize);
+  if (RequestPacket == NULL) {
     return EFI_OUT_OF_RESOURCES;
+  }
 
   RequestPacket->OperationCount = 2;
 
-  RequestPacket->Operation[0].Flags = 0;
+  RequestPacket->Operation[0].Flags         = 0;
   RequestPacket->Operation[0].LengthInBytes = RegAddressLength;
-  RequestPacket->Operation[0].Buffer = RegAddress;
+  RequestPacket->Operation[0].Buffer        = RegAddress;
 
-  RequestPacket->Operation[1].Flags = I2C_FLAG_READ;
+  RequestPacket->Operation[1].Flags         = I2C_FLAG_READ;
   RequestPacket->Operation[1].LengthInBytes = Length;
-  RequestPacket->Operation[1].Buffer = Buffer;
+  RequestPacket->Operation[1].Buffer        = Buffer;
 
-  Status = I2cDemoContext->I2cIo->QueueRequest(I2cDemoContext->I2cIo, 0, NULL, RequestPacket, NULL);
-  if (EFI_ERROR(Status))
-    DEBUG((DEBUG_INFO, "I2cDemoTransfer: error %d during transmission\n", Status));
+  Status = I2cDemoContext->I2cIo->QueueRequest (I2cDemoContext->I2cIo, 0, NULL, RequestPacket, NULL);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_INFO, "I2cDemoTransfer: error %d during transmission\n", Status));
+  }
 
-  FreePool(RequestPacket);
+  FreePool (RequestPacket);
 
   return Status;
 }
@@ -135,50 +140,55 @@ I2cDemoRead (
 EFI_STATUS
 EFIAPI
 I2cDemoWrite (
-  IN CONST ROCKCHIP_I2CDEMO_PROTOCOL *This,
-  IN UINT8 *RegAddress,
-  IN UINT16 RegAddressLength,
-  IN UINT8 *Buffer,
-  IN UINT16 Length
+  IN CONST ROCKCHIP_I2CDEMO_PROTOCOL  *This,
+  IN UINT8                            *RegAddress,
+  IN UINT16                           RegAddressLength,
+  IN UINT8                            *Buffer,
+  IN UINT16                           Length
   )
 {
-  EFI_I2C_REQUEST_PACKET *RequestPacket;
-  UINTN RequestPacketSize;
-  EFI_STATUS Status = EFI_SUCCESS;
-  I2CDEMO_CONTEXT *I2cDemoContext = I2CDEMO_SC_FROM_I2CDEMO(This);
-  UINT8 *Data;
-  UINT16 i;
+  EFI_I2C_REQUEST_PACKET  *RequestPacket;
+  UINTN                   RequestPacketSize;
+  EFI_STATUS              Status          = EFI_SUCCESS;
+  I2CDEMO_CONTEXT         *I2cDemoContext = I2CDEMO_SC_FROM_I2CDEMO (This);
+  UINT8                   *Data;
+  UINT16                  i;
 
-  ASSERT(I2cDemoContext != NULL);
-  ASSERT(I2cDemoContext->I2cIo != NULL);
+  ASSERT (I2cDemoContext != NULL);
+  ASSERT (I2cDemoContext->I2cIo != NULL);
 
-  RequestPacketSize = sizeof(UINTN) + sizeof (EFI_I2C_OPERATION);
-  RequestPacket = AllocateZeroPool (RequestPacketSize);
-  if (RequestPacket == NULL)
+  RequestPacketSize = sizeof (UINTN) + sizeof (EFI_I2C_OPERATION);
+  RequestPacket     = AllocateZeroPool (RequestPacketSize);
+  if (RequestPacket == NULL) {
     return EFI_OUT_OF_RESOURCES;
+  }
 
-  Data = AllocateZeroPool ( RegAddressLength + Length );
-  if (Data == NULL)
+  Data = AllocateZeroPool (RegAddressLength + Length);
+  if (Data == NULL) {
     return EFI_OUT_OF_RESOURCES;
+  }
 
-  for (i = 0; i < RegAddressLength; i++)
+  for (i = 0; i < RegAddressLength; i++) {
     Data[i] = RegAddress[i]  & 0xff;
+  }
 
-  for (i = RegAddressLength; i < RegAddressLength + Length; i++)
+  for (i = RegAddressLength; i < RegAddressLength + Length; i++) {
     Data[i] = Buffer[i - RegAddressLength]  & 0xff;
+  }
 
   RequestPacket->OperationCount = 1;
 
-  RequestPacket->Operation[0].Flags = 0;
+  RequestPacket->Operation[0].Flags         = 0;
   RequestPacket->Operation[0].LengthInBytes = RegAddressLength + Length;
-  RequestPacket->Operation[0].Buffer = Data;
+  RequestPacket->Operation[0].Buffer        = Data;
 
-  Status = I2cDemoContext->I2cIo->QueueRequest(I2cDemoContext->I2cIo, 0, NULL, RequestPacket, NULL);
-  if (EFI_ERROR(Status))
-    DEBUG((DEBUG_INFO, "I2cDemoTransfer: error %d during transmission\n", Status));
+  Status = I2cDemoContext->I2cIo->QueueRequest (I2cDemoContext->I2cIo, 0, NULL, RequestPacket, NULL);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_INFO, "I2cDemoTransfer: error %d during transmission\n", Status));
+  }
 
-  FreePool(Data);
-  FreePool(RequestPacket);
+  FreePool (Data);
+  FreePool (RequestPacket);
 
   return Status;
 }
@@ -186,60 +196,61 @@ I2cDemoWrite (
 EFI_STATUS
 EFIAPI
 I2cDemoStart (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN EFI_HANDLE ControllerHandle,
-  IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN EFI_HANDLE                   ControllerHandle,
+  IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath OPTIONAL
   )
 {
-  EFI_STATUS Status = EFI_SUCCESS;
-  I2CDEMO_CONTEXT *I2cDemoContext;
+  EFI_STATUS       Status = EFI_SUCCESS;
+  I2CDEMO_CONTEXT  *I2cDemoContext;
 
-  I2cDemoContext = AllocateZeroPool (sizeof(I2CDEMO_CONTEXT));
+  I2cDemoContext = AllocateZeroPool (sizeof (I2CDEMO_CONTEXT));
   if (I2cDemoContext == NULL) {
-    DEBUG((DEBUG_ERROR, "I2cDemo: allocation fail\n"));
+    DEBUG ((DEBUG_ERROR, "I2cDemo: allocation fail\n"));
     return EFI_OUT_OF_RESOURCES;
   }
 
-  I2cDemoContext->ControllerHandle = ControllerHandle;
-  I2cDemoContext->Signature = I2CDEMO_SIGNATURE;
-  I2cDemoContext->I2cDemoProtocol.Read = I2cDemoRead;
+  I2cDemoContext->ControllerHandle      = ControllerHandle;
+  I2cDemoContext->Signature             = I2CDEMO_SIGNATURE;
+  I2cDemoContext->I2cDemoProtocol.Read  = I2cDemoRead;
   I2cDemoContext->I2cDemoProtocol.Write = I2cDemoWrite;
 
   Status = gBS->OpenProtocol (
-      ControllerHandle,
-      &gEfiI2cIoProtocolGuid,
-      (VOID **) &I2cDemoContext->I2cIo,
-      gImageHandle,
-      ControllerHandle,
-      EFI_OPEN_PROTOCOL_BY_DRIVER
-      );
-  if (EFI_ERROR(Status)) {
-    DEBUG((DEBUG_ERROR, "I2cDemo: failed to open I2cIo\n"));
-    FreePool(I2cDemoContext);
+                  ControllerHandle,
+                  &gEfiI2cIoProtocolGuid,
+                  (VOID **)&I2cDemoContext->I2cIo,
+                  gImageHandle,
+                  ControllerHandle,
+                  EFI_OPEN_PROTOCOL_BY_DRIVER
+                  );
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "I2cDemo: failed to open I2cIo\n"));
+    FreePool (I2cDemoContext);
     return EFI_UNSUPPORTED;
   }
 
   I2cDemoContext->I2cDemoProtocol.Identifier = I2cDemoContext->I2cIo->DeviceIndex;
-  Status = gBS->InstallMultipleProtocolInterfaces (
-      &ControllerHandle,
-      &gRockchipI2cDemoProtocolGuid, &I2cDemoContext->I2cDemoProtocol,
-      NULL
-      );
-  if (EFI_ERROR(Status)) {
-    DEBUG((DEBUG_ERROR, "I2cDemo: failed to install I2CDEMO protocol\n"));
+  Status                                     = gBS->InstallMultipleProtocolInterfaces (
+                                                      &ControllerHandle,
+                                                      &gRockchipI2cDemoProtocolGuid,
+                                                      &I2cDemoContext->I2cDemoProtocol,
+                                                      NULL
+                                                      );
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "I2cDemo: failed to install I2CDEMO protocol\n"));
     goto fail;
   }
 
   return Status;
 
 fail:
-  FreePool(I2cDemoContext);
+  FreePool (I2cDemoContext);
   gBS->CloseProtocol (
-      ControllerHandle,
-      &gEfiI2cIoProtocolGuid,
-      gImageHandle,
-      ControllerHandle
-      );
+         ControllerHandle,
+         &gEfiI2cIoProtocolGuid,
+         gImageHandle,
+         ControllerHandle
+         );
 
   return Status;
 }
@@ -247,20 +258,20 @@ fail:
 EFI_STATUS
 EFIAPI
 I2cDemoStop (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN  EFI_HANDLE ControllerHandle,
-  IN  UINTN NumberOfChildren,
-  IN  EFI_HANDLE *ChildHandleBuffer OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN  EFI_HANDLE                  ControllerHandle,
+  IN  UINTN                       NumberOfChildren,
+  IN  EFI_HANDLE                  *ChildHandleBuffer OPTIONAL
   )
 {
-  ROCKCHIP_I2CDEMO_PROTOCOL *I2cDemoProtocol;
-  EFI_STATUS Status;
-  I2CDEMO_CONTEXT *I2cDemoContext;
+  ROCKCHIP_I2CDEMO_PROTOCOL  *I2cDemoProtocol;
+  EFI_STATUS                 Status;
+  I2CDEMO_CONTEXT            *I2cDemoContext;
 
   Status = gBS->OpenProtocol (
                   ControllerHandle,
                   &gRockchipI2cDemoProtocolGuid,
-                  (VOID **) &I2cDemoProtocol,
+                  (VOID **)&I2cDemoProtocol,
                   This->DriverBindingHandle,
                   ControllerHandle,
                   EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -269,38 +280,42 @@ I2cDemoStop (
   if (EFI_ERROR (Status)) {
     return EFI_DEVICE_ERROR;
   }
-  I2cDemoContext = I2CDEMO_SC_FROM_I2CDEMO(I2cDemoProtocol);
+
+  I2cDemoContext = I2CDEMO_SC_FROM_I2CDEMO (I2cDemoProtocol);
 
   gBS->UninstallMultipleProtocolInterfaces (
-      &ControllerHandle,
-      &gRockchipI2cDemoProtocolGuid, &I2cDemoContext->I2cDemoProtocol,
-      &gEfiDriverBindingProtocolGuid, &gDriverBindingProtocol,
-      NULL
-      );
+         &ControllerHandle,
+         &gRockchipI2cDemoProtocolGuid,
+         &I2cDemoContext->I2cDemoProtocol,
+         &gEfiDriverBindingProtocolGuid,
+         &gDriverBindingProtocol,
+         NULL
+         );
   gBS->CloseProtocol (
-      ControllerHandle,
-      &gEfiI2cIoProtocolGuid,
-      gImageHandle,
-      ControllerHandle
-      );
-  FreePool(I2cDemoContext);
+         ControllerHandle,
+         &gEfiI2cIoProtocolGuid,
+         gImageHandle,
+         ControllerHandle
+         );
+  FreePool (I2cDemoContext);
   return EFI_SUCCESS;
 }
 
 EFI_STATUS
 EFIAPI
 I2cDemoInitialise (
-  IN EFI_HANDLE ImageHandle,
-  IN EFI_SYSTEM_TABLE *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS Status;
+  EFI_STATUS  Status;
 
   Status = gBS->InstallMultipleProtocolInterfaces (
-      &ImageHandle,
-      &gEfiDriverBindingProtocolGuid, &gDriverBindingProtocol,
-      NULL
-      );
+                  &ImageHandle,
+                  &gEfiDriverBindingProtocolGuid,
+                  &gDriverBindingProtocol,
+                  NULL
+                  );
 
   return Status;
 }

edk2-rockchip/Silicon/Rockchip/Drivers/I2c/I2cDemoDxe/I2cDemoDxe.h

@@ -10,9 +10,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 #include <Uefi.h>
 
-#define I2CDEMO_SIGNATURE          SIGNATURE_32 ('I', '2', 'C', 'D')
+#define I2CDEMO_SIGNATURE  SIGNATURE_32 ('I', '2', 'C', 'D')
 
-#define MAX_BUFFER_LENGTH 64
+#define MAX_BUFFER_LENGTH  64
 
 #define I2C_GUID \
   { \
@@ -20,57 +20,58 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
   }
 
 typedef struct {
-  UINT32  Signature;
-  EFI_HANDLE ControllerHandle;
-  EFI_I2C_IO_PROTOCOL *I2cIo;
-  ROCKCHIP_I2CDEMO_PROTOCOL I2cDemoProtocol;
+  UINT32                       Signature;
+  EFI_HANDLE                   ControllerHandle;
+  EFI_I2C_IO_PROTOCOL          *I2cIo;
+  ROCKCHIP_I2CDEMO_PROTOCOL    I2cDemoProtocol;
 } I2CDEMO_CONTEXT;
 
-#define I2CDEMO_SC_FROM_IO(a) CR (a, I2CDEMO_CONTEXT, I2cIo, I2CDEMO_SIGNATURE)
-#define I2CDEMO_SC_FROM_I2CDEMO(a) CR (a, I2CDEMO_CONTEXT, I2cDemoProtocol, I2CDEMO_SIGNATURE)
+#define I2CDEMO_SC_FROM_IO(a)       CR (a, I2CDEMO_CONTEXT, I2cIo, I2CDEMO_SIGNATURE)
+#define I2CDEMO_SC_FROM_I2CDEMO(a)  CR (a, I2CDEMO_CONTEXT, I2cDemoProtocol, I2CDEMO_SIGNATURE)
 
 EFI_STATUS
 EFIAPI
 I2cDemoSupported (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN EFI_HANDLE ControllerHandle,
-  IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN EFI_HANDLE                   ControllerHandle,
+  IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath OPTIONAL
   );
 
 EFI_STATUS
 EFIAPI
 I2cDemoStart (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN EFI_HANDLE ControllerHandle,
-  IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN EFI_HANDLE                   ControllerHandle,
+  IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath OPTIONAL
   );
 
 EFI_STATUS
 EFIAPI
 I2cDemoStop (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN  EFI_HANDLE ControllerHandle,
-  IN  UINTN NumberOfChildren,
-  IN  EFI_HANDLE *ChildHandleBuffer OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN  EFI_HANDLE                  ControllerHandle,
+  IN  UINTN                       NumberOfChildren,
+  IN  EFI_HANDLE                  *ChildHandleBuffer OPTIONAL
   );
 
 EFI_STATUS
 EFIAPI
 I2cDemoRead (
-  IN CONST ROCKCHIP_I2CDEMO_PROTOCOL *This,
-  IN UINT8 *RegAddress,
-  IN UINT16 RegAddressLength,
-  IN UINT8 *Buffer,
-  IN UINT16 Length
+  IN CONST ROCKCHIP_I2CDEMO_PROTOCOL  *This,
+  IN UINT8                            *RegAddress,
+  IN UINT16                           RegAddressLength,
+  IN UINT8                            *Buffer,
+  IN UINT16                           Length
   );
 
 EFI_STATUS
 EFIAPI
 I2cDemoWrite (
-  IN CONST ROCKCHIP_I2CDEMO_PROTOCOL *This,
-  IN UINT8 *RegAddress,
-  IN UINT16 RegAddressLength,
-  IN UINT8 *Buffer,
-  IN UINT16 Length
+  IN CONST ROCKCHIP_I2CDEMO_PROTOCOL  *This,
+  IN UINT8                            *RegAddress,
+  IN UINT16                           RegAddressLength,
+  IN UINT8                            *Buffer,
+  IN UINT16                           Length
   );
+
 #endif // __I2CDEMO_H__

edk2-rockchip/Silicon/Rockchip/Drivers/I2c/I2cDxe/I2cDxe.h

@@ -14,166 +14,165 @@
 
 #define I2C_PERIPHERAL_SIZE  0x1000
 
-#define I2C_SLAVE_ADDR    0x00
+#define I2C_SLAVE_ADDR      0x00
 #define I2C_EXT_SLAVE_ADDR  0x10
-#define I2C_DATA    0x04
+#define I2C_DATA            0x04
 
-#define I2C_CONTROL    0x08
-#define I2C_CONTROL_ACK  (1 << 2)
-#define I2C_CONTROL_IFLG  (1 << 3)
-#define I2C_CONTROL_STOP  (1 << 4)
+#define I2C_CONTROL        0x08
+#define I2C_CONTROL_ACK    (1 << 2)
+#define I2C_CONTROL_IFLG   (1 << 3)
+#define I2C_CONTROL_STOP   (1 << 4)
 #define I2C_CONTROL_START  (1 << 5)
 #define I2C_CONTROL_I2CEN  (1 << 6)
 #define I2C_CONTROL_INTEN  (1 << 7)
 
-#define I2C_STATUS      0x0c
-#define I2C_STATUS_START    0x08
-#define I2C_STATUS_RPTD_START    0x10
-#define I2C_STATUS_ADDR_W_ACK    0x18
+#define I2C_STATUS                0x0c
+#define I2C_STATUS_START          0x08
+#define I2C_STATUS_RPTD_START     0x10
+#define I2C_STATUS_ADDR_W_ACK     0x18
 #define I2C_STATUS_DATA_WR_ACK    0x28
-#define I2C_STATUS_ADDR_R_ACK    0x40
+#define I2C_STATUS_ADDR_R_ACK     0x40
 #define I2C_STATUS_DATA_RD_ACK    0x50
 #define I2C_STATUS_DATA_RD_NOACK  0x58
 
-#define I2C_BAUD_RATE_REG    0x0c
-#define I2C_BAUD_RATE_PARAM(M,N)  ((((M) << 3) | ((N) & 0x7)) & 0x7f)
-#define I2C_BAUD_RATE_RAW(C,M,N)  ((C)/((10*(M+1))<<(N+1)))
-#define I2C_M_FROM_BAUD(baud)     (((baud) >> 3) & 0xf)
-#define I2C_N_FROM_BAUD(baud)     ((baud) & 0x7)
+#define I2C_BAUD_RATE_REG  0x0c
+#define I2C_BAUD_RATE_PARAM(M, N)   ((((M) << 3) | ((N) & 0x7)) & 0x7f)
+#define I2C_BAUD_RATE_RAW(C, M, N)  ((C)/((10*(M+1))<<(N+1)))
+#define I2C_M_FROM_BAUD(baud)       (((baud) >> 3) & 0xf)
+#define I2C_N_FROM_BAUD(baud)       ((baud) & 0x7)
 
-#define I2C_SOFT_RESET    0x1c
-#define I2C_TRANSFER_TIMEOUT 10000
-#define I2C_READY_TIMEOUT 100
+#define I2C_SOFT_RESET        0x1c
+#define I2C_TRANSFER_TIMEOUT  10000
+#define I2C_READY_TIMEOUT     100
 
-#define I2C_UNKNOWN        0x0
-#define I2C_SLOW           0x1
-#define I2C_FAST           0x2
-#define I2C_FASTEST        0x3
+#define I2C_UNKNOWN  0x0
+#define I2C_SLOW     0x1
+#define I2C_FAST     0x2
+#define I2C_FASTEST  0x3
 
 /* rk i2c fifo max transfer bytes */
-#define RK_I2C_FIFO_SIZE	32
+#define RK_I2C_FIFO_SIZE  32
 
 /* rk i2c device register size */
-#define RK_I2C_REGISTER_SIZE	3
+#define RK_I2C_REGISTER_SIZE  3
 
 /* i2c timerout */
-#define I2C_TIMEOUT_US		100000  // 100000us = 100ms
-#define I2C_RETRY_COUNT		3
+#define I2C_TIMEOUT_US   100000         // 100000us = 100ms
+#define I2C_RETRY_COUNT  3
 
-#define I2C_ADAP_SEL_BIT(nr)	((nr) + 11)
-#define I2C_ADAP_SEL_MASK(nr)	((nr) + 27)
+#define I2C_ADAP_SEL_BIT(nr)   ((nr) + 11)
+#define I2C_ADAP_SEL_MASK(nr)  ((nr) + 27)
 
 #define RK_CEIL(x, y) \
-	({ unsigned long __x = (x), __y = (y); (__x + __y - 1) / __y; })
+        ({ unsigned long __x = (x), __y = (y); (__x + __y - 1) / __y; })
 
 /* Control register */
-#define I2C_CON			0x000
-#define I2C_CON_EN		(1 << 0)
-#define I2C_CON_MOD(mod)	((mod) << 1)
-#define I2C_MODE_TX		0x00
-#define I2C_MODE_TRX		0x01
-#define I2C_MODE_RX		0x02
-#define I2C_MODE_RRX		0x03
-#define I2C_CON_MASK		(3 << 1)
+#define I2C_CON     0x000
+#define I2C_CON_EN  (1 << 0)
+#define I2C_CON_MOD(mod)  ((mod) << 1)
+#define I2C_MODE_TX   0x00
+#define I2C_MODE_TRX  0x01
+#define I2C_MODE_RX   0x02
+#define I2C_MODE_RRX  0x03
+#define I2C_CON_MASK  (3 << 1)
 
-#define I2C_CON_START		(1 << 3)
-#define I2C_CON_STOP		(1 << 4)
-#define I2C_CON_LASTACK		(1 << 5)
-#define I2C_CON_ACTACK		(1 << 6)
+#define I2C_CON_START    (1 << 3)
+#define I2C_CON_STOP     (1 << 4)
+#define I2C_CON_LASTACK  (1 << 5)
+#define I2C_CON_ACTACK   (1 << 6)
 
-#define I2C_CON_SDA_CFG(cfg)	((cfg) << 8)
-#define I2C_CON_STA_CFG(cfg)	((cfg) << 12)
-#define I2C_CON_STO_CFG(cfg)	((cfg) << 14
+#define I2C_CON_SDA_CFG(cfg)  ((cfg) << 8)
+#define I2C_CON_STA_CFG(cfg)  ((cfg) << 12)
+#define I2C_CON_STO_CFG(cfg)  ((cfg) << 14
 
-#define I2C_CON_VERSION	        (0xff << 16)
-#define I2C_CON_VERSION_SHIFT	16
+#define I2C_CON_VERSION        (0xff << 16)
+#define I2C_CON_VERSION_SHIFT  16
 
 /* Clock dividor register */
-#define I2C_CLKDIV		0x004
-#define I2C_CLK_DIV_HIGH_SHIFT	16
-#define I2C_CLKDIV_VAL(divl, divh)	(((divl) & 0xffff) | (((divh) << 16) & 0xffff0000))
+#define I2C_CLKDIV              0x004
+#define I2C_CLK_DIV_HIGH_SHIFT  16
+#define I2C_CLKDIV_VAL(divl, divh)  (((divl) & 0xffff) | (((divh) << 16) & 0xffff0000))
 
 /* the slave address accessed  for master rx mode */
-#define I2C_MRXADDR		0x008
-#define I2C_MRXADDR_SET(vld, addr)	(((vld) << 24) | (addr))
+#define I2C_MRXADDR  0x008
+#define I2C_MRXADDR_SET(vld, addr)  (((vld) << 24) | (addr))
 
 /* the slave register address accessed  for master rx mode */
-#define I2C_MRXRADDR		0x00c
-#define I2C_MRXRADDR_SET(vld, raddr)	(((vld) << 24) | (raddr))
+#define I2C_MRXRADDR  0x00c
+#define I2C_MRXRADDR_SET(vld, raddr)  (((vld) << 24) | (raddr))
 
 /* master tx count */
-#define I2C_MTXCNT		0x010
+#define I2C_MTXCNT  0x010
 
 /* master rx count */
-#define I2C_MRXCNT		0x014
+#define I2C_MRXCNT  0x014
 
 /* interrupt enable register */
-#define I2C_IEN			0x018
-#define I2C_BTFIEN		(1 << 0)
-#define I2C_BRFIEN		(1 << 1)
-#define I2C_MBTFIEN		(1 << 2)
-#define I2C_MBRFIEN		(1 << 3)
-#define I2C_STARTIEN		(1 << 4)
-#define I2C_STOPIEN		(1 << 5)
-#define I2C_NAKRCVIEN		(1 << 6)
+#define I2C_IEN        0x018
+#define I2C_BTFIEN     (1 << 0)
+#define I2C_BRFIEN     (1 << 1)
+#define I2C_MBTFIEN    (1 << 2)
+#define I2C_MBRFIEN    (1 << 3)
+#define I2C_STARTIEN   (1 << 4)
+#define I2C_STOPIEN    (1 << 5)
+#define I2C_NAKRCVIEN  (1 << 6)
 
 /* interrupt pending register */
-#define I2C_IPD                 0x01c
-#define I2C_BTFIPD              (1 << 0)
-#define I2C_BRFIPD              (1 << 1)
-#define I2C_MBTFIPD             (1 << 2)
-#define I2C_MBRFIPD             (1 << 3)
-#define I2C_STARTIPD            (1 << 4)
-#define I2C_STOPIPD             (1 << 5)
-#define I2C_NAKRCVIPD           (1 << 6)
-#define I2C_IPD_ALL_CLEAN       0x7f
+#define I2C_IPD            0x01c
+#define I2C_BTFIPD         (1 << 0)
+#define I2C_BRFIPD         (1 << 1)
+#define I2C_MBTFIPD        (1 << 2)
+#define I2C_MBRFIPD        (1 << 3)
+#define I2C_STARTIPD       (1 << 4)
+#define I2C_STOPIPD        (1 << 5)
+#define I2C_NAKRCVIPD      (1 << 6)
+#define I2C_IPD_ALL_CLEAN  0x7f
 
 /* finished count */
-#define I2C_FCNT                0x020
+#define I2C_FCNT  0x020
 
 /* I2C tx data register */
-#define I2C_TXDATA_BASE         0X100
+#define I2C_TXDATA_BASE  0X100
 
 /* I2C rx data register */
-#define I2C_RXDATA_BASE         0x200
-
+#define I2C_RXDATA_BASE  0x200
 
 #define I2C_GUID \
   { \
   0xadc1901b, 0xb83c, 0x4831, { 0x8f, 0x59, 0x70, 0x89, 0x8f, 0x26, 0x57, 0x1e } \
   }
 
-#define I2C_MASTER_SIGNATURE          SIGNATURE_32 ('I', '2', 'C', 'M')
+#define I2C_MASTER_SIGNATURE  SIGNATURE_32 ('I', '2', 'C', 'M')
 
 typedef struct {
-  UINT32 Signature;
-  EFI_HANDLE Controller;
-  UINTN TclkFrequency;
-  UINTN BaseAddress;
-  INTN Bus;
-  UINTN Config;
-  BOOLEAN RuntimeSupport;
-  EFI_I2C_MASTER_PROTOCOL I2cMaster;
-  EFI_I2C_ENUMERATE_PROTOCOL I2cEnumerate;
-  EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL I2cBusConf;
-  ROCKCHIP_I2C_MASTER_PROTOCOL RockchipI2cMaster;
+  UINT32                                           Signature;
+  EFI_HANDLE                                       Controller;
+  UINTN                                            TclkFrequency;
+  UINTN                                            BaseAddress;
+  INTN                                             Bus;
+  UINTN                                            Config;
+  BOOLEAN                                          RuntimeSupport;
+  EFI_I2C_MASTER_PROTOCOL                          I2cMaster;
+  EFI_I2C_ENUMERATE_PROTOCOL                       I2cEnumerate;
+  EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL    I2cBusConf;
+  ROCKCHIP_I2C_MASTER_PROTOCOL                     RockchipI2cMaster;
 } I2C_MASTER_CONTEXT;
 
-#define I2C_SC_FROM_MASTER(a) CR (a, I2C_MASTER_CONTEXT, I2cMaster, I2C_MASTER_SIGNATURE)
-#define I2C_SC_FROM_ENUMERATE(a) CR (a, I2C_MASTER_CONTEXT, I2cEnumerate, I2C_MASTER_SIGNATURE)
-#define I2C_SC_FROM_BUSCONF(a) CR (a, I2C_MASTER_CONTEXT, I2cBusConf, I2C_MASTER_SIGNATURE)
+#define I2C_SC_FROM_MASTER(a)     CR (a, I2C_MASTER_CONTEXT, I2cMaster, I2C_MASTER_SIGNATURE)
+#define I2C_SC_FROM_ENUMERATE(a)  CR (a, I2C_MASTER_CONTEXT, I2cEnumerate, I2C_MASTER_SIGNATURE)
+#define I2C_SC_FROM_BUSCONF(a)    CR (a, I2C_MASTER_CONTEXT, I2cBusConf, I2C_MASTER_SIGNATURE)
 
 typedef struct {
-  VENDOR_DEVICE_PATH Guid;
-  UINTN Instance;
-  EFI_DEVICE_PATH_PROTOCOL End;
+  VENDOR_DEVICE_PATH          Guid;
+  UINTN                       Instance;
+  EFI_DEVICE_PATH_PROTOCOL    End;
 } I2C_DEVICE_PATH;
 
 typedef struct {
-  UINT32 MinLowNs;
-  UINT32 MinHighNs;
-  UINT32 MaxRiseNs;
-  UINT32 MaxFallNs;
+  UINT32    MinLowNs;
+  UINT32    MinHighNs;
+  UINT32    MaxRiseNs;
+  UINT32    MaxFallNs;
 } I2C_SPEC_VALUES;
 
 typedef enum {
@@ -184,144 +183,145 @@ typedef enum {
 
 STATIC
 UINT32
-I2cRead(
-  IN I2C_MASTER_CONTEXT *I2cMasterContext,
-  IN UINTN Off
+I2cRead (
+  IN I2C_MASTER_CONTEXT  *I2cMasterContext,
+  IN UINTN               Off
   );
 
 STATIC
 EFI_STATUS
 I2cWrite (
-  IN I2C_MASTER_CONTEXT *I2cMasterContext,
-  IN UINTN Off,
-  IN UINT32 Val
+  IN I2C_MASTER_CONTEXT  *I2cMasterContext,
+  IN UINTN               Off,
+  IN UINT32              Val
   );
 
 STATIC
 CONST I2C_SPEC_VALUES *
 I2cGetSpec (
-  IN I2C_MASTER_CONTEXT *I2cMasterContext,
-  IN UINT32 Speed);
+  IN I2C_MASTER_CONTEXT  *I2cMasterContext,
+  IN UINT32              Speed
+  );
 
 EFI_STATUS
 EFIAPI
 I2cInitialise (
-  IN EFI_HANDLE ImageHandle,
-  IN EFI_SYSTEM_TABLE *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   );
 
 STATIC
 VOID
 I2cCalBaudRate (
-  IN I2C_MASTER_CONTEXT *I2cMasterContext,
-  IN UINT32 Target,
-  IN UINT32 ClkRate
+  IN I2C_MASTER_CONTEXT  *I2cMasterContext,
+  IN UINT32              Target,
+  IN UINT32              ClkRate
   );
 
 STATIC
 EFI_STATUS
 I2cAdapterBaudRate (
-  IN I2C_MASTER_CONTEXT *I2cMasterContext,
-  IN CONST UINT32 Target,
-  IN CONST UINT32 ClkRate
+  IN I2C_MASTER_CONTEXT  *I2cMasterContext,
+  IN CONST UINT32        Target,
+  IN CONST UINT32        ClkRate
   );
 
 STATIC
 EFI_STATUS
 EFIAPI
 I2cSetBusFrequency (
-  IN CONST EFI_I2C_MASTER_PROTOCOL   *This,
-  IN OUT UINTN                       *BusClockHertz
- );
+  IN CONST EFI_I2C_MASTER_PROTOCOL  *This,
+  IN OUT UINTN                      *BusClockHertz
+  );
 
 EFI_STATUS
 EFIAPI
 I2cReset (
-  IN CONST EFI_I2C_MASTER_PROTOCOL *This
+  IN CONST EFI_I2C_MASTER_PROTOCOL  *This
   );
 
 STATIC
 VOID
 I2cDisable (
-  IN I2C_MASTER_CONTEXT *I2cMasterContext
+  IN I2C_MASTER_CONTEXT  *I2cMasterContext
   );
 
 STATIC
 EFI_STATUS
 I2cStartEnable (
-  IN I2C_MASTER_CONTEXT *I2cMasterContext,
-  IN UINT32 Con,
-  IN UINTN Timeout
+  IN I2C_MASTER_CONTEXT  *I2cMasterContext,
+  IN UINT32              Con,
+  IN UINTN               Timeout
   );
 
 STATIC
 EFI_STATUS
 I2cStop (
-  IN I2C_MASTER_CONTEXT *I2cMasterContext
+  IN I2C_MASTER_CONTEXT  *I2cMasterContext
   );
 
 STATIC
 EFI_STATUS
 I2cReadOperation (
-  IN I2C_MASTER_CONTEXT *I2cMasterContext,
-  IN UINTN SlaveAddress,
-  IN OUT UINT8 *buf,
-  IN UINTN len,
-  IN OUT UINTN *read,
-  IN UINTN last,
-  IN UINTN delay
+  IN I2C_MASTER_CONTEXT  *I2cMasterContext,
+  IN UINTN               SlaveAddress,
+  IN OUT UINT8           *buf,
+  IN UINTN               len,
+  IN OUT UINTN           *read,
+  IN UINTN               last,
+  IN UINTN               delay
   );
 
 STATIC
 EFI_STATUS
 I2cWriteOperation (
-  IN I2C_MASTER_CONTEXT *I2cMasterContext,
-  IN UINTN SlaveAddress,
-  IN OUT CONST UINT8 *buf,
-  IN UINTN len,
-  IN OUT UINTN *sent,
-  IN UINTN timeout
+  IN I2C_MASTER_CONTEXT  *I2cMasterContext,
+  IN UINTN               SlaveAddress,
+  IN OUT CONST UINT8     *buf,
+  IN UINTN               len,
+  IN OUT UINTN           *sent,
+  IN UINTN               timeout
   );
 
 STATIC
 EFI_STATUS
 EFIAPI
 I2cStartRequest (
-  IN CONST EFI_I2C_MASTER_PROTOCOL *This,
-  IN UINTN                         SlaveAddress,
-  IN EFI_I2C_REQUEST_PACKET        *RequestPacket,
-  IN EFI_EVENT                     Event      OPTIONAL,
-  OUT EFI_STATUS                   *I2cStatus OPTIONAL
+  IN CONST EFI_I2C_MASTER_PROTOCOL  *This,
+  IN UINTN                          SlaveAddress,
+  IN EFI_I2C_REQUEST_PACKET         *RequestPacket,
+  IN EFI_EVENT                      Event      OPTIONAL,
+  OUT EFI_STATUS                    *I2cStatus OPTIONAL
   );
 
 STATIC
 EFI_STATUS
 EFIAPI
 I2cEnumerate (
-  IN CONST EFI_I2C_ENUMERATE_PROTOCOL *This,
-  IN OUT CONST EFI_I2C_DEVICE         **Device
+  IN CONST EFI_I2C_ENUMERATE_PROTOCOL  *This,
+  IN OUT CONST EFI_I2C_DEVICE          **Device
   );
 
 STATIC
 EFI_STATUS
 EFIAPI
 I2cEnableConf (
-  IN CONST EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL *This,
-  IN UINTN                                               I2cBusConfiguration,
-  IN EFI_EVENT                                           Event      OPTIONAL,
-  IN EFI_STATUS                                          *I2cStatus OPTIONAL
+  IN CONST EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL  *This,
+  IN UINTN                                                I2cBusConfiguration,
+  IN EFI_EVENT                                            Event      OPTIONAL,
+  IN EFI_STATUS                                           *I2cStatus OPTIONAL
   );
 
 STATIC
 I2C_VERSION
-I2cGetVersion(
-  IN I2C_MASTER_CONTEXT *I2cMasterContext
+I2cGetVersion (
+  IN I2C_MASTER_CONTEXT  *I2cMasterContext
   );
 
 STATIC
 VOID
 I2cShowRegs (
-  IN I2C_MASTER_CONTEXT *I2cMasterContex
+  IN I2C_MASTER_CONTEXT  *I2cMasterContex
   );
 
 #endif // __RK_I2C_DXE_H__

edk2-rockchip/Silicon/Rockchip/Drivers/I2c/Rk860xRegulatorDxe/Rk860xRegulatorDxe.c

@@ -25,9 +25,9 @@
 
 #include "Rk860xRegulatorDxe.h"
 
-STATIC CONST EFI_GUID I2cGuid = I2C_GUID;
+STATIC CONST EFI_GUID  I2cGuid = I2C_GUID;
 
-EFI_DRIVER_BINDING_PROTOCOL gDriverBindingProtocol = {
+EFI_DRIVER_BINDING_PROTOCOL  gDriverBindingProtocol = {
   Rk860xRegulatorSupported,
   Rk860xRegulatorStart,
   Rk860xRegulatorStop
@@ -36,45 +36,48 @@ EFI_DRIVER_BINDING_PROTOCOL gDriverBindingProtocol = {
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorSupported (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN EFI_HANDLE ControllerHandle,
-  IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN EFI_HANDLE                   ControllerHandle,
+  IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath OPTIONAL
   )
 {
-  EFI_STATUS Status = EFI_UNSUPPORTED;
-  EFI_I2C_IO_PROTOCOL *TmpI2cIo;
-  UINT8 *Rk860xRegulatorAddresses;
-  UINT8 *Rk860xRegulatorBuses;
-  UINTN i;
+  EFI_STATUS           Status = EFI_UNSUPPORTED;
+  EFI_I2C_IO_PROTOCOL  *TmpI2cIo;
+  UINT8                *Rk860xRegulatorAddresses;
+  UINT8                *Rk860xRegulatorBuses;
+  UINTN                i;
 
   Status = gBS->OpenProtocol (
-      ControllerHandle,
-      &gEfiI2cIoProtocolGuid,
-      (VOID **) &TmpI2cIo,
-      gImageHandle,
-      ControllerHandle,
-      EFI_OPEN_PROTOCOL_BY_DRIVER
-      );
-  if (EFI_ERROR(Status)) {
+                  ControllerHandle,
+                  &gEfiI2cIoProtocolGuid,
+                  (VOID **)&TmpI2cIo,
+                  gImageHandle,
+                  ControllerHandle,
+                  EFI_OPEN_PROTOCOL_BY_DRIVER
+                  );
+  if (EFI_ERROR (Status)) {
     return EFI_UNSUPPORTED;
   }
 
   /* get RK860X_REGULATOR devices' addresses from PCD */
   Rk860xRegulatorAddresses = PcdGetPtr (PcdRk860xRegulatorAddresses);
-  Rk860xRegulatorBuses = PcdGetPtr (PcdRk860xRegulatorBuses);
+  Rk860xRegulatorBuses     = PcdGetPtr (PcdRk860xRegulatorBuses);
   if (Rk860xRegulatorAddresses == 0) {
     Status = EFI_UNSUPPORTED;
-    DEBUG((DEBUG_INFO, "Rk860xRegulatorSupported: I2C device found, but it's not RK860X_REGULATOR\n"));
+    DEBUG ((DEBUG_INFO, "Rk860xRegulatorSupported: I2C device found, but it's not RK860X_REGULATOR\n"));
     goto out;
   }
 
   Status = EFI_UNSUPPORTED;
   for (i = 0; Rk860xRegulatorAddresses[i] != '\0'; i++) {
     /* I2C guid must fit and valid DeviceIndex must be provided */
-    if (CompareGuid(TmpI2cIo->DeviceGuid, &I2cGuid) &&
-        TmpI2cIo->DeviceIndex == I2C_DEVICE_INDEX(Rk860xRegulatorBuses[i],
-          Rk860xRegulatorAddresses[i])) {
-      DEBUG ((DEBUG_INFO,  "Rk860xRegulatorSupported: attached to RK860X_REGULATOR device\n"));
+    if (CompareGuid (TmpI2cIo->DeviceGuid, &I2cGuid) &&
+        (TmpI2cIo->DeviceIndex == I2C_DEVICE_INDEX (
+                                    Rk860xRegulatorBuses[i],
+                                    Rk860xRegulatorAddresses[i]
+                                    )))
+    {
+      DEBUG ((DEBUG_INFO, "Rk860xRegulatorSupported: attached to RK860X_REGULATOR device\n"));
       Status = EFI_SUCCESS;
       break;
     }
@@ -82,11 +85,11 @@ Rk860xRegulatorSupported (
 
 out:
   gBS->CloseProtocol (
-      ControllerHandle,
-      &gEfiI2cIoProtocolGuid,
-      gImageHandle,
-      ControllerHandle
-      );
+         ControllerHandle,
+         &gEfiI2cIoProtocolGuid,
+         gImageHandle,
+         ControllerHandle
+         );
 
   return Status;
 }
@@ -95,41 +98,43 @@ STATIC
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorRead (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  IN UINT8 *RegAddress,
-  IN UINT16 RegAddressLength,
-  IN UINT8 *Buffer,
-  IN UINT16 Length
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  IN UINT8                            *RegAddress,
+  IN UINT16                           RegAddressLength,
+  IN UINT8                            *Buffer,
+  IN UINT16                           Length
   )
 {
-  EFI_I2C_REQUEST_PACKET *RequestPacket;
-  UINTN RequestPacketSize;
-  EFI_STATUS Status = EFI_SUCCESS;
-  RK860X_REGULATOR_CONTEXT *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL(This);
+  EFI_I2C_REQUEST_PACKET    *RequestPacket;
+  UINTN                     RequestPacketSize;
+  EFI_STATUS                Status                  = EFI_SUCCESS;
+  RK860X_REGULATOR_CONTEXT  *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
 
-  ASSERT(Rk860xRegulatorContext != NULL);
-  ASSERT(Rk860xRegulatorContext->I2cIo != NULL);
+  ASSERT (Rk860xRegulatorContext != NULL);
+  ASSERT (Rk860xRegulatorContext->I2cIo != NULL);
 
-  RequestPacketSize = sizeof(UINTN) + sizeof (EFI_I2C_OPERATION) * 2;
-  RequestPacket = AllocateZeroPool (RequestPacketSize);
-  if (RequestPacket == NULL)
+  RequestPacketSize = sizeof (UINTN) + sizeof (EFI_I2C_OPERATION) * 2;
+  RequestPacket     = AllocateZeroPool (RequestPacketSize);
+  if (RequestPacket == NULL) {
     return EFI_OUT_OF_RESOURCES;
+  }
 
   RequestPacket->OperationCount = 2;
 
-  RequestPacket->Operation[0].Flags = 0;
+  RequestPacket->Operation[0].Flags         = 0;
   RequestPacket->Operation[0].LengthInBytes = RegAddressLength;
-  RequestPacket->Operation[0].Buffer = RegAddress;
+  RequestPacket->Operation[0].Buffer        = RegAddress;
 
-  RequestPacket->Operation[1].Flags = I2C_FLAG_READ;
+  RequestPacket->Operation[1].Flags         = I2C_FLAG_READ;
   RequestPacket->Operation[1].LengthInBytes = Length;
-  RequestPacket->Operation[1].Buffer = Buffer;
+  RequestPacket->Operation[1].Buffer        = Buffer;
 
-  Status = Rk860xRegulatorContext->I2cIo->QueueRequest(Rk860xRegulatorContext->I2cIo, 0, NULL, RequestPacket, NULL);
-  if (EFI_ERROR(Status))
-    DEBUG((DEBUG_INFO, "Rk860xRegulatorRead: error %d during transmission\n", Status));
+  Status = Rk860xRegulatorContext->I2cIo->QueueRequest (Rk860xRegulatorContext->I2cIo, 0, NULL, RequestPacket, NULL);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_INFO, "Rk860xRegulatorRead: error %d during transmission\n", Status));
+  }
 
-  FreePool(RequestPacket);
+  FreePool (RequestPacket);
 
   return Status;
 }
@@ -138,50 +143,55 @@ STATIC
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorWrite (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  IN UINT8 *RegAddress,
-  IN UINT16 RegAddressLength,
-  IN UINT8 *Buffer,
-  IN UINT16 Length
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  IN UINT8                            *RegAddress,
+  IN UINT16                           RegAddressLength,
+  IN UINT8                            *Buffer,
+  IN UINT16                           Length
   )
 {
-  EFI_I2C_REQUEST_PACKET *RequestPacket;
-  UINTN RequestPacketSize;
-  EFI_STATUS Status = EFI_SUCCESS;
-  RK860X_REGULATOR_CONTEXT *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL(This);
-  UINT8 *Data;
-  UINT16 i;
+  EFI_I2C_REQUEST_PACKET    *RequestPacket;
+  UINTN                     RequestPacketSize;
+  EFI_STATUS                Status                  = EFI_SUCCESS;
+  RK860X_REGULATOR_CONTEXT  *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
+  UINT8                     *Data;
+  UINT16                    i;
 
-  ASSERT(Rk860xRegulatorContext != NULL);
-  ASSERT(Rk860xRegulatorContext->I2cIo != NULL);
+  ASSERT (Rk860xRegulatorContext != NULL);
+  ASSERT (Rk860xRegulatorContext->I2cIo != NULL);
 
-  RequestPacketSize = sizeof(UINTN) + sizeof (EFI_I2C_OPERATION);
-  RequestPacket = AllocateZeroPool (RequestPacketSize);
-  if (RequestPacket == NULL)
+  RequestPacketSize = sizeof (UINTN) + sizeof (EFI_I2C_OPERATION);
+  RequestPacket     = AllocateZeroPool (RequestPacketSize);
+  if (RequestPacket == NULL) {
     return EFI_OUT_OF_RESOURCES;
+  }
 
-  Data = AllocateZeroPool ( RegAddressLength + Length );
-  if (Data == NULL)
+  Data = AllocateZeroPool (RegAddressLength + Length);
+  if (Data == NULL) {
     return EFI_OUT_OF_RESOURCES;
+  }
 
-  for (i = 0; i < RegAddressLength; i++)
+  for (i = 0; i < RegAddressLength; i++) {
     Data[i] = RegAddress[i] & 0xff;
+  }
 
-  for (i = RegAddressLength; i < RegAddressLength + Length; i++)
+  for (i = RegAddressLength; i < RegAddressLength + Length; i++) {
     Data[i] = Buffer[i - RegAddressLength] & 0xff;
+  }
 
   RequestPacket->OperationCount = 1;
 
-  RequestPacket->Operation[0].Flags = 0;
+  RequestPacket->Operation[0].Flags         = 0;
   RequestPacket->Operation[0].LengthInBytes = RegAddressLength + Length;
-  RequestPacket->Operation[0].Buffer = Data;
+  RequestPacket->Operation[0].Buffer        = Data;
 
-  Status = Rk860xRegulatorContext->I2cIo->QueueRequest(Rk860xRegulatorContext->I2cIo, 0, NULL, RequestPacket, NULL);
-  if (EFI_ERROR(Status))
-    DEBUG((DEBUG_INFO, "Rk860xRegulatorWrite: error %d during transmission\n", Status));
+  Status = Rk860xRegulatorContext->I2cIo->QueueRequest (Rk860xRegulatorContext->I2cIo, 0, NULL, RequestPacket, NULL);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_INFO, "Rk860xRegulatorWrite: error %d during transmission\n", Status));
+  }
 
-  FreePool(Data);
-  FreePool(RequestPacket);
+  FreePool (Data);
+  FreePool (RequestPacket);
 
   return Status;
 }
@@ -190,71 +200,83 @@ STATIC
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorReadRegister (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  IN UINT8 Address,
-  OUT UINT8 *Value
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  IN UINT8                            Address,
+  OUT UINT8                           *Value
   )
 {
-  return Rk860xRegulatorRead(This, &Address, sizeof(UINT8), 
-                             Value, sizeof(UINT8));
+  return Rk860xRegulatorRead (
+           This,
+           &Address,
+           sizeof (UINT8),
+           Value,
+           sizeof (UINT8)
+           );
 }
 
 STATIC
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorWriteRegister (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  IN UINT8 Address,
-  IN UINT8 Value
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  IN UINT8                            Address,
+  IN UINT8                            Value
   )
 {
-  return Rk860xRegulatorWrite(This, &Address, sizeof(UINT8),
-                              &Value, sizeof(UINT8)); 
+  return Rk860xRegulatorWrite (
+           This,
+           &Address,
+           sizeof (UINT8),
+           &Value,
+           sizeof (UINT8)
+           );
 }
 
 STATIC
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorClearAndSetRegister (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  IN UINT8 Address,
-  IN UINT8 Clear,
-  IN UINT8 Set
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  IN UINT8                            Address,
+  IN UINT8                            Clear,
+  IN UINT8                            Set
   )
 {
-  UINT8 Value;
-  EFI_STATUS Status = EFI_SUCCESS;
-  
-  Status = Rk860xRegulatorReadRegister(This, Address, &Value);
-  if (EFI_ERROR(Status)) {
+  UINT8       Value;
+  EFI_STATUS  Status = EFI_SUCCESS;
+
+  Status = Rk860xRegulatorReadRegister (This, Address, &Value);
+  if (EFI_ERROR (Status)) {
     return Status;
   }
 
   Value = (Value & ~Clear) | Set;
-  
-  return Rk860xRegulatorWriteRegister(This, Address, Value);
+
+  return Rk860xRegulatorWriteRegister (This, Address, Value);
 }
 
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorGetVoltage (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  OUT UINT32 *Voltage,
-  IN BOOLEAN Suspend
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  OUT UINT32                          *Voltage,
+  IN BOOLEAN                          Suspend
   )
 {
-  UINT8 Value;
-  RK860X_REGULATOR_CONTEXT *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
-  EFI_STATUS Status = EFI_SUCCESS;
+  UINT8                     Value;
+  RK860X_REGULATOR_CONTEXT  *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
+  EFI_STATUS                Status                  = EFI_SUCCESS;
 
-  Status = Rk860xRegulatorReadRegister (This, 
-            Suspend ? Rk860xRegulatorContext->Config.SleepReg : Rk860xRegulatorContext->Config.VolReg, 
-            &Value);
-  if (EFI_ERROR(Status)) {
+  Status = Rk860xRegulatorReadRegister (
+             This,
+             Suspend ? Rk860xRegulatorContext->Config.SleepReg : Rk860xRegulatorContext->Config.VolReg,
+             &Value
+             );
+  if (EFI_ERROR (Status)) {
     return Status;
   }
 
-  Value &= Rk860xRegulatorContext->Config.VolMask;
+  Value   &= Rk860xRegulatorContext->Config.VolMask;
   *Voltage = (Value * Rk860xRegulatorContext->Config.VselStep) + Rk860xRegulatorContext->Config.VselMin;
 
   return Status;
@@ -263,37 +285,42 @@ Rk860xRegulatorGetVoltage (
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorSetVoltage (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  IN UINT32 Voltage,
-  IN BOOLEAN Suspend
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  IN UINT32                           Voltage,
+  IN BOOLEAN                          Suspend
   )
 {
-  UINT8 Value;
-  RK860X_REGULATOR_CONTEXT *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
+  UINT8                     Value;
+  RK860X_REGULATOR_CONTEXT  *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
 
   Value = (Voltage - Rk860xRegulatorContext->Config.VselMin) / Rk860xRegulatorContext->Config.VselStep;
 
-  return Rk860xRegulatorClearAndSetRegister (This, 
-          Suspend ? Rk860xRegulatorContext->Config.SleepReg : Rk860xRegulatorContext->Config.VolReg,
-          Rk860xRegulatorContext->Config.VolMask, Value);
+  return Rk860xRegulatorClearAndSetRegister (
+           This,
+           Suspend ? Rk860xRegulatorContext->Config.SleepReg : Rk860xRegulatorContext->Config.VolReg,
+           Rk860xRegulatorContext->Config.VolMask,
+           Value
+           );
 }
 
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorGetEnable (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  OUT BOOLEAN *Enable,
-  IN BOOLEAN Suspend
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  OUT BOOLEAN                         *Enable,
+  IN BOOLEAN                          Suspend
   )
 {
-  UINT8 Value;
-  RK860X_REGULATOR_CONTEXT *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
-  EFI_STATUS Status = EFI_SUCCESS;
+  UINT8                     Value;
+  RK860X_REGULATOR_CONTEXT  *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
+  EFI_STATUS                Status                  = EFI_SUCCESS;
 
-  Status = Rk860xRegulatorReadRegister (This, 
-            Suspend ? Rk860xRegulatorContext->Config.SleepEnReg : Rk860xRegulatorContext->Config.EnReg, 
-            &Value);
-  if (EFI_ERROR(Status)) {
+  Status = Rk860xRegulatorReadRegister (
+             This,
+             Suspend ? Rk860xRegulatorContext->Config.SleepEnReg : Rk860xRegulatorContext->Config.EnReg,
+             &Value
+             );
+  if (EFI_ERROR (Status)) {
     return Status;
   }
 
@@ -305,61 +332,65 @@ Rk860xRegulatorGetEnable (
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorSetEnable (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  IN BOOLEAN Enable,
-  IN BOOLEAN Suspend
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  IN BOOLEAN                          Enable,
+  IN BOOLEAN                          Suspend
   )
 {
-  UINT8 Value;
-  RK860X_REGULATOR_CONTEXT *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
+  UINT8                     Value;
+  RK860X_REGULATOR_CONTEXT  *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
 
   Value = Enable ? RK860X_VSEL_BUCK_EN : 0;
 
-  return Rk860xRegulatorClearAndSetRegister (This, 
-          Suspend ? Rk860xRegulatorContext->Config.SleepEnReg : Rk860xRegulatorContext->Config.EnReg,
-          RK860X_VSEL_BUCK_EN, Value);
+  return Rk860xRegulatorClearAndSetRegister (
+           This,
+           Suspend ? Rk860xRegulatorContext->Config.SleepEnReg : Rk860xRegulatorContext->Config.EnReg,
+           RK860X_VSEL_BUCK_EN,
+           Value
+           );
 }
 
 STATIC
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorInitConfig (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This
   )
 {
-  UINT8 ChipId;
-  RK860X_REGULATOR_CONTEXT *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
-  EFI_STATUS Status = EFI_SUCCESS;
-  
+  UINT8                     ChipId;
+  RK860X_REGULATOR_CONTEXT  *Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (This);
+  EFI_STATUS                Status                  = EFI_SUCCESS;
+
   Status = Rk860xRegulatorReadRegister (This, RK860X_ID1, &ChipId);
-  if (EFI_ERROR(Status)) {
+  if (EFI_ERROR (Status)) {
     return Status;
   }
+
   ChipId &= RK860X_DIE_ID_MASK;
 
   switch (ChipId) {
     case RK860X_CHIP_ID_00_01:
-      Rk860xRegulatorContext->Config.VselMin = 712500;
-      Rk860xRegulatorContext->Config.VselStep = 12500;
+      Rk860xRegulatorContext->Config.VselMin     = 712500;
+      Rk860xRegulatorContext->Config.VselStep    = 12500;
       Rk860xRegulatorContext->Config.NumVoltages = RK860X_NVOLTAGES_64;
-      Rk860xRegulatorContext->Config.VolMask = RK860X_VSEL_A_NSEL_MASK;
-      Rk860xRegulatorContext->Config.SleepReg = RK860X_VSEL1_A;
-      Rk860xRegulatorContext->Config.VolReg = RK860X_VSEL0_A;
-      Rk860xRegulatorContext->Config.EnReg = RK860X_VSEL0_A;
-      Rk860xRegulatorContext->Config.SleepEnReg = RK860X_VSEL1_A;
+      Rk860xRegulatorContext->Config.VolMask     = RK860X_VSEL_A_NSEL_MASK;
+      Rk860xRegulatorContext->Config.SleepReg    = RK860X_VSEL1_A;
+      Rk860xRegulatorContext->Config.VolReg      = RK860X_VSEL0_A;
+      Rk860xRegulatorContext->Config.EnReg       = RK860X_VSEL0_A;
+      Rk860xRegulatorContext->Config.SleepEnReg  = RK860X_VSEL1_A;
       break;
     case RK860X_CHIP_ID_02_03:
-      Rk860xRegulatorContext->Config.VselMin = 500000;
-      Rk860xRegulatorContext->Config.VselStep = 6250;
+      Rk860xRegulatorContext->Config.VselMin     = 500000;
+      Rk860xRegulatorContext->Config.VselStep    = 6250;
       Rk860xRegulatorContext->Config.NumVoltages = RK860X_NVOLTAGES_160;
-      Rk860xRegulatorContext->Config.VolMask = RK860X_VSEL_B_NSEL_MASK;
-      Rk860xRegulatorContext->Config.SleepReg = RK860X_VSEL1_B;
-      Rk860xRegulatorContext->Config.VolReg = RK860X_VSEL0_B;
-      Rk860xRegulatorContext->Config.EnReg = RK860X_VSEL0_A;
-      Rk860xRegulatorContext->Config.SleepEnReg = RK860X_VSEL1_A;
+      Rk860xRegulatorContext->Config.VolMask     = RK860X_VSEL_B_NSEL_MASK;
+      Rk860xRegulatorContext->Config.SleepReg    = RK860X_VSEL1_B;
+      Rk860xRegulatorContext->Config.VolReg      = RK860X_VSEL0_B;
+      Rk860xRegulatorContext->Config.EnReg       = RK860X_VSEL0_A;
+      Rk860xRegulatorContext->Config.SleepEnReg  = RK860X_VSEL1_A;
       break;
     default:
-      DEBUG((DEBUG_ERROR, "Rk860xRegulatorInitConfig: unsupported chip id %u\n", ChipId));
+      DEBUG ((DEBUG_ERROR, "Rk860xRegulatorInitConfig: unsupported chip id %u\n", ChipId));
       return EFI_UNSUPPORTED;
   }
 
@@ -369,117 +400,123 @@ Rk860xRegulatorInitConfig (
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorStart (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN EFI_HANDLE ControllerHandle,
-  IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN EFI_HANDLE                   ControllerHandle,
+  IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath OPTIONAL
   )
 {
-  EFI_STATUS Status = EFI_SUCCESS;
-  RK860X_REGULATOR_CONTEXT *Rk860xRegulatorContext;
-  RK860X_REGULATOR_PROTOCOL *Rk860xRegulatorProtocol;
-  UINT8 *Rk860xRegulatorAddresses;
-  UINTN Rk860xRegulatorAddressesSize;
-  UINT8 *Rk860xRegulatorBuses;
-  UINT8 *Rk860xRegulatorTags;
-  UINT8 *Rk860xRegulatorMinVoltagesPtr;
-  UINTN Rk860xRegulatorMinVoltagesSize;
-  UINT8 *Rk860xRegulatorMaxVoltagesPtr;
-  UINTN Rk860xRegulatorMaxVoltagesSize;
-  UINT32 Index;
+  EFI_STATUS                 Status = EFI_SUCCESS;
+  RK860X_REGULATOR_CONTEXT   *Rk860xRegulatorContext;
+  RK860X_REGULATOR_PROTOCOL  *Rk860xRegulatorProtocol;
+  UINT8                      *Rk860xRegulatorAddresses;
+  UINTN                      Rk860xRegulatorAddressesSize;
+  UINT8                      *Rk860xRegulatorBuses;
+  UINT8                      *Rk860xRegulatorTags;
+  UINT8                      *Rk860xRegulatorMinVoltagesPtr;
+  UINTN                      Rk860xRegulatorMinVoltagesSize;
+  UINT8                      *Rk860xRegulatorMaxVoltagesPtr;
+  UINTN                      Rk860xRegulatorMaxVoltagesSize;
+  UINT32                     Index;
 
-  Rk860xRegulatorContext = AllocateZeroPool (sizeof(RK860X_REGULATOR_CONTEXT));
+  Rk860xRegulatorContext = AllocateZeroPool (sizeof (RK860X_REGULATOR_CONTEXT));
   if (Rk860xRegulatorContext == NULL) {
-    DEBUG((DEBUG_ERROR, "Rk860xRegulator: allocation fail\n"));
+    DEBUG ((DEBUG_ERROR, "Rk860xRegulator: allocation fail\n"));
     return EFI_OUT_OF_RESOURCES;
   }
 
   Rk860xRegulatorProtocol = &Rk860xRegulatorContext->Rk860xRegulatorProtocol;
 
   Rk860xRegulatorContext->ControllerHandle = ControllerHandle;
-  Rk860xRegulatorContext->Signature = RK860X_REGULATOR_SIGNATURE;
+  Rk860xRegulatorContext->Signature        = RK860X_REGULATOR_SIGNATURE;
 
   Rk860xRegulatorProtocol->GetVoltage = Rk860xRegulatorGetVoltage;
   Rk860xRegulatorProtocol->SetVoltage = Rk860xRegulatorSetVoltage;
-  Rk860xRegulatorProtocol->GetEnable = Rk860xRegulatorGetEnable;
-  Rk860xRegulatorProtocol->SetEnable = Rk860xRegulatorSetEnable;
-  
+  Rk860xRegulatorProtocol->GetEnable  = Rk860xRegulatorGetEnable;
+  Rk860xRegulatorProtocol->SetEnable  = Rk860xRegulatorSetEnable;
+
   Status = gBS->OpenProtocol (
-      ControllerHandle,
-      &gEfiI2cIoProtocolGuid,
-      (VOID **) &Rk860xRegulatorContext->I2cIo,
-      gImageHandle,
-      ControllerHandle,
-      EFI_OPEN_PROTOCOL_BY_DRIVER
-      );
-  if (EFI_ERROR(Status)) {
-    DEBUG((DEBUG_ERROR, "Rk860xRegulator: failed to open I2cIo\n"));
-    FreePool(Rk860xRegulatorContext);
+                  ControllerHandle,
+                  &gEfiI2cIoProtocolGuid,
+                  (VOID **)&Rk860xRegulatorContext->I2cIo,
+                  gImageHandle,
+                  ControllerHandle,
+                  EFI_OPEN_PROTOCOL_BY_DRIVER
+                  );
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "Rk860xRegulator: failed to open I2cIo\n"));
+    FreePool (Rk860xRegulatorContext);
     return EFI_UNSUPPORTED;
   }
 
   Rk860xRegulatorProtocol->Identifier = Rk860xRegulatorContext->I2cIo->DeviceIndex;
-  Status = gBS->InstallMultipleProtocolInterfaces (
-      &ControllerHandle,
-      &gRk860xRegulatorProtocolGuid, Rk860xRegulatorProtocol,
-      NULL
-      );
-  if (EFI_ERROR(Status)) {
-    DEBUG((DEBUG_ERROR, "Rk860xRegulator: failed to install RK860X_REGULATOR_PROTOCOL\n"));
+  Status                              = gBS->InstallMultipleProtocolInterfaces (
+                                               &ControllerHandle,
+                                               &gRk860xRegulatorProtocolGuid,
+                                               Rk860xRegulatorProtocol,
+                                               NULL
+                                               );
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "Rk860xRegulator: failed to install RK860X_REGULATOR_PROTOCOL\n"));
     goto fail;
   }
 
   Status = Rk860xRegulatorInitConfig (Rk860xRegulatorProtocol);
-  if (EFI_ERROR(Status)) {
+  if (EFI_ERROR (Status)) {
     goto fail;
   }
 
   Rk860xRegulatorProtocol->SupportedVoltageRange.Min = Rk860xRegulatorContext->Config.VselMin;
-  Rk860xRegulatorProtocol->SupportedVoltageRange.Max = RK860X_MAX_VOLTAGE;                                          
+  Rk860xRegulatorProtocol->SupportedVoltageRange.Max = RK860X_MAX_VOLTAGE;
 
   Rk860xRegulatorProtocol->PreferredVoltageRange = Rk860xRegulatorProtocol->SupportedVoltageRange;
 
-  Rk860xRegulatorAddresses = PcdGetPtr (PcdRk860xRegulatorAddresses);
-  Rk860xRegulatorAddressesSize = PcdGetSize (PcdRk860xRegulatorAddresses);
-  Rk860xRegulatorBuses = PcdGetPtr (PcdRk860xRegulatorBuses);
-  Rk860xRegulatorTags = PcdGetPtr (PcdRk860xRegulatorTags);
-  Rk860xRegulatorMinVoltagesPtr = PcdGetPtr (PcdRk860xRegulatorMinVoltages);
+  Rk860xRegulatorAddresses       = PcdGetPtr (PcdRk860xRegulatorAddresses);
+  Rk860xRegulatorAddressesSize   = PcdGetSize (PcdRk860xRegulatorAddresses);
+  Rk860xRegulatorBuses           = PcdGetPtr (PcdRk860xRegulatorBuses);
+  Rk860xRegulatorTags            = PcdGetPtr (PcdRk860xRegulatorTags);
+  Rk860xRegulatorMinVoltagesPtr  = PcdGetPtr (PcdRk860xRegulatorMinVoltages);
   Rk860xRegulatorMinVoltagesSize = PcdGetSize (PcdRk860xRegulatorMinVoltages);
-  Rk860xRegulatorMaxVoltagesPtr = PcdGetPtr (PcdRk860xRegulatorMaxVoltages);
+  Rk860xRegulatorMaxVoltagesPtr  = PcdGetPtr (PcdRk860xRegulatorMaxVoltages);
   Rk860xRegulatorMaxVoltagesSize = PcdGetSize (PcdRk860xRegulatorMaxVoltages);
 
   for (Index = 0; Rk860xRegulatorAddresses[Index] != '\0'; Index++) {
-    if (Rk860xRegulatorContext->I2cIo->DeviceIndex == I2C_DEVICE_INDEX(Rk860xRegulatorBuses[Index],
-          Rk860xRegulatorAddresses[Index])) { 
-            
+    if (Rk860xRegulatorContext->I2cIo->DeviceIndex == I2C_DEVICE_INDEX (
+                                                        Rk860xRegulatorBuses[Index],
+                                                        Rk860xRegulatorAddresses[Index]
+                                                        ))
+    {
       Rk860xRegulatorProtocol->Tag = Rk860xRegulatorTags[Index];
 
-      Index *= sizeof(UINT32);
+      Index *= sizeof (UINT32);
 
-      if (Rk860xRegulatorMinVoltagesSize / sizeof(UINT32) == Rk860xRegulatorAddressesSize) {
-        Rk860xRegulatorProtocol->PreferredVoltageRange.Min = Rk860xRegulatorMinVoltagesPtr[Index] | 
+      if (Rk860xRegulatorMinVoltagesSize / sizeof (UINT32) == Rk860xRegulatorAddressesSize) {
+        Rk860xRegulatorProtocol->PreferredVoltageRange.Min = Rk860xRegulatorMinVoltagesPtr[Index] |
                                                              Rk860xRegulatorMinVoltagesPtr[Index + 1] << 8 |
                                                              Rk860xRegulatorMinVoltagesPtr[Index + 2] << 16 |
                                                              Rk860xRegulatorMinVoltagesPtr[Index + 3] << 24;
       }
-      if (Rk860xRegulatorMaxVoltagesSize / sizeof(UINT32) == Rk860xRegulatorAddressesSize) {
-        Rk860xRegulatorProtocol->PreferredVoltageRange.Max = Rk860xRegulatorMaxVoltagesPtr[Index] | 
+
+      if (Rk860xRegulatorMaxVoltagesSize / sizeof (UINT32) == Rk860xRegulatorAddressesSize) {
+        Rk860xRegulatorProtocol->PreferredVoltageRange.Max = Rk860xRegulatorMaxVoltagesPtr[Index] |
                                                              Rk860xRegulatorMaxVoltagesPtr[Index + 1] << 8 |
                                                              Rk860xRegulatorMaxVoltagesPtr[Index + 2] << 16 |
                                                              Rk860xRegulatorMaxVoltagesPtr[Index + 3] << 24;
       }
+
       break;
     }
   }
+
   return Status;
 
 fail:
-  FreePool(Rk860xRegulatorContext);
+  FreePool (Rk860xRegulatorContext);
   gBS->CloseProtocol (
-      ControllerHandle,
-      &gEfiI2cIoProtocolGuid,
-      gImageHandle,
-      ControllerHandle
-      );
+         ControllerHandle,
+         &gEfiI2cIoProtocolGuid,
+         gImageHandle,
+         ControllerHandle
+         );
 
   return Status;
 }
@@ -487,20 +524,20 @@ fail:
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorStop (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN  EFI_HANDLE ControllerHandle,
-  IN  UINTN NumberOfChildren,
-  IN  EFI_HANDLE *ChildHandleBuffer OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN  EFI_HANDLE                  ControllerHandle,
+  IN  UINTN                       NumberOfChildren,
+  IN  EFI_HANDLE                  *ChildHandleBuffer OPTIONAL
   )
 {
-  RK860X_REGULATOR_PROTOCOL *Rk860xRegulatorProtocol;
-  EFI_STATUS Status;
-  RK860X_REGULATOR_CONTEXT *Rk860xRegulatorContext;
+  RK860X_REGULATOR_PROTOCOL  *Rk860xRegulatorProtocol;
+  EFI_STATUS                 Status;
+  RK860X_REGULATOR_CONTEXT   *Rk860xRegulatorContext;
 
   Status = gBS->OpenProtocol (
                   ControllerHandle,
                   &gRk860xRegulatorProtocolGuid,
-                  (VOID **) &Rk860xRegulatorProtocol,
+                  (VOID **)&Rk860xRegulatorProtocol,
                   This->DriverBindingHandle,
                   ControllerHandle,
                   EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -509,38 +546,42 @@ Rk860xRegulatorStop (
   if (EFI_ERROR (Status)) {
     return EFI_DEVICE_ERROR;
   }
-  Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL(Rk860xRegulatorProtocol);
+
+  Rk860xRegulatorContext = RK860X_REGULATOR_SC_FROM_PROTOCOL (Rk860xRegulatorProtocol);
 
   gBS->UninstallMultipleProtocolInterfaces (
-      &ControllerHandle,
-      &gRk860xRegulatorProtocolGuid, &Rk860xRegulatorContext->Rk860xRegulatorProtocol,
-      &gEfiDriverBindingProtocolGuid, &gDriverBindingProtocol,
-      NULL
-      );
+         &ControllerHandle,
+         &gRk860xRegulatorProtocolGuid,
+         &Rk860xRegulatorContext->Rk860xRegulatorProtocol,
+         &gEfiDriverBindingProtocolGuid,
+         &gDriverBindingProtocol,
+         NULL
+         );
   gBS->CloseProtocol (
-      ControllerHandle,
-      &gEfiI2cIoProtocolGuid,
-      gImageHandle,
-      ControllerHandle
-      );
-  FreePool(Rk860xRegulatorContext);
+         ControllerHandle,
+         &gEfiI2cIoProtocolGuid,
+         gImageHandle,
+         ControllerHandle
+         );
+  FreePool (Rk860xRegulatorContext);
   return EFI_SUCCESS;
 }
 
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorInitialise (
-  IN EFI_HANDLE ImageHandle,
-  IN EFI_SYSTEM_TABLE *SystemTable
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUS Status;
+  EFI_STATUS  Status;
 
   Status = gBS->InstallMultipleProtocolInterfaces (
-      &ImageHandle,
-      &gEfiDriverBindingProtocolGuid, &gDriverBindingProtocol,
-      NULL
-      );
+                  &ImageHandle,
+                  &gEfiDriverBindingProtocolGuid,
+                  &gDriverBindingProtocol,
+                  NULL
+                  );
 
   return Status;
 }

edk2-rockchip/Silicon/Rockchip/Drivers/I2c/Rk860xRegulatorDxe/Rk860xRegulatorDxe.h

@@ -11,7 +11,7 @@
 
 #include <Uefi.h>
 
-#define RK860X_REGULATOR_SIGNATURE          SIGNATURE_32 ('R', 'K', '8', '6')
+#define RK860X_REGULATOR_SIGNATURE  SIGNATURE_32 ('R', 'K', '8', '6')
 
 #define I2C_GUID \
   { \
@@ -19,102 +19,102 @@
   }
 
 typedef struct {
-	UINT8 VolReg;
-	UINT8 SleepReg;
-	UINT8 EnReg;
-	UINT8 SleepEnReg;
-	UINT8 VolMask;
-	UINT16 NumVoltages;
-	UINT32 VselMin;
-	UINT32 VselStep;
+  UINT8     VolReg;
+  UINT8     SleepReg;
+  UINT8     EnReg;
+  UINT8     SleepEnReg;
+  UINT8     VolMask;
+  UINT16    NumVoltages;
+  UINT32    VselMin;
+  UINT32    VselStep;
 } RK860X_REGULATOR_CONFIG;
 
 typedef struct {
-  UINT32                      Signature;
-  EFI_HANDLE                  ControllerHandle;
-  EFI_I2C_IO_PROTOCOL         *I2cIo;
-  RK860X_REGULATOR_PROTOCOL   Rk860xRegulatorProtocol;
-  RK860X_REGULATOR_CONFIG     Config;
+  UINT32                       Signature;
+  EFI_HANDLE                   ControllerHandle;
+  EFI_I2C_IO_PROTOCOL          *I2cIo;
+  RK860X_REGULATOR_PROTOCOL    Rk860xRegulatorProtocol;
+  RK860X_REGULATOR_CONFIG      Config;
 } RK860X_REGULATOR_CONTEXT;
 
-#define RK860X_REGULATOR_SC_FROM_IO(a) CR (a, RK860X_REGULATOR_CONTEXT, I2cIo, RK860X_REGULATOR_SIGNATURE)
-#define RK860X_REGULATOR_SC_FROM_PROTOCOL(a) CR (a, RK860X_REGULATOR_CONTEXT, Rk860xRegulatorProtocol, RK860X_REGULATOR_SIGNATURE)
+#define RK860X_REGULATOR_SC_FROM_IO(a)        CR (a, RK860X_REGULATOR_CONTEXT, I2cIo, RK860X_REGULATOR_SIGNATURE)
+#define RK860X_REGULATOR_SC_FROM_PROTOCOL(a)  CR (a, RK860X_REGULATOR_CONTEXT, Rk860xRegulatorProtocol, RK860X_REGULATOR_SIGNATURE)
 
 /* Registers & fields */
-#define RK860X_VSEL0_A              0x00
-#define RK860X_VSEL1_A              0x01
-#define RK860X_VSEL0_B              0x06
-#define RK860X_VSEL1_B              0x07
+#define RK860X_VSEL0_A  0x00
+#define RK860X_VSEL1_A  0x01
+#define RK860X_VSEL0_B  0x06
+#define RK860X_VSEL1_B  0x07
 
-#define  RK860X_VSEL_BUCK_EN        BIT7
-#define  RK860X_VSEL_A_NSEL_MASK    0x3F
-#define  RK860X_VSEL_B_NSEL_MASK    0xff
+#define  RK860X_VSEL_BUCK_EN      BIT7
+#define  RK860X_VSEL_A_NSEL_MASK  0x3F
+#define  RK860X_VSEL_B_NSEL_MASK  0xff
 
-#define RK860X_ID1                  0x03
-#define  RK860X_DIE_ID_MASK         0x0F
-#define  RK860X_CHIP_ID_00_01       8
-#define  RK860X_CHIP_ID_02_03       10
+#define RK860X_ID1             0x03
+#define  RK860X_DIE_ID_MASK    0x0F
+#define  RK860X_CHIP_ID_00_01  8
+#define  RK860X_CHIP_ID_02_03  10
 
-#define RK860X_NVOLTAGES_64         64
-#define RK860X_NVOLTAGES_160        160
+#define RK860X_NVOLTAGES_64   64
+#define RK860X_NVOLTAGES_160  160
 
-#define RK860X_MAX_VOLTAGE          1500000
+#define RK860X_MAX_VOLTAGE  1500000
 
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorSupported (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN EFI_HANDLE ControllerHandle,
-  IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN EFI_HANDLE                   ControllerHandle,
+  IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath OPTIONAL
   );
 
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorStart (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN EFI_HANDLE ControllerHandle,
-  IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN EFI_HANDLE                   ControllerHandle,
+  IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath OPTIONAL
   );
 
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorStop (
-  IN EFI_DRIVER_BINDING_PROTOCOL *This,
-  IN  EFI_HANDLE ControllerHandle,
-  IN  UINTN NumberOfChildren,
-  IN  EFI_HANDLE *ChildHandleBuffer OPTIONAL
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,
+  IN  EFI_HANDLE                  ControllerHandle,
+  IN  UINTN                       NumberOfChildren,
+  IN  EFI_HANDLE                  *ChildHandleBuffer OPTIONAL
   );
 
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorGetVoltage (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  OUT UINT32 *Voltage,
-  IN BOOLEAN Suspend
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  OUT UINT32                          *Voltage,
+  IN BOOLEAN                          Suspend
   );
 
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorSetVoltage (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  IN UINT32 Voltage,
-  IN BOOLEAN Suspend
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  IN UINT32                           Voltage,
+  IN BOOLEAN                          Suspend
   );
 
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorGetEnable (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  OUT BOOLEAN *Enable,
-  IN BOOLEAN Suspend
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  OUT BOOLEAN                         *Enable,
+  IN BOOLEAN                          Suspend
   );
 
 EFI_STATUS
 EFIAPI
 Rk860xRegulatorSetEnable (
-  IN CONST RK860X_REGULATOR_PROTOCOL *This,
-  IN BOOLEAN Enable,
-  IN BOOLEAN Suspend
+  IN CONST RK860X_REGULATOR_PROTOCOL  *This,
+  IN BOOLEAN                          Enable,
+  IN BOOLEAN                          Suspend
   );
 
 #endif // __RK860X_REGULATOR_DXE_H__

edk2-rockchip/Silicon/Rockchip/Drivers/LcdGraphicsOutputDxe/DisplayModes.c

@@ -0,0 +1,485 @@
+/** @file
+
+  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "LcdGraphicsOutputDxe.h"
+
+//
+// Common display modes
+// Keep in sync with VarStoreData.h definitions.
+// New entries are added at the bottom.
+//
+STATIC CONST DISPLAY_MODE  mDisplayModes[] = {
+  [DISPLAY_MODE_640_480_60] = /* CEA */      {
+    .Vic         = 1,
+    .OscFreq     = 25175,
+    .HActive     = 640,
+    .HFrontPorch = 16,
+    .HSync       = 96,
+    .HBackPorch  = 48,
+    .HSyncActive = 0,
+    .VActive     = 480,
+    .VFrontPorch = 10,
+    .VSync       = 2,
+    .VBackPorch  = 33,
+    .VSyncActive = 0,
+  },
+  [DISPLAY_MODE_800_600_60] = /* DMT */      {
+    .Vic         = 0,
+    .OscFreq     = 40000,
+    .HActive     = 800,
+    .HFrontPorch = 40,
+    .HSync       = 128,
+    .HBackPorch  = 88,
+    .HSyncActive = 1,
+    .VActive     = 600,
+    .VFrontPorch = 1,
+    .VSync       = 4,
+    .VBackPorch  = 23,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1024_768_60] = /* DMT */     {
+    .Vic         = 0,
+    .OscFreq     = 65000,
+    .HActive     = 1024,
+    .HFrontPorch = 24,
+    .HSync       = 136,
+    .HBackPorch  = 160,
+    .HSyncActive = 0,
+    .VActive     = 768,
+    .VFrontPorch = 3,
+    .VSync       = 6,
+    .VBackPorch  = 29,
+    .VSyncActive = 0,
+  },
+  [DISPLAY_MODE_1152_864_60] = /* CVT */     {
+    .Vic         = 0,
+    .OscFreq     = 81750,
+    .HActive     = 1152,
+    .HFrontPorch = 64,
+    .HSync       = 120,
+    .HBackPorch  = 184,
+    .HSyncActive = 0,
+    .VActive     = 864,
+    .VFrontPorch = 3,
+    .VSync       = 4,
+    .VBackPorch  = 26,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1280_720_60] = /* CEA */     {
+    .Vic         = 4,
+    .OscFreq     = 74250,
+    .HActive     = 1280,
+    .HFrontPorch = 110,
+    .HSync       = 40,
+    .HBackPorch  = 220,
+    .HSyncActive = 1,
+    .VActive     = 720,
+    .VFrontPorch = 5,
+    .VSync       = 5,
+    .VBackPorch  = 20,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1280_768_60] = /* DMT */     {
+    .Vic         = 0,
+    .OscFreq     = 79500,
+    .HActive     = 1280,
+    .HFrontPorch = 64,
+    .HSync       = 128,
+    .HBackPorch  = 192,
+    .HSyncActive = 0,
+    .VActive     = 768,
+    .VFrontPorch = 3,
+    .VSync       = 7,
+    .VBackPorch  = 20,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1280_800_60] = /* DMT */     {
+    .Vic         = 0,
+    .OscFreq     = 83500,
+    .HActive     = 1280,
+    .HFrontPorch = 72,
+    .HSync       = 128,
+    .HBackPorch  = 200,
+    .HSyncActive = 0,
+    .VActive     = 800,
+    .VFrontPorch = 3,
+    .VSync       = 6,
+    .VBackPorch  = 22,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1280_960_60] = /* DMT */     {
+    .Vic         = 0,
+    .OscFreq     = 108000,
+    .HActive     = 1280,
+    .HFrontPorch = 96,
+    .HSync       = 112,
+    .HBackPorch  = 312,
+    .HSyncActive = 1,
+    .VActive     = 960,
+    .VFrontPorch = 1,
+    .VSync       = 3,
+    .VBackPorch  = 36,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1280_1024_60] = /* DMT */    {
+    .Vic         = 0,
+    .OscFreq     = 108000,
+    .HActive     = 1280,
+    .HFrontPorch = 48,
+    .HSync       = 112,
+    .HBackPorch  = 248,
+    .HSyncActive = 1,
+    .VActive     = 1024,
+    .VFrontPorch = 1,
+    .VSync       = 3,
+    .VBackPorch  = 38,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1360_768_60] = /* DMT */     {
+    .Vic         = 0,
+    .OscFreq     = 85500,
+    .HActive     = 1360,
+    .HFrontPorch = 64,
+    .HSync       = 112,
+    .HBackPorch  = 256,
+    .HSyncActive = 1,
+    .VActive     = 768,
+    .VFrontPorch = 3,
+    .VSync       = 6,
+    .VBackPorch  = 18,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1400_1050_60] = /* DMT */    {
+    .Vic         = 0,
+    .OscFreq     = 121750,
+    .HActive     = 1400,
+    .HFrontPorch = 88,
+    .HSync       = 144,
+    .HBackPorch  = 232,
+    .HSyncActive = 0,
+    .VActive     = 1050,
+    .VFrontPorch = 3,
+    .VSync       = 4,
+    .VBackPorch  = 32,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1440_900_60] = /* DMT */     {
+    .Vic         = 0,
+    .OscFreq     = 106500,
+    .HActive     = 1440,
+    .HFrontPorch = 80,
+    .HSync       = 152,
+    .HBackPorch  = 232,
+    .HSyncActive = 0,
+    .VActive     = 900,
+    .VFrontPorch = 3,
+    .VSync       = 6,
+    .VBackPorch  = 25,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1600_900_60] = /* DMT */     {
+    .Vic         = 0,
+    .OscFreq     = 108000,
+    .HActive     = 1600,
+    .HFrontPorch = 24,
+    .HSync       = 80,
+    .HBackPorch  = 96,
+    .HSyncActive = 1,
+    .VActive     = 900,
+    .VFrontPorch = 1,
+    .VSync       = 3,
+    .VBackPorch  = 96,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1600_1200_60] = /* DMT */    {
+    .Vic         = 0,
+    .OscFreq     = 162000,
+    .HActive     = 1600,
+    .HFrontPorch = 64,
+    .HSync       = 192,
+    .HBackPorch  = 304,
+    .HSyncActive = 1,
+    .VActive     = 1200,
+    .VFrontPorch = 1,
+    .VSync       = 3,
+    .VBackPorch  = 46,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1680_1050_60] = /* DMT */    {
+    .Vic         = 0,
+    .OscFreq     = 146250,
+    .HActive     = 1680,
+    .HFrontPorch = 104,
+    .HSync       = 176,
+    .HBackPorch  = 280,
+    .HSyncActive = 0,
+    .VActive     = 1050,
+    .VFrontPorch = 3,
+    .VSync       = 6,
+    .VBackPorch  = 30,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1920_1080_60] = /* CEA */    {
+    .Vic         = 16,
+    .OscFreq     = 148500,
+    .HActive     = 1920,
+    .HFrontPorch = 88,
+    .HSync       = 44,
+    .HBackPorch  = 148,
+    .HSyncActive = 1,
+    .VActive     = 1080,
+    .VFrontPorch = 4,
+    .VSync       = 5,
+    .VBackPorch  = 36,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_1920_1200_60] = /* CVT-RB */ {
+    .Vic         = 0,
+    .OscFreq     = 154000,
+    .HActive     = 1920,
+    .HFrontPorch = 48,
+    .HSync       = 32,
+    .HBackPorch  = 80,
+    .HSyncActive = 1,
+    .VActive     = 1200,
+    .VFrontPorch = 3,
+    .VSync       = 6,
+    .VBackPorch  = 26,
+    .VSyncActive = 0,
+  },
+  [DISPLAY_MODE_2048_1152_60] = /* DMT */    {
+    .Vic         = 0,
+    .OscFreq     = 162000,
+    .HActive     = 2048,
+    .HFrontPorch = 26,
+    .HSync       = 80,
+    .HBackPorch  = 96,
+    .HSyncActive = 1,
+    .VActive     = 1152,
+    .VFrontPorch = 1,
+    .VSync       = 3,
+    .VBackPorch  = 44,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_2560_1080_60] = /* CEA */    {
+    .Vic         = 90,
+    .OscFreq     = 198000,
+    .HActive     = 2560,
+    .HFrontPorch = 248,
+    .HSync       = 44,
+    .HBackPorch  = 148,
+    .HSyncActive = 1,
+    .VActive     = 1080,
+    .VFrontPorch = 4,
+    .VSync       = 5,
+    .VBackPorch  = 11,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_2560_1440_60] = /* CVT-RB */ {
+    .Vic         = 0,
+    .OscFreq     = 241500,
+    .HActive     = 2560,
+    .HFrontPorch = 48,
+    .HSync       = 32,
+    .HBackPorch  = 80,
+    .HSyncActive = 1,
+    .VActive     = 1440,
+    .VFrontPorch = 3,
+    .VSync       = 5,
+    .VBackPorch  = 33,
+    .VSyncActive = 0,
+  },
+  [DISPLAY_MODE_2560_1600_60] = /* CVT-RB */ {
+    .Vic         = 0,
+    .OscFreq     = 268500,
+    .HActive     = 2560,
+    .HFrontPorch = 48,
+    .HSync       = 32,
+    .HBackPorch  = 80,
+    .HSyncActive = 1,
+    .VActive     = 1600,
+    .VFrontPorch = 3,
+    .VSync       = 6,
+    .VBackPorch  = 37,
+    .VSyncActive = 0,
+  },
+  [DISPLAY_MODE_3440_1440_60] = /* CVT-RB */ {
+    .Vic         = 0,
+    .OscFreq     = 319750,
+    .HActive     = 3440,
+    .HFrontPorch = 48,
+    .HSync       = 32,
+    .HBackPorch  = 80,
+    .HSyncActive = 1,
+    .VActive     = 1440,
+    .VFrontPorch = 3,
+    .VSync       = 10,
+    .VBackPorch  = 28,
+    .VSyncActive = 0,
+  },
+  [DISPLAY_MODE_3840_2160_30] = /* CEA */    {
+    .Vic         = 95,
+    .OscFreq     = 297000,
+    .HActive     = 3840,
+    .HFrontPorch = 176,
+    .HSync       = 88,
+    .HBackPorch  = 296,
+    .HSyncActive = 1,
+    .VActive     = 2160,
+    .VFrontPorch = 8,
+    .VSync       = 10,
+    .VBackPorch  = 72,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_3840_2160_60] = /* CEA */    {
+    .Vic         = 97,
+    .OscFreq     = 594000,
+    .HActive     = 3840,
+    .HFrontPorch = 176,
+    .HSync       = 88,
+    .HBackPorch  = 296,
+    .HSyncActive = 1,
+    .VActive     = 2160,
+    .VFrontPorch = 8,
+    .VSync       = 10,
+    .VBackPorch  = 72,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_4096_2160_30] = /* CEA */    {
+    .Vic         = 100,
+    .OscFreq     = 297000,
+    .HActive     = 4096,
+    .HFrontPorch = 88,
+    .HSync       = 88,
+    .HBackPorch  = 128,
+    .HSyncActive = 1,
+    .VActive     = 2160,
+    .VFrontPorch = 8,
+    .VSync       = 10,
+    .VBackPorch  = 72,
+    .VSyncActive = 1,
+  },
+  [DISPLAY_MODE_4096_2160_60] = /* CEA */    {
+    .Vic         = 102,
+    .OscFreq     = 594000,
+    .HActive     = 4096,
+    .HFrontPorch = 88,
+    .HSync       = 88,
+    .HBackPorch  = 128,
+    .HSyncActive = 1,
+    .VActive     = 2160,
+    .VFrontPorch = 8,
+    .VSync       = 10,
+    .VBackPorch  = 72,
+    .VSyncActive = 1,
+  },
+};
+
+STATIC CONST UINT32  mDisplayModesCount = ARRAY_SIZE (mDisplayModes);
+
+UINT32
+GetPredefinedDisplayModesCount (
+  VOID
+  )
+{
+  return mDisplayModesCount;
+}
+
+CONST DISPLAY_MODE *
+GetPredefinedDisplayMode (
+  IN UINT32  Index
+  )
+{
+  if (Index >= mDisplayModesCount) {
+    ASSERT (FALSE);
+    return NULL;
+  }
+
+  return &mDisplayModes[Index];
+}
+
+CONST DISPLAY_MODE *
+GetPredefinedDisplayModeByVic (
+  IN UINT8  Vic
+  )
+{
+  UINT32              Index;
+  CONST DISPLAY_MODE  *PredefinedMode;
+
+  for (Index = 0; Index < mDisplayModesCount; Index++) {
+    PredefinedMode = &mDisplayModes[Index];
+
+    if (PredefinedMode->Vic == Vic) {
+      return PredefinedMode;
+    }
+  }
+
+  return NULL;
+}
+
+CONST DISPLAY_MODE *
+GetPredefinedDisplayModeByResolution (
+  IN UINT32  HorizontalResolution,
+  IN UINT32  VerticalResolution,
+  IN UINT32  RefreshRate
+  )
+{
+  UINT32              Index;
+  CONST DISPLAY_MODE  *PredefinedMode;
+
+  for (Index = 0; Index < mDisplayModesCount; Index++) {
+    PredefinedMode = &mDisplayModes[Index];
+
+    if ((PredefinedMode->HActive == HorizontalResolution) &&
+        (PredefinedMode->VActive == VerticalResolution) &&
+        (DisplayModeVRefresh (PredefinedMode) == RefreshRate))
+    {
+      return PredefinedMode;
+    }
+  }
+
+  return NULL;
+}
+
+CONST DISPLAY_MODE *
+MatchPredefinedDisplayMode (
+  IN CONST DISPLAY_MODE  *DisplayMode,
+  IN UINT32              ClockTolerance
+  )
+{
+  UINT32              Index;
+  CONST DISPLAY_MODE  *PredefinedMode;
+
+  for (Index = 0; Index < mDisplayModesCount; Index++) {
+    PredefinedMode = &mDisplayModes[Index];
+
+    if ((DisplayMode->HActive != PredefinedMode->HActive) ||
+        (DisplayMode->HFrontPorch != PredefinedMode->HFrontPorch) ||
+        (DisplayMode->HSync != PredefinedMode->HSync) ||
+        (DisplayMode->HBackPorch != PredefinedMode->HBackPorch) ||
+        (DisplayMode->HSyncActive != PredefinedMode->HSyncActive) ||
+        (DisplayMode->VActive != PredefinedMode->VActive) ||
+        (DisplayMode->VFrontPorch != PredefinedMode->VFrontPorch) ||
+        (DisplayMode->VSync != PredefinedMode->VSync) ||
+        (DisplayMode->VBackPorch != PredefinedMode->VBackPorch) ||
+        (DisplayMode->VSyncActive != PredefinedMode->VSyncActive) ||
+        (DisplayMode->DenActive != PredefinedMode->DenActive) ||
+        (DisplayMode->ClkActive != PredefinedMode->ClkActive))
+    {
+      continue;
+    }
+
+    if (ABS ((INT32)(DisplayMode->OscFreq - PredefinedMode->OscFreq)) > ClockTolerance) {
+      continue;
+    }
+
+    return PredefinedMode;
+  }
+
+  return NULL;
+}

edk2-rockchip/Silicon/Rockchip/Drivers/LcdGraphicsOutputDxe/Edid.c

@@ -0,0 +1,997 @@
+/** @file
+
+  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "LcdGraphicsOutputDxe.h"
+
+//
+// Standard timing defined by VESA EDID
+//
+CONST EDID_TIMING  mEstablishedTimings[EDID_NUMBER_OF_ESTABLISHED_TIMINGS_BYTES][8] = {
+  //
+  // Established Timing I
+  //
+  {
+    { 800,  600,  60 },
+    { 800,  600,  56 },
+    { 640,  480,  75 },
+    { 640,  480,  72 },
+    { 640,  480,  67 },
+    { 640,  480,  60 },
+    { 720,  400,  88 },
+    { 720,  400,  70 },
+  },
+  {
+    //
+    // Established Timing II
+    //
+    { 1280, 1024, 75 },
+    { 1024, 768,  75 },
+    { 1024, 768,  70 },
+    { 1024, 768,  60 },
+    { 1024, 768,  87 },
+    { 832,  624,  75 },
+    { 800,  600,  75 },
+    { 800,  600,  72 },
+  },
+  //
+  // Established Timing III
+  //
+  {
+    { 1152, 870,  75 },
+    { 0,    0,    0  },
+    { 0,    0,    0  },
+    { 0,    0,    0  },
+    { 0,    0,    0  },
+    { 0,    0,    0  },
+    { 0,    0,    0  },
+    { 0,    0,    0  },
+  }
+};
+
+#define CEA_DATA_OFFSET  4
+#define CEA_DATA_BLOCK_TAG(block)             ((((UINT8 *)(block))[0x00] >> 5) & 0x7)
+#define CEA_DATA_BLOCK_PAYLOAD_LENGTH(block)  ((((UINT8 *)(block))[0x00]) & 0x1f)
+#define CEA_DATA_BLOCK_PAYLOAD(block)         (((UINT8 *)(block)) + 0x01)
+
+#define CEA_DATA_BLOCK_VIDEO     0x02
+#define CEA_DATA_BLOCK_VENDOR    0x03
+#define CEA_DATA_BLOCK_EXTENDED  0x07
+
+#define CEA_DATA_BLOCK_EXTENDED_VCDB     0x00
+#define CEA_DATA_BLOCK_EXTENDED_Y420VDB  0x0E
+#define CEA_DATA_BLOCK_EXTENDED_HF_SCDB  0x79
+
+#define IEEE_OUI_HDMI        0x000c03
+#define IEEE_OUI_HDMI_FORUM  0xc45dd8
+
+STATIC
+BOOLEAN
+CeaIsVideoDataBlock (
+  IN UINT8  *DataBlock
+  )
+{
+  return (CEA_DATA_BLOCK_TAG (DataBlock) == CEA_DATA_BLOCK_VIDEO);
+}
+
+STATIC
+BOOLEAN
+CeaIsVendorDataBlock (
+  IN UINT8   *DataBlock,
+  IN UINT32  Oui
+  )
+{
+  UINT32  DataBlockOui;
+
+  if (CEA_DATA_BLOCK_TAG (DataBlock) != CEA_DATA_BLOCK_VENDOR) {
+    return FALSE;
+  }
+
+  if (CEA_DATA_BLOCK_PAYLOAD_LENGTH (DataBlock) < 3) {
+    return FALSE;
+  }
+
+  DataBlockOui = (DataBlock[3] << 16) | (DataBlock[2] << 8) | DataBlock[1];
+
+  if (DataBlockOui != Oui) {
+    return FALSE;
+  }
+
+  return TRUE;
+}
+
+STATIC
+BOOLEAN
+CeaIsExtendedDataBlock (
+  IN UINT8  *DataBlock,
+  IN UINT8  Tag
+  )
+{
+  if (CEA_DATA_BLOCK_TAG (DataBlock) != CEA_DATA_BLOCK_EXTENDED) {
+    return FALSE;
+  }
+
+  if (CEA_DATA_BLOCK_PAYLOAD_LENGTH (DataBlock) < 1) {
+    return FALSE;
+  }
+
+  if (CEA_DATA_BLOCK_PAYLOAD (DataBlock)[0] != Tag) {
+    return FALSE;
+  }
+
+  return TRUE;
+}
+
+STATIC
+BOOLEAN
+CeaIsHdmiVsdbDataBlock (
+  IN UINT8  *DataBlock
+  )
+{
+  if (!CeaIsVendorDataBlock (DataBlock, IEEE_OUI_HDMI)) {
+    return FALSE;
+  }
+
+  if (CEA_DATA_BLOCK_PAYLOAD_LENGTH (DataBlock) < 5) {
+    return FALSE;
+  }
+
+  return TRUE;
+}
+
+STATIC
+BOOLEAN
+CeaIsVcdbDataBlock (
+  IN UINT8  *DataBlock
+  )
+{
+  if (!CeaIsExtendedDataBlock (DataBlock, CEA_DATA_BLOCK_EXTENDED_VCDB)) {
+    return FALSE;
+  }
+
+  if (CEA_DATA_BLOCK_PAYLOAD_LENGTH (DataBlock) < 2) {
+    return FALSE;
+  }
+
+  return TRUE;
+}
+
+STATIC
+BOOLEAN
+CeaIsY420VdbDataBlock (
+  IN UINT8  *DataBlock
+  )
+{
+  return CeaIsExtendedDataBlock (DataBlock, CEA_DATA_BLOCK_EXTENDED_Y420VDB);
+}
+
+STATIC
+BOOLEAN
+CeaIsHdmiForumScdsDataBlock (
+  IN UINT8  *DataBlock
+  )
+{
+  if (!CeaIsVendorDataBlock (DataBlock, IEEE_OUI_HDMI_FORUM) &&
+      !CeaIsExtendedDataBlock (DataBlock, CEA_DATA_BLOCK_EXTENDED_HF_SCDB))
+  {
+    return FALSE;
+  }
+
+  if (CEA_DATA_BLOCK_PAYLOAD_LENGTH (DataBlock) < 7) {
+    return FALSE;
+  }
+
+  return TRUE;
+}
+
+STATIC
+UINT8
+CeaSvdToVic (
+  IN UINT8  Svd
+  )
+{
+  if (((Svd >= 1) && (Svd <= 64)) || ((Svd >= 129) && (Svd <= 192))) {
+    return Svd & 0x7f;
+  }
+
+  return Svd;
+}
+
+STATIC
+UINT8
+CeaSvdIsNative (
+  IN UINT8  Svd
+  )
+{
+  if (((Svd >= 1) && (Svd <= 64)) || ((Svd >= 129) && (Svd <= 192))) {
+    return (Svd & 0x80) != 0;
+  }
+
+  return FALSE;
+}
+
+STATIC
+EFI_STATUS
+EdidGetFeaturesCea (
+  IN CONNECTOR_STATE  *ConnectorState
+  )
+{
+  UINT8              *Edid;
+  UINT8              BlockIndex;
+  UINT8              BlockCount;
+  UINT8              DataBlocksEnd;
+  UINT8              DataBlockOffset;
+  UINT8              DataBlockLength;
+  UINT8              *DataBlock;
+  DISPLAY_SINK_INFO  *SinkInfo;
+
+  SinkInfo = &ConnectorState->SinkInfo;
+
+  BlockCount = EDID_GET_BLOCK_COUNT (ConnectorState->Edid);
+
+  for (BlockIndex = 1; BlockIndex < BlockCount; BlockIndex++) {
+    Edid = EDID_BLOCK (ConnectorState->Edid, BlockIndex);
+
+    if ((Edid[0x00] != EDID_EXTENSION_CEA_861) || (Edid[0x01] < 3)) {
+      continue;
+    }
+
+    DataBlocksEnd = Edid[0x02];
+    if (DataBlocksEnd > EDID_BLOCK_SIZE - 1) {
+      continue;
+    }
+
+    for (DataBlockOffset = CEA_DATA_OFFSET; DataBlockOffset < DataBlocksEnd;) {
+      DataBlock       = Edid + DataBlockOffset;
+      DataBlockLength = 1 + CEA_DATA_BLOCK_PAYLOAD_LENGTH (DataBlock);
+
+      if (DataBlockOffset + DataBlockLength > DataBlocksEnd) {
+        break;
+      }
+
+      if (CeaIsVcdbDataBlock (DataBlock)) {
+        if (DataBlock[0x02] & BIT6) {
+          SinkInfo->SelectableRgbRange = TRUE;
+        }
+      } else if (CeaIsHdmiVsdbDataBlock (DataBlock)) {
+        SinkInfo->IsHdmi = TRUE;
+      } else if (CeaIsHdmiForumScdsDataBlock (DataBlock)) {
+        SinkInfo->HdmiInfo.Hdmi20Supported = TRUE;
+
+        if ((DataBlock[0x05] * 5) < 594) {
+          SinkInfo->HdmiInfo.Hdmi20SpeedLimited = TRUE;
+        }
+
+        if (DataBlock[0x06] & BIT7) {
+          SinkInfo->HdmiInfo.ScdcSupported = TRUE;
+        }
+      } else if (CeaIsY420VdbDataBlock (DataBlock)) {
+        //
+        // Determine whether this is a full HDMI 2.0 sink or not.
+        // YCC420-only modes are driven at half their pixel clock.
+        // If a mode with clock rate between 340 and 600 MHz is listed
+        // here, it means the sink is limited to HDMI 1.4 bandwidth.
+        //
+        UINT8  *Svds     = CEA_DATA_BLOCK_PAYLOAD (DataBlock) + 1;
+        UINT8  SvdsCount = CEA_DATA_BLOCK_PAYLOAD_LENGTH (DataBlock) - 1;
+
+        for (UINT8 SvdIndex = 0; SvdIndex < SvdsCount; SvdIndex++) {
+          if (SinkInfo->HdmiInfo.Hdmi20SpeedLimited) {
+            break;
+          }
+
+          UINT8  Vic = CeaSvdToVic (Svds[SvdIndex]);
+
+          switch (Vic) {
+            case 91:    // 2560x1080p @ 100Hz (371.25 MHz)
+            case 92:    // 2560x1080p @ 120Hz (495 MHz)
+            case 96:    // 3840x2160p @ 50Hz  (594 MHz)
+            case 97:    // 3840x2160p @ 60Hz  (594 MHz)
+            case 101:   // 4096x2160p @ 50Hz  (594 MHz)
+            case 102:   // 4096x2160p @ 60Hz  (594 MHz)
+            case 106:   // 3840x2160p @ 50Hz  (594 MHz)
+            case 107:   // 3840x2160p @ 60Hz  (594 MHz)
+            case 114:   // 3840x2160p @ 48Hz  (594 MHz)
+            case 115:   // 4096x2160p @ 48Hz  (594 MHz)
+            case 116:   // 3840x2160p @ 48Hz  (594 MHz)
+            case 121:   // 5120x2160p @ 24Hz  (396 MHz)
+            case 122:   // 5120x2160p @ 25Hz  (396 MHz)
+            case 123:   // 5120x2160p @ 30Hz  (396 MHz)
+              SinkInfo->HdmiInfo.Hdmi20SpeedLimited = TRUE;
+              break;
+            default:
+              DEBUG ((DEBUG_WARN, "%a: Y420VDB: Unexpected VIC %u\n", __func__, Vic));
+              break;
+          }
+        }
+      }
+
+      DataBlockOffset += DataBlockLength;
+    }
+  }
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+EdidGetFeatures (
+  IN CONNECTOR_STATE  *ConnectorState
+  )
+{
+  return EdidGetFeaturesCea (ConnectorState);
+}
+
+STATIC
+VOID
+EdidUpdatePreferredMode (
+  IN CONNECTOR_STATE     *ConnectorState,
+  IN CONST DISPLAY_MODE  *DisplayMode
+  )
+{
+  CopyMem (
+    &ConnectorState->SinkInfo.PreferredMode,
+    DisplayMode,
+    sizeof (DISPLAY_MODE)
+    );
+}
+
+STATIC
+EFI_STATUS
+EdidDetailedTimingToDisplayMode (
+  IN  EDID_DETAILED_TIMING  *DetailedTiming,
+  OUT DISPLAY_MODE          *DisplayMode
+  )
+{
+  if (DetailedTiming->PixelClock == 0) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  if ((DetailedTiming->Features & EdidDetailedTimingFeatureInterlaced) != 0) {
+    return EFI_UNSUPPORTED;
+  }
+
+  if ((DetailedTiming->Features & EdidDetailedTimingFeatureStereoModeMask) != 0) {
+    return EFI_UNSUPPORTED;
+  }
+
+  DisplayMode->Vic = 0;
+
+  DisplayMode->OscFreq =
+    (UINT32)DetailedTiming->PixelClock * EDID_DETAILED_TIMING_CLOCK_RESOLUTION;
+
+  DisplayMode->HActive =
+    ((DetailedTiming->HActiveHiBlankingHi & 0xF0) << 4) | DetailedTiming->HActiveLo;
+
+  DisplayMode->HFrontPorch =
+    ((DetailedTiming->HSyncOffsetHiHSyncWidthHiVSyncOffsetHiSyncWidthHi & 0xC0) << 2) |
+    DetailedTiming->HSyncOffsetLo;
+
+  DisplayMode->HSync =
+    ((DetailedTiming->HSyncOffsetHiHSyncWidthHiVSyncOffsetHiSyncWidthHi & 0x30) << 4) |
+    DetailedTiming->HSyncWidthLo;
+
+  DisplayMode->HBackPorch =
+    (((DetailedTiming->HActiveHiBlankingHi & 0x0F) << 8) | DetailedTiming->HBlankingLo) -
+    (DisplayMode->HFrontPorch + DisplayMode->HSync);
+
+  DisplayMode->HSyncActive =
+    (DetailedTiming->Features & EdidDetailedTimingFeatureHorizontalSyncPositive) != 0;
+
+  DisplayMode->VActive =
+    ((DetailedTiming->VActiveHiBlankingHi & 0xF0) << 4) | DetailedTiming->VActiveLo;
+
+  DisplayMode->VFrontPorch =
+    ((DetailedTiming->HSyncOffsetHiHSyncWidthHiVSyncOffsetHiSyncWidthHi & 0x0C) << 2) |
+    (DetailedTiming->VSyncOffsetLoSyncWidthLo & 0xF0) >> 4;
+
+  DisplayMode->VSync =
+    ((DetailedTiming->HSyncOffsetHiHSyncWidthHiVSyncOffsetHiSyncWidthHi & 0x03) << 4) |
+    (DetailedTiming->VSyncOffsetLoSyncWidthLo & 0x0F);
+
+  DisplayMode->VBackPorch =
+    (((DetailedTiming->VActiveHiBlankingHi & 0x0F) << 8) | DetailedTiming->VBlankingLo) -
+    (DisplayMode->VFrontPorch + DisplayMode->VSync);
+
+  DisplayMode->VSyncActive =
+    (DetailedTiming->Features & EdidDetailedTimingFeatureVerticalSyncPositive) != 0;
+
+  DisplayMode->DenActive = 0;
+  DisplayMode->ClkActive = 0;
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+EdidDetailedTimingToDisplayModeMatch (
+  IN  EDID_DETAILED_TIMING  *DetailedTiming,
+  OUT DISPLAY_MODE          *DisplayMode
+  )
+{
+  EFI_STATUS          Status;
+  CONST DISPLAY_MODE  *PredefinedMode;
+
+  Status = EdidDetailedTimingToDisplayMode (DetailedTiming, DisplayMode);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  PredefinedMode = MatchPredefinedDisplayMode (
+                     DisplayMode,
+                     (EDID_DETAILED_TIMING_CLOCK_RESOLUTION / 2)
+                     );
+  if (PredefinedMode != NULL) {
+    DisplayMode->Vic = PredefinedMode->Vic;
+
+    if (DisplayMode->OscFreq != PredefinedMode->OscFreq) {
+      DisplayMode->OscFreq = PredefinedMode->OscFreq;
+    }
+  }
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+EdidGetPreferredModeDetailed (
+  IN CONNECTOR_STATE  *ConnectorState
+  )
+{
+  EFI_STATUS            Status;
+  UINT8                 *Edid;
+  UINT8                 BlockIndex;
+  UINT8                 BlockCount;
+  UINT8                 Index;
+  EDID_DETAILED_TIMING  *DetailedTimings;
+  UINT8                 DetailedTimingsCount;
+  DISPLAY_MODE          DisplayMode;
+
+  BlockCount = EDID_GET_BLOCK_COUNT (ConnectorState->Edid);
+
+  for (BlockIndex = 0; BlockIndex < BlockCount; BlockIndex++) {
+    Edid = EDID_BLOCK (ConnectorState->Edid, BlockIndex);
+
+    if (BlockIndex == 0) {
+      DetailedTimings      = ((EDID_BASE *)Edid)->DetailedTimings;
+      DetailedTimingsCount = EDID_NUMBER_OF_DETAILED_TIMINGS;
+    } else {
+      switch (Edid[0x00]) {
+        case EDID_EXTENSION_CEA_861:
+          UINT8  DtdOffset = Edid[0x02];
+          UINT8  DtdEnd    = EDID_BLOCK_SIZE - 1;
+
+          if ((DtdOffset < CEA_DATA_OFFSET) || (DtdOffset >= DtdEnd)) {
+            continue;
+          }
+
+          DetailedTimings      = (EDID_DETAILED_TIMING *)(Edid + DtdOffset);
+          DetailedTimingsCount = (DtdEnd - DtdOffset) / sizeof (EDID_DETAILED_TIMING);
+          break;
+        case EDID_EXTENSION_VTB:
+          if (Edid[0x01] != 1) {
+            continue;
+          }
+
+          DetailedTimings      = (EDID_DETAILED_TIMING *)(Edid + 0x05);
+          DetailedTimingsCount = MIN (Edid[0x02], 6);
+          break;
+        default:
+          continue;
+      }
+    }
+
+    for (Index = 0; Index < DetailedTimingsCount; Index++) {
+      DEBUG ((DEBUG_INFO, "%a: Block %u: DTD %u: ", __func__, BlockIndex, Index));
+
+      Status = EdidDetailedTimingToDisplayModeMatch (
+                 &DetailedTimings[Index],
+                 &DisplayMode
+                 );
+      if (EFI_ERROR (Status)) {
+        DEBUG ((DEBUG_INFO, "- ignoring (%r)\n", Status));
+        continue;
+      }
+
+      DebugPrintDisplayMode (&DisplayMode, 0, TRUE, FALSE);
+
+      if (!IsDisplayModeSupported (ConnectorState, &DisplayMode)) {
+        DEBUG ((DEBUG_INFO, " - ignoring (Unsupported)\n"));
+        continue;
+      }
+
+      DEBUG ((DEBUG_INFO, "\n"));
+
+      EdidUpdatePreferredMode (ConnectorState, &DisplayMode);
+      return EFI_SUCCESS;
+    }
+  }
+
+  return EFI_NOT_FOUND;
+}
+
+STATIC
+CONST DISPLAY_MODE *
+CeaVideoDataBlockGetFirstSupportedMode (
+  IN  CONNECTOR_STATE  *ConnectorState,
+  IN  UINT8            *DataBlock,
+  OUT BOOLEAN          *IsNative
+  )
+{
+  UINT8               *Svds;
+  UINT8               SvdsCount;
+  UINT8               Index;
+  UINT8               Vic;
+  CONST DISPLAY_MODE  *PredefinedMode;
+
+  Svds      = CEA_DATA_BLOCK_PAYLOAD (DataBlock);
+  SvdsCount = CEA_DATA_BLOCK_PAYLOAD_LENGTH (DataBlock);
+
+  for (Index = 0; Index < SvdsCount; Index++) {
+    Vic = CeaSvdToVic (Svds[Index]);
+
+    if (Vic == 0) {
+      continue;
+    }
+
+    DEBUG ((DEBUG_INFO, "%a: VIC %u: ", __func__, Vic));
+
+    PredefinedMode = GetPredefinedDisplayModeByVic (Vic);
+    if (PredefinedMode == NULL) {
+      DEBUG ((DEBUG_INFO, "- ignoring (Not Found)\n"));
+      continue;
+    }
+
+    DebugPrintDisplayMode (PredefinedMode, 0, FALSE, FALSE);
+
+    if (!IsDisplayModeSupported (ConnectorState, PredefinedMode)) {
+      DEBUG ((DEBUG_INFO, " - ignoring (Unsupported)\n"));
+      continue;
+    }
+
+    if (IsNative != NULL) {
+      *IsNative = CeaSvdIsNative (Svds[Index]);
+
+      if (*IsNative) {
+        DEBUG ((DEBUG_INFO, " (Native)"));
+      }
+    }
+
+    DEBUG ((DEBUG_INFO, "\n"));
+
+    return PredefinedMode;
+  }
+
+  return NULL;
+}
+
+STATIC
+CONST DISPLAY_MODE *
+CeaHdmiVsdbDataBlockGetFirstSupportedMode (
+  IN CONNECTOR_STATE  *ConnectorState,
+  IN UINT8            *DataBlock
+  )
+{
+  UINT8               VsdbLength;
+  UINT8               VicsOffset;
+  UINT8               VicsCount;
+  UINT8               Index;
+  UINT8               Vic;
+  CONST DISPLAY_MODE  *PredefinedMode;
+
+  VsdbLength = CEA_DATA_BLOCK_PAYLOAD_LENGTH (DataBlock);
+
+  if ((VsdbLength < 8) || ((DataBlock[8] & BIT5) == 0)) {
+    return NULL;
+  }
+
+  VicsOffset = 15;
+
+  if ((DataBlock[8] & BIT7) == 0) {
+    VicsOffset -= 2;
+  }
+
+  if ((DataBlock[8] & BIT6) == 0) {
+    VicsOffset -= 2;
+  }
+
+  if (VsdbLength < VicsOffset) {
+    return NULL;
+  }
+
+  VicsCount = DataBlock[VicsOffset - 1] >> 5;
+
+  if (VicsOffset + VicsCount > VsdbLength + 1) {
+    return NULL;
+  }
+
+  for (Index = 0; Index < VicsCount; Index++) {
+    Vic = ConvertHdmiToCeaVic (DataBlock[VicsOffset + Index]);
+
+    if (Vic == 0) {
+      continue;
+    }
+
+    DEBUG ((DEBUG_INFO, "%a: VIC %u: ", __func__, Vic));
+
+    PredefinedMode = GetPredefinedDisplayModeByVic (Vic);
+    if (PredefinedMode == NULL) {
+      DEBUG ((DEBUG_INFO, "- ignoring (Not Found)\n"));
+      continue;
+    }
+
+    DebugPrintDisplayMode (PredefinedMode, 0, FALSE, FALSE);
+
+    if (!IsDisplayModeSupported (ConnectorState, PredefinedMode)) {
+      DEBUG ((DEBUG_INFO, " - ignoring (Unsupported)\n"));
+      continue;
+    }
+
+    DEBUG ((DEBUG_INFO, "\n"));
+
+    return PredefinedMode;
+  }
+
+  return NULL;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+EdidGetPreferredModeCea (
+  IN CONNECTOR_STATE  *ConnectorState
+  )
+{
+  UINT8               *Edid;
+  UINT8               BlockIndex;
+  UINT8               BlockCount;
+  UINT8               DataBlocksEnd;
+  UINT8               DataBlockOffset;
+  UINT8               DataBlockLength;
+  UINT8               *DataBlock;
+  CONST DISPLAY_MODE  *CeaMode = NULL;
+  BOOLEAN             CeaModeIsNative;
+  CONST DISPLAY_MODE  *HdmiMode      = NULL;
+  CONST DISPLAY_MODE  *PreferredMode = NULL;
+
+  BlockCount = EDID_GET_BLOCK_COUNT (ConnectorState->Edid);
+
+  for (BlockIndex = 1; BlockIndex < BlockCount; BlockIndex++) {
+    Edid = EDID_BLOCK (ConnectorState->Edid, BlockIndex);
+
+    if ((Edid[0x00] != EDID_EXTENSION_CEA_861) || (Edid[0x01] < 3)) {
+      continue;
+    }
+
+    DataBlocksEnd = Edid[0x02];
+    if (DataBlocksEnd > EDID_BLOCK_SIZE - 1) {
+      continue;
+    }
+
+    for (DataBlockOffset = CEA_DATA_OFFSET; DataBlockOffset < DataBlocksEnd;) {
+      DataBlock       = Edid + DataBlockOffset;
+      DataBlockLength = 1 + CEA_DATA_BLOCK_PAYLOAD_LENGTH (DataBlock);
+
+      if (DataBlockOffset + DataBlockLength > DataBlocksEnd) {
+        break;
+      }
+
+      if (CeaIsVideoDataBlock (DataBlock)) {
+        if (CeaMode == NULL) {
+          CeaMode = CeaVideoDataBlockGetFirstSupportedMode (
+                      ConnectorState,
+                      DataBlock,
+                      &CeaModeIsNative
+                      );
+        }
+      } else if (CeaIsHdmiVsdbDataBlock (DataBlock)) {
+        if (HdmiMode == NULL) {
+          HdmiMode = CeaHdmiVsdbDataBlockGetFirstSupportedMode (
+                       ConnectorState,
+                       DataBlock
+                       );
+        }
+      } else {
+        goto NextDataBlock;
+      }
+
+      if ((CeaMode != NULL) && (HdmiMode != NULL)) {
+        goto Exit;
+      }
+
+NextDataBlock:
+      DataBlockOffset += DataBlockLength;
+    }
+  }
+
+Exit:
+  //
+  // Prefer the HDMI mode if the CEA one is neither native nor larger.
+  //
+  if ((HdmiMode != NULL) &&
+      ((CeaMode == NULL) ||
+       (!CeaModeIsNative &&
+        ((HdmiMode->HActive * HdmiMode->VActive > CeaMode->HActive * CeaMode->VActive) ||
+         ((HdmiMode->HActive * HdmiMode->VActive == CeaMode->HActive * CeaMode->VActive) &&
+          (HdmiMode->OscFreq > CeaMode->OscFreq))))))
+  {
+    PreferredMode = HdmiMode;
+  } else if (CeaMode != NULL) {
+    PreferredMode = CeaMode;
+  }
+
+  if (PreferredMode != NULL) {
+    DEBUG ((
+      DEBUG_INFO,
+      "%a: %a: ",
+      __func__,
+      PreferredMode == HdmiMode ? "HDMI" : "CEA"
+      ));
+    DebugPrintDisplayMode (PreferredMode, 0, TRUE, FALSE);
+    DEBUG ((DEBUG_INFO, "\n"));
+
+    EdidUpdatePreferredMode (ConnectorState, PreferredMode);
+    return EFI_SUCCESS;
+  }
+
+  return EFI_NOT_FOUND;
+}
+
+STATIC
+EFI_STATUS
+EdidParseStandardTiming (
+  IN  EDID_STANDARD_TIMING  *StandardTiming,
+  OUT UINT16                *HorizontalResolution,
+  OUT UINT16                *VerticalResolution,
+  OUT UINT8                 *RefreshRate
+  )
+{
+  UINT8  AspectRatio;
+
+  if (((StandardTiming->HorizontalActivePixels == 0x00) &&
+       (StandardTiming->ImageAspectRatioAndrefresh == 0x00)) ||
+      ((StandardTiming->HorizontalActivePixels == 0x01) &&
+       (StandardTiming->ImageAspectRatioAndrefresh == 0x01)) ||
+      ((StandardTiming->HorizontalActivePixels == 0x20) &&
+       (StandardTiming->ImageAspectRatioAndrefresh == 0x20)))
+  {
+    *HorizontalResolution = 0;
+    *VerticalResolution   = 0;
+    *RefreshRate          = 0;
+    return EFI_INVALID_PARAMETER;
+  }
+
+  *HorizontalResolution = (StandardTiming->HorizontalActivePixels + 31) * 8;
+
+  AspectRatio = (StandardTiming->ImageAspectRatioAndrefresh >> 6) & 0x3;
+
+  switch (AspectRatio) {
+    case 0: *VerticalResolution = (*HorizontalResolution * 10) / 16;
+      break;
+    case 1: *VerticalResolution = (*HorizontalResolution * 3) / 4;
+      break;
+    case 2: *VerticalResolution = (*HorizontalResolution * 4) / 5;
+      break;
+    case 3: *VerticalResolution = (*HorizontalResolution * 9) / 16;
+      break;
+    default:
+      break;
+  }
+
+  // WORKAROUND - 1360x768/1366x768 is not a perfect aspect ratio
+  if (((*HorizontalResolution == 1360) && (*VerticalResolution == 765)) ||
+      ((*HorizontalResolution == 1368) && (*VerticalResolution == 769)))
+  {
+    *HorizontalResolution = 1360;
+    *VerticalResolution   = 768;
+  }
+
+  *RefreshRate = (StandardTiming->ImageAspectRatioAndrefresh & 0x1F) + 60;
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+EdidGetPreferredModeStandard (
+  IN CONNECTOR_STATE  *ConnectorState
+  )
+{
+  EFI_STATUS          Status;
+  EDID_BASE           *Edid;
+  UINT8               Index;
+  CONST DISPLAY_MODE  *PredefinedMode;
+  UINT16              HorizontalResolution;
+  UINT16              VerticalResolution;
+  UINT8               RefreshRate;
+
+  Edid = (EDID_BASE *)EDID_BLOCK (ConnectorState->Edid, 0);
+
+  for (Index = 0; Index < EDID_NUMBER_OF_STANDARD_TIMINGS; Index++) {
+    DEBUG ((DEBUG_INFO, "%a: STD %u: ", __func__, Index));
+
+    Status = EdidParseStandardTiming (
+               &Edid->StandardTimings[Index],
+               &HorizontalResolution,
+               &VerticalResolution,
+               &RefreshRate
+               );
+    if (EFI_ERROR (Status)) {
+      DEBUG ((DEBUG_INFO, "- ignoring (%r)\n", Status));
+      continue;
+    }
+
+    PredefinedMode = GetPredefinedDisplayModeByResolution (
+                       HorizontalResolution,
+                       VerticalResolution,
+                       RefreshRate
+                       );
+    if (PredefinedMode == NULL) {
+      DEBUG ((DEBUG_INFO, "- ignoring (Not Found)\n"));
+      continue;
+    }
+
+    DebugPrintDisplayMode (PredefinedMode, 0, TRUE, FALSE);
+
+    if (!IsDisplayModeSupported (ConnectorState, PredefinedMode)) {
+      DEBUG ((DEBUG_INFO, " - ignoring (Unsupported)\n"));
+      continue;
+    }
+
+    DEBUG ((DEBUG_INFO, "\n"));
+
+    EdidUpdatePreferredMode (ConnectorState, PredefinedMode);
+    return EFI_SUCCESS;
+  }
+
+  return EFI_NOT_FOUND;
+}
+
+STATIC
+BOOLEAN
+EdidIsEstablishedModeSupported (
+  IN UINT8   EstablishedTimings[EDID_NUMBER_OF_ESTABLISHED_TIMINGS_BYTES],
+  IN UINT16  HorizontalResolution,
+  IN UINT16  VerticalResolution,
+  IN UINT8   RefreshRate
+  )
+{
+  UINT8              EstByte;
+  UINT8              EstBit;
+  CONST EDID_TIMING  *EstTiming;
+
+  for (EstByte = 0; EstByte < EDID_NUMBER_OF_ESTABLISHED_TIMINGS_BYTES; EstByte++) {
+    for (EstBit = 0; EstBit < 8; EstBit++) {
+      if ((EstablishedTimings[EstByte] & (1 << EstBit)) == 0) {
+        continue;
+      }
+
+      EstTiming = &mEstablishedTimings[EstByte][EstBit];
+
+      if ((EstTiming->HorizontalResolution == HorizontalResolution) &&
+          (EstTiming->VerticalResolution == VerticalResolution) &&
+          (EstTiming->RefreshRate == RefreshRate))
+      {
+        return TRUE;
+      }
+    }
+  }
+
+  return FALSE;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+EdidGetPreferredModeEstablished (
+  IN CONNECTOR_STATE  *ConnectorState
+  )
+{
+  EDID_BASE           *Edid;
+  INT32               Index;
+  CONST DISPLAY_MODE  *PredefinedMode;
+
+  Edid = (EDID_BASE *)EDID_BLOCK (ConnectorState->Edid, 0);
+
+  //
+  // Prefer the largest mode (predefined list is in ascending order).
+  //
+  for (Index = GetPredefinedDisplayModesCount () - 1; Index >= 0; Index--) {
+    PredefinedMode = GetPredefinedDisplayMode (Index);
+
+    if (!EdidIsEstablishedModeSupported (
+           Edid->EstablishedTimings,
+           PredefinedMode->HActive,
+           PredefinedMode->VActive,
+           DisplayModeVRefresh (PredefinedMode)
+           ))
+    {
+      continue;
+    }
+
+    DEBUG ((DEBUG_INFO, "%a: EST: ", __func__));
+    DebugPrintDisplayMode (PredefinedMode, 0, TRUE, FALSE);
+
+    if (!IsDisplayModeSupported (ConnectorState, PredefinedMode)) {
+      DEBUG ((DEBUG_INFO, " - ignoring (Unsupported)\n"));
+      continue;
+    }
+
+    DEBUG ((DEBUG_INFO, "\n"));
+
+    EdidUpdatePreferredMode (ConnectorState, PredefinedMode);
+    return EFI_SUCCESS;
+  }
+
+  return EFI_NOT_FOUND;
+}
+
+typedef
+EFI_STATUS
+(EFIAPI *EDID_GET_PREFERRED_MODE)(
+  IN CONNECTOR_STATE  *ConnectorState
+  );
+
+STATIC EDID_GET_PREFERRED_MODE  mEdidGetPreferredModeOps[] = {
+  EdidGetPreferredModeDetailed,
+  EdidGetPreferredModeCea,
+  EdidGetPreferredModeStandard,
+  EdidGetPreferredModeEstablished,
+};
+
+STATIC
+EFI_STATUS
+EdidGetPreferredMode (
+  IN CONNECTOR_STATE  *ConnectorState
+  )
+{
+  EFI_STATUS  Status;
+  UINT32      Index;
+
+  for (Index = 0; Index < ARRAY_SIZE (mEdidGetPreferredModeOps); Index++) {
+    Status = mEdidGetPreferredModeOps[Index](ConnectorState);
+    if (!EFI_ERROR (Status)) {
+      return EFI_SUCCESS;
+    }
+  }
+
+  return EFI_NOT_FOUND;
+}
+
+EFI_STATUS
+EdidGetDisplaySinkInfo (
+  IN CONNECTOR_STATE  *ConnectorState
+  )
+{
+  EFI_STATUS  Status;
+
+  Status = EdidGetFeatures (ConnectorState);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((
+      DEBUG_ERROR,
+      "%a: Failed to get features. Status=%r\n",
+      __func__,
+      Status
+      ));
+    return Status;
+  }
+
+  Status = EdidGetPreferredMode (ConnectorState);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((
+      DEBUG_ERROR,
+      "%a: Failed to get preferred mode. Status=%r\n",
+      __func__,
+      Status
+      ));
+    return Status;
+  }
+
+  return EFI_SUCCESS;
+}

edk2-rockchip/Silicon/Rockchip/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.h

@@ -2,6 +2,7 @@
 
   Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
   Copyright (c) 2022 Rockchip Electronics Co. Ltd.
+  Copyright (c) 2023-2025, Mario Bălănică <mariobalanica02@gmail.com>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -22,52 +23,33 @@
 #include <Protocol/RockchipCrtcProtocol.h>
 #include <Protocol/RockchipConnectorProtocol.h>
 
-/** The enumeration maps the PL111 LcdBpp values used in the LCD Control
-  Register
-**/
-typedef enum {
-  LcdBitsPerPixel_1 = 0,
-  LcdBitsPerPixel_2,
-  LcdBitsPerPixel_4,
-  LcdBitsPerPixel_8,
-  LcdBitsPerPixel_16_555,
-  LcdBitsPerPixel_24,
-  LcdBitsPerPixel_16_565,
-  LcdBitsPerPixel_12_444,
-  LcdBitsPerPixel_Max
-} LCD_BPP;
+#include <VarStoreData.h>
+
+#define RK_BYTES_PER_PIXEL  (sizeof (UINT32))
 
 //
 // Device structures
 //
 typedef struct {
-  VENDOR_DEVICE_PATH            Guid;
-  EFI_DEVICE_PATH_PROTOCOL      End;
+  VENDOR_DEVICE_PATH          Guid;
+  EFI_DEVICE_PATH_PROTOCOL    End;
 } LCD_GRAPHICS_DEVICE_PATH;
 
 typedef struct {
-  UINT32                                Signature;
-  EFI_HANDLE                            Handle;
-  EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  ModeInfo;
-  EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE     Mode;
-  EFI_GRAPHICS_OUTPUT_PROTOCOL          Gop;
-  LCD_GRAPHICS_DEVICE_PATH              DevicePath;
-  EFI_EVENT                             ExitBootServicesEvent;
+  UINT32                                  Signature;
+  EFI_HANDLE                              Handle;
+  EFI_GRAPHICS_OUTPUT_MODE_INFORMATION    ModeInfo;
+  EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE       Mode;
+  EFI_GRAPHICS_OUTPUT_PROTOCOL            Gop;
+  LCD_GRAPHICS_DEVICE_PATH                DevicePath;
+  DISPLAY_STATE                           *DisplayStates[VOP_OUTPUT_IF_NUMS];
+  UINT32                                  DisplayStatesCount;
+  DISPLAY_MODE                            *DisplayModes;
 } LCD_INSTANCE;
 
 #define LCD_INSTANCE_SIGNATURE  SIGNATURE_32('l', 'c', 'd', '0')
 
-#define LCD_INSTANCE_FROM_GOP_THIS(a)     CR (a, LCD_INSTANCE, Gop, LCD_INSTANCE_SIGNATURE)
-
-//
-// Function Prototypes
-//
-
-VOID
-LcdGraphicsExitBootServicesEvent (
-    IN EFI_EVENT  Event,
-    IN VOID       *Context
-);
+#define LCD_INSTANCE_FROM_GOP_THIS(a)  CR (a, LCD_INSTANCE, Gop, LCD_INSTANCE_SIGNATURE)
 
 EFI_STATUS
 EFIAPI
@@ -76,20 +58,20 @@ LcdGraphicsQueryMode (
   IN  UINT32                                ModeNumber,
   OUT UINTN                                 *SizeOfInfo,
   OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  **Info
-);
+  );
 
 EFI_STATUS
 EFIAPI
 LcdGraphicsSetMode (
   IN EFI_GRAPHICS_OUTPUT_PROTOCOL  *This,
   IN UINT32                        ModeNumber
-);
+  );
 
 EFI_STATUS
 EFIAPI
 LcdGraphicsBlt (
   IN EFI_GRAPHICS_OUTPUT_PROTOCOL       *This,
-  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL  *BltBuffer,     OPTIONAL
+  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL  *BltBuffer  OPTIONAL,
   IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION  BltOperation,
   IN UINTN                              SourceX,
   IN UINTN                              SourceY,
@@ -97,26 +79,61 @@ LcdGraphicsBlt (
   IN UINTN                              DestinationY,
   IN UINTN                              Width,
   IN UINTN                              Height,
-  IN UINTN                              Delta           OPTIONAL
-);
-
-EFI_STATUS
-EFIAPI
-LcdGraphicsGetBpp (
-  IN  UINT32                                ModeNumber,
-  OUT LCD_BPP*                              Bpp
-  );
-
-UINTN
-GetBytesPerPixel (
-  IN  LCD_BPP       Bpp
+  IN UINTN                              Delta       OPTIONAL
   );
 
 EFI_STATUS
 EFIAPI
-GraphicsOutputDxeInitialize (
-  IN EFI_HANDLE         ImageHandle,
-  IN EFI_SYSTEM_TABLE   *SystemTable
-);
+LcdGraphicsBlt90 (
+  IN EFI_GRAPHICS_OUTPUT_PROTOCOL       *This,
+  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL  *BltBuffer  OPTIONAL,
+  IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION  BltOperation,
+  IN UINTN                              SourceX,
+  IN UINTN                              SourceY,
+  IN UINTN                              DestinationX,
+  IN UINTN                              DestinationY,
+  IN UINTN                              Width,
+  IN UINTN                              Height,
+  IN UINTN                              Delta       OPTIONAL
+  );
+
+BOOLEAN
+IsDisplayModeSupported (
+  IN CONNECTOR_STATE     *ConnectorState,
+  IN CONST DISPLAY_MODE  *DisplayMode
+  );
+
+UINT32
+GetPredefinedDisplayModesCount (
+  VOID
+  );
+
+CONST DISPLAY_MODE *
+GetPredefinedDisplayMode (
+  IN UINT32  Index
+  );
+
+CONST DISPLAY_MODE *
+GetPredefinedDisplayModeByVic (
+  IN UINT8  Vic
+  );
+
+CONST DISPLAY_MODE *
+GetPredefinedDisplayModeByResolution (
+  IN UINT32  HorizontalResolution,
+  IN UINT32  VerticalResolution,
+  IN UINT32  RefreshRate
+  );
+
+CONST DISPLAY_MODE *
+MatchPredefinedDisplayMode (
+  IN CONST DISPLAY_MODE  *DisplayMode,
+  IN UINT32              ClockTolerance
+  );
+
+EFI_STATUS
+EdidGetDisplaySinkInfo (
+  IN CONNECTOR_STATE  *ConnectorState
+  );
 
 #endif /* LCD_GRAPHICS_OUTPUT_DXE_H_ */

edk2-rockchip/Silicon/Rockchip/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf

@@ -4,6 +4,7 @@
 #
 #  Copyright (c) 2011 - 2020, Arm Limited. All rights reserved.<BR>
 #  Copyright (c) 2022 Rockchip Electronics Co. Ltd.
+#  Copyright (c) 2023-2025, Mario Bălănică <mariobalanica02@gmail.com>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -18,6 +19,8 @@
   ENTRY_POINT                    = LcdGraphicsOutputDxeInitialize
 
 [Sources.common]
+  DisplayModes.c
+  Edid.c
   LcdGraphicsOutputBlt.c
   LcdGraphicsOutputDxe.c
   LcdGraphicsOutputDxe.h
@@ -31,10 +34,8 @@
   Silicon/Rockchip/RK3588/RK3588.dec
 
 [LibraryClasses]
-  ArmLib
   BaseLib
   BaseMemoryLib
-  CacheMaintenanceLib
   DebugLib
   UefiBootServicesTableLib
   UefiDriverEntryPoint
@@ -47,16 +48,19 @@
   gEfiGraphicsOutputProtocolGuid
   gRockchipCrtcProtocolGuid
   gRockchipConnectorProtocolGuid
-  gRockchipDsiPanelProtocolGuid
 
 [Guids]
   gEfiEndOfDxeEventGroupGuid
 
 [Pcd]
-  gRockchipTokenSpaceGuid.PcdLcdPixelFormat
-
-[FeaturePcd]
-  gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices
+  gRK3588TokenSpaceGuid.PcdDisplayModePreset
+  gRK3588TokenSpaceGuid.PcdDisplayModeCustom
+  gRK3588TokenSpaceGuid.PcdDisplayConnectors
+  gRK3588TokenSpaceGuid.PcdDisplayConnectorsPriority
+  gRK3588TokenSpaceGuid.PcdDisplayForceOutput
+  gRK3588TokenSpaceGuid.PcdDisplayDuplicateOutput
+  gRK3588TokenSpaceGuid.PcdDisplayRotation
 
 [Depex]
-  gEfiCpuArchProtocolGuid
+  gEfiCpuArchProtocolGuid AND
+  gRockchipPlatformConfigAppliedProtocolGuid

edk2-rockchip/Silicon/Rockchip/Drivers/NetworkStackConfigDxe/NetworkStackConfigDxe.c

@@ -0,0 +1,186 @@
+/** @file
+
+  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/HiiLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+
+#include "NetworkStackConfigDxe.h"
+
+extern UINT8  NetworkStackConfigDxeHiiBin[];
+extern UINT8  NetworkStackConfigDxeStrings[];
+
+typedef struct {
+  VENDOR_DEVICE_PATH          VendorDevicePath;
+  EFI_DEVICE_PATH_PROTOCOL    End;
+} HII_VENDOR_DEVICE_PATH;
+
+STATIC HII_VENDOR_DEVICE_PATH  mVendorDevicePath = {
+  {
+    {
+      HARDWARE_DEVICE_PATH,
+      HW_VENDOR_DP,
+      {
+        (UINT8)(sizeof (VENDOR_DEVICE_PATH)),
+        (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8)
+      }
+    },
+    NETWORK_STACK_CONFIG_FORMSET_GUID
+  },
+  {
+    END_DEVICE_PATH_TYPE,
+    END_ENTIRE_DEVICE_PATH_SUBTYPE,
+    {
+      (UINT8)(END_DEVICE_PATH_LENGTH),
+      (UINT8)((END_DEVICE_PATH_LENGTH) >> 8)
+    }
+  }
+};
+
+/**
+  Installs HII page for user configuration.
+
+  @retval EFI_SUCCESS        The operation completed successfully.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+InstallHiiPages (
+  VOID
+  )
+{
+  EFI_STATUS      Status;
+  EFI_HII_HANDLE  HiiHandle;
+  EFI_HANDLE      DriverHandle;
+
+  DriverHandle = NULL;
+  Status       = gBS->InstallMultipleProtocolInterfaces (
+                        &DriverHandle,
+                        &gEfiDevicePathProtocolGuid,
+                        &mVendorDevicePath,
+                        NULL
+                        );
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  HiiHandle = HiiAddPackages (
+                &gNetworkStackConfigFormSetGuid,
+                DriverHandle,
+                NetworkStackConfigDxeStrings,
+                NetworkStackConfigDxeHiiBin,
+                NULL
+                );
+
+  if (HiiHandle == NULL) {
+    gBS->UninstallMultipleProtocolInterfaces (
+           DriverHandle,
+           &gEfiDevicePathProtocolGuid,
+           &mVendorDevicePath,
+           NULL
+           );
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+VOID
+NetworkStackConfigApply (
+  IN NETWORK_STACK_CONFIG_VARSTORE_DATA  *Config
+  )
+{
+  EFI_STATUS  Status;
+  UINT32      Index;
+  EFI_HANDLE  Handle = NULL;
+
+  struct {
+    EFI_GUID    *Protocol;
+    CHAR8       *Name;
+    BOOLEAN     Enabled;
+  } States[] = {
+    { &gNetworkStackEnabledProtocolGuid,         "Network Stack", Config->Enabled         },
+    { &gNetworkStackIpv4EnabledProtocolGuid,     "IPv4 Stack",    Config->Ipv4Enabled     },
+    { &gNetworkStackIpv6EnabledProtocolGuid,     "IPv6 Stack",    Config->Ipv6Enabled     },
+    { &gNetworkStackPxeBootEnabledProtocolGuid,  "PXE Boot",      Config->PxeBootEnabled  },
+    { &gNetworkStackHttpBootEnabledProtocolGuid, "HTTP Boot",     Config->HttpBootEnabled },
+  };
+
+  for (Index = 0; Index < ARRAY_SIZE (States); Index++) {
+    if (States[Index].Enabled) {
+      Status = gBS->InstallMultipleProtocolInterfaces (
+                      &Handle,
+                      States[Index].Protocol,
+                      NULL,
+                      NULL
+                      );
+      ASSERT_EFI_ERROR (Status);
+    } else {
+      DEBUG ((DEBUG_INFO, "%a: %a disabled!\n", __func__, States[Index].Name));
+
+      if (Index == 0) {
+        break;
+      }
+    }
+  }
+}
+
+/**
+  The entry point for NetworkStackConfigDxe driver.
+
+  @param[in] ImageHandle     The image handle of the driver.
+  @param[in] SystemTable     The system table.
+
+  @retval EFI_SUCCESS        The operation completed successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+NetworkStackConfigInitialize (
+  IN  EFI_HANDLE        ImageHandle,
+  IN  EFI_SYSTEM_TABLE  *SystemTable
+  )
+{
+  EFI_STATUS                          Status;
+  UINTN                               Size;
+  NETWORK_STACK_CONFIG_VARSTORE_DATA  Config;
+
+  Config.Enabled         = NETWORK_STACK_ENABLED_DEFAULT;
+  Config.Ipv4Enabled     = NETWORK_STACK_IPV4_ENABLED_DEFAULT;
+  Config.Ipv6Enabled     = NETWORK_STACK_IPV6_ENABLED_DEFAULT;
+  Config.PxeBootEnabled  = NETWORK_STACK_PXE_BOOT_ENABLED_DEFAULT;
+  Config.HttpBootEnabled = NETWORK_STACK_HTTP_BOOT_ENABLED_DEFAULT;
+
+  Size   = sizeof (NETWORK_STACK_CONFIG_VARSTORE_DATA);
+  Status = gRT->GetVariable (
+                  NETWORK_STACK_CONFIG_DATA_VAR_NAME,
+                  &gNetworkStackConfigFormSetGuid,
+                  NULL,
+                  &Size,
+                  &Config
+                  );
+  if (EFI_ERROR (Status)) {
+    Status = gRT->SetVariable (
+                    NETWORK_STACK_CONFIG_DATA_VAR_NAME,
+                    &gNetworkStackConfigFormSetGuid,
+                    EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
+                    Size,
+                    &Config
+                    );
+    ASSERT_EFI_ERROR (Status);
+  }
+
+  NetworkStackConfigApply (&Config);
+
+  return InstallHiiPages ();
+}

edk2-rockchip/Silicon/Rockchip/Drivers/NetworkStackConfigDxe/NetworkStackConfigDxe.h

@@ -0,0 +1,34 @@
+/** @file
+
+  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef NETWORK_STACK_CONFIG_DXE_H_
+#define NETWORK_STACK_CONFIG_DXE_H_
+
+#include <Guid/NetworkStackConfigFormSet.h>
+
+#define NETWORK_STACK_ENABLED_DEFAULT            FixedPcdGetBool(PcdNetworkStackEnabledDefault)
+#define NETWORK_STACK_IPV4_ENABLED_DEFAULT       FixedPcdGetBool(PcdNetworkStackIpv4EnabledDefault)
+#define NETWORK_STACK_IPV6_ENABLED_DEFAULT       FixedPcdGetBool(PcdNetworkStackIpv6EnabledDefault)
+#define NETWORK_STACK_PXE_BOOT_ENABLED_DEFAULT   FixedPcdGetBool(PcdNetworkStackPxeBootEnabledDefault)
+#define NETWORK_STACK_HTTP_BOOT_ENABLED_DEFAULT  FixedPcdGetBool(PcdNetworkStackHttpBootEnabledDefault)
+
+#define NETWORK_STACK_CONFIG_DATA_VAR_NAME  L"NetworkStackConfigData"
+
+#pragma pack (1)
+
+typedef struct {
+  BOOLEAN    Enabled;
+  BOOLEAN    Ipv4Enabled;
+  BOOLEAN    Ipv6Enabled;
+  BOOLEAN    PxeBootEnabled;
+  BOOLEAN    HttpBootEnabled;
+} NETWORK_STACK_CONFIG_VARSTORE_DATA;
+
+#pragma pack ()
+
+#endif // __NETWORK_STACK_CONFIG_DXE_H__

edk2-rockchip/Silicon/Rockchip/Drivers/NetworkStackConfigDxe/NetworkStackConfigDxe.inf

@@ -0,0 +1,55 @@
+## @file
+#
+#  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001B
+  BASE_NAME                      = NetworkStackConfigDxe
+  FILE_GUID                      = e82260af-0b20-43ab-8a33-7fd0c0937656
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  ENTRY_POINT                    = NetworkStackConfigInitialize
+
+[Sources]
+  NetworkStackConfigDxe.c
+  NetworkStackConfigDxe.h
+  NetworkStackConfigDxeHii.uni
+  NetworkStackConfigDxeHii.vfr
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  Silicon/Rockchip/RockchipPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  DevicePathLib
+  HiiLib
+  UefiBootServicesTableLib
+  UefiRuntimeServicesTableLib
+  UefiDriverEntryPoint
+
+[Guids]
+  gNetworkStackConfigFormSetGuid
+
+[Protocols]
+  gNetworkStackEnabledProtocolGuid
+  gNetworkStackIpv4EnabledProtocolGuid
+  gNetworkStackIpv6EnabledProtocolGuid
+  gNetworkStackPxeBootEnabledProtocolGuid
+  gNetworkStackHttpBootEnabledProtocolGuid
+
+[Pcd]
+  gRockchipTokenSpaceGuid.PcdNetworkStackEnabledDefault
+  gRockchipTokenSpaceGuid.PcdNetworkStackIpv4EnabledDefault
+  gRockchipTokenSpaceGuid.PcdNetworkStackIpv6EnabledDefault
+  gRockchipTokenSpaceGuid.PcdNetworkStackPxeBootEnabledDefault
+  gRockchipTokenSpaceGuid.PcdNetworkStackHttpBootEnabledDefault
+
+[Depex]
+  gEfiVariableArchProtocolGuid        AND
+  gEfiVariableWriteArchProtocolGuid

edk2-rockchip/Silicon/Rockchip/Drivers/NetworkStackConfigDxe/NetworkStackConfigDxeHii.uni

@@ -0,0 +1,25 @@
+/** @file
+
+  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#langdef en-US  "English"
+
+#string STR_NULL                                           #language en-US ""
+
+#string STR_FORM_SET_TITLE                                 #language en-US "Network Stack Configuration"
+#string STR_FORM_SET_TITLE_HELP                            #language en-US "Configure the network stack support."
+
+#string STR_NETWORK_STACK_STATE_PROMPT                     #language en-US "Network Stack"
+#string STR_NETWORK_STACK_STATE_HELP                       #language en-US "Enable or disable the UEFI network stack."
+#string STR_NETWORK_STACK_IPV4_STATE_PROMPT                #language en-US " IPv4 Stack"
+#string STR_NETWORK_STACK_IPV4_STATE_HELP                  #language en-US "Enable or disable the UEFI IPv4 network stack."
+#string STR_NETWORK_STACK_IPV6_STATE_PROMPT                #language en-US " IPv6 Stack"
+#string STR_NETWORK_STACK_IPV6_STATE_HELP                  #language en-US "Enable or disable the UEFI IPv6 network stack."
+#string STR_NETWORK_STACK_PXE_BOOT_STATE_PROMPT            #language en-US " PXE Boot"
+#string STR_NETWORK_STACK_PXE_BOOT_STATE_HELP              #language en-US "Enable or disable the UEFI PXE boot support."
+#string STR_NETWORK_STACK_HTTP_BOOT_STATE_PROMPT           #language en-US " HTTP Boot"
+#string STR_NETWORK_STACK_HTTP_BOOT_STATE_HELP             #language en-US "Enable or disable the UEFI HTTP boot support."

edk2-rockchip/Silicon/Rockchip/Drivers/NetworkStackConfigDxe/NetworkStackConfigDxeHii.vfr

@@ -0,0 +1,61 @@
+/** @file
+
+  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi/UefiMultiPhase.h>
+#include <Guid/HiiPlatformSetupFormset.h>
+
+#include "NetworkStackConfigDxe.h"
+
+formset
+  guid      = NETWORK_STACK_CONFIG_FORMSET_GUID,
+  title     = STRING_TOKEN(STR_FORM_SET_TITLE),
+  help      = STRING_TOKEN(STR_FORM_SET_TITLE_HELP),
+  classguid = EFI_HII_PLATFORM_SETUP_FORMSET_GUID,
+
+  efivarstore NETWORK_STACK_CONFIG_VARSTORE_DATA,
+  attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+  name  = NetworkStackConfigData,
+  guid  = NETWORK_STACK_CONFIG_FORMSET_GUID;
+
+  form formid = 1,
+    title  = STRING_TOKEN(STR_FORM_SET_TITLE);
+
+    checkbox varid = NetworkStackConfigData.Enabled,
+      prompt      = STRING_TOKEN(STR_NETWORK_STACK_STATE_PROMPT),
+      help        = STRING_TOKEN(STR_NETWORK_STACK_STATE_HELP),
+      flags       = RESET_REQUIRED,
+      default     = NETWORK_STACK_ENABLED_DEFAULT,
+    endcheckbox;
+    grayoutif ideqval NetworkStackConfigData.Enabled == 0;
+      checkbox varid = NetworkStackConfigData.Ipv4Enabled,
+        prompt      = STRING_TOKEN(STR_NETWORK_STACK_IPV4_STATE_PROMPT),
+        help        = STRING_TOKEN(STR_NETWORK_STACK_IPV4_STATE_HELP),
+        flags       = RESET_REQUIRED,
+        default     = NETWORK_STACK_IPV4_ENABLED_DEFAULT,
+      endcheckbox;
+      checkbox varid = NetworkStackConfigData.Ipv6Enabled,
+        prompt      = STRING_TOKEN(STR_NETWORK_STACK_IPV6_STATE_PROMPT),
+        help        = STRING_TOKEN(STR_NETWORK_STACK_IPV6_STATE_HELP),
+        flags       = RESET_REQUIRED,
+        default     = NETWORK_STACK_IPV6_ENABLED_DEFAULT,
+      endcheckbox;
+      checkbox varid = NetworkStackConfigData.PxeBootEnabled,
+        prompt      = STRING_TOKEN(STR_NETWORK_STACK_PXE_BOOT_STATE_PROMPT),
+        help        = STRING_TOKEN(STR_NETWORK_STACK_PXE_BOOT_STATE_HELP),
+        flags       = RESET_REQUIRED,
+        default     = NETWORK_STACK_PXE_BOOT_ENABLED_DEFAULT,
+      endcheckbox;
+      checkbox varid = NetworkStackConfigData.HttpBootEnabled,
+        prompt      = STRING_TOKEN(STR_NETWORK_STACK_HTTP_BOOT_STATE_PROMPT),
+        help        = STRING_TOKEN(STR_NETWORK_STACK_HTTP_BOOT_STATE_HELP),
+        flags       = RESET_REQUIRED,
+        default     = NETWORK_STACK_HTTP_BOOT_ENABLED_DEFAULT,
+      endcheckbox;
+    endif;
+  endform;
+endformset;

edk2-rockchip/Silicon/Rockchip/Drivers/NetworkStackConfigDxe/NetworkStackEnabledLib.c

@@ -0,0 +1,18 @@
+/** @file
+
+  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h>
+
+RETURN_STATUS
+EFIAPI
+NetworkStackEnabledLibInitialize (
+  VOID
+  )
+{
+  return RETURN_SUCCESS;
+}

edk2-rockchip/Silicon/Rockchip/Drivers/NetworkStackConfigDxe/NetworkStackEnabledLib.inf

@@ -0,0 +1,26 @@
+## @file
+#
+#  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001B
+  BASE_NAME                      = NetworkStackEnabledLib
+  FILE_GUID                      = 5c8672a9-aa5e-48e7-8337-8c69d8cadb82
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = NetworkStackEnabledLib|DXE_DRIVER
+  CONSTRUCTOR                    = NetworkStackEnabledLibInitialize
+
+[Sources]
+  NetworkStackEnabledLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  Silicon/Rockchip/RockchipPkg.dec
+
+[Depex]
+  gNetworkStackEnabledProtocolGuid

edk2-rockchip/Silicon/Rockchip/Drivers/NetworkStackConfigDxe/NetworkStackHttpBootEnabledLib.inf

@@ -0,0 +1,26 @@
+## @file
+#
+#  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001B
+  BASE_NAME                      = NetworkStackHttpBootEnabledLib
+  FILE_GUID                      = dd043385-aef9-45b2-8547-57ef986840fb
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = NetworkStackHttpBootEnabledLib|DXE_DRIVER
+  CONSTRUCTOR                    = NetworkStackEnabledLibInitialize
+
+[Sources]
+  NetworkStackEnabledLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  Silicon/Rockchip/RockchipPkg.dec
+
+[Depex]
+  gNetworkStackHttpBootEnabledProtocolGuid

edk2-rockchip/Silicon/Rockchip/Drivers/NetworkStackConfigDxe/NetworkStackIpv4EnabledLib.inf

@@ -0,0 +1,26 @@
+## @file
+#
+#  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001B
+  BASE_NAME                      = NetworkStackIpv4EnabledLib
+  FILE_GUID                      = 1f1e1253-5f10-4811-b6b1-52c8845a67ad
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = NetworkStackIpv4EnabledLib|DXE_DRIVER
+  CONSTRUCTOR                    = NetworkStackEnabledLibInitialize
+
+[Sources]
+  NetworkStackEnabledLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  Silicon/Rockchip/RockchipPkg.dec
+
+[Depex]
+  gNetworkStackIpv4EnabledProtocolGuid

edk2-rockchip/Silicon/Rockchip/Drivers/NetworkStackConfigDxe/NetworkStackIpv6EnabledLib.inf

@@ -0,0 +1,26 @@
+## @file
+#
+#  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001B
+  BASE_NAME                      = NetworkStackIpv6EnabledLib
+  FILE_GUID                      = a0defbf9-abfa-43b3-93e1-8aeda39fd044
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = NetworkStackIpv6EnabledLib|DXE_DRIVER
+  CONSTRUCTOR                    = NetworkStackEnabledLibInitialize
+
+[Sources]
+  NetworkStackEnabledLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  Silicon/Rockchip/RockchipPkg.dec
+
+[Depex]
+  gNetworkStackIpv6EnabledProtocolGuid

edk2-rockchip/Silicon/Rockchip/Drivers/NetworkStackConfigDxe/NetworkStackPxeBootEnabledLib.inf

@@ -0,0 +1,26 @@
+## @file
+#
+#  Copyright (c) 2025, Mario Bălănică <mariobalanica02@gmail.com>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001B
+  BASE_NAME                      = NetworkStackPxeBootEnabledLib
+  FILE_GUID                      = 942c4990-e0ab-48c6-9f74-9b523252dbe5
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = NetworkStackPxeBootEnabledLib|DXE_DRIVER
+  CONSTRUCTOR                    = NetworkStackEnabledLibInitialize
+
+[Sources]
+  NetworkStackEnabledLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  Silicon/Rockchip/RockchipPkg.dec
+
+[Depex]
+  gNetworkStackPxeBootEnabledProtocolGuid

edk2-rockchip/Silicon/Rockchip/Drivers/OhciDxe/ComponentName.c

@@ -7,10 +7,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
-
 #include "Ohci.h"
 
-
 //
 // EFI Component Name Protocol
 //
@@ -23,19 +21,17 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL  gOhciComponentName =
 //
 // EFI Component Name 2 Protocol
 //
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gOhciComponentName2 = {
-  (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) OhciComponentNameGetDriverName,
-  (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) OhciComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL  gOhciComponentName2 = {
+  (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)OhciComponentNameGetDriverName,
+  (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)OhciComponentNameGetControllerName,
   "en"
 };
 
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mOhciDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE  mOhciDriverNameTable[] = {
   { "eng;en", L"Usb Ohci Driver" },
-  { NULL, NULL }
+  { NULL,     NULL               }
 };
 
-
 /**
   Retrieves a Unicode string that is the user readable name of the driver.
 
@@ -163,11 +159,11 @@ OhciComponentNameGetDriverName (
 EFI_STATUS
 EFIAPI
 OhciComponentNameGetControllerName (
-  IN  EFI_COMPONENT_NAME_PROTOCOL                     *This,
-  IN  EFI_HANDLE                                      ControllerHandle,
-  IN  EFI_HANDLE                                      ChildHandle        OPTIONAL,
-  IN  CHAR8                                           *Language,
-  OUT CHAR16                                          **ControllerName
+  IN  EFI_COMPONENT_NAME_PROTOCOL  *This,
+  IN  EFI_HANDLE                   ControllerHandle,
+  IN  EFI_HANDLE                   ChildHandle        OPTIONAL,
+  IN  CHAR8                        *Language,
+  OUT CHAR16                       **ControllerName
   )
 {
   EFI_STATUS           Status;
@@ -180,6 +176,7 @@ OhciComponentNameGetControllerName (
   if (ChildHandle != NULL) {
     return EFI_UNSUPPORTED;
   }
+
   //
   // Make sure this driver is currently managing ControllerHandle
   //
@@ -191,13 +188,14 @@ OhciComponentNameGetControllerName (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+
   //
   // Get the device context
   //
   Status = gBS->OpenProtocol (
                   ControllerHandle,
                   &gEfiUsbHcProtocolGuid,
-                  (VOID **) &UsbHc,
+                  (VOID **)&UsbHc,
                   gOhciDriverBinding.DriverBindingHandle,
                   ControllerHandle,
                   EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -215,5 +213,4 @@ OhciComponentNameGetControllerName (
            ControllerName,
            (BOOLEAN)(This == &gOhciComponentName)
            );
-
 }