b5b03a7039
Remove variable length arrays
...
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2022-06-28 09:50:55 +02:00
4ee27f11c0
CMake: disallow variable-length-array
...
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2022-06-27 23:22:08 +02:00
09d160910d
remove unused includes
...
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-27 22:59:18 +02:00
a701e28ca5
DrmMM fixtures refactor
...
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-27 22:50:56 +02:00
2d976098f5
Use LogicalStateHelper to program FrontEndState
...
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-27 19:42:54 +02:00
47fa30b419
Simplify code - image create function
...
Reduce number of lines, reduce nested if statements
and others
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2022-06-27 17:46:03 +02:00
3af3185e3c
includes simplification
...
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-27 17:44:14 +02:00
6fc8047eb8
Add DG2 device ids
...
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-27 16:50:15 +02:00
5f7073cdfe
Update OpenGL headers
...
Headers taken from https://github.com/KhronosGroup/OpenGL-Registry
Commit b3bc7018b177445641ebbf05cbd462083018c693
khrplatform.h taken from https://github.com/KhronosGroup/EGL-Registry
Commit 57b4876de0f33677ece92dd9de0ef105ce69139d
Related-to: NEO-7102
Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com >
2022-06-27 16:27:47 +02:00
9bf32b73ec
Introduce debug regkey to enable kmd migration for buffers
...
The new regkey is aimed to test cross-tile migration for buffers,
esp. first touch policy on h/w with support for page faults.
Related-To: NEO-6977
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com >
2022-06-27 16:18:36 +02:00
8ea5bbd3b5
Use DualSubSliceCount to calculate workgroup size
...
Related-To: NEO-5719
Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com >
2022-06-27 15:41:47 +02:00
2c853adac3
Use LogicalStateHelper to program ComputeMode
...
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-27 15:25:55 +02:00
4dff4e165c
includes simplification
...
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-27 15:08:46 +02:00
5236b34629
Set L1 policy globally
...
Related-To: NEO-7003
Add function to control l1 policy for both
stateless and surface state cache.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2022-06-27 14:57:31 +02:00
7aa053199d
Debugger L0: expose DBG register set
...
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com >
2022-06-27 14:19:06 +02:00
14948d3f7c
infra update
...
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-27 14:08:16 +02:00
5bce1eceb1
Remove self cleanup section when using immediate command list
...
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2022-06-27 13:29:52 +02:00
74bca7f12e
Support the uppercase device deprecated acronyms
...
Signed-off-by: Daria Hinz <daria.hinz@intel.com >
2022-06-27 13:15:38 +02:00
0c523b412f
feat(ocloc): concatenate multiple fat binaries
...
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com >
2022-06-27 13:08:51 +02:00
858059a3c0
Reduce unnecessary move constructors calls
...
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2022-06-27 12:49:53 +02:00
eb401b6b13
igc revision update
...
Signed-off-by: ocldev <ocldev@intel.com >
2022-06-27 12:17:32 +02:00
7a1cac0674
Fix EnableCmdQRoundRobindEngineAssign flag
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2022-06-27 11:38:52 +02:00
f31fef4417
Simplify ReferenceTrackedObject API
...
Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com >
2022-06-27 11:27:08 +02:00
48c2aa23db
Fix for conditionally enabled acronyms
...
Signed-off-by: Daria Hinz <daria.hinz@intel.com >
2022-06-27 11:00:36 +02:00
2b0bf074c0
infra update
...
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-25 13:49:08 +02:00
894f90f89e
SysMan:fix device reset
...
The distance from the SGUnit to the Root port is constant.
calculating the Rootport and Cardbus based on this observation.
the root port and card bus are used by Warmreset function to
preserve the PCI config space.
Resolves: LOCI-2899
Signed-off-by: Vilvaraj, T J Vivek <t.j.vivek.vilvaraj@intel.com >
2022-06-25 03:13:52 +02:00
82d3901978
Add ZE_RESULT_WARNING_DROPPED_DATA to ip metrics
...
Related-To: LOCI-3106
Signed-off-by: davidoli <david.olien@intel.com >
2022-06-24 22:48:59 +02:00
4673a98074
includes simplification
...
use HW specific header instead generic one
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-24 22:07:18 +02:00
9f1b13e329
infra update
...
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-24 20:51:29 +02:00
83cab52dc4
Reduce unnecessary copies of memory properties
...
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2022-06-24 16:49:26 +02:00
a20c0b790a
Add multidev black box test
...
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2022-06-24 15:30:14 +02:00
31dbc04f23
L0Debug - capture SurfaceState heaps
...
Related-To: NEO-7103
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2022-06-24 15:05:56 +02:00
94f3e54261
Move semaphore to local memory on XE_HPG
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2022-06-24 14:36:23 +02:00
61b2ee45cd
Use LogicalStateHelper to encode SystemMemoryFence
...
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-24 13:29:58 +02:00
281c98dcf9
Add firmware util interface for sysman windows
...
Related-To: LOCI-3132
Signed-off-by: Mayank Raghuwanshi <mayank.raghuwanshi@intel.com >
2022-06-24 08:42:48 +02:00
b416845fd0
Add dynamic argument black box test
...
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2022-06-23 22:57:01 +02:00
10ef589af9
AOT strings conditionally enabled
...
Signed-off-by: Daria Hinz <daria.hinz@intel.com >
2022-06-23 22:07:31 +02:00
49cc88959a
infra update
...
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-23 20:58:55 +02:00
b1bdd83e13
Disable task count update from wait on regular command lists
...
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2022-06-23 19:56:56 +02:00
00f09513f6
Enhance debugger unit tests
...
- remove unnecessary header includes
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2022-06-23 18:51:32 +02:00
067bc890da
SysMan: clean up ULT's for Temperature Module.
...
Resolves: LOCI-3198
Signed-off-by: Vilvaraj, T J Vivek <t.j.vivek.vilvaraj@intel.com >
2022-06-23 18:38:42 +02:00
113b0378ac
Fix level zero event synchronization in tbx mode
...
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2022-06-23 18:13:11 +02:00
fd867c1621
Update OCL headers
...
Update headers to the OpenCL-Headers-2022.05.18 release:
https://github.com/KhronosGroup/OpenCL-Headers/releases/tag/v2022.05.18
Related-to: NEO-7102
Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com >
2022-06-23 17:07:16 +02:00
c86c518bc4
L0 Debugger Win - read SBA tracking buffer address
...
MMIO will store SBA tracking buffer address for current context.
This change helps in extracting this address and use to read SBA virtual
register.
Related-To: NEO-6765
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com >
2022-06-23 15:02:38 +02:00
4ece30528c
Do not force SingleSliceDispatchCcsMode when dispatch all is enabled
...
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2022-06-23 12:35:48 +02:00
673bf3b553
Move DebuggerL0 to shared
...
Related-To: NEO-7075
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2022-06-23 10:05:45 +02:00
60b88806d5
L0 Windows Debugger - Implement GPU mem read/write
...
Signed-off-by: Yates, Brandon <brandon.yates@intel.com >
2022-06-23 09:28:47 +02:00
153811998f
infra update
...
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2022-06-22 23:21:24 +02:00
0b5269d4ae
Use LogicalStateHelper to program CSR allocation
...
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2022-06-22 21:19:57 +02:00
1bfe42350a
Revert "Disable tlb flush WA on PVC and later"
...
This reverts commit e0c87435e1compute-runtime-validation@intel.com >
2022-06-22 20:09:28 +02:00
