17655e3ed3
[L0][XE_HPC]Perform memcpy on CPU by default
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Related-To: NEO-7237
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-10-05 14:12:39 +02:00
cfd96980a0
Revert "[L0][XE_HPC]Perform memcpy on CPU by default"
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This reverts commit 383f33b482
2022-10-05 08:17:23 +02:00
383f33b482
[L0][XE_HPC]Perform memcpy on CPU by default
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Related-To: NEO-7237
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-10-04 11:39:30 +02:00
71bef6094d
Use max enabled slice in debugger thread mapping
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Signed-off-by: Yates, Brandon <brandon.yates@intel.com>
2022-10-03 18:11:50 +02:00
48824acab2
Improve SBA programming
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-09-30 12:07:16 +02:00
9a1102bb7a
Revert "Add debug flag to enable specific PIPE_CONTROL fields"
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This reverts commit 2e7c90e58f
2022-09-29 10:22:25 +02:00
dc68cf0fe2
Revert "[L0][XE_HPC]Perform memcpy on CPU by default"
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This reverts commit 7ded401615
2022-09-29 08:07:46 +02:00
2e7c90e58f
Add debug flag to enable specific PIPE_CONTROL fields
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FlushSpecificCache equivalent in value:
dcFlushEnable 0b000000000001
renderTargetCacheFlushEnable 0b000000000010
instructionCacheInvalidateEnable 0b000000000100
textureCacheInvalidationEnable 0b000000001000
pipeControlFlushEnable 0b000000010000
vfCacheInvalidationEnable 0b000000100000
constantCacheInvalidationEnable 0b000001000000
stateCacheInvalidationEnable 0b000010000000
tlbInvalidation 0b000100000000
hdcPipelineFlush 0b001000000000
unTypedDataPortCacheFlush 0b010000000000
compressionControlSurfaceCcsFlush 0b100000000000
Setting multiple cache at once for example:
constantCacheInvalidationEnable
textureCacheInvalidationEnable
vfCacheInvalidationEnable 0b000001101000
Related-To: NEO-6049
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
2022-09-28 11:17:03 +02:00
eaa4965ae8
Allocate RTDispatchGlobals as unboxed array
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Previously we used an array-of-pointers approach, but using an
array-of-structures is in some ways simpler.
We also split out the RTStack as a separate allocation.
Related-To: LOCI-2966
Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2022-09-28 03:42:14 +02:00
7ded401615
[L0][XE_HPC]Perform memcpy on CPU by default
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Related-To: NEO-7237
Enable copy on cpu by default.
This commit also changes barrierCounter to bool
barrierCalled
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-09-27 17:32:56 +02:00
ec04de61a7
[L0][XE_HPC]Perform memcpy on CPU for non-usm ptrs
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Related-To: NEO-7237
If size is small enough, it is more efficient to
perform copy through locked ptr on CPU.
This change also introduces experimental flag to
enable this.
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-09-26 13:20:40 +02:00
f5575a1370
Revert "Remove fallback path for PAT index programming"
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This reverts commit faf8d51f6d
2022-09-23 20:46:31 +02:00
6175a3e785
Debug flag to force stateless mocs encryption bit
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-09-23 15:19:26 +02:00
56cb1f757b
programStateBaseAddress: improve code reuse
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Another step towards cleaner callers of
StateBaseAddressHelper<>::programStateBaseAddress.
Export programming state base address into a separate function to
improve code reuse and reduce copy-pasted fragments, which make code
modifications or maintenance more and more difficult over time. Use
specialization for gen-specific variations.
Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-09-21 11:54:57 +02:00
faf8d51f6d
Remove fallback path for PAT index programming
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-09-21 10:46:43 +02:00
efac290ba3
Do not use selector copy engine
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-09-20 21:49:00 +02:00
cfe51ff2ba
Remove not used isSimulation functions
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-09-20 11:01:55 +02:00
3d5e34f727
Reduce the size of masks to 4.
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32 is not required.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-09-19 21:53:40 +02:00
24b1cfbff5
Change internal copy engine to BCS3
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-09-15 16:08:10 +02:00
218a98f7f7
Refactor of pipeline select programming
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Adding new interface to cooperate with hw context state
Simplify programming removing unnecessary functions
Code optimization that stop using expensive call and instead
stores configuration parameter
Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-15 15:38:10 +02:00
cee520b311
simplify systolic mode code and reduce double implementation
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Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-15 11:57:54 +02:00
1f6c09ba1d
zebin: sanitize scratch space size
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Sanitize scratch space size to value programmable on GPU.
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
2022-09-09 11:50:09 +02:00
84872812f2
Remove not used helper
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-09-06 16:02:56 +02:00
16d9000429
Add option to change GRF mode
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-09-06 13:00:17 +02:00
16798467ac
Add api specific config for allocation cache
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Currently disabled for both opencl and level zero
Related-To: NEO-6893
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-09-05 21:15:18 +02:00
0d6bef0753
Add BCS split to api specific config
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-09-05 11:13:10 +02:00
c3f7e40a8d
Rename special pipeline select mode to systolic
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-31 22:16:26 +02:00
399758ef17
Change default engines for BCS split
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-08-31 21:34:36 +02:00
8cc0177f1c
Change DG2 l1 cache policy to WB
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With compiler LSC WAs this gives better performance.
If debugger is active, policy will not be changed ie.
will be WBP.
Related-To: NEO-7003
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-08-31 14:31:23 +02:00
9f2cfc6f9d
Limit files included by fence.h and csr_definitions.h
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This change introduces usage of forward declarations
and removes unneeded includes from the mentioned files.
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-08-30 13:13:40 +02:00
2621460e80
Revert "Change DG2 l1 cache policy to WB"
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This reverts commit a820e73dd7
2022-08-27 08:04:19 +02:00
c0342a0ab5
Optimize binaries' size by adjusting linkage of constants in headers
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When header is included for the first time in translation unit,
then preprocessor simply copy-pastes its content. If we define a
constant in a header file and this constant has internal linkage
then each and every translation unit, which includes this header
will have its own copy of this constant.
C++17 introduces inline variables, which are meant to allow creation
of variables in header files, which do not cause multiple instances.
The inline variable has a single instance when:
- constexpr is used without static (constexpr implicitly implies inline)
- inline is used without static
- inline const is used without static (const does not imply internal linkage
when used with inline)
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-08-26 22:52:04 +02:00
a820e73dd7
Change DG2 l1 cache policy to WB
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With compiler LSC WAs this gives better performance.
If debugger is active, policy will not be changed ie.
will be WBP.
Related-To: NEO-7003
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-08-26 12:58:45 +02:00
f656707fc0
Use hardware support flags for state compute mode state changes
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Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-25 18:46:37 +02:00
a5b4a13452
Revert "Return error when image arg does not support media block commands"
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This reverts commit 8388e6cf4a
2022-08-24 06:23:22 +02:00
595cfebaef
Refactor PIPE_CONTROL programming
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-08-23 13:55:25 +02:00
8388e6cf4a
Return error when image arg does not support media block commands
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Related-To: NEO-7168
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-08-23 12:07:29 +02:00
a6c7f341dd
Improve safety of makeCopy() function
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The mentioned function allocates and copies elements
of size 1. Therefore, the implementation was simplified
and additional check was added to avoid possible UBs.
Signed-off-by: Wrobel, Patryk <patryk.wrobel@intel.com>
2022-08-22 17:16:53 +02:00
82e29fd048
Add bcs split control mask
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Introduce debug variable to control which engines
the tranfser will be split into
Related-To: NEO-7173
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-08-19 13:21:10 +02:00
0011368775
Add parameter to set surface state base address value
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This change introduces capability to set surface state base address
when surface state heap or global base address are not available
Related-To: NEO-7187
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-18 15:36:43 +02:00
aa3a4765b9
Respect ForceAllResourcesUncached flag
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Respect debug flag ForceAllResourcesUncached even when
Override L1 Policy flags are also set
Related-To: NEO-7003
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-08-18 11:46:33 +02:00
dda5b19859
Adjust the implementation of strncpy_s() for Linux
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This change:
- prevents writing memory out of the range of the destination buffer
- prevents calling strlen() with non-null terminated c-string
- corrects the logic, which validates passed range to proceed
when real length fits the destination buffer
Related-To: NEO-7264
Signed-off-by: Wrobel, Patryk <patryk.wrobel@intel.com>
2022-08-17 18:37:46 +02:00
6c38b36251
Unify getting state base address command space from command buffer
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Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-17 11:49:02 +02:00
ceb9d81f87
Add struct argument for input/output in StateBaseAddressHelper
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This refactor makes future interface changes easier
Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-17 10:28:49 +02:00
a00e84ebba
Allocate RTStack based on full-die EU count.
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Related-To: LOCI-3334
Signed-off-by: Jim Snow <jim.m.snow@intel.com>
2022-08-11 23:32:59 +02:00
7d6bd45604
Unify programming additional flags for front end command
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Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-11 10:57:32 +02:00
1b9d50660a
Unify programming of binding table base address command
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-08-10 14:35:02 +02:00
98d776867f
Add initial support for KernelArgsBuffer allocation
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-08-03 20:28:21 +02:00
53a3cd2cdd
Add method to merge LSH pipelined state during cmd list execution
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-07-28 17:32:53 +02:00
af91f94098
Improve calculateAvailableThreadCount implementation
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Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2022-07-28 11:43:14 +02:00
b3078cfbae
Revert "Change DG2 l1 cache policy to WB"
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This reverts commit 9a5e619c42
2022-07-28 07:27:13 +02:00
0603819b68
Cleanup includes 3/n
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-07-27 15:28:13 +02:00
9a5e619c42
Change DG2 l1 cache policy to WB
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With compiler LSC WAs this gives better performance.
Related-To: NEO-7003
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-07-27 10:20:36 +02:00
c1ab4aa3e0
Always program blit src & dst to local.
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This way we would avoid blitter throttling in case it is set.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-07-26 18:57:24 +02:00
8afcc87dc5
Support for new names in Aub/Tbx mode
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New acronyms that distinguish between configurations are supported.
This commit adds support for these names by reusing ProductFamilyOverride flag.
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
Related-To: NEO-7112
2022-07-25 14:46:52 +02:00
a3903c385e
Remove HW types from synchronization interface
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Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-07-25 13:59:26 +02:00
d4d54f5093
Cleanup includes
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-07-25 09:58:38 +02:00
f4879f064f
Allocate per-tile RTDispatchGlobals, handle ray tracing patch tokens.
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Related-to: NEO-6711
Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
2022-07-22 06:29:29 +02:00
20d0541e57
Add ForceTheoreticalMaxWorkGroupCount debug toggle
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New debug toggle disables limitation of work-group count for related queries.
Additionally OverrideMaxWorkGroupCount toggle was updated
to behave the same way, ignoring underlying engine type
when max-work group count is queried.
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-07-20 12:53:57 +02:00
91a97dfaea
Restore old device id design in ocloc
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This change removes some of the logic related to
passing device id as an argument in ocloc introduced in
"Setting default device id for acronym".
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
2022-07-19 15:55:13 +02:00
aed26ec51d
Add DisableForceToStateless debug flag
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-07-19 14:08:28 +02:00
52b00a11b0
Remove LSH from CommandQueue
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-07-19 08:47:02 +02:00
9203f8787b
Add template structs for L1 cache policy helper
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Related-To: NEO-7003
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-07-15 16:14:49 +02:00
01af53b63c
Setting default device id for acronym
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This PR includes:
- Move product config implementation from
ocloc arg helper to product config helper.
- Add default device id setting for each platform configuration.
- Add & move hw info config tests from opencl to shared
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
Related-To: NEO-7112
2022-07-15 12:28:58 +02:00
7c538b956a
Correct typo
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-07-14 10:13:12 +02:00
e28015a844
Move ULLS resources to local memory on DG2
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-07-12 15:50:09 +02:00
6cb44ae0d9
includes refactor
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use gen specific hw_cmds instead of all-in-one
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-07-08 17:02:19 +02:00
d68dedba3b
Simplify ownership management of MockPerformanceCounters
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Fixes clang-tidy warning about ignoring result of release()
Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
2022-07-07 10:42:29 +02:00
4676f2f023
Move command buffer to local memory on XE_HPG
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-07-06 18:18:27 +02:00
880464da77
Apply additional synchronization WA to DG2 ULLS
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-07-06 13:37:56 +02:00
0d2d41691c
Bind BCS2-8 statically
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-07-05 08:52:52 +02:00
76e023b941
Link build option with L1 cache policy helper
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Related-To: NEO-7003
Add L1CachePolicyHelper struct.
This struct is resposible for L1 cache policy
in build option, Surface State and stateless
caching. Currently default option for all
platforms is WBP (write by-pass)
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-07-04 11:49:55 +02:00
76d905b1f2
Pass LogicalStateHelper to SBA helper
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-07-01 14:52:20 +02:00
95d4ac7812
Capability to insert WA MMIO for BCS dispatch
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-07-01 11:53:53 +02:00
70b41cf3ce
Revert "Move semaphore to local memory on XE_HPG"
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This reverts commit 94f3e54261
2022-06-29 17:06:58 +02:00
f2bbd63d37
Refactor SBA handling + fix unit tests
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-29 13:27:57 +02:00
a8e2bd3f98
hw_cmds.h usage cleanup
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-06-29 11:15:45 +02:00
fffd56d7a6
refactor: bind drm context within IoctlHelper::createDrmContext method
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Related-To: NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-06-29 10:47:52 +02:00
efa19a0b18
Simplify code - reverse helper function logic to avoid not needed negation
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-06-29 09:19:33 +02:00
2d976098f5
Use LogicalStateHelper to program FrontEndState
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-27 19:42:54 +02:00
2c853adac3
Use LogicalStateHelper to program ComputeMode
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-27 15:25:55 +02:00
5236b34629
Set L1 policy globally
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Related-To: NEO-7003
Add function to control l1 policy for both
stateless and surface state cache.
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-06-27 14:57:31 +02:00
83cab52dc4
Reduce unnecessary copies of memory properties
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-06-24 16:49:26 +02:00
94f3e54261
Move semaphore to local memory on XE_HPG
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-06-24 14:36:23 +02:00
0b5269d4ae
Use LogicalStateHelper to program CSR allocation
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-22 21:19:57 +02:00
1bfe42350a
Revert "Disable tlb flush WA on PVC and later"
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This reverts commit e0c87435e1
2022-06-22 20:09:28 +02:00
2f46a7da63
Remove not needed function calls
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Related-To: NEO-7003
Minor: remove empty function calls
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-06-22 16:58:21 +02:00
f4485ec541
Use LogicalStateHelper for SIP programming
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-22 13:46:57 +02:00
e0c87435e1
Disable tlb flush WA on PVC and later
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-06-22 13:09:42 +02:00
9a26e505a8
Pass LSC policy to IGC in build options
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Related-To: NEO-7003
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-06-21 11:51:56 +02:00
f98c6b1a8b
Disable round robin engine assign on PVC
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-06-20 15:24:18 +02:00
5745c3d99d
Change AOT enums type & use forward declaration
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Signed-off-by: Daria Hinz <daria.hinz@intel.com>
2022-06-20 13:40:29 +02:00
2637ae5816
Ocloc: Support for various variants of acronyms
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In addition to supporting the official -device acronyms
(e.g. xe-hpg), support for shorter and deprecated acronyms
has also been added.
An example of supported variances:
- xehpg
- xe_hpg
- xe_hpg_core
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
Related-To: NEO-6910
2022-06-14 22:49:01 +02:00
ef7c1c22cb
Rename function name to avoid confusion.
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Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-06-14 18:50:39 +02:00
939d109362
Add LogicalStateHelper class
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-14 16:57:16 +02:00
6d365cbfc3
Ocloc: New AOT design implementation
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Ocloc will handle any new values that may be
passed to the -device argument.
Supported acronyms are available under cmd:
ocloc compile --help
Supported patterns:
- device acronym
- release acronym
- family acronym
- version (major.minor.revision)
Fatbinary will no longer handle major.minor.revision variances,
only acronyms allowed.
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
2022-06-14 13:20:45 +02:00
213dc2fe24
Make CPU copy for read buffer when host ptr is write combined on DG2
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With this commit on DG2 32bit driver will check if passed host ptr for
clEnqueueReadBuffer is write combined memory. If check will be true copy
will be make on CPU.
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-06-13 21:23:21 +02:00
5510dc7daa
Add adjustHwInfoForIgc support
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-06-13 14:31:53 +02:00
cca1dbecbc
Revert "Ocloc: New AOT approach implementation"
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This reverts commit a44f1b43aa
2022-06-12 21:27:08 +02:00
a44f1b43aa
Ocloc: New AOT approach implementation
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Ocloc will handle any new values that may be
passed to the -device argument.
Supported acronyms are available under cmd:
ocloc compile --help
Supported patterns:
- device acronym
- release acronym
- family acronym
- version (major.minor.revision)
Fatbinary will no longer handle major.minor.revision variances,
only acronyms allowed.
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
2022-06-10 09:24:13 +02:00
5bee8ebd35
Revert "Allow cpu buffers copy on DG2 in 32bit"
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This reverts commit 2055daf696
2022-06-08 11:26:00 +02:00
2055daf696
Allow cpu buffers copy on DG2 in 32bit
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Resolves: NEO-6906, NEO-6000
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-06-06 16:32:35 +02:00
0a3c960d61
Enable update task count from wait on DG2
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Related-To: NEO-6948
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-06-06 11:41:27 +02:00
dc1fe7d59a
Change MemoryPool to enum class
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Use enum class for MemoryPool in GraphicsAllocation
This change will ensure that GA is constructed in the proper way
- Rename namespace for isSystemMemoryPool method
- Add method getMemoryPoolString for logging actual pool which is in used
- Remove wrong pattern in GraphicsAllocation constructor
Related-To: NEO-6523
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
2022-06-02 12:46:15 +02:00
d7420f1786
Add isMatrixMultiplyAccumulateSupported query to HwInfoConfig
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-05-30 16:35:12 +02:00
b2021498e2
Create method adjustWalkOrder
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Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-05-27 16:05:31 +02:00
c4095411c7
Remove HwHelper::isLinuxCompletionFenceSupported method
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-05-27 12:07:15 +02:00
6fd7ae7142
Cleanup headers
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Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
2022-05-26 17:55:44 +02:00
8812f6250b
Fix timestamp conversion by using correct timestamp size mask
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-05-25 17:19:16 +02:00
36a07a77a1
Program Source/Destination CompressionType field in XY_BLOCK_COPY_BLT
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Properly handle blitter commands for media compressed images.
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-05-23 12:16:19 +02:00
d69bf76282
Rename r_pod_cast function to safePodCast
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Rename is necessary, because NEO uses camelCase convention for
function names.
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2022-05-19 10:43:20 +02:00
7463e1970b
Cleanup headers
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Make TUs and headers self-contained, remove unused headers
Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
2022-05-18 11:42:06 +02:00
3f04769f07
style: configure readability-identifier-naming.FunctionCase
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-05-17 20:55:56 +02:00
96e1eb7467
Move variables baseDieRev and baseDieA0Masked from xe_hpc to pvc
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Pvc specific variables should be located in pvc struct
Related-To: NEO-6738
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-05-17 12:19:16 +02:00
99db73c034
Add debug flag to fail build program with stateful access
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I've added debug flag FailBuildProgramWithStatefulAccess which makes
possible to fail build program/module creation
with stateful access(except builtins) on
pvc and later platforms.
Related-To: NEO-6075
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-05-17 11:01:05 +02:00
52a3bfcfde
Unify programming of pipe control command
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-05-16 18:42:04 +02:00
d643c587b9
style: correct variable naming
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-05-16 15:02:15 +02:00
819e0f5515
style: configure readability-identifier-naming.LocalVariableCase
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Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-05-16 12:39:44 +02:00
5dcdf53d12
Fix: enable split taskcount from wait only on dg2
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Related-To: NEO-6948
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-05-13 14:30:16 +02:00
de74becdb8
Base hwInfo values setup for AOT
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In most cases, there was code redundancy, which was minimized in this change.
The setupHardwareInfoBase extraction will also be used for ocloc.
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
Related-To: NEO-6910
2022-05-13 09:40:37 +02:00
9b2ad0c5df
Detect GPU hangs in flushBcsTask()
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This change introduces detection of GPU hangs in flushBcsTask()
function. The new code has been covered with ULTs.
Related-To: NEO-6681
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
2022-05-12 16:17:16 +02:00
0b68fdbe52
Move isCooperativeEngineSupported to HwInfoConfig
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Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2022-05-12 12:10:23 +02:00
fb4b1cca4f
Use internal blitter for internal memory transfers
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6621
2022-05-11 19:33:00 +02:00
e9be9b64c6
clang-tidy configuration cleanup
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Define single .clang-tidy configuration with all used checks and use
NOLINT to selectively silence tool. That way cleanup should be easier.
third_part/ has its own configuration that disables clang-tidy for this
folder.
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
2022-05-11 14:02:04 +02:00
2fcda0a528
Refactor: Change decanonize method accessing point
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Accessing decanonize method as a member of GmmHelper class object
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
2022-05-11 12:57:02 +02:00
5507633d15
Revert "Enable update task count from wait on DG2"
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This reverts commit 99c424b6ff
2022-05-10 14:26:24 +02:00
b42a49eb4b
Limit pipeline selection to Xe
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Related-To: NEO-6624
Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
2022-05-09 13:16:43 +02:00
5ba56690f5
Revert "Set only base values in GT_SYSTEM_INFO for AOT"
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This reverts commit b1f622d700
2022-05-09 12:42:09 +02:00
99c424b6ff
Enable update task count from wait on DG2
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Related-To: NEO-6948
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-05-06 16:01:30 +02:00
6e8cabdce5
Split wait for timestamps to queue and event
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On PVC both enabled.
On DG2 only for events.
Related-To: NEO-6948
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-05-06 15:34:47 +02:00
0b4ea8d2eb
Do not enable engines round robin on all xe_hp and later products
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-05-06 12:30:53 +02:00
f8ce86b116
XE_HPC: Fallback path to fix PAT_INDEX programming
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-05-05 15:06:21 +02:00
85b47476b6
Add MemorySynchronizationCommand to Blit commands estimation
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-05-04 12:25:56 +02:00
b1f622d700
Set only base values in GT_SYSTEM_INFO for AOT
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In most cases, there was code redundancy, which was minimized in this change.
The setupHardwareInfoBase extraction will also be used in ocloc.
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
Related-To: NEO-6910
2022-05-04 10:36:26 +02:00
ebe8d051dc
Revert "Enable task count from wait on DG2 and later"
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This reverts commit bd6c9a222b
2022-05-01 09:35:38 +02:00
bd6c9a222b
Enable task count from wait on DG2 and later
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Signed-off-by: Karol Trojanowski <karol.trojanowski@intel.com>
2022-04-29 14:27:54 +02:00
ac01f74924
style: fix gcc12 compilation errors
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-04-28 18:07:15 +02:00
55dcca993c
Apply getPaddingForISAAllocation PVC implementation to PVC and later platforms
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-04-27 15:55:39 +02:00
7eb70775ea
Flush caches for cross CSR dependencies
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-04-27 15:03:27 +02:00
903cf766b3
Revert "Move shared helper files to shared directory"
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This reverts commit 459524f129
2022-04-27 13:12:16 +02:00
459524f129
Move shared helper files to shared directory
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-04-27 10:34:42 +02:00
192ffa4c26
Add support for allocating RT globals
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-04-25 17:56:09 +02:00
944319b3d9
Correct media compression format for blitter operations on planar images
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Set most significant bit for chroma planes.
Move common logic to helper function.
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2022-04-22 17:02:16 +02:00
06fa316a75
Assign pat_index to BO during creation
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-04-21 13:25:13 +02:00
7f08a9d993
Remove adjustHwInfoForIgc helper
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6738
2022-04-20 10:04:36 +02:00
b5b8762faf
refactor direct submission: Pass command stream receiver to ctor
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Related-To: NEO-6643
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-04-19 23:02:55 +02:00
a970622cc1
Print slice index in printImageBlitBlockCopyCommand function
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Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
2022-04-19 12:04:50 +02:00
b15c8e971c
Move isTimestampWaitSupported method to different file
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-04-15 13:20:02 +02:00
8d1ad5a4f3
Refactor: use stack vector for root device indices
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Stack vector will not cause dynamic allocations in most circumstances
ie. number of root device indices not more than 16
Related-To: NEO-6837
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-04-14 14:05:42 +02:00
d70b1a2e2a
Filter L0 Debugger support by platfom
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Related-To: NEO-6678
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
2022-04-13 13:03:40 +02:00
Szymon Morek