Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2025-10-30 07:49:55 +08:00 · 2025-10-25 01:49:15 +08:00
parent 0b30109956 c3c75d0e68
commit 92a28f826d
52 changed files with 2283 additions and 964 deletions
--- a/include/image-commands.mk
+++ b/include/image-commands.mk
@ -431,7 +431,10 @@ define Build/initrd_compression
 endef

 define Build/fit
-	$(call locked,$(TOPDIR)/scripts/mkits.sh \
+	$(if $(findstring with-rootfs,$(word 3,$(1))), \
+		$(call locked,dd if=$(IMAGE_ROOTFS) of=$(IMAGE_ROOTFS).pagesync bs=4096 conv=sync, \
+		  gen-cpio$(if $(TARGET_PER_DEVICE_ROOTFS),.$(ROOTFS_ID/$(DEVICE_NAME)))))
+	$(TOPDIR)/scripts/mkits.sh \
 		-D $(DEVICE_NAME) -o $@.its -k $@ \
 		-C $(word 1,$(1)) \
 		$(if $(word 2,$(1)),\
@ -448,9 +451,10 @@ define Build/fit
 		$(if $(DEVICE_DTS_LOADADDR),-s $(DEVICE_DTS_LOADADDR)) \
 		$(if $(DEVICE_DTS_OVERLAY),$(foreach dtso,$(DEVICE_DTS_OVERLAY), -O $(dtso):$(KERNEL_BUILD_DIR)/image-$(dtso).dtbo)) \
 		-c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config-1") \
-		-A $(LINUX_KARCH) -v $(LINUX_VERSION), gen-cpio$(if $(TARGET_PER_DEVICE_ROOTFS),.$(ROOTFS_ID/$(DEVICE_NAME))))
+		-A $(LINUX_KARCH) -v $(LINUX_VERSION)
 	$(call locked,PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage $(if $(findstring external,$(word 3,$(1))),\
-		-E -B 0x1000 $(if $(findstring static,$(word 3,$(1))),-p 0x1000)) -f $@.its $@.new)
+		-E -B 0x1000 $(if $(findstring static,$(word 3,$(1))),-p 0x1000)) -f $@.its $@.new, \
+	  gen-cpio$(if $(TARGET_PER_DEVICE_ROOTFS),.$(ROOTFS_ID/$(DEVICE_NAME))))
 	@mv $@.new $@
 endef

--- a/package/firmware/linux-firmware/Makefile
+++ b/package/firmware/linux-firmware/Makefile
@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk

 PKG_NAME:=linux-firmware
-PKG_VERSION:=20251011
+PKG_VERSION:=20251021
 PKG_RELEASE:=1

 PKG_SOURCE_URL:=@KERNEL/linux/kernel/firmware
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
-PKG_HASH:=b6c9a9c112b88417d985b87d6521b677fa2fa0d5d7ee5219c76dc8ca66945ad3
+PKG_HASH:=fa6130988ecd7968602938c77dd6f8d2dace4e03ba0da4c0e9624dfed657e6cf

 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>

--- a/package/network/ipv6/odhcp6c/files/dhcpv6.sh
+++ b/package/network/ipv6/odhcp6c/files/dhcpv6.sh
@ -30,7 +30,7 @@ proto_dhcpv6_init_config() {
 	proto_config_add_string iface_464xlat
 	proto_config_add_string zone_464xlat
 	proto_config_add_string zone
-	proto_config_add_string 'ifaceid:ip6addr'
+	proto_config_add_string 'ip6ifaceid:ip6addr'
 	proto_config_add_string "userclass"
 	proto_config_add_string "vendorclass"
 	proto_config_add_array "sendopts:list(string)"
@ -56,8 +56,8 @@ proto_dhcpv6_setup() {
 	local config="$1"
 	local iface="$2"

-	local reqaddress reqprefix clientid reqopts defaultreqopts noslaaconly forceprefix extendprefix norelease noserverunicast noclientfqdn noacceptreconfig ip6prefix ip6prefixes iface_dslite iface_map iface_464xlat ifaceid userclass vendorclass sendopts delegate zone_dslite zone_map zone_464xlat zone encaplimit_dslite encaplimit_map skpriority soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff verbose
-	json_get_vars reqaddress reqprefix clientid reqopts defaultreqopts noslaaconly forceprefix extendprefix norelease noserverunicast noclientfqdn noacceptreconfig iface_dslite iface_map iface_464xlat ifaceid userclass vendorclass delegate zone_dslite zone_map zone_464xlat zone encaplimit_dslite encaplimit_map skpriority soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff verbose
+	local reqaddress reqprefix clientid reqopts defaultreqopts noslaaconly forceprefix extendprefix norelease noserverunicast noclientfqdn noacceptreconfig ip6prefix ip6prefixes iface_dslite iface_map iface_464xlat ip6ifaceid userclass vendorclass sendopts delegate zone_dslite zone_map zone_464xlat zone encaplimit_dslite encaplimit_map skpriority soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff verbose
+	json_get_vars reqaddress reqprefix clientid reqopts defaultreqopts noslaaconly forceprefix extendprefix norelease noserverunicast noclientfqdn noacceptreconfig iface_dslite iface_map iface_464xlat ip6ifaceid userclass vendorclass delegate zone_dslite zone_map zone_464xlat zone encaplimit_dslite encaplimit_map skpriority soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff verbose
 	json_for_each_item proto_dhcpv6_add_prefix ip6prefix ip6prefixes

 	# Configure
@ -84,7 +84,8 @@ proto_dhcpv6_setup() {

 	[ "$noacceptreconfig" = "1" ] && append opts "-a"

-	[ -n "$ifaceid" ] && append opts "-i$ifaceid"
+	[ -z "$ip6ifaceid" ] && json_get_var ip6ifaceid ifaceid
+	[ -n "$ip6ifaceid" ] && append opts "-i$ip6ifaceid"

 	[ -n "$vendorclass" ] && append opts "-V$vendorclass"

--- a/package/network/services/odhcpd/Makefile
+++ b/package/network/services/odhcpd/Makefile
@ -8,7 +8,7 @@
 include $(TOPDIR)/rules.mk

 PKG_NAME:=odhcpd
-PKG_RELEASE:=1
+PKG_RELEASE:=2

 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/odhcpd.git
--- a/package/network/services/odhcpd/files/odhcpd-update
+++ b/package/network/services/odhcpd/files/odhcpd-update
@ -1,6 +1,8 @@
 #!/bin/sh
 # Make dnsmasq reread hostfile by sending SIGHUP signal

+initscript=$0
+
 . /lib/functions/procd.sh

 procd_send_signal dnsmasq
--- a/package/utils/e2fsprogs/Makefile
+++ b/package/utils/e2fsprogs/Makefile
@ -168,7 +168,8 @@ CONFIGURE_ARGS += \
 	--disable-tls		\
 	--disable-nls		\
 	--disable-rpath		\
-	--disable-fuse2fs
+	--disable-fuse2fs	\
+	--without-libmagic

 ifneq ($(CONFIG_USE_MUSL),)
  CONFIGURE_VARS += ac_cv_func_lseek64=yes
--- a/package/utils/e2fsprogs/patches/002-fix-subst-host-build.patch
+++ b/package/utils/e2fsprogs/patches/002-fix-subst-host-build.patch
@ -1,10 +0,0 @@
--- a/util/subst.c
-+++ b/util/subst.c
-@@ -10,6 +10,7 @@
- #else
- #define HAVE_SYS_STAT_H
- #define HAVE_SYS_TIME_H
-+#define HAVE_SYS_STAT_H
- #endif
- #include <stdio.h>
- #include <errno.h>
--- a/package/utils/e2fsprogs/patches/010-configure-make-libmagic-optional-and-configurable.patch
+++ b/package/utils/e2fsprogs/patches/010-configure-make-libmagic-optional-and-configurable.patch
@ -0,0 +1,315 @@
+From 29e42cd2429208d02288bd9e12a6e65b940ea7e5 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Wed, 22 Oct 2025 14:02:33 +0200
+Subject: [PATCH] configure: make libmagic optional and configurable
+
+Make libmagic optional and configurable. This is to address case where
+the libmagic library is detected but suppots wants to be disabled.
+
+While at it also add support for pkg-config and also apply the same
+workaround of libarchive for macos.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ configure               | 182 ++++++++++++++++++++++++++++++++++++++--
+ configure.ac            |  57 +++++++++++--
+ lib/support/plausible.c |   2 +-
+ 3 files changed, 230 insertions(+), 11 deletions(-)
+
+--- a/configure
+++ b/configure
+@@ -930,6 +930,7 @@ enable_rpath
+ with_libiconv_prefix
+ with_libintl_prefix
+ enable_largefile
+with_libmagic
+ with_libarchive
+ enable_fuse2fs
+ enable_lto
+@@ -1647,6 +1648,7 @@ Optional Packages:
+   --without-libiconv-prefix     don't search for libiconv in includedir and libdir
+   --with-libintl-prefix[=DIR]  search for libintl in DIR/include and DIR/lib
+   --without-libintl-prefix     don't search for libintl in includedir and libdir
+  --without-libmagic      disable use of libmagic
+   --without-libarchive    disable use of libarchive
+   --with-multiarch=ARCH   specify the multiarch triplet
+   --with-udev-rules-dir[=DIR]
+@@ -13690,7 +13692,155 @@ then :
+ fi
+ 
+ 
+-{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for magic_file in -lmagic" >&5
+
+# Check whether --with-libmagic was given.
+if test ${with_libmagic+y}
+then :
+  withval=$with_libmagic; if test "$withval" = "no"
+then
+	try_libmagic=""
+	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Disabling libmagic support" >&5
+printf "%s\n" "Disabling libmagic support" >&6; }
+
+printf "%s\n" "#define CONFIG_DISABLE_LIBMAGIC 1" >>confdefs.h
+
+elif test "$withval" = "direct"
+then
+	try_libmagic="direct"
+	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Testing for libmagic support (forced direct link)" >&5
+printf "%s\n" "Testing for libmagic support (forced direct link)" >&6; }
+else
+	try_libmagic="yes"
+	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Testing for libmagic support (with dlopen)" >&5
+printf "%s\n" "Testing for libmagic support (with dlopen)" >&6; }
+fi
+
+else $as_nop
+
+case "$host_os" in
+    darwin*)
+	try_libmagic="direct"
+	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Try testing for libmagic support (with static linking) by default" >&5
+printf "%s\n" "Try testing for libmagic support (with static linking) by default" >&6; }
+	 ;;
+    *)
+        try_libmagic="yes"
+	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Try testing for libmagic support (with dlopen) by default" >&5
+printf "%s\n" "Try testing for libmagic support (with dlopen) by default" >&6; }
+	;;
+esac
+
+fi
+
+MAGIC_LIB=
+if test -n "$try_libmagic"
+then
+
+pkg_failed=no
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for libmagic" >&5
+printf %s "checking for libmagic... " >&6; }
+
+if test -n "$ARCHIVE_CFLAGS"; then
+    pkg_cv_ARCHIVE_CFLAGS="$ARCHIVE_CFLAGS"
+ elif test -n "$PKG_CONFIG"; then
+    if test -n "$PKG_CONFIG" && \
+    { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libmagic\""; } >&5
+  ($PKG_CONFIG --exists --print-errors "libmagic") 2>&5
+  ac_status=$?
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }; then
+  pkg_cv_ARCHIVE_CFLAGS=`$PKG_CONFIG --cflags "libmagic" 2>/dev/null`
+		      test "x$?" != "x0" && pkg_failed=yes
+else
+  pkg_failed=yes
+fi
+ else
+    pkg_failed=untried
+fi
+if test -n "$ARCHIVE_LIBS"; then
+    pkg_cv_ARCHIVE_LIBS="$ARCHIVE_LIBS"
+ elif test -n "$PKG_CONFIG"; then
+    if test -n "$PKG_CONFIG" && \
+    { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libmagic\""; } >&5
+  ($PKG_CONFIG --exists --print-errors "libmagic") 2>&5
+  ac_status=$?
+  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }; then
+  pkg_cv_ARCHIVE_LIBS=`$PKG_CONFIG --libs "libmagic" 2>/dev/null`
+		      test "x$?" != "x0" && pkg_failed=yes
+else
+  pkg_failed=yes
+fi
+ else
+    pkg_failed=untried
+fi
+
+
+
+if test $pkg_failed = yes; then
+        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+
+if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then
+        _pkg_short_errors_supported=yes
+else
+        _pkg_short_errors_supported=no
+fi
+        if test $_pkg_short_errors_supported = yes; then
+                ARCHIVE_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libmagic" 2>&1`
+        else
+                ARCHIVE_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libmagic" 2>&1`
+        fi
+        # Put the nasty error message in config.log where it belongs
+        echo "$ARCHIVE_PKG_ERRORS" >&5
+
+
+        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for magic_file in -lmagic" >&5
+printf %s "checking for magic_file in -lmagic... " >&6; }
+if test ${ac_cv_lib_magic_magic_file+y}
+then :
+  printf %s "(cached) " >&6
+else $as_nop
+  ac_check_lib_save_LIBS=$LIBS
+LIBS="-lmagic  $LIBS"
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+/* Override any GCC internal prototype to avoid an error.
+   Use char because int might match the return type of a GCC
+   builtin and then its argument prototype would still apply.  */
+char magic_file ();
+int
+main (void)
+{
+return magic_file ();
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_link "$LINENO"
+then :
+  ac_cv_lib_magic_magic_file=yes
+else $as_nop
+  ac_cv_lib_magic_magic_file=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.beam \
+    conftest$ac_exeext conftest.$ac_ext
+LIBS=$ac_check_lib_save_LIBS
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_magic_magic_file" >&5
+printf "%s\n" "$ac_cv_lib_magic_magic_file" >&6; }
+if test "x$ac_cv_lib_magic_magic_file" = xyes
+then :
+  MAGIC_LIB=-lmagic
+fi
+
+
+elif test $pkg_failed = untried; then
+        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+printf "%s\n" "no" >&6; }
+
+        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for magic_file in -lmagic" >&5
+ printf %s "checking for magic_file in -lmagic... " >&6; }
+ if test ${ac_cv_lib_magic_magic_file+y}
+ then :
+@@ -13728,17 +13878,39 @@ printf "%s\n" "$ac_cv_lib_magic_magic_fi
+ if test "x$ac_cv_lib_magic_magic_file" = xyes
+ then :
+   MAGIC_LIB=-lmagic
+-ac_fn_c_check_header_compile "$LINENO" "magic.h" "ac_cv_header_magic_h" "$ac_includes_default"
+fi
+
+
+else
+        ARCHIVE_CFLAGS=$pkg_cv_ARCHIVE_CFLAGS
+        ARCHIVE_LIBS=$pkg_cv_ARCHIVE_LIBS
+        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+printf "%s\n" "yes" >&6; }
+
+	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: pkg-config found libmagic" >&5
+printf "%s\n" "pkg-config found libmagic" >&6; }
+	CFLAGS="$ARCHIVE_CFLAGS $CFLAGS"
+
+fi
+    if test -n "$MAGIC_LIB" ; then
+        ac_fn_c_check_header_compile "$LINENO" "magic.h" "ac_cv_header_magic_h" "$ac_includes_default"
+ if test "x$ac_cv_header_magic_h" = xyes
+ then :
+   printf "%s\n" "#define HAVE_MAGIC_H 1" >>confdefs.h
+ 
+ fi
+ 
+-fi
+        if test "$ac_cv_func_dlopen" = yes -a "$try_libmagic" != "direct"; then
+            MAGIC_LIB=$DLOPEN_LIB
+ 
+-if test "$ac_cv_func_dlopen" = yes ; then
+-   MAGIC_LIB=$DLOPEN_LIB
+printf "%s\n" "#define CONFIG_DLOPEN_LIBMAGIC 1" >>confdefs.h
+
+	fi
+    fi
+    if test "$ac_cv_header_magic_h" != "yes"
+    then
+        MAGIC_LIB=
+    fi
+ fi
+ 
+ 
+--- a/configure.ac
+++ b/configure.ac
+@@ -1295,12 +1295,59 @@ SOCKET_LIB=''
+ AC_CHECK_LIB(socket, socket, [SOCKET_LIB=-lsocket])
+ AC_SUBST(SOCKET_LIB)
+ dnl
+-dnl See if libmagic exists
+dnl libmagic
+ dnl
+-AC_CHECK_LIB(magic, magic_file, [MAGIC_LIB=-lmagic
+-AC_CHECK_HEADERS([magic.h])])
+-if test "$ac_cv_func_dlopen" = yes ; then
+-   MAGIC_LIB=$DLOPEN_LIB
+AC_ARG_WITH([libmagic],
+AS_HELP_STRING([--without-libmagic],[disable use of libmagic]),
+[if test "$withval" = "no"
+then
+	try_libmagic=""
+	AC_MSG_RESULT([Disabling libmagic support])
+	AC_DEFINE(CONFIG_DISABLE_LIBMAGIC, 1,
+		[Define to 1 to completely disable libmagic])
+elif test "$withval" = "direct"
+then
+	try_libmagic="direct"
+	AC_MSG_RESULT([Testing for libmagic support (forced direct link)])
+else
+	try_libmagic="yes"
+	AC_MSG_RESULT([Testing for libmagic support (with dlopen)])
+fi]
+,
+[
+case "$host_os" in
+    darwin*)
+	try_libmagic="direct"
+	AC_MSG_RESULT([Try testing for libmagic support (with static linking) by default])
+	 ;;
+    *)
+        try_libmagic="yes"
+	AC_MSG_RESULT([Try testing for libmagic support (with dlopen) by default])
+	;;
+esac
+])
+MAGIC_LIB=
+if test -n "$try_libmagic"
+then
+    PKG_CHECK_MODULES([ARCHIVE],[libmagic],
+    [
+	AC_MSG_RESULT([pkg-config found libmagic])
+	CFLAGS="$ARCHIVE_CFLAGS $CFLAGS"
+    ],[
+        AC_CHECK_LIB(magic, magic_file, [MAGIC_LIB=-lmagic])
+    ])
+    if test -n "$MAGIC_LIB" ; then
+        AC_CHECK_HEADERS([magic.h])
+        if test "$ac_cv_func_dlopen" = yes -a "$try_libmagic" != "direct"; then
+            MAGIC_LIB=$DLOPEN_LIB
+            AC_DEFINE(CONFIG_DLOPEN_LIBMAGIC, 1,
+		[Define to 1 if using dlopen to access libmagic])
+	fi
+    fi
+    if test "$ac_cv_header_magic_h" != "yes"
+    then
+        MAGIC_LIB=
+    fi
+ fi
+ AC_SUBST(MAGIC_LIB)
+ dnl
+--- a/lib/support/plausible.c
+++ b/lib/support/plausible.c
+@@ -54,7 +54,7 @@ static void (*dl_magic_close)(magic_t);
+ #define MAGIC_NO_CHECK_ELF 0x0010000
+ #endif
+ 
+-#ifdef HAVE_DLOPEN
+#ifdef CONFIG_DLOPEN_LIBMAGIC
+ #include <dlfcn.h>
+ 
+ static void *magic_handle;
--- a/scripts/mkits.sh
+++ b/scripts/mkits.sh
@ -82,6 +82,11 @@ if [ -z "${ARCH}" ] || [ -z "${COMPRESS}" ] || [ -z "${LOAD_ADDR}" ] || \
 	usage
 fi

+if [ -n "${ROOTFS}" ] && [ ! -f "${ROOTFS}".pagesync ]; then
+	echo "Missing .pagesync blob for RootFS blob '${ROOTFS}'"
+	exit 1
+fi
+
 ARCH_UPPER=$(echo "$ARCH" | tr '[:lower:]' '[:upper:]')

 if [ -n "${COMPATIBLE}" ]; then
@ -136,7 +141,6 @@ fi


 if [ -n "${ROOTFS}" ]; then
-	dd if="${ROOTFS}" of="${ROOTFS}.pagesync" bs=4096 conv=sync
 	ROOTFS_NODE="
 		rootfs${REFERENCE_CHAR}$ROOTFSNUM {
 			description = \"${ARCH_UPPER} OpenWrt ${DEVICE} rootfs\";
--- a/target/linux/airoha/an7583/config-6.12
+++ b/target/linux/airoha/an7583/config-6.12
@ -242,6 +242,7 @@ CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_SG_DMA_LENGTH=y
 CONFIG_NET_AIROHA=y
 CONFIG_NET_AIROHA_FLOW_STATS=y
+CONFIG_NET_AIROHA_NPU=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
 CONFIG_NET_DSA_MT7530=y
--- a/target/linux/airoha/dts/an7581-evb-emmc.dts
+++ b/target/linux/airoha/dts/an7581-evb-emmc.dts
@ -156,6 +156,40 @@
 	status = "okay";
 };

+&mdio {
+	as21xx_1: ethernet-phy@1d {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x1d>;
+
+		firmware-name = "as21x1x_fw.bin";
+
+		reset-deassert-us = <1000000>;
+		reset-assert-us = <1000000>;
+		reset-gpios = <&en7581_pinctrl 31 GPIO_ACTIVE_LOW>;
+
+		leds {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			led@0 {
+				reg = <0>;
+				color = <LED_COLOR_ID_GREEN>;
+				function = LED_FUNCTION_LAN;
+				function-enumerator = <0>;
+				default-state = "keep";
+			};
+
+			led@1 {
+				reg = <1>;
+				color = <LED_COLOR_ID_GREEN>;
+				function = LED_FUNCTION_LAN;
+				function-enumerator = <1>;
+				default-state = "keep";
+			};
+		};
+	};
+};
+
 &eth {
 	status = "okay";
 };
@ -164,6 +198,13 @@
 	status = "okay";
 };

+&gdm4 {
+	status = "okay";
+
+	phy-handle = <&as21xx_1>;
+	phy-mode = "usxgmii";
+};
+
 &switch {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
--- a/target/linux/airoha/dts/an7581.dtsi
+++ b/target/linux/airoha/dts/an7581.dtsi
@ -874,7 +874,7 @@
 				};
 			};

-			mdio {
+			mdio: mdio {
 				#address-cells = <1>;
 				#size-cells = <0>;

--- a/target/linux/airoha/dts/an7583-evb-emmc.dts
+++ b/target/linux/airoha/dts/an7583-evb-emmc.dts
@ -0,0 +1,297 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "an7583.dtsi"
+
+/ {
+	model = "Airoha AN7583 Evaluation Board";
+	compatible = "airoha,an7583-evb", "airoha,an7583", "airoha,en7583";
+
+	aliases {
+		serial0 = &uart1;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlycon";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x0 0x80000000 0x2 0x00000000>;
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		poll-interval = <100>;
+
+		btn-reset {
+			label = "reset";
+			linux,code = <BTN_0>;
+			gpios = <&an7583_pinctrl 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led-1 {
+			label = "pon";
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&an7583_pinctrl 12 GPIO_ACTIVE_LOW>;
+		};
+
+		led-2 {
+			label = "internet";
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&an7583_pinctrl 26 GPIO_ACTIVE_LOW>;
+		};
+
+		led-3 {
+			label = "wps";
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&an7583_pinctrl 31 GPIO_ACTIVE_LOW>;
+		};
+
+		led-4 {
+			label = "los";
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&an7583_pinctrl 27 GPIO_ACTIVE_LOW>;
+		};
+
+		led-5 {
+			label = "voip_hook";
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&an7583_pinctrl 29 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&an7583_pinctrl {
+	gpio-ranges = <&an7583_pinctrl 0 2 53>;
+
+	mdio0_pins: mdio0-pins {
+		conf {
+			pins = "mdio_0";
+			output-high;
+		};
+	};
+
+	pcie0_rst_pins: pcie0-rst-pins {
+		conf {
+			pins = "pcie_reset0";
+			drive-open-drain = <1>;
+		};
+	};
+
+	pcie1_rst_pins: pcie1-rst-pins {
+		conf {
+			pins = "pcie_reset1";
+			drive-open-drain = <1>;
+		};
+	};
+
+	gswp1_led0_pins: gswp1-led0-pins {
+		mux {
+			function = "phy1_led0";
+			pins = "gpio1";
+		};
+	};
+
+	gswp2_led0_pins: gswp2-led0-pins {
+		mux {
+			function = "phy2_led0";
+			pins = "gpio2";
+		};
+	};
+
+	gswp3_led0_pins: gswp3-led0-pins {
+		mux {
+			function = "phy3_led0";
+			pins = "gpio3";
+		};
+	};
+
+	gswp4_led0_pins: gswp4-led0-pins {
+		mux {
+			function = "phy4_led0";
+			pins = "gpio4";
+		};
+	};
+
+	mmc_pins: mmc-pins {
+		mux {
+			function = "emmc";
+			groups = "emmc";
+		};
+	};
+};
+
+&mmc0 {
+	pinctrl-names = "default", "state_uhs";
+	pinctrl-0 = <&mmc_pins>;
+	pinctrl-1 = <&mmc_pins>;
+	status = "okay";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	card@0 {
+		compatible = "mmc-card";
+		reg = <0>;
+
+		block {
+			compatible = "block-device";
+			partitions {
+				block-partition-factory {
+					partname = "art";
+
+					nvmem-layout {
+						compatible = "fixed-layout";
+						#address-cells = <1>;
+						#size-cells = <1>;
+
+						eeprom_factory_0: eeprom@0 {
+							reg = <0x40000 0x1e00>;
+						};
+
+						mac_factory_2c0000: mac@2c0000 {
+							reg = <0x2c0000 0x6>;
+						};
+
+						pon_mac_factory_2c0006: pon_mac@2c0006 {
+							reg = <0x2c0006 0x6>;
+						};
+
+						onu_type_factory_2e0000: onu_type@2e0000 {
+							reg = <0x2e0000 0x10>;
+						};
+
+						board_config_factory_2e0010: board_config@2e0010 {
+							reg = <0x2e0010 0x8>;
+						};
+					};
+				};
+			};
+		};
+	};
+};
+
+&i2c0 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&mdio_0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio0_pins>;
+
+	en8811: ethernet-phy@f {
+		reg = <0xf>;
+
+		reset-gpios = <&an7583_pinctrl 28 GPIO_ACTIVE_LOW>;
+		reset-assert-us = <10000>;
+		reset-deassert-us = <20000>;
+
+		leds {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			led@0 {
+				reg = <0>;
+				function = LED_FUNCTION_LAN;
+				color = <LED_COLOR_ID_GREEN>;
+				function-enumerator = <0>;
+				default-state = "keep";
+			};
+
+			led@1 {
+				reg = <1>;
+				function = LED_FUNCTION_LAN;
+				color = <LED_COLOR_ID_GREEN>;
+				function-enumerator = <1>;
+				default-state = "keep";
+			};
+		};
+	};
+};
+
+&npu {
+	status = "okay";
+};
+
+&eth {
+	status = "okay";
+	nvmem-cells = <&mac_factory_2c0000>;
+	nvmem-cell-names = "mac";
+};
+
+&gdm1 {
+	status = "okay";
+};
+
+&gdm3 {
+	status = "okay";
+
+	phy-handle = <&en8811>;
+	phy-mode = "2500base-x";
+};
+
+&switch {
+	status = "okay";
+};
+
+&gsw_phy1 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gswp1_led0_pins>;
+	status = "okay";
+};
+
+&gsw_phy1_led0 {
+	status = "okay";
+	active-low;
+};
+
+&gsw_phy2 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gswp2_led0_pins>;
+	status = "okay";
+};
+
+&gsw_phy2_led0 {
+	status = "okay";
+	active-low;
+};
+
+&gsw_phy3 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gswp3_led0_pins>;
+	status = "okay";
+};
+
+&gsw_phy3_led0 {
+	status = "okay";
+	active-low;
+};
+
+&gsw_phy4 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gswp4_led0_pins>;
+	status = "okay";
+};
+
+&gsw_phy4_led0 {
+	status = "okay";
+	active-low;
+};
--- a/target/linux/airoha/dts/an7583-evb.dts
+++ b/target/linux/airoha/dts/an7583-evb.dts
@ -84,6 +84,10 @@
 	status = "okay";
 };

+&npu {
+	status = "okay";
+};
+
 &eth {
 	status = "okay";
 };
@ -135,37 +139,41 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio0_pins>;

-	as21xx_0: ethernet-phy@1d {
-		reg = <0x1d>;
-		compatible = "ethernet-phy-ieee802.3-c45";
-
-		firmware-name = "as21x1x_fw.bin";
-
-		reset-deassert-us = <350000>;
-		reset-assert-us = <200000>;
-		reset-gpios = <&an7583_pinctrl 34 GPIO_ACTIVE_LOW>;
-
-		leds {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			led@0 {
-				reg = <0>;
-				color = <LED_COLOR_ID_GREEN>;
-				function = LED_FUNCTION_LAN;
-				function-enumerator = <0>;
-				default-state = "keep";
-			};
-
-			led@1 {
-				reg = <1>;
-				color = <LED_COLOR_ID_GREEN>;
-				function = LED_FUNCTION_LAN;
-				function-enumerator = <1>;
-				default-state = "keep";
-			};
-		};
-	};
+	/* Present but not HW connected to GDM port */
+	/*
+	 * as21xx_0: ethernet-phy@1d {
+	 *		reg = <0x1d>;
+	 *		compatible = "ethernet-phy-ieee802.3-c45";
+	 *		status = "disabled";
+	 *
+	 *		firmware-name = "as21x1x_fw.bin";
+	 *
+	 *		reset-deassert-us = <350000>;
+	 *		reset-assert-us = <200000>;
+	 *		reset-gpios = <&an7583_pinctrl 34 GPIO_ACTIVE_LOW>;
+	 *
+	 *		leds {
+	 *			#address-cells = <1>;
+	 *			#size-cells = <0>;
+	 *
+	 *			led@0 {
+	 *				reg = <0>;
+	 *				color = <LED_COLOR_ID_GREEN>;
+	 *				function = LED_FUNCTION_LAN;
+	 *				function-enumerator = <0>;
+	 *				default-state = "keep";
+	 *			};
+	 *
+	 *			led@1 {
+	 *				reg = <1>;
+	 *				color = <LED_COLOR_ID_GREEN>;
+	 *				function = LED_FUNCTION_LAN;
+	 *				function-enumerator = <1>;
+	 *				default-state = "keep";
+	 *			};
+	 *		};
+	 * };
+	 */

 	as21xx_1: ethernet-phy@1f {
 		reg = <0x1f>;
@ -200,16 +208,19 @@
 	};
 };

+/* GDM2 seems to be connected to PON */
+/*
+ *&gdm2 {
+ *	status = "disabled";
+ *
+ *	phy-handle = <&as21xx_0>;
+ *	phy-mode = "usxgmii";
+ *};
+ */
+
 &gdm3 {
 	status = "okay";

 	phy-handle = <&as21xx_1>;
 	phy-mode = "usxgmii";
 };
-
-&gdm2 {
-	status = "okay";
-
-	phy-handle = <&as21xx_0>;
-	phy-mode = "usxgmii";
-};
--- a/target/linux/airoha/dts/an7583.dtsi
+++ b/target/linux/airoha/dts/an7583.dtsi
@ -546,6 +546,30 @@
 			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 		};

+		npu: npu@1e900000 {
+			compatible = "airoha,an7583-npu";
+			reg = <0x0 0x1e900000 0x0 0x313000>;
+			interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+			memory-region = <&npu_binary>;
+			memory-region-names = "binary";
+
+			status = "disabled";
+		};
+
 		pon_pcs: pcs@1fa08000 {
 			compatible = "airoha,an7583-pcs-pon";
 			reg = <0x0 0x1fa08000 0x0 0x1000>,
@ -620,6 +644,8 @@
 			memory-region = <&qdma0_buf>, <&qdma1_buf>;
 			memory-region-names = "qdma0-buf", "qdma1-buf";

+			airoha,npu = <&npu>;
+
 			status = "disabled";

 			#address-cells = <1>;
--- a/target/linux/airoha/image/an7581.mk
+++ b/target/linux/airoha/image/an7581.mk
@ -1,3 +1,17 @@
+define Build/an7581-emmc-bl2-bl31-uboot
+  head -c $$((0x800)) /dev/zero > $@
+  cat $(STAGING_DIR_IMAGE)/an7581_$1-bl2.fip >> $@
+  dd if=$(STAGING_DIR_IMAGE)/an7581_$1-bl31-u-boot.fip of=$@ bs=1 seek=$$((0x20000)) conv=notrunc
+endef
+
+define Build/an7581-preloader
+  cat $(STAGING_DIR_IMAGE)/an7581_$1-bl2.fip >> $@
+endef
+
+define Build/an7581-bl31-uboot
+  cat $(STAGING_DIR_IMAGE)/an7581_$1-bl31-u-boot.fip >> $@
+endef
+
 define Device/FitImageLzma
 	KERNEL_SUFFIX := -uImage.itb
 	KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb
@ -13,6 +27,9 @@ define Device/airoha_an7581-evb
  DEVICE_DTS_CONFIG := config@1
  KERNEL_LOADADDR := 0x80088000
  IMAGE/sysupgrade.bin := append-kernel | pad-to 128k | append-rootfs | pad-rootfs | append-metadata
+  ARTIFACT/preloader.bin := an7581-preloader rfb
+  ARTIFACT/bl31-uboot.fip := an7581-bl31-uboot rfb
+  ARTIFACTS := preloader.bin bl31-uboot.fip
 endef
 TARGET_DEVICES += airoha_an7581-evb

@ -21,5 +38,8 @@ define Device/airoha_an7581-evb-emmc
  DEVICE_MODEL := AN7581 Evaluation Board (EMMC)
  DEVICE_DTS := an7581-evb-emmc
  DEVICE_PACKAGES := kmod-i2c-an7581
+  ARTIFACT/preloader.bin := an7581-preloader rfb
+  ARTIFACT/bl31-uboot.fip := an7581-bl31-uboot rfb
+  ARTIFACTS := preloader.bin bl31-uboot.fip
 endef
 TARGET_DEVICES += airoha_an7581-evb-emmc
--- a/target/linux/airoha/image/an7583.mk
+++ b/target/linux/airoha/image/an7583.mk
@ -1,23 +1,3 @@
-define Build/an7583-bl2-bl31-uboot
-  head -c $$((0x800)) /dev/zero > $@
-  cat $(STAGING_DIR_IMAGE)/an7583_$1-bl2.fip >> $@
-  dd if=$(STAGING_DIR_IMAGE)/an7583_$1-bl31-uboot.img of=$@ bs=1 seek=$$((0x20000)) conv=notrunc
-endef
-
-define Build/an7583-emmc-bl2-bl31-uboot
-  head -c $$((0x800)) /dev/zero > $@
-  cat $(STAGING_DIR_IMAGE)/an7583_$1-bl2.fip >> $@
-  dd if=$(STAGING_DIR_IMAGE)/an7583_$1-bl31-u-boot.fip of=$@ bs=1 seek=$$((0x20000)) conv=notrunc
-endef
-
-define Build/an7583-preloader
-  cat $(STAGING_DIR_IMAGE)/an7583_$1-bl2.fip >> $@
-endef
-
-define Build/an7583-bl31-uboot
-  cat $(STAGING_DIR_IMAGE)/an7583_$1-bl31-u-boot.fip >> $@
-endef
-
 define Device/FitImageLzma
 	KERNEL_SUFFIX := -uImage.itb
 	KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb
@ -28,15 +8,11 @@ define Device/airoha_an7583-evb
  $(call Device/FitImageLzma)
  DEVICE_VENDOR := Airoha
  DEVICE_MODEL := AN7583 Evaluation Board (SNAND)
-  DEVICE_PACKAGES := kmod-leds-pwm kmod-input-gpio-keys-polled
+  DEVICE_PACKAGES := kmod-phy-aeonsemi-as21xxx kmod-leds-pwm kmod-pwm-airoha kmod-input-gpio-keys-polled
  DEVICE_DTS := an7583-evb
  DEVICE_DTS_CONFIG := config@1
  KERNEL_LOADADDR := 0x80088000
  IMAGE/sysupgrade.bin := append-kernel | pad-to 128k | append-rootfs | pad-rootfs | append-metadata
-  ARTIFACT/bl2-bl31-uboot.bin := an7583-bl2-bl31-uboot rfb
-  ARTIFACT/preloader.bin := an7583-preloader rfb
-  ARTIFACT/bl31-uboot.fip := an7583-bl31-uboot rfb
-  ARTIFACTS := bl2-bl31-uboot.bin preloader.bin bl31-uboot.fip
 endef
 TARGET_DEVICES += airoha_an7583-evb

@ -44,10 +20,6 @@ define Device/airoha_an7583-evb-emmc
  DEVICE_VENDOR := Airoha
  DEVICE_MODEL := AN7583 Evaluation Board (EMMC)
  DEVICE_DTS := an7583-evb-emmc
-  DEVICE_PACKAGES := kmod-i2c-an7581
-  ARTIFACT/preloader.bin := an7583-preloader rfb
-  ARTIFACT/bl31-uboot.fip := an7583-bl31-uboot rfb
-  ARTIFACT/bl2-bl31-uboot.bin := an7583-emmc-bl2-bl31-uboot rfb
-  ARTIFACTS := bl2-bl31-uboot.bin preloader.bin bl31-uboot.fip
+  DEVICE_PACKAGES := kmod-phy-airoha-en8811h kmod-i2c-an7581
 endef
 TARGET_DEVICES += airoha_an7583-evb-emmc
--- a/target/linux/airoha/patches-6.12/100-v6.17-net-airoha-npu-Add-missing-MODULE_FIRMWARE-macros.patch
+++ b/target/linux/airoha/patches-6.12/100-v6.17-net-airoha-npu-Add-missing-MODULE_FIRMWARE-macros.patch
@ -0,0 +1,27 @@
+From 4e7e471e2e3f9085fe1dbe821c4dd904a917c66a Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 1 Aug 2025 09:12:25 +0200
+Subject: [PATCH] net: airoha: npu: Add missing MODULE_FIRMWARE macros
+
+Introduce missing MODULE_FIRMWARE definitions for firmware autoload.
+
+Fixes: 23290c7bc190d ("net: airoha: Introduce Airoha NPU support")
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://patch.msgid.link/20250801-airoha-npu-missing-module-firmware-v2-1-e860c824d515@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_npu.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/net/ethernet/airoha/airoha_npu.c
+++ b/drivers/net/ethernet/airoha/airoha_npu.c
+@@ -741,6 +741,8 @@ static struct platform_driver airoha_npu
+ };
+ module_platform_driver(airoha_npu_driver);
+ 
+MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_DATA);
+MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_RV32);
+ MODULE_LICENSE("GPL");
+ MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
+ MODULE_DESCRIPTION("Airoha Network Processor Unit driver");
--- a/target/linux/airoha/patches-6.12/101-v6.17-net-airoha-Fix-a-NULL-vs-IS_ERR-bug-in-airoha_npu_ru.patch
+++ b/target/linux/airoha/patches-6.12/101-v6.17-net-airoha-Fix-a-NULL-vs-IS_ERR-bug-in-airoha_npu_ru.patch
@ -0,0 +1,31 @@
+From 1e5e40f2558c07f6bc60a8983000309cc0a9d600 Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@linaro.org>
+Date: Tue, 15 Jul 2025 18:01:10 -0500
+Subject: [PATCH] net: airoha: Fix a NULL vs IS_ERR() bug in
+ airoha_npu_run_firmware()
+
+The devm_ioremap_resource() function returns error pointers.  It never
+returns NULL.  Update the check to match.
+
+Fixes: e27dba1951ce ("net: Use of_reserved_mem_region_to_resource{_byname}() for "memory-region"")
+Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
+Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://patch.msgid.link/fc6d194e-6bf5-49ca-bc77-3fdfda62c434@sabinyo.mountain
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_npu.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_npu.c
+++ b/drivers/net/ethernet/airoha/airoha_npu.c
+@@ -201,8 +201,8 @@ static int airoha_npu_run_firmware(struc
+ 	}
+ 
+ 	addr = devm_ioremap(dev, rmem->base, rmem->size);
+-	if (!addr) {
+-		ret = -ENOMEM;
+	if (IS_ERR(addr)) {
+		ret = PTR_ERR(addr);
+ 		goto out;
+ 	}
+ 
--- a/target/linux/airoha/patches-6.12/102-02-v6.19-net-airoha-npu-Add-airoha_npu_soc_data-struct.patch
+++ b/target/linux/airoha/patches-6.12/102-02-v6.19-net-airoha-npu-Add-airoha_npu_soc_data-struct.patch
@ -0,0 +1,136 @@
+From 0850ae496d534847ec2c26744521c1bce04ec59d Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Mon, 13 Oct 2025 15:58:50 +0200
+Subject: [PATCH 2/3] net: airoha: npu: Add airoha_npu_soc_data struct
+
+Introduce airoha_npu_soc_data structure in order to generalize per-SoC
+NPU firmware info. Introduce airoha_npu_load_firmware utility routine.
+This is a preliminary patch in order to introduce AN7583 NPU support.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Simon Horman <horms@kernel.org>
+Link: https://patch.msgid.link/20251013-airoha-npu-7583-v3-2-00f748b5a0c7@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_npu.c | 77 ++++++++++++++++--------
+ 1 file changed, 51 insertions(+), 26 deletions(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_npu.c
+++ b/drivers/net/ethernet/airoha/airoha_npu.c
+@@ -103,6 +103,16 @@ enum {
+ 	QDMA_WAN_PON_XDSL,
+ };
+ 
+struct airoha_npu_fw {
+	const char *name;
+	int max_size;
+};
+
+struct airoha_npu_soc_data {
+	struct airoha_npu_fw fw_rv32;
+	struct airoha_npu_fw fw_data;
+};
+
+ #define MBOX_MSG_FUNC_ID	GENMASK(14, 11)
+ #define MBOX_MSG_STATIC_BUF	BIT(5)
+ #define MBOX_MSG_STATUS		GENMASK(4, 2)
+@@ -182,49 +192,53 @@ static int airoha_npu_send_msg(struct ai
+ 	return ret;
+ }
+ 
+-static int airoha_npu_run_firmware(struct device *dev, void __iomem *base,
+-				   struct reserved_mem *rmem)
+static int airoha_npu_load_firmware(struct device *dev, void __iomem *addr,
+				    const struct airoha_npu_fw *fw_info)
+ {
+ 	const struct firmware *fw;
+-	void __iomem *addr;
+ 	int ret;
+ 
+-	ret = request_firmware(&fw, NPU_EN7581_FIRMWARE_RV32, dev);
+	ret = request_firmware(&fw, fw_info->name, dev);
+ 	if (ret)
+ 		return ret == -ENOENT ? -EPROBE_DEFER : ret;
+ 
+-	if (fw->size > NPU_EN7581_FIRMWARE_RV32_MAX_SIZE) {
+	if (fw->size > fw_info->max_size) {
+ 		dev_err(dev, "%s: fw size too overlimit (%zu)\n",
+-			NPU_EN7581_FIRMWARE_RV32, fw->size);
+			fw_info->name, fw->size);
+ 		ret = -E2BIG;
+ 		goto out;
+ 	}
+ 
+-	addr = devm_ioremap(dev, rmem->base, rmem->size);
+-	if (IS_ERR(addr)) {
+-		ret = PTR_ERR(addr);
+-		goto out;
+-	}
+-
+ 	memcpy_toio(addr, fw->data, fw->size);
+out:
+ 	release_firmware(fw);
+ 
+-	ret = request_firmware(&fw, NPU_EN7581_FIRMWARE_DATA, dev);
+-	if (ret)
+-		return ret == -ENOENT ? -EPROBE_DEFER : ret;
+	return ret;
+}
+ 
+-	if (fw->size > NPU_EN7581_FIRMWARE_DATA_MAX_SIZE) {
+-		dev_err(dev, "%s: fw size too overlimit (%zu)\n",
+-			NPU_EN7581_FIRMWARE_DATA, fw->size);
+-		ret = -E2BIG;
+-		goto out;
+-	}
+static int airoha_npu_run_firmware(struct device *dev, void __iomem *base,
+				   struct reserved_mem *rmem)
+{
+	const struct airoha_npu_soc_data *soc;
+	void __iomem *addr;
+	int ret;
+ 
+-	memcpy_toio(base + REG_NPU_LOCAL_SRAM, fw->data, fw->size);
+-out:
+-	release_firmware(fw);
+	soc = of_device_get_match_data(dev);
+	if (!soc)
+		return -EINVAL;
+ 
+-	return ret;
+	addr = devm_ioremap(dev, rmem->base, rmem->size);
+	if (IS_ERR(addr))
+		return PTR_ERR(addr);
+
+	/* Load rv32 npu firmware */
+	ret = airoha_npu_load_firmware(dev, addr, &soc->fw_rv32);
+	if (ret)
+		return ret;
+
+	/* Load data npu firmware */
+	return airoha_npu_load_firmware(dev, base + REG_NPU_LOCAL_SRAM,
+					&soc->fw_data);
+ }
+ 
+ static irqreturn_t airoha_npu_mbox_handler(int irq, void *npu_instance)
+@@ -596,8 +610,19 @@ void airoha_npu_put(struct airoha_npu *n
+ }
+ EXPORT_SYMBOL_GPL(airoha_npu_put);
+ 
+static const struct airoha_npu_soc_data en7581_npu_soc_data = {
+	.fw_rv32 = {
+		.name = NPU_EN7581_FIRMWARE_RV32,
+		.max_size = NPU_EN7581_FIRMWARE_RV32_MAX_SIZE,
+	},
+	.fw_data = {
+		.name = NPU_EN7581_FIRMWARE_DATA,
+		.max_size = NPU_EN7581_FIRMWARE_DATA_MAX_SIZE,
+	},
+};
+
+ static const struct of_device_id of_airoha_npu_match[] = {
+-	{ .compatible = "airoha,en7581-npu" },
+	{ .compatible = "airoha,en7581-npu", .data = &en7581_npu_soc_data },
+ 	{ /* sentinel */ }
+ };
+ MODULE_DEVICE_TABLE(of, of_airoha_npu_match);
--- a/target/linux/airoha/patches-6.12/102-03-v6.19-net-airoha-npu-Add-7583-SoC-support.patch
+++ b/target/linux/airoha/patches-6.12/102-03-v6.19-net-airoha-npu-Add-7583-SoC-support.patch
@ -0,0 +1,56 @@
+From 4478596f71d92060c9093bdf1d2d940881f41bcc Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Mon, 13 Oct 2025 15:58:51 +0200
+Subject: [PATCH 3/3] net: airoha: npu: Add 7583 SoC support
+
+Introduce support for Airoha 7583 SoC NPU selecting proper firmware images.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Simon Horman <horms@kernel.org>
+Link: https://patch.msgid.link/20251013-airoha-npu-7583-v3-3-00f748b5a0c7@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_npu.c | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+--- a/drivers/net/ethernet/airoha/airoha_npu.c
+++ b/drivers/net/ethernet/airoha/airoha_npu.c
+@@ -16,6 +16,8 @@
+ 
+ #define NPU_EN7581_FIRMWARE_DATA		"airoha/en7581_npu_data.bin"
+ #define NPU_EN7581_FIRMWARE_RV32		"airoha/en7581_npu_rv32.bin"
+#define NPU_AN7583_FIRMWARE_DATA		"airoha/an7583_npu_data.bin"
+#define NPU_AN7583_FIRMWARE_RV32		"airoha/an7583_npu_rv32.bin"
+ #define NPU_EN7581_FIRMWARE_RV32_MAX_SIZE	0x200000
+ #define NPU_EN7581_FIRMWARE_DATA_MAX_SIZE	0x10000
+ #define NPU_DUMP_SIZE				512
+@@ -621,8 +623,20 @@ static const struct airoha_npu_soc_data
+ 	},
+ };
+ 
+static const struct airoha_npu_soc_data an7583_npu_soc_data = {
+	.fw_rv32 = {
+		.name = NPU_AN7583_FIRMWARE_RV32,
+		.max_size = NPU_EN7581_FIRMWARE_RV32_MAX_SIZE,
+	},
+	.fw_data = {
+		.name = NPU_AN7583_FIRMWARE_DATA,
+		.max_size = NPU_EN7581_FIRMWARE_DATA_MAX_SIZE,
+	},
+};
+
+ static const struct of_device_id of_airoha_npu_match[] = {
+ 	{ .compatible = "airoha,en7581-npu", .data = &en7581_npu_soc_data },
+	{ .compatible = "airoha,an7583-npu", .data = &an7583_npu_soc_data },
+ 	{ /* sentinel */ }
+ };
+ MODULE_DEVICE_TABLE(of, of_airoha_npu_match);
+@@ -768,6 +782,8 @@ module_platform_driver(airoha_npu_driver
+ 
+ MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_DATA);
+ MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_RV32);
+MODULE_FIRMWARE(NPU_AN7583_FIRMWARE_DATA);
+MODULE_FIRMWARE(NPU_AN7583_FIRMWARE_RV32);
+ MODULE_LICENSE("GPL");
+ MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
+ MODULE_DESCRIPTION("Airoha Network Processor Unit driver");
--- a/target/linux/airoha/patches-6.12/103-v6.19-net-airoha-Remove-code-duplication-in-airoha_regs.h.patch
+++ b/target/linux/airoha/patches-6.12/103-v6.19-net-airoha-Remove-code-duplication-in-airoha_regs.h.patch
@ -0,0 +1,342 @@
+From 99ad2b6815f41acbec15ab051ccc79b11b05710a Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Wed, 22 Oct 2025 09:11:12 +0200
+Subject: [PATCH] net: airoha: Remove code duplication in airoha_regs.h
+
+This patch does not introduce any logical change, it just removes
+duplicated code in airoha_regs.h.
+Fix naming conventions in airoha_regs.h.
+
+Reviewed-by: Simon Horman <horms@kernel.org>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://patch.msgid.link/20251022-airoha-regs-cosmetics-v2-1-e0425b3f2c2c@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_eth.c  | 102 ++++++++++----------
+ drivers/net/ethernet/airoha/airoha_regs.h | 109 ++++++++++------------
+ 2 files changed, 100 insertions(+), 111 deletions(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
+@@ -137,11 +137,11 @@ static void airoha_fe_maccr_init(struct
+ 
+ 	for (p = 1; p <= ARRAY_SIZE(eth->ports); p++)
+ 		airoha_fe_set(eth, REG_GDM_FWD_CFG(p),
+-			      GDM_TCP_CKSUM | GDM_UDP_CKSUM | GDM_IP4_CKSUM |
+-			      GDM_DROP_CRC_ERR);
+			      GDM_TCP_CKSUM_MASK | GDM_UDP_CKSUM_MASK |
+			      GDM_IP4_CKSUM_MASK | GDM_DROP_CRC_ERR_MASK);
+ 
+-	airoha_fe_rmw(eth, REG_CDM1_VLAN_CTRL, CDM1_VLAN_MASK,
+-		      FIELD_PREP(CDM1_VLAN_MASK, 0x8100));
+	airoha_fe_rmw(eth, REG_CDM_VLAN_CTRL(1), CDM_VLAN_MASK,
+		      FIELD_PREP(CDM_VLAN_MASK, 0x8100));
+ 
+ 	airoha_fe_set(eth, REG_FE_CPORT_CFG, FE_CPORT_PAD);
+ }
+@@ -403,46 +403,46 @@ static int airoha_fe_mc_vlan_clear(struc
+ static void airoha_fe_crsn_qsel_init(struct airoha_eth *eth)
+ {
+ 	/* CDM1_CRSN_QSEL */
+-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_22 >> 2),
+-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_22),
+-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_22),
+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_22 >> 2),
+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_22),
+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_22),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_08 >> 2),
+-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_08),
+-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_08),
+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_08 >> 2),
+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_08),
+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_08),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_21 >> 2),
+-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_21),
+-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_21),
+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_21 >> 2),
+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_21),
+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_21),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_24 >> 2),
+-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_24),
+-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_24),
+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_24 >> 2),
+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_24),
+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_24),
+ 				 CDM_CRSN_QSEL_Q6));
+-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_25 >> 2),
+-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_25),
+-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_25),
+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_25 >> 2),
+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_25),
+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_25),
+ 				 CDM_CRSN_QSEL_Q1));
+ 	/* CDM2_CRSN_QSEL */
+-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_08 >> 2),
+-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_08),
+-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_08),
+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_08 >> 2),
+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_08),
+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_08),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_21 >> 2),
+-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_21),
+-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_21),
+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_21 >> 2),
+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_21),
+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_21),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_22 >> 2),
+-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_22),
+-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_22),
+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_22 >> 2),
+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_22),
+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_22),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_24 >> 2),
+-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_24),
+-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_24),
+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_24 >> 2),
+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_24),
+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_24),
+ 				 CDM_CRSN_QSEL_Q6));
+-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_25 >> 2),
+-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_25),
+-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_25),
+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_25 >> 2),
+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_25),
+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_25),
+ 				 CDM_CRSN_QSEL_Q1));
+ }
+ 
+@@ -462,18 +462,18 @@ static int airoha_fe_init(struct airoha_
+ 	airoha_fe_wr(eth, REG_FE_PCE_CFG,
+ 		     PCE_DPI_EN_MASK | PCE_KA_EN_MASK | PCE_MC_EN_MASK);
+ 	/* set vip queue selection to ring 1 */
+-	airoha_fe_rmw(eth, REG_CDM1_FWD_CFG, CDM1_VIP_QSEL_MASK,
+-		      FIELD_PREP(CDM1_VIP_QSEL_MASK, 0x4));
+-	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_VIP_QSEL_MASK,
+-		      FIELD_PREP(CDM2_VIP_QSEL_MASK, 0x4));
+	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(1), CDM_VIP_QSEL_MASK,
+		      FIELD_PREP(CDM_VIP_QSEL_MASK, 0x4));
+	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(2), CDM_VIP_QSEL_MASK,
+		      FIELD_PREP(CDM_VIP_QSEL_MASK, 0x4));
+ 	/* set GDM4 source interface offset to 8 */
+-	airoha_fe_rmw(eth, REG_GDM4_SRC_PORT_SET,
+-		      GDM4_SPORT_OFF2_MASK |
+-		      GDM4_SPORT_OFF1_MASK |
+-		      GDM4_SPORT_OFF0_MASK,
+-		      FIELD_PREP(GDM4_SPORT_OFF2_MASK, 8) |
+-		      FIELD_PREP(GDM4_SPORT_OFF1_MASK, 8) |
+-		      FIELD_PREP(GDM4_SPORT_OFF0_MASK, 8));
+	airoha_fe_rmw(eth, REG_GDM_SRC_PORT_SET(4),
+		      GDM_SPORT_OFF2_MASK |
+		      GDM_SPORT_OFF1_MASK |
+		      GDM_SPORT_OFF0_MASK,
+		      FIELD_PREP(GDM_SPORT_OFF2_MASK, 8) |
+		      FIELD_PREP(GDM_SPORT_OFF1_MASK, 8) |
+		      FIELD_PREP(GDM_SPORT_OFF0_MASK, 8));
+ 
+ 	/* set PSE Page as 128B */
+ 	airoha_fe_rmw(eth, REG_FE_DMA_GLO_CFG,
+@@ -499,8 +499,8 @@ static int airoha_fe_init(struct airoha_
+ 	airoha_fe_set(eth, REG_GDM_MISC_CFG,
+ 		      GDM2_RDM_ACK_WAIT_PREF_MASK |
+ 		      GDM2_CHN_VLD_MODE_MASK);
+-	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK,
+-		      FIELD_PREP(CDM2_OAM_QSEL_MASK, 15));
+	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(2), CDM_OAM_QSEL_MASK,
+		      FIELD_PREP(CDM_OAM_QSEL_MASK, 15));
+ 
+ 	/* init fragment and assemble Force Port */
+ 	/* NPU Core-3, NPU Bridge Channel-3 */
+@@ -514,8 +514,8 @@ static int airoha_fe_init(struct airoha_
+ 		      FIELD_PREP(IP_ASSEMBLE_PORT_MASK, 0) |
+ 		      FIELD_PREP(IP_ASSEMBLE_NBQ_MASK, 22));
+ 
+-	airoha_fe_set(eth, REG_GDM3_FWD_CFG, GDM3_PAD_EN_MASK);
+-	airoha_fe_set(eth, REG_GDM4_FWD_CFG, GDM4_PAD_EN_MASK);
+	airoha_fe_set(eth, REG_GDM_FWD_CFG(3), GDM_PAD_EN_MASK);
+	airoha_fe_set(eth, REG_GDM_FWD_CFG(4), GDM_PAD_EN_MASK);
+ 
+ 	airoha_fe_crsn_qsel_init(eth);
+ 
+@@ -523,7 +523,7 @@ static int airoha_fe_init(struct airoha_
+ 	airoha_fe_set(eth, REG_FE_CPORT_CFG, FE_CPORT_PORT_XFC_MASK);
+ 
+ 	/* default aging mode for mbi unlock issue */
+-	airoha_fe_rmw(eth, REG_GDM2_CHN_RLS,
+	airoha_fe_rmw(eth, REG_GDM_CHN_RLS(2),
+ 		      MBI_RX_AGE_SEL_MASK | MBI_TX_AGE_SEL_MASK,
+ 		      FIELD_PREP(MBI_RX_AGE_SEL_MASK, 3) |
+ 		      FIELD_PREP(MBI_TX_AGE_SEL_MASK, 3));
+@@ -1697,7 +1697,7 @@ static int airhoha_set_gdm2_loopback(str
+ 	pse_port = port->id == AIROHA_GDM3_IDX ? FE_PSE_PORT_GDM3
+ 					       : FE_PSE_PORT_GDM4;
+ 	airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(2), pse_port);
+-	airoha_fe_clear(eth, REG_GDM_FWD_CFG(2), GDM_STRIP_CRC);
+	airoha_fe_clear(eth, REG_GDM_FWD_CFG(2), GDM_STRIP_CRC_MASK);
+ 
+ 	/* Enable GDM2 loopback */
+ 	airoha_fe_wr(eth, REG_GDM_TXCHN_EN(2), 0xffffffff);
+--- a/drivers/net/ethernet/airoha/airoha_regs.h
+++ b/drivers/net/ethernet/airoha/airoha_regs.h
+@@ -23,6 +23,8 @@
+ #define GDM3_BASE			0x1100
+ #define GDM4_BASE			0x2500
+ 
+#define CDM_BASE(_n)			\
+	((_n) == 2 ? CDM2_BASE : CDM1_BASE)
+ #define GDM_BASE(_n)			\
+ 	((_n) == 4 ? GDM4_BASE :	\
+ 	 (_n) == 3 ? GDM3_BASE :	\
+@@ -109,30 +111,24 @@
+ #define PATN_DP_MASK			GENMASK(31, 16)
+ #define PATN_SP_MASK			GENMASK(15, 0)
+ 
+-#define REG_CDM1_VLAN_CTRL		CDM1_BASE
+-#define CDM1_VLAN_MASK			GENMASK(31, 16)
+#define REG_CDM_VLAN_CTRL(_n)		CDM_BASE(_n)
+#define CDM_VLAN_MASK			GENMASK(31, 16)
+ 
+-#define REG_CDM1_FWD_CFG		(CDM1_BASE + 0x08)
+-#define CDM1_VIP_QSEL_MASK		GENMASK(24, 20)
+#define REG_CDM_FWD_CFG(_n)		(CDM_BASE(_n) + 0x08)
+#define CDM_OAM_QSEL_MASK		GENMASK(31, 27)
+#define CDM_VIP_QSEL_MASK		GENMASK(24, 20)
+ 
+-#define REG_CDM1_CRSN_QSEL(_n)		(CDM1_BASE + 0x10 + ((_n) << 2))
+-#define CDM1_CRSN_QSEL_REASON_MASK(_n)	\
+-	GENMASK(4 + (((_n) % 4) << 3),	(((_n) % 4) << 3))
+-
+-#define REG_CDM2_FWD_CFG		(CDM2_BASE + 0x08)
+-#define CDM2_OAM_QSEL_MASK		GENMASK(31, 27)
+-#define CDM2_VIP_QSEL_MASK		GENMASK(24, 20)
+-
+-#define REG_CDM2_CRSN_QSEL(_n)		(CDM2_BASE + 0x10 + ((_n) << 2))
+-#define CDM2_CRSN_QSEL_REASON_MASK(_n)	\
+#define REG_CDM_CRSN_QSEL(_n, _m)	(CDM_BASE(_n) + 0x10 + ((_m) << 2))
+#define CDM_CRSN_QSEL_REASON_MASK(_n)	\
+ 	GENMASK(4 + (((_n) % 4) << 3),	(((_n) % 4) << 3))
+ 
+ #define REG_GDM_FWD_CFG(_n)		GDM_BASE(_n)
+-#define GDM_DROP_CRC_ERR		BIT(23)
+-#define GDM_IP4_CKSUM			BIT(22)
+-#define GDM_TCP_CKSUM			BIT(21)
+-#define GDM_UDP_CKSUM			BIT(20)
+-#define GDM_STRIP_CRC			BIT(16)
+#define GDM_PAD_EN_MASK			BIT(28)
+#define GDM_DROP_CRC_ERR_MASK		BIT(23)
+#define GDM_IP4_CKSUM_MASK		BIT(22)
+#define GDM_TCP_CKSUM_MASK		BIT(21)
+#define GDM_UDP_CKSUM_MASK		BIT(20)
+#define GDM_STRIP_CRC_MASK		BIT(16)
+ #define GDM_UCFQ_MASK			GENMASK(15, 12)
+ #define GDM_BCFQ_MASK			GENMASK(11, 8)
+ #define GDM_MCFQ_MASK			GENMASK(7, 4)
+@@ -156,6 +152,10 @@
+ #define LBK_CHAN_MODE_MASK		BIT(1)
+ #define LPBK_EN_MASK			BIT(0)
+ 
+#define REG_GDM_CHN_RLS(_n)		(GDM_BASE(_n) + 0x20)
+#define MBI_RX_AGE_SEL_MASK		GENMASK(26, 25)
+#define MBI_TX_AGE_SEL_MASK		GENMASK(18, 17)
+
+ #define REG_GDM_TXCHN_EN(_n)		(GDM_BASE(_n) + 0x24)
+ #define REG_GDM_RXCHN_EN(_n)		(GDM_BASE(_n) + 0x28)
+ 
+@@ -168,10 +168,10 @@
+ #define FE_GDM_MIB_RX_CLEAR_MASK	BIT(1)
+ #define FE_GDM_MIB_TX_CLEAR_MASK	BIT(0)
+ 
+-#define REG_FE_GDM1_MIB_CFG		(GDM1_BASE + 0xf4)
+#define REG_FE_GDM_MIB_CFG(_n)		(GDM_BASE(_n) + 0xf4)
+ #define FE_STRICT_RFC2819_MODE_MASK	BIT(31)
+-#define FE_GDM1_TX_MIB_SPLIT_EN_MASK	BIT(17)
+-#define FE_GDM1_RX_MIB_SPLIT_EN_MASK	BIT(16)
+#define FE_GDM_TX_MIB_SPLIT_EN_MASK	BIT(17)
+#define FE_GDM_RX_MIB_SPLIT_EN_MASK	BIT(16)
+ #define FE_TX_MIB_ID_MASK		GENMASK(15, 8)
+ #define FE_RX_MIB_ID_MASK		GENMASK(7, 0)
+ 
+@@ -214,6 +214,33 @@
+ #define REG_FE_GDM_RX_ETH_L511_CNT_L(_n)	(GDM_BASE(_n) + 0x198)
+ #define REG_FE_GDM_RX_ETH_L1023_CNT_L(_n)	(GDM_BASE(_n) + 0x19c)
+ 
+#define REG_GDM_SRC_PORT_SET(_n)		(GDM_BASE(_n) + 0x23c)
+#define GDM_SPORT_OFF2_MASK			GENMASK(19, 16)
+#define GDM_SPORT_OFF1_MASK			GENMASK(15, 12)
+#define GDM_SPORT_OFF0_MASK			GENMASK(11, 8)
+
+#define REG_FE_GDM_TX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x280)
+#define REG_FE_GDM_TX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x284)
+#define REG_FE_GDM_TX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x288)
+#define REG_FE_GDM_TX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x28c)
+
+#define REG_FE_GDM_RX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x290)
+#define REG_FE_GDM_RX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x294)
+#define REG_FE_GDM_RX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x298)
+#define REG_FE_GDM_RX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x29c)
+#define REG_FE_GDM_TX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2b8)
+#define REG_FE_GDM_TX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2bc)
+#define REG_FE_GDM_TX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2c0)
+#define REG_FE_GDM_TX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2c4)
+#define REG_FE_GDM_TX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2c8)
+#define REG_FE_GDM_TX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2cc)
+#define REG_FE_GDM_RX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2e8)
+#define REG_FE_GDM_RX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2ec)
+#define REG_FE_GDM_RX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2f0)
+#define REG_FE_GDM_RX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2f4)
+#define REG_FE_GDM_RX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2f8)
+#define REG_FE_GDM_RX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2fc)
+
+ #define REG_PPE_GLO_CFG(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x200)
+ #define PPE_GLO_CFG_BUSY_MASK			BIT(31)
+ #define PPE_GLO_CFG_FLOW_DROP_UPDATE_MASK	BIT(9)
+@@ -326,44 +353,6 @@
+ 
+ #define REG_UPDMEM_DATA(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x374)
+ 
+-#define REG_FE_GDM_TX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x280)
+-#define REG_FE_GDM_TX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x284)
+-#define REG_FE_GDM_TX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x288)
+-#define REG_FE_GDM_TX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x28c)
+-
+-#define REG_FE_GDM_RX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x290)
+-#define REG_FE_GDM_RX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x294)
+-#define REG_FE_GDM_RX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x298)
+-#define REG_FE_GDM_RX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x29c)
+-#define REG_FE_GDM_TX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2b8)
+-#define REG_FE_GDM_TX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2bc)
+-#define REG_FE_GDM_TX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2c0)
+-#define REG_FE_GDM_TX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2c4)
+-#define REG_FE_GDM_TX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2c8)
+-#define REG_FE_GDM_TX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2cc)
+-#define REG_FE_GDM_RX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2e8)
+-#define REG_FE_GDM_RX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2ec)
+-#define REG_FE_GDM_RX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2f0)
+-#define REG_FE_GDM_RX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2f4)
+-#define REG_FE_GDM_RX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2f8)
+-#define REG_FE_GDM_RX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2fc)
+-
+-#define REG_GDM2_CHN_RLS		(GDM2_BASE + 0x20)
+-#define MBI_RX_AGE_SEL_MASK		GENMASK(26, 25)
+-#define MBI_TX_AGE_SEL_MASK		GENMASK(18, 17)
+-
+-#define REG_GDM3_FWD_CFG		GDM3_BASE
+-#define GDM3_PAD_EN_MASK		BIT(28)
+-
+-#define REG_GDM4_FWD_CFG		GDM4_BASE
+-#define GDM4_PAD_EN_MASK		BIT(28)
+-#define GDM4_SPORT_OFFSET0_MASK		GENMASK(11, 8)
+-
+-#define REG_GDM4_SRC_PORT_SET		(GDM4_BASE + 0x23c)
+-#define GDM4_SPORT_OFF2_MASK		GENMASK(19, 16)
+-#define GDM4_SPORT_OFF1_MASK		GENMASK(15, 12)
+-#define GDM4_SPORT_OFF0_MASK		GENMASK(11, 8)
+-
+ #define REG_IP_FRAG_FP			0x2010
+ #define IP_ASSEMBLE_PORT_MASK		GENMASK(24, 21)
+ #define IP_ASSEMBLE_NBQ_MASK		GENMASK(20, 16)
--- a/target/linux/airoha/patches-6.12/104-v6.16-net-airoha-Fix-an-error-handling-path-in-airoha_prob.patch
+++ b/target/linux/airoha/patches-6.12/104-v6.16-net-airoha-Fix-an-error-handling-path-in-airoha_prob.patch
@ -0,0 +1,29 @@
+From 3ef07434c7dbfba302df477bb6c70e082965f232 Mon Sep 17 00:00:00 2001
+From: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
+Date: Sat, 5 Jul 2025 10:34:32 +0200
+Subject: [PATCH] net: airoha: Fix an error handling path in airoha_probe()
+
+If an error occurs after a successful airoha_hw_init() call,
+airoha_ppe_deinit() needs to be called as already done in the remove
+function.
+
+Fixes: 00a7678310fe ("net: airoha: Introduce flowtable offload support")
+Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
+Reviewed-by: Simon Horman <horms@kernel.org>
+Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://patch.msgid.link/1c940851b4fa3c3ed2a142910c821493a136f121.1746715755.git.christophe.jaillet@wanadoo.fr
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_eth.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
+@@ -3044,6 +3044,7 @@ static int airoha_probe(struct platform_
+ error_napi_stop:
+ 	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ 		airoha_qdma_stop_napi(&eth->qdma[i]);
+	airoha_ppe_deinit(eth);
+ error_hw_cleanup:
+ 	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ 		airoha_hw_cleanup(&eth->qdma[i]);
--- a/target/linux/airoha/patches-6.12/116-05-net-airoha-drop-redundant-GDM3-4-define.patch
+++ b/target/linux/airoha/patches-6.12/116-05-net-airoha-drop-redundant-GDM3-4-define.patch
@ -1,52 +0,0 @@
-From 6fbb7d72520393a3d447399799d436f17c03ff24 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Fri, 17 Jan 2025 10:29:52 +0100
-Subject: [PATCH 5/9] net: airoha: drop redundant GDM3/4 define
-
-The GDM FWD register are all the same hence it's redundant to have
-specific define for GDM3 and GDM4. Drop the redundant define and use the
-generic macro.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
- drivers/net/ethernet/airoha/airoha_eth.c  | 4 ++--
- drivers/net/ethernet/airoha/airoha_regs.h | 8 +-------
- 2 files changed, 3 insertions(+), 9 deletions(-)
-
--- a/drivers/net/ethernet/airoha/airoha_eth.c
-+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -514,8 +514,8 @@ static int airoha_fe_init(struct airoha_
- 		      FIELD_PREP(IP_ASSEMBLE_PORT_MASK, 0) |
- 		      FIELD_PREP(IP_ASSEMBLE_NBQ_MASK, 22));
- 
-	airoha_fe_set(eth, REG_GDM3_FWD_CFG, GDM3_PAD_EN_MASK);
-	airoha_fe_set(eth, REG_GDM4_FWD_CFG, GDM4_PAD_EN_MASK);
-+	airoha_fe_set(eth, REG_GDM_FWD_CFG(3), GDM_PAD_EN);
-+	airoha_fe_set(eth, REG_GDM_FWD_CFG(4), GDM_PAD_EN);
- 
- 	airoha_fe_crsn_qsel_init(eth);
- 
--- a/drivers/net/ethernet/airoha/airoha_regs.h
-+++ b/drivers/net/ethernet/airoha/airoha_regs.h
-@@ -128,6 +128,7 @@
- 	GENMASK(4 + (((_n) % 4) << 3),	(((_n) % 4) << 3))
- 
- #define REG_GDM_FWD_CFG(_n)		GDM_BASE(_n)
-+#define GDM_PAD_EN			BIT(28)
- #define GDM_DROP_CRC_ERR		BIT(23)
- #define GDM_IP4_CKSUM			BIT(22)
- #define GDM_TCP_CKSUM			BIT(21)
-@@ -352,13 +353,6 @@
- #define MBI_RX_AGE_SEL_MASK		GENMASK(26, 25)
- #define MBI_TX_AGE_SEL_MASK		GENMASK(18, 17)
- 
-#define REG_GDM3_FWD_CFG		GDM3_BASE
-#define GDM3_PAD_EN_MASK		BIT(28)
-
-#define REG_GDM4_FWD_CFG		GDM4_BASE
-#define GDM4_PAD_EN_MASK		BIT(28)
-#define GDM4_SPORT_OFFSET0_MASK		GENMASK(11, 8)
-
- #define REG_GDM4_SRC_PORT_SET		(GDM4_BASE + 0x23c)
- #define GDM4_SPORT_OFF2_MASK		GENMASK(19, 16)
- #define GDM4_SPORT_OFF1_MASK		GENMASK(15, 12)
--- a/target/linux/airoha/patches-6.12/116-06-net-airoha-add-initial-fixup-for-GDM3-4-port-support.patch
+++ b/target/linux/airoha/patches-6.12/116-06-net-airoha-add-initial-fixup-for-GDM3-4-port-support.patch
@ -19,12 +19,12 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 		      FIELD_PREP(IP_ASSEMBLE_PORT_MASK, 0) |
 		      FIELD_PREP(IP_ASSEMBLE_NBQ_MASK, 22));
 
-	airoha_fe_set(eth, REG_GDM_FWD_CFG(3), GDM_PAD_EN);
-	airoha_fe_set(eth, REG_GDM_FWD_CFG(4), GDM_PAD_EN);
+-	airoha_fe_set(eth, REG_GDM_FWD_CFG(3), GDM_PAD_EN_MASK);
+-	airoha_fe_set(eth, REG_GDM_FWD_CFG(4), GDM_PAD_EN_MASK);
 +	airoha_fe_set(eth, REG_GDM_FWD_CFG(3),
-+		      GDM_PAD_EN | GDM_STRIP_CRC);
+		      GDM_PAD_EN_MASK | GDM_STRIP_CRC_MASK);
 +	airoha_fe_set(eth, REG_GDM_FWD_CFG(4),
-+		      GDM_PAD_EN | GDM_STRIP_CRC);
+		      GDM_PAD_EN_MASK | GDM_STRIP_CRC_MASK);
 
 	airoha_fe_crsn_qsel_init(eth);
 
--- a/target/linux/airoha/patches-6.12/116-07-airoha-ethernet-drop-xsi-mac-reset.patch
+++ b/target/linux/airoha/patches-6.12/116-07-airoha-ethernet-drop-xsi-mac-reset.patch
@ -15,7 +15,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>

 --- a/drivers/net/ethernet/airoha/airoha_eth.c
 +++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -3099,7 +3099,6 @@ static void airoha_remove(struct platfor
+@@ -3100,7 +3100,6 @@ static void airoha_remove(struct platfor
 }
 
 static const char * const en7581_xsi_rsts_names[] = {
@ -23,7 +23,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 	"hsi0-mac",
 	"hsi1-mac",
 	"hsi-mac",
-@@ -3131,7 +3130,6 @@ static int airoha_en7581_get_src_port_id
+@@ -3132,7 +3131,6 @@ static int airoha_en7581_get_src_port_id
 }
 
 static const char * const an7583_xsi_rsts_names[] = {
--- a/target/linux/airoha/patches-6.12/116-10-net-airoha-add-phylink-support-for-GDM2-4.patch
+++ b/target/linux/airoha/patches-6.12/116-10-net-airoha-add-phylink-support-for-GDM2-4.patch
@ -199,7 +199,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 	err = register_netdev(dev);
 	if (err)
 		goto free_metadata_dst;
-@@ -3064,6 +3199,10 @@ error_hw_cleanup:
+@@ -3065,6 +3200,10 @@ error_hw_cleanup:
 		if (port && port->dev->reg_state == NETREG_REGISTERED) {
 			unregister_netdev(port->dev);
 			airoha_metadata_dst_free(port);
@ -210,7 +210,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 		}
 	}
 	free_netdev(eth->napi_dev);
-@@ -3091,6 +3230,10 @@ static void airoha_remove(struct platfor
+@@ -3092,6 +3231,10 @@ static void airoha_remove(struct platfor
 		airoha_dev_stop(port->dev);
 		unregister_netdev(port->dev);
 		airoha_metadata_dst_free(port);
@ -236,7 +236,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 	DECLARE_BITMAP(qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS);
 --- a/drivers/net/ethernet/airoha/airoha_regs.h
 +++ b/drivers/net/ethernet/airoha/airoha_regs.h
-@@ -364,6 +364,18 @@
+@@ -359,6 +359,18 @@
 #define IP_FRAGMENT_PORT_MASK		GENMASK(8, 5)
 #define IP_FRAGMENT_NBQ_MASK		GENMASK(4, 0)
 
--- a/target/linux/airoha/patches-6.12/606-net-airoha-disable-external-phy-code-if-PCS_AIROHA-i.patch
+++ b/target/linux/airoha/patches-6.12/606-net-airoha-disable-external-phy-code-if-PCS_AIROHA-i.patch
@ -103,7 +103,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
 
 	err = register_netdev(dev);
 	if (err)
-@@ -3202,10 +3214,12 @@ error_hw_cleanup:
+@@ -3203,10 +3215,12 @@ error_hw_cleanup:
 		if (port && port->dev->reg_state == NETREG_REGISTERED) {
 			unregister_netdev(port->dev);
 			airoha_metadata_dst_free(port);
@ -116,7 +116,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
 		}
 	}
 	free_netdev(eth->napi_dev);
-@@ -3233,10 +3247,12 @@ static void airoha_remove(struct platfor
+@@ -3234,10 +3248,12 @@ static void airoha_remove(struct platfor
 		airoha_dev_stop(port->dev);
 		unregister_netdev(port->dev);
 		airoha_metadata_dst_free(port);
--- a/target/linux/airoha/patches-6.12/801-01-net-phy-add-PHY_DETACH_NO_HW_RESET-PHY-flag.patch
+++ b/target/linux/airoha/patches-6.12/801-01-net-phy-add-PHY_DETACH_NO_HW_RESET-PHY-flag.patch
@ -0,0 +1,129 @@
+From f2c6f8711c3866caafee997cfa60af4f38879be0 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Wed, 25 Jun 2025 00:45:11 +0200
+Subject: [PATCH 1/2] net: phy: add PHY_DETACH_NO_HW_RESET PHY flag
+
+Some PHY require a firmware to correctly work and such firmware might
+get reset when the GPIO reset is assert.
+
+This is the case for the Aeonsemi PHY where when the PHY is torn down,
+phy_detach() is called that assert the GPIO reset pin resetting the
+firmware.
+
+To handle this introduce a flag, PHY_DETACH_NO_HW_RESET that instruct
+phy_detach() to skip asserting the GPIO reset on detaching the PHY.
+
+The PHY is still reset in all other case where it's removed or the PHY
+fails to probe.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c    | 10 ++++++++++
+ drivers/net/phy/phy_device.c |  3 ++-
+ include/linux/phy.h          |  1 +
+ 3 files changed, 13 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/phy/as21xxx.c
+++ b/drivers/net/phy/as21xxx.c
+@@ -964,6 +964,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21011PB1),
+@@ -976,6 +977,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21010PB1),
+@@ -988,6 +990,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21010JB1),
+@@ -1000,6 +1003,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21210PB1),
+@@ -1012,6 +1016,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21510JB1),
+@@ -1024,6 +1029,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21510PB1),
+@@ -1036,6 +1042,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21511JB1),
+@@ -1048,6 +1055,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21210JB1),
+@@ -1060,6 +1068,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21511PB1),
+@@ -1072,6 +1081,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ };
+ module_phy_driver(as21xxx_drivers);
+--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
+@@ -2074,7 +2074,8 @@ void phy_detach(struct phy_device *phyde
+ 		device_release_driver(&phydev->mdio.dev);
+ 
+ 	/* Assert the reset signal */
+-	phy_device_reset(phydev, 1);
+	if (!(phydev->drv->flags & PHY_DETACH_NO_HW_RESET))
+		phy_device_reset(phydev, 1);
+ 
+ 	/*
+ 	 * The phydev might go away on the put_device() below, so avoid
+--- a/include/linux/phy.h
+++ b/include/linux/phy.h
+@@ -90,6 +90,7 @@ extern const int phy_10gbit_features_arr
+ #define PHY_RST_AFTER_CLK_EN	0x00000002
+ #define PHY_POLL_CABLE_TEST	0x00000004
+ #define PHY_ALWAYS_CALL_SUSPEND	0x00000008
+#define PHY_DETACH_NO_HW_RESET	0x00000010
+ #define MDIO_DEVICE_IS_PHY	0x80000000
+ 
+ /**
--- a/target/linux/airoha/patches-6.12/801-02-net-phy-as21xxx-add-flag-PHY_DETACH_NO_HW_RESET.patch
+++ b/target/linux/airoha/patches-6.12/801-02-net-phy-as21xxx-add-flag-PHY_DETACH_NO_HW_RESET.patch
@ -0,0 +1,108 @@
+From 7ad1470c3d08c1abea747aa0c789e924f63fcbc4 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Wed, 25 Jun 2025 00:51:45 +0200
+Subject: [PATCH 2/2] net: phy: as21xxx: add flag PHY_DETACH_NO_HW_RESET
+
+Add flag PHY_DETACH_NO_HW_RESET to handle firmware getting reset on
+calling phy_detach() if the GPIO reset PIN is defined in DT.
+
+This will skip the firmware from getting reset permitting the PHY to
+continue work when the PHY is torn down and gets up again.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c | 20 ++++++++++----------
+ 1 file changed, 10 insertions(+), 10 deletions(-)
+
+--- a/drivers/net/phy/as21xxx.c
+++ b/drivers/net/phy/as21xxx.c
+@@ -964,7 +964,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
+		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21011PB1),
+@@ -977,7 +977,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
+		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21010PB1),
+@@ -990,7 +990,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
+		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21010JB1),
+@@ -1003,7 +1003,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
+		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21210PB1),
+@@ -1016,7 +1016,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
+		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21510JB1),
+@@ -1029,7 +1029,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
+		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21510PB1),
+@@ -1042,7 +1042,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
+		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21511JB1),
+@@ -1055,7 +1055,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
+		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21210JB1),
+@@ -1068,7 +1068,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
+		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21511PB1),
+@@ -1081,7 +1081,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
+		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ };
+ module_phy_driver(as21xxx_drivers);
--- a/target/linux/airoha/patches-6.12/802-01-net-phy-as21xxx-handle-corner-case-with-link-and-aut.patch
+++ b/target/linux/airoha/patches-6.12/802-01-net-phy-as21xxx-handle-corner-case-with-link-and-aut.patch
@ -0,0 +1,31 @@
+From 0146a02d9d182796c3d8e4a432c4d94cac042f8e Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Mon, 7 Jul 2025 18:58:25 +0200
+Subject: [PATCH 1/4] net: phy: as21xxx: handle corner case with link and
+ autoneg complete
+
+Add missing case in custom read_link, when autoneg is started, autoneg
+complete bit is reset but link is still not up.
+
+Fixes: 830877d89edc ("net: phy: Add support for Aeonsemi AS21xxx PHYs")
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/net/phy/as21xxx.c
+++ b/drivers/net/phy/as21xxx.c
+@@ -658,6 +658,13 @@ static int as21xxx_read_link(struct phy_
+ 		return status;
+ 
+ 	phydev->link = !!(status & MDIO_STAT1_LSTATUS);
+	phydev->autoneg_complete = !!(status & MDIO_AN_STAT1_COMPLETE);
+
+	/* Consider the case that autoneg was started and "aneg complete"
+	 * bit has been reset, but "link up" bit not yet.
+	 */
+	if (phydev->autoneg == AUTONEG_ENABLE && !phydev->autoneg_complete)
+		phydev->link = 0;
+ 
+ 	return 0;
+ }
--- a/target/linux/airoha/patches-6.12/802-02-net-phy-as21xxx-fix-read_status-speed-handling.patch
+++ b/target/linux/airoha/patches-6.12/802-02-net-phy-as21xxx-fix-read_status-speed-handling.patch
@ -0,0 +1,156 @@
+From d90186b1e48dd4a428abf889b1eb17d2469de08b Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 8 Jul 2025 10:50:42 +0200
+Subject: [PATCH 2/4] net: phy: as21xxx: fix read_status speed handling
+
+With further test with 2.5G NIC it was discovered that
+phy_resolve_aneg_linkmode is not enough to detect speed higher that 1G
+when autoneg is enabled.
+
+Also in the switch case there is a typo where the speed mask is AND with
+VEND1_SPEED_STATUS instead of the correct mask VEND1_SPEED_MASK.
+
+Rework the read_status code to always read the speed from the vendor
+register and parse the generic bit only for the pause frame.
+
+Fixes: 830877d89edc ("net: phy: Add support for Aeonsemi AS21xxx PHYs")
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c | 96 +++++++++++++++++++++------------------
+ 1 file changed, 53 insertions(+), 43 deletions(-)
+
+--- a/drivers/net/phy/as21xxx.c
+++ b/drivers/net/phy/as21xxx.c
+@@ -671,7 +671,7 @@ static int as21xxx_read_link(struct phy_
+ 
+ static int as21xxx_read_c22_lpa(struct phy_device *phydev)
+ {
+-	int lpagb;
+	int lpagb, lpa;
+ 
+ 	/* MII_STAT1000 are only filled in the mapped C22
+ 	 * in C45, use that to fill lpagb values and check.
+@@ -698,12 +698,20 @@ static int as21xxx_read_c22_lpa(struct p
+ 	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising,
+ 					lpagb);
+ 
+	lpa = phy_read_mmd(phydev, MDIO_MMD_AN,
+			   AS21XXX_MDIO_AN_C22 + MII_LPA);
+	if (lpa < 0)
+		return lpa;
+
+	mii_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
+
+ 	return 0;
+ }
+ 
+ static int as21xxx_read_status(struct phy_device *phydev)
+ {
+ 	int bmcr, old_link = phydev->link;
+	int speed;
+ 	int ret;
+ 
+ 	ret = as21xxx_read_link(phydev, &bmcr);
+@@ -720,58 +728,60 @@ static int as21xxx_read_status(struct ph
+ 	phydev->asym_pause = 0;
+ 
+ 	if (phydev->autoneg == AUTONEG_ENABLE) {
+-		ret = genphy_c45_read_lpa(phydev);
+-		if (ret)
+-			return ret;
+		if (!phydev->autoneg_complete) {
+			mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising,
+							0);
+			mii_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+			return 0;
+		}
+ 
+ 		ret = as21xxx_read_c22_lpa(phydev);
+ 		if (ret)
+ 			return ret;
+-
+-		phy_resolve_aneg_linkmode(phydev);
+ 	} else {
+-		int speed;
+-
+ 		linkmode_zero(phydev->lp_advertising);
+	}
+ 
+-		speed = phy_read_mmd(phydev, MDIO_MMD_VEND1,
+-				     VEND1_SPEED_STATUS);
+-		if (speed < 0)
+-			return speed;
+-
+-		switch (speed & VEND1_SPEED_STATUS) {
+-		case VEND1_SPEED_10000:
+-			phydev->speed = SPEED_10000;
+	speed = phy_read_mmd(phydev, MDIO_MMD_VEND1,
+			     VEND1_SPEED_STATUS);
+	if (speed < 0)
+		return speed;
+
+	switch (speed & VEND1_SPEED_MASK) {
+	case VEND1_SPEED_10000:
+		phydev->speed = SPEED_10000;
+		phydev->duplex = DUPLEX_FULL;
+		break;
+	case VEND1_SPEED_5000:
+		phydev->speed = SPEED_5000;
+		phydev->duplex = DUPLEX_FULL;
+		break;
+	case VEND1_SPEED_2500:
+		phydev->speed = SPEED_2500;
+		phydev->duplex = DUPLEX_FULL;
+		break;
+	case VEND1_SPEED_1000:
+		phydev->speed = SPEED_1000;
+		if (bmcr & BMCR_FULLDPLX)
+ 			phydev->duplex = DUPLEX_FULL;
+-			break;
+-		case VEND1_SPEED_5000:
+-			phydev->speed = SPEED_5000;
+-			phydev->duplex = DUPLEX_FULL;
+-			break;
+-		case VEND1_SPEED_2500:
+-			phydev->speed = SPEED_2500;
+-			phydev->duplex = DUPLEX_FULL;
+-			break;
+-		case VEND1_SPEED_1000:
+-			phydev->speed = SPEED_1000;
+-			if (bmcr & BMCR_FULLDPLX)
+-				phydev->duplex = DUPLEX_FULL;
+-			else
+-				phydev->duplex = DUPLEX_HALF;
+-			break;
+-		case VEND1_SPEED_100:
+-			phydev->speed = SPEED_100;
+-			phydev->duplex = DUPLEX_FULL;
+-			break;
+-		case VEND1_SPEED_10:
+-			phydev->speed = SPEED_10;
+-			phydev->duplex = DUPLEX_FULL;
+-			break;
+-		default:
+-			return -EINVAL;
+-		}
+		else
+			phydev->duplex = DUPLEX_HALF;
+		break;
+	case VEND1_SPEED_100:
+		phydev->speed = SPEED_100;
+		phydev->duplex = DUPLEX_FULL;
+		break;
+	case VEND1_SPEED_10:
+		phydev->speed = SPEED_10;
+		phydev->duplex = DUPLEX_FULL;
+		break;
+	default:
+		return -EINVAL;
+ 	}
+ 
+	if (phydev->autoneg == AUTONEG_ENABLE)
+		phy_resolve_aneg_pause(phydev);
+
+ 	return 0;
+ }
+ 
--- a/target/linux/airoha/patches-6.12/802-03-net-phy-as21xxx-force-C45-OPs-for-AUTONEG.patch
+++ b/target/linux/airoha/patches-6.12/802-03-net-phy-as21xxx-force-C45-OPs-for-AUTONEG.patch
@ -0,0 +1,34 @@
+From 6003da596beb6b8974e61b7ff494476a323fbef5 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 8 Jul 2025 11:29:49 +0200
+Subject: [PATCH 3/4] net: phy: as21xxx: force C45 OPs for AUTONEG
+
+With further testing with 2.5G NIC, it was discovered that the PHY
+require the C45 OPs to configure and restart ANEG or speed higher than
+1G doesn't function correctly.
+
+To force C45 OPs with generic PHY function, clear the C22 bit from
+devices_in_package bitmask.
+
+Fixes: 830877d89edc ("net: phy: Add support for Aeonsemi AS21xxx PHYs")
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/net/phy/as21xxx.c
+++ b/drivers/net/phy/as21xxx.c
+@@ -616,6 +616,13 @@ static int as21xxx_probe(struct phy_devi
+ 	if (ret)
+ 		return ret;
+ 
+	/* Even if PHY declare support for Clause 22 register,
+	 * Clause 45 register should be used for ANEG configuration
+	 * and restart. Clear the C22 bit for devices_in_package to
+	 * force C45 generic OPs in generic PHY ANGE OPs.
+	 */
+	phydev->c45_ids.devices_in_package &= ~BIT(0);
+
+ 	ret = aeon_ipc_sync_parity(phydev, priv);
+ 	if (ret)
+ 		return ret;
--- a/target/linux/airoha/patches-6.12/804-net-phy-as21xxx-implement-read-workaround-for-C45-re.patch
+++ b/target/linux/airoha/patches-6.12/804-net-phy-as21xxx-implement-read-workaround-for-C45-re.patch
@ -0,0 +1,132 @@
+From fabaa8a7183d10217e14af437fd3805bd6dd9eba Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Sat, 18 Oct 2025 04:12:41 +0200
+Subject: [PATCH] net: phy: as21xxx: implement read workaround for C45 read
+
+This PHY have lots of problems with MDIO read operation. We somehow
+workaround this with using C45 operation for pretty much everything but
+this is not enough. The reference code for this PHY makes a write to an
+unused PHY to workaround this read problem. This was also confirmed by
+Aeonsemi.
+
+Various test were made to try to workaround this ins alternative way
+than the random write.
+
+One effective solution was to limit the write only to BMSR. And also
+write to BMSR is safe since they are only read only registers.
+
+This is only done for read operation as write operation doesn't suffer
+from this problem.
+
+Worth to mention that when multiple Aeonsemi PHY are mounted, the
+workaround doesn't work if we write to another Aeonsemi PHY.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+--- a/drivers/net/phy/as21xxx.c
+++ b/drivers/net/phy/as21xxx.c
+@@ -966,6 +966,21 @@ out:
+ 	return ret;
+ }
+ 
+static int as21xxx_read_mmd(struct phy_device *phydev, int devad,
+			    u16 regnum)
+{
+	struct mii_bus *bus = phydev->mdio.bus;
+	int val;
+
+	val = __mdiobus_c45_read(bus, phydev->mdio.addr, devad,
+				 regnum);
+
+	/* FIXME: verify if it's actually ok to limit this to MII_BMSR */
+	__mdiobus_write(bus, 0x0, MII_BMSR, 0x1);
+
+	return val;
+}
+
+ static struct phy_driver as21xxx_drivers[] = {
+ 	{
+ 		/* PHY expose in C45 as 0x7500 0x9410
+@@ -983,6 +998,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
+		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -996,6 +1012,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
+		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1009,6 +1026,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
+		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1022,6 +1040,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
+		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1035,6 +1054,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
+		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1048,6 +1068,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
+		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1061,6 +1082,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
+		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1074,6 +1096,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
+		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1087,6 +1110,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
+		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1100,6 +1124,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
+		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
--- a/target/linux/ath79/dts/qca9557_engenius_esr1200.dts
+++ b/target/linux/ath79/dts/qca9557_engenius_esr1200.dts
@ -73,12 +73,20 @@
 	status = "okay";
 };

-&wmac {
-	nvmem-cells = <&calibration_art_1000>;
-	nvmem-cell-names = "calibration";
+&nvmem {
+	calibration_art_5000: calibration@5000 {
+		reg = <0x5000 0x844>;
+	};
 };

-&ath10k_0 {
-	nvmem-cells = <&calibration_art_5000>;
-	nvmem-cell-names = "calibration";
+&wmac {
+	nvmem-cells = <&calibration_art_1000>, <&macaddr_uboot_eth 1>;
+	nvmem-cell-names = "calibration", "mac-address";
+};
+
+&wifi0 {
+	compatible = "qcom,ath10k";
+
+	nvmem-cells = <&calibration_art_5000>, <&macaddr_uboot_eth 0>;
+	nvmem-cell-names = "calibration", "mac-address";
 };
--- a/target/linux/ath79/dts/qca9558_engenius_epg5000.dts
+++ b/target/linux/ath79/dts/qca9558_engenius_epg5000.dts
@ -73,12 +73,20 @@
 	status = "okay";
 };

-&wmac {
-	nvmem-cells = <&calibration_art_1000>;
-	nvmem-cell-names = "calibration";
+&nvmem {
+	calibration_art_5000: calibration@5000 {
+		reg = <0x5000 0x844>;
+	};
 };

-&ath10k_0 {
-	nvmem-cells = <&calibration_art_5000>;
-	nvmem-cell-names = "calibration";
+&wmac {
+	nvmem-cells = <&calibration_art_1000>, <&macaddr_uboot_eth 1>;
+	nvmem-cell-names = "calibration", "mac-address";
+};
+
+&wifi0 {
+	compatible = "qcom,ath10k";
+
+	nvmem-cells = <&calibration_art_5000>, <&macaddr_uboot_eth 0>;
+	nvmem-cell-names = "calibration", "mac-address";
 };
--- a/target/linux/ath79/dts/qca9558_engenius_esr1750.dts
+++ b/target/linux/ath79/dts/qca9558_engenius_esr1750.dts
@ -73,12 +73,20 @@
 	status = "okay";
 };

-&wmac {
-	nvmem-cells = <&calibration_art_1000>;
-	nvmem-cell-names = "calibration";
+&nvmem {
+	calibration_art_5000: calibration@5000 {
+		reg = <0x5000 0x844>;
+	};
 };

-&ath10k_0 {
-	nvmem-cells = <&calibration_art_5000>;
-	nvmem-cell-names = "calibration";
+&wmac {
+	nvmem-cells = <&calibration_art_1000>, <&macaddr_uboot_eth 1>;
+	nvmem-cell-names = "calibration", "mac-address";
+};
+
+&wifi0 {
+	compatible = "qcom,ath10k";
+
+	nvmem-cells = <&calibration_art_5000>, <&macaddr_uboot_eth 0>;
+	nvmem-cell-names = "calibration", "mac-address";
 };
--- a/target/linux/ath79/dts/qca9558_engenius_esr900.dts
+++ b/target/linux/ath79/dts/qca9558_engenius_esr900.dts
@ -73,18 +73,20 @@
 	status = "okay";
 };

-&wmac {
-	nvmem-cells = <&calibration_art_1000>;
-	nvmem-cell-names = "calibration";
-};
-
-&pcie0 {
-	status = "okay";
-
-	wifi@0,0 {
-		compatible = "pci168c,0033";
-		reg = <0x0000 0 0 0 0>;
-		nvmem-cells = <&calibration_art_5000>;
-		nvmem-cell-names = "calibration";
+&nvmem {
+	calibration_art_5000: calibration@5000 {
+		reg = <0x5000 0x440>;
 	};
 };
+
+&wmac {
+	nvmem-cells = <&calibration_art_1000>, <&macaddr_uboot_eth 0>;
+	nvmem-cell-names = "calibration", "mac-address";
+};
+
+&wifi0 {
+	compatible = "pci168c,0033";
+
+	nvmem-cells = <&calibration_art_5000>, <&macaddr_uboot_eth 1>;
+	nvmem-cell-names = "calibration", "mac-address";
+};
--- a/target/linux/ath79/dts/qca955x_senao_router-dual.dtsi
+++ b/target/linux/ath79/dts/qca955x_senao_router-dual.dtsi
@ -30,6 +30,9 @@

 	phy-handle = <&phy0>;
 	pll-data = <0xa6000000 0x00000101 0x00001616>;
+
+	nvmem-cells = <&macaddr_uboot_eth 0>;
+	nvmem-cell-names = "mac-address";
 };

 &mdio0 {
@ -43,8 +46,7 @@
 &pcie0 {
 	status = "okay";

-	ath10k_0: wifi@0,0 {
-		compatible = "qcom,ath10k";
+	wifi0: wifi@0,0 {
 		reg = <0x0000 0 0 0 0>;
 	};
 };
@ -72,6 +74,16 @@
 				label = "u-boot-env";
 				reg = <0x030000 0x010000>;
 				read-only;
+
+				nvmem-layout {
+					compatible = "u-boot,env";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_uboot_eth: ethaddr {
+						#nvmem-cell-cells = <1>;
+					};
+				};
 			};

 			partition@40000 {
@ -103,7 +115,7 @@
 				reg = <0xff0000 0x010000>;
 				read-only;

-				nvmem-layout {
+				nvmem: nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
 					#size-cells = <1>;
@ -111,10 +123,6 @@
 					calibration_art_1000: calibration@1000 {
 						reg = <0x1000 0x440>;
 					};
-
-					calibration_art_5000: calibration@5000 {
-						reg = <0x5000 0x844>;
-					};
 				};
 			};
 		};
--- a/target/linux/ath79/generic/base-files/etc/board.d/02_network
+++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network
@ -738,7 +738,6 @@ ath79_setup_macs()
 	engenius,esr1200|\
 	engenius,esr1750|\
 	engenius,esr900)
-		lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
 		wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
 		;;
 	engenius,ews511ap)
--- a/target/linux/ath79/generic/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
+++ b/target/linux/ath79/generic/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
@ -52,12 +52,6 @@ case "$board" in
 		[ "$PHYNBR" -eq 0 ] && \
 			mtd_get_mac_ascii u-boot-env athaddr > /sys${DEVPATH}/macaddress
 		;;
-	engenius,epg5000|\
-	engenius,esr1200|\
-	engenius,esr1750|\
-	engenius,esr900)
-		macaddr_add "$(mtd_get_mac_ascii u-boot-env ethaddr)" "$PHYNBR" > /sys${DEVPATH}/macaddress
-		;;
 	engenius,ews511ap)
 		[ "$PHYNBR" -eq 0 ] && \
 		macaddr_add $(cat /sys/class/net/eth0/address) 1 > /sys${DEVPATH}/macaddress
--- a/target/linux/ath79/generic/base-files/lib/preinit/10_fix_eth_mac.sh
+++ b/target/linux/ath79/generic/base-files/lib/preinit/10_fix_eth_mac.sh
@ -12,12 +12,6 @@ preinit_set_mac_address() {
 		ip link set dev eth0 address $(mtd_get_mac_ascii bdcfg "lanmac")
 		ip link set dev eth1 address $(mtd_get_mac_ascii bdcfg "wanmac")
 		;;
-	engenius,epg5000|\
-	engenius,esr1200|\
-	engenius,esr1750|\
-	engenius,esr900)
-		ip link set dev eth0 address $(mtd_get_mac_ascii u-boot-env ethaddr)
-		;;
 	siemens,ws-ap3610)
 		ip link set dev eth0 address $(mtd_get_mac_ascii cfg1 ethaddr)
 		;;
--- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds
+++ b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
@ -55,48 +55,11 @@ engenius,ens620ext)
 glinet,gl-ap1300)
 	ucidef_set_led_netdev "wan" "WAN" "white:wan" "wan"
 	;;
-glinet,gl-b1300 |\
+glinet,gl-b1300|\
 mikrotik,lhgg-60ad)
 	ucidef_set_led_wlan "wlan" "WLAN" "green:wlan" "phy0tpt"
 	;;
-mikrotik,cap-ac)
-	ucidef_set_led_default "power" "POWER" "blue:power" "1"
-	ucidef_set_led_default "user" "USER" "green:user" "0"
-	ucidef_set_led_netdev "eth1" "ETH1" "green:eth1" "wan"
-	ucidef_set_led_netdev "eth2" "ETH2" "green:eth2" "lan"
-	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy0tpt"
-	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy1tpt"
-	;;
-mikrotik,hap-ac3)
-	ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0"
-	ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "lan1"
-	ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "lan2"
-	ucidef_set_led_netdev "lan3" "LAN3" "green:lan3" "lan3"
-	ucidef_set_led_netdev "lan4" "LAN4" "green:lan4" "lan4"
-	ucidef_set_led_gpio "poe" "POE" "red:poe" "452" "0"
-	;;
-mikrotik,hap-ac3-lte6-kit)
-        ucidef_set_led_netdev "wan" "WAN" "green:wan" "wan"
-        ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "lan1"
-        ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "lan2"
-        ucidef_set_led_netdev "lan3" "LAN3" "green:lan3" "lan3"
-        ucidef_set_led_netdev "lan4" "LAN4" "green:lan4" "lan4"
-        ;;
-
-mikrotik,sxtsq-5-ac)
-	ucidef_set_rssimon "wlan0" "200000" "1"
-	ucidef_set_led_rssi "rssilow" "rssilow" "green:rssilow" "wlan0" "1" "100"
-	ucidef_set_led_rssi "rssimediumlow" "rssimediumlow" "green:rssimediumlow" "wlan0" "21" "100"
-	ucidef_set_led_rssi "rssimedium" "rssimedium" "green:rssimedium" "wlan0" "41" "100"
-	ucidef_set_led_rssi "rssimediumhigh" "rssimediumhigh" "green:rssimediumhigh" "wlan0" "61" "100"
-	ucidef_set_led_rssi "rssihigh" "rssihigh" "green:rssihigh" "wlan0" "81" "100"
-	;;
-mobipromo,cm520-79f)
-	ucidef_set_led_netdev "wan" "WAN" "blue:wan" "wan"
-	ucidef_set_led_netdev "lan1" "LAN1" "blue:lan1" "lan1"
-	ucidef_set_led_netdev "lan2" "LAN2" "blue:lan2" "lan2"
-	;;
-meraki,gx20 |\
+meraki,gx20|\
 meraki,z3)
 	ucidef_set_led_netdev "wan_link" "WAN (link)" "green:wan-0" "wan" "link"
 	ucidef_set_led_netdev "wan_act" "WAN (txrx)" "green:wan-1" "wan" "tx rx"
@ -119,12 +82,48 @@ meraki,mr30h)
 	ucidef_set_led_netdev "lan4_link" "LAN4 (link)" "green:lan-6" "lan4" "link"
 	ucidef_set_led_netdev "lan4_act" "LAN4 (txrx)" "amber:lan-7" "lan4" "tx rx"
 	;;
-netgear,ex6100v2 |\
+mikrotik,cap-ac)
+	ucidef_set_led_default "power" "POWER" "blue:power" "1"
+	ucidef_set_led_default "user" "USER" "green:user" "0"
+	ucidef_set_led_netdev "eth1" "ETH1" "green:eth1" "wan"
+	ucidef_set_led_netdev "eth2" "ETH2" "green:eth2" "lan"
+	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy0tpt"
+	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy1tpt"
+	;;
+mikrotik,hap-ac3)
+	ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0"
+	ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "lan1"
+	ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "lan2"
+	ucidef_set_led_netdev "lan3" "LAN3" "green:lan3" "lan3"
+	ucidef_set_led_netdev "lan4" "LAN4" "green:lan4" "lan4"
+	ucidef_set_led_gpio "poe" "POE" "red:poe" "452" "0"
+	;;
+mikrotik,hap-ac3-lte6-kit)
+	ucidef_set_led_netdev "wan" "WAN" "green:wan" "wan"
+	ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "lan1"
+	ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "lan2"
+	ucidef_set_led_netdev "lan3" "LAN3" "green:lan3" "lan3"
+	ucidef_set_led_netdev "lan4" "LAN4" "green:lan4" "lan4"
+	;;
+mikrotik,sxtsq-5-ac)
+	ucidef_set_rssimon "wlan0" "200000" "1"
+	ucidef_set_led_rssi "rssilow" "rssilow" "green:rssilow" "wlan0" "1" "100"
+	ucidef_set_led_rssi "rssimediumlow" "rssimediumlow" "green:rssimediumlow" "wlan0" "21" "100"
+	ucidef_set_led_rssi "rssimedium" "rssimedium" "green:rssimedium" "wlan0" "41" "100"
+	ucidef_set_led_rssi "rssimediumhigh" "rssimediumhigh" "green:rssimediumhigh" "wlan0" "61" "100"
+	ucidef_set_led_rssi "rssihigh" "rssihigh" "green:rssihigh" "wlan0" "81" "100"
+	;;
+mobipromo,cm520-79f)
+	ucidef_set_led_netdev "wan" "WAN" "blue:wan" "wan"
+	ucidef_set_led_netdev "lan1" "LAN1" "blue:lan1" "lan1"
+	ucidef_set_led_netdev "lan2" "LAN2" "blue:lan2" "lan2"
+	;;
+netgear,ex6100v2|\
 netgear,ex6150v2)
 	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:router" "phy0tpt"
 	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:client" "phy1tpt"
 	;;
-qxwlan,e2600ac-c1 |\
+qxwlan,e2600ac-c1|\
 qxwlan,e2600ac-c2)
 	ucidef_set_led_wlan "wlan2g" "WLAN0" "green:wlan0" "phy0tpt"
 	ucidef_set_led_wlan "wlan5g" "WLAN1" "green:wlan1" "phy1tpt"
@ -134,7 +133,7 @@ sony,ncp-hg100-cellular)
 	ucidef_set_led_netdev "wan" "WAN" "green:wan" "wan"
 	ucidef_set_led_netdev "wwan" "WWAN" "green:wan-4" "wwan0"
 	;;
-zyxel,nbg6617 |\
+zyxel,nbg6617|\
 zyxel,wre6606)
 	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy0tpt"
 	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy1tpt"
--- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
@ -29,10 +29,6 @@ ipq40xx_setup_interfaces()
 	zyxel,nbg6617)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
 		;;
-	meraki,gx20|\
-	meraki,z3)
-		ucidef_set_interfaces_lan_wan "lan2 lan3 lan4 lan5" "wan"
-		;;
 	8dev,jalapeno|\
 	alfa-network,ap120c-ac|\
 	asus,map-ac2200|\
@ -67,13 +63,22 @@ ipq40xx_setup_interfaces()
 	zte,mf282plus)
 		ucidef_set_interface_lan "lan"
 		;;
+	aruba,ap-303h|\
+	buffalo,wtr-m2133hp|\
+	ezviz,cs-w3-wd1200g-eup|\
+	netgear,rbr40|\
+	netgear,rbs40|\
+	netgear,rbr50|\
+	netgear,rbs50|\
+	netgear,srr60|\
+	netgear,srs60)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
+		;;
 	avm,fritzbox-7530)
 		ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
 		;;
 	avm,fritzrepeater-3000|\
-	cellc,rtl30vw)
-		ucidef_set_interface_lan "lan1 lan2"
-		;;
+	cellc,rtl30vw|\
 	compex,wpj428)
 		ucidef_set_interface_lan "lan1 lan2"
 		;;
@ -92,21 +97,21 @@ ipq40xx_setup_interfaces()
 	mobipromo,cm520-79f)
 		ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
 		;;
+	meraki,gx20|\
+	meraki,z3)
+		ucidef_set_interfaces_lan_wan "lan2 lan3 lan4 lan5" "wan"
+		;;
+	meraki,mr30h)
+		ucidef_set_interface_lan "lan1 lan2 lan3 lan4 lan5"
+		;;
 	mikrotik,wap-ac|\
 	mikrotik,wap-ac-lte|\
 	mikrotik,wap-r-ac)
 		ucidef_set_interface_lan "sw-eth1 sw-eth2"
 		;;
-	aruba,ap-303h|\
-	buffalo,wtr-m2133hp|\
-	ezviz,cs-w3-wd1200g-eup|\
-	netgear,rbr40|\
-	netgear,rbs40|\
-	netgear,rbr50|\
-	netgear,rbs50|\
-	netgear,srr60|\
-	netgear,srs60)
-		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
+	netgear,lbr20)
+		ucidef_set_interface_lan "lan1 lan2"
+		ucidef_set_interface "wan" device "/dev/cdc-wdm0" protocol "qmi"
 		;;
 	openmesh,a42|\
 	openmesh,a62)
@ -134,13 +139,6 @@ ipq40xx_setup_interfaces()
 		ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
 		ucidef_set_interface "wan" device "/dev/cdc-wdm0" protocol "qmi"
 		;;
-	netgear,lbr20)
-		ucidef_set_interface_lan "lan1 lan2"
-		ucidef_set_interface "wan" device "/dev/cdc-wdm0" protocol "qmi"
-		;;
-	meraki,mr30h)
-		ucidef_set_interface_lan "lan1 lan2 lan3 lan4 lan5"
-		;;
 	*)
 		echo "Unsupported hardware. Network interfaces not initialized"
 		;;
@ -175,7 +173,8 @@ ipq40xx_setup_macs()
 	local label_mac=""

 	case "$board" in
-	8dev,habanero-dvk)
+	8dev,habanero-dvk|\
+	cilab,meshpoint-one)
 		label_mac=$(mtd_get_mac_binary "ART" 0x1006)
 		;;
 	asus,rt-ac42u)
@ -185,9 +184,6 @@ ipq40xx_setup_macs()
 		local tffsdev=$(find_mtd_chardev "nand-tffs")
 		wan_mac=$(/usr/bin/fritz_tffs_nand -b -d $tffsdev -n macdsl)
 		;;
-	cilab,meshpoint-one)
-		label_mac=$(mtd_get_mac_binary "ART" 0x1006)
-		;;
 	devolo,magic-2-wifi-next)
 		lan_mac=$(mtd_get_mac_ascii APPSBLENV MacAddress0)
 		label_mac=$lan_mac
@ -221,7 +217,7 @@ ipq40xx_setup_macs()
 		lan_mac=$(macaddr_add "$wan_mac" 1)
 		;;
 	linksys,ea6350v3|\
-	linksys,ea8300  |\
+	linksys,ea8300|\
 	linksys,mr8300)
 		wan_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
 		lan_mac=$(macaddr_add "$wan_mac" 1)
@ -230,7 +226,7 @@ ipq40xx_setup_macs()
 		wan_mac=$(mmc_get_mac_ascii devinfo hw_mac_addr)
 		lan_mac="$wan_mac"
 		;;
-	mikrotik,cap-ac |\
+	mikrotik,cap-ac|\
 	mikrotik,hap-ac2|\
 	mikrotik,hap-ac3|\
 	mikrotik,hap-ac3-lte6-kit)
--- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
@ -7,15 +7,6 @@
 board=$(board_name)

 case "$FIRMWARE" in
-"ath10k/cal-pci-0000:01:00.0.bin")
-	case "$board" in
-	meraki,mr33 |\
-	meraki,mr74)
-		caldata_extract_ubi "ART" 0x9000 0x844
-		caldata_valid "4408" || caldata_extract "ART" 0x9000 0x844
-		;;
-	esac
-	;;
 "ath10k/pre-cal-pci-0000:01:00.0.bin")
 	case "$board" in
 	asus,map-ac2200)
@ -34,7 +25,7 @@ case "$FIRMWARE" in
 		/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
 		/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1")
 		;;
-	linksys,ea8300 |\
+	linksys,ea8300|\
 	linksys,mr8300)
 		caldata_extract "ART" 0x9000 0x2f20
 		# OEM assigns 4 sequential MACs
@ -64,8 +55,8 @@ case "$FIRMWARE" in
 	avm,fritzbox-4040)
 		/usr/bin/fritz_cal_extract -i 1 -s 0x400 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader_config")
 		;;
-	avm,fritzbox-7530 |\
-	avm,fritzrepeater-1200 |\
+	avm,fritzbox-7530|\
+	avm,fritzrepeater-1200|\
 	avm,fritzrepeater-3000)
 		/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
 		/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
@ -97,12 +88,12 @@ case "$FIRMWARE" in
 		caldata_extract "ART" 0x1000 0x2f20
 		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) 2)
 		;;
-	extreme-networks,ws-ap3915i |\
+	extreme-networks,ws-ap3915i|\
 	extreme-networks,ws-ap391x)
 		caldata_extract "ART" 0x1000 0x2f20
 		ath10k_patch_mac $(mtd_get_mac_ascii CFG1 RADIOADDR0)
 		;;
-	linksys,ea8300 |\
+	linksys,ea8300|\
 	linksys,mr8300)
 		caldata_extract "ART" 0x1000 0x2f20
 		ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 2)
@ -111,17 +102,12 @@ case "$FIRMWARE" in
 		caldata_extract_mmc "0:ART" 0x1000 0x2f20
 		ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 1)
 		;;
-	meraki,mr33 |\
-	meraki,mr74)
-		caldata_extract_ubi "ART" 0x1000 0x2f20
-		caldata_valid "202f" || caldata_extract "ART" 0x1000 0x2f20
-		;;
-	mikrotik,cap-ac |\
-	mikrotik,hap-ac2 |\
-	mikrotik,hap-ac3 |\
-	mikrotik,hap-ac3-lte6-kit |\
-	mikrotik,wap-ac |\
-	mikrotik,wap-ac-lte |\
+	mikrotik,cap-ac|\
+	mikrotik,hap-ac2|\
+	mikrotik,hap-ac3|\
+	mikrotik,hap-ac3-lte6-kit|\
+	mikrotik,wap-ac|\
+	mikrotik,wap-ac-lte|\
 	mikrotik,wap-r-ac)
 		wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
 		( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x0 0x2f20 ) || \
@ -148,7 +134,7 @@ case "$FIRMWARE" in
 	sony,ncp-hg100-cellular)
 		caldata_extract_mmc "0:ART" 0x1000 0x2f20
 		;;
-	zyxel,nbg6617 |\
+	zyxel,nbg6617|\
 	zyxel,wre6606)
 		caldata_extract "ART" 0x1000 0x2f20
 		ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -2)
@ -163,8 +149,8 @@ case "$FIRMWARE" in
 	avm,fritzbox-4040)
 		/usr/bin/fritz_cal_extract -i 1 -s 0x400 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader_config")
 		;;
-	avm,fritzbox-7530 |\
-	avm,fritzrepeater-1200 |\
+	avm,fritzbox-7530|\
+	avm,fritzrepeater-1200|\
 	avm,fritzrepeater-3000)
 		/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
 		/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
@ -196,12 +182,12 @@ case "$FIRMWARE" in
 		caldata_extract "ART" 0x5000 0x2f20
 		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) 3)
 		;;
-	extreme-networks,ws-ap3915i |\
+	extreme-networks,ws-ap3915i|\
 	extreme-networks,ws-ap391x)
 		caldata_extract "ART" 0x5000 0x2f20
 		ath10k_patch_mac $(mtd_get_mac_ascii CFG1 RADIOADDR1)
 		;;
-	linksys,ea8300 |\
+	linksys,ea8300|\
 	linksys,mr8300)
 		caldata_extract "ART" 0x5000 0x2f20
 		ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 3)
@ -210,18 +196,13 @@ case "$FIRMWARE" in
 		caldata_extract_mmc "0:ART" 0x5000 0x2f20
 		ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 2)
 		;;
-	meraki,mr33 |\
-	meraki,mr74)
-		caldata_extract_ubi "ART" 0x5000 0x2f20
-		caldata_valid "202f" || caldata_extract "ART" 0x5000 0x2f20
-		;;
-	mikrotik,cap-ac |\
-	mikrotik,hap-ac2 |\
-	mikrotik,hap-ac3 |\
-	mikrotik,hap-ac3-lte6-kit |\
-	mikrotik,sxtsq-5-ac |\
-	mikrotik,wap-ac |\
-	mikrotik,wap-ac-lte |\
+	mikrotik,cap-ac|\
+	mikrotik,hap-ac2|\
+	mikrotik,hap-ac3|\
+	mikrotik,hap-ac3-lte6-kit|\
+	mikrotik,sxtsq-5-ac|\
+	mikrotik,wap-ac|\
+	mikrotik,wap-ac-lte|\
 	mikrotik,wap-r-ac)
 		wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
 		( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x8000 0x2f20 ) || \
@ -248,7 +229,7 @@ case "$FIRMWARE" in
 	sony,ncp-hg100-cellular)
 		caldata_extract_mmc "0:ART" 0x5000 0x2f20
 		;;
-	zyxel,nbg6617 |\
+	zyxel,nbg6617|\
 	zyxel,wre6606)
 		caldata_extract "ART" 0x5000 0x2f20
 		ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
@ -257,12 +238,12 @@ case "$FIRMWARE" in
 	;;
 "ath10k/QCA4019/hw1.0/board-ahb-a000000.wifi.bin")
 	case "$board" in
-	mikrotik,cap-ac |\
-	mikrotik,hap-ac2 |\
-	mikrotik,hap-ac3 |\
-	mikrotik,hap-ac3-lte6-kit |\
-	mikrotik,wap-ac |\
-	mikrotik,wap-ac-lte |\
+	mikrotik,cap-ac|\
+	mikrotik,hap-ac2|\
+	mikrotik,hap-ac3|\
+	mikrotik,hap-ac3-lte6-kit|\
+	mikrotik,wap-ac|\
+	mikrotik,wap-ac-lte|\
 	mikrotik,wap-r-ac)
 		wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
 		( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x2f20 0x2f20 ) || \
@ -272,13 +253,13 @@ case "$FIRMWARE" in
 	;;
 "ath10k/QCA4019/hw1.0/board-ahb-a800000.wifi.bin")
 	case "$board" in
-	mikrotik,cap-ac |\
-	mikrotik,hap-ac2 |\
-	mikrotik,hap-ac3 |\
-        mikrotik,hap-ac3-lte6-kit |\
-	mikrotik,sxtsq-5-ac |\
-	mikrotik,wap-ac |\
-	mikrotik,wap-ac-lte |\
+	mikrotik,cap-ac|\
+	mikrotik,hap-ac2|\
+	mikrotik,hap-ac3|\
+	mikrotik,hap-ac3-lte6-kit|\
+	mikrotik,sxtsq-5-ac|\
+	mikrotik,wap-ac|\
+	mikrotik,wap-ac-lte|\
 	mikrotik,wap-r-ac)
 		wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
 		( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0xaf20 0x2f20 ) || \
--- a/target/linux/ipq40xx/base-files/etc/uci-defaults/05_fix-compat-version
+++ b/target/linux/ipq40xx/base-files/etc/uci-defaults/05_fix-compat-version
@ -1,10 +1,10 @@
 . /lib/functions.sh

 case "$(board_name)" in
+ezviz,cs-w3-wd1200g-eup|\
 linksys,ea6350v3|\
 linksys,ea8300|\
-linksys,mr8300|\
-ezviz,cs-w3-wd1200g-eup)
+linksys,mr8300)
 	uci set system.@system[0].compat_version="2.0"
 	uci commit system
 	;;
--- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
+++ b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
@ -6,7 +6,7 @@ RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'

 platform_check_image() {
 	case "$(board_name)" in
-	asus,rt-ac42u |\
+	asus,rt-ac42u|\
 	asus,rt-ac58u)
 		local ubidev=$(nand_find_ubi $CI_UBIPART)
 		local asus_root=$(nand_find_volume $ubidev jffs2)
@ -25,12 +25,12 @@ Once this is done. Retry.
 EOF
 		return 1
 		;;
-	zte,mf18a |\
+	zte,mf18a|\
 	zte,mf282plus|\
-	zte,mf286d |\
+	zte,mf286d|\
 	zte,mf287|\
-	zte,mf287plus |\
-	zte,mf287pro |\
+	zte,mf287plus|\
+	zte,mf287pro|\
 	zte,mf289f)
 		CI_UBIPART="rootfs"
 		local mtdnum="$( find_mtd_index $CI_UBIPART )"
@ -104,36 +104,31 @@ platform_do_upgrade_mikrotik_nand() {

 platform_do_upgrade() {
 	case "$(board_name)" in
-	8dev,jalapeno |\
-	aruba,ap-303 |\
-	aruba,ap-303h |\
-	aruba,ap-365 |\
-	avm,fritzbox-7530 |\
-	avm,fritzrepeater-1200 |\
-	avm,fritzrepeater-3000 |\
-	buffalo,wtr-m2133hp |\
-	cilab,meshpoint-one |\
-	edgecore,ecw5211 |\
-	edgecore,oap100 |\
-	engenius,eap2200 |\
-	glinet,gl-a1300 |\
-	glinet,gl-ap1300 |\
-	luma,wrtq-329acn |\
-	mobipromo,cm520-79f |\
-	netgear,lbr20 |\
-	netgear,wac510 |\
-	p2w,r619ac-64m |\
-	p2w,r619ac-128m |\
-	qxwlan,e2600ac-c2 |\
+	8dev,jalapeno|\
+	aruba,ap-303|\
+	aruba,ap-303h|\
+	aruba,ap-365|\
+	avm,fritzbox-7530|\
+	avm,fritzrepeater-1200|\
+	avm,fritzrepeater-3000|\
+	buffalo,wtr-m2133hp|\
+	cilab,meshpoint-one|\
+	compex,wpj419|\
+	edgecore,ecw5211|\
+	edgecore,oap100|\
+	engenius,eap2200|\
+	glinet,gl-a1300|\
+	glinet,gl-ap1300|\
+	luma,wrtq-329acn|\
+	mobipromo,cm520-79f|\
+	netgear,lbr20|\
+	netgear,wac510|\
+	p2w,r619ac-64m|\
+	p2w,r619ac-128m|\
+	qxwlan,e2600ac-c2|\
 	wallys,dr40x9)
 		nand_do_upgrade "$1"
 		;;
-	glinet,gl-b2200)
-		CI_KERNPART="0:HLOS"
-		CI_ROOTPART="rootfs"
-		CI_DATAPART="rootfs_data"
-		emmc_do_upgrade "$1"
-		;;
 	alfa-network,ap120c-ac)
 		part="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | sed -e 's/ .*$//')"
 		if [ "$part" = "rootfs1" ]; then
@ -145,11 +140,8 @@ platform_do_upgrade() {
 		fi
 		nand_do_upgrade "$1"
 		;;
-	asus,map-ac2200)
-		CI_KERNPART="linux"
-		nand_do_upgrade "$1"
-		;;
-	asus,rt-ac42u |\
+	asus,map-ac2200|\
+	asus,rt-ac42u|\
 	asus,rt-ac58u)
 		CI_KERNPART="linux"
 		nand_do_upgrade "$1"
@ -158,8 +150,11 @@ platform_do_upgrade() {
 		CI_UBIPART="ubifs"
 		askey_do_upgrade "$1"
 		;;
-	compex,wpj419)
-		nand_do_upgrade "$1"
+	glinet,gl-b2200)
+		CI_KERNPART="0:HLOS"
+		CI_ROOTPART="rootfs"
+		CI_DATAPART="rootfs_data"
+		emmc_do_upgrade "$1"
 		;;
 	google,wifi)
 		export_bootdevice
@ -168,22 +163,16 @@ platform_do_upgrade() {
 		CI_ROOTPART="rootfs"
 		emmc_do_upgrade "$1"
 		;;
-	linksys,ea6350v3 |\
-	linksys,ea8300 |\
-	linksys,mr8300 |\
-	linksys,whw01 |\
+	linksys,ea6350v3|\
+	linksys,ea8300|\
+	linksys,mr8300|\
+	linksys,whw01|\
 	linksys,whw03v2)
 		platform_do_upgrade_linksys "$1"
 		;;
 	linksys,whw03)
 		platform_do_upgrade_linksys_emmc "$1"
 		;;
-	meraki,mr30h |\
-	meraki,mr33 |\
-	meraki,mr74)
-		CI_KERNPART="part.safe"
-		nand_do_upgrade "$1"
-		;;
 	meraki,gx20|\
 	meraki,z3)
 		# DO NOT set CI_KERNPART to part.safe,
@ -192,6 +181,12 @@ platform_do_upgrade() {
 		CI_KERNPART="part.old"
 		nand_do_upgrade "$1"
 		;;
+	meraki,mr30h|\
+	meraki,mr33|\
+	meraki,mr74)
+		CI_KERNPART="part.safe"
+		nand_do_upgrade "$1"
+		;;
 	mikrotik,cap-ac|\
 	mikrotik,hap-ac2|\
 	mikrotik,hap-ac3-lte6-kit|\
@ -208,15 +203,15 @@ platform_do_upgrade() {
 		;;
 	netgear,rbr40|\
 	netgear,rbs40|\
-	netgear,rbr50 |\
-	netgear,rbs50 |\
-	netgear,srr60 |\
+	netgear,rbr50|\
+	netgear,rbs50|\
+	netgear,srr60|\
 	netgear,srs60)
 		platform_do_upgrade_netgear_orbi_upgrade "$1"
 		;;
-	openmesh,a42 |\
-	openmesh,a62 |\
-	plasmacloud,pa1200 |\
+	openmesh,a42|\
+	openmesh,a62|\
+	plasmacloud,pa1200|\
 	plasmacloud,pa2200)
 		PART_NAME="inactive"
 		platform_do_upgrade_dualboot_datachk "$1"
@ -224,14 +219,14 @@ platform_do_upgrade() {
 	sony,ncp-hg100-cellular)
 		sony_emmc_do_upgrade "$1"
 		;;
-	teltonika,rutx10 |\
-	teltonika,rutx50 |\
-	zte,mf18a |\
-	zte,mf282plus |\
-	zte,mf286d |\
-	zte,mf287 |\
-	zte,mf287plus |\
-	zte,mf287pro |\
+	teltonika,rutx10|\
+	teltonika,rutx50|\
+	zte,mf18a|\
+	zte,mf282plus|\
+	zte,mf286d|\
+	zte,mf287|\
+	zte,mf287plus|\
+	zte,mf287pro|\
 	zte,mf289f)
 		CI_UBIPART="rootfs"
 		nand_do_upgrade "$1"
@ -247,8 +242,8 @@ platform_do_upgrade() {

 platform_copy_config() {
 	case "$(board_name)" in
-	glinet,gl-b2200 |\
-	google,wifi |\
+	glinet,gl-b2200|\
+	google,wifi|\
 	linksys,whw03)
 		emmc_copy_config
 		;;
--- a/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi
+++ b/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi
@ -267,11 +267,36 @@
 				 * confuse the u-boot and it might not
 				 * find the kernel partition anymore.
 				 */
+				volumes {
+					ubi_art: ubi-volume-art {
+						volname = "ART";
+					};
+				};
 			};
 		};
 	};
 };

+&ubi_art {
+	nvmem-layout {
+		compatible = "fixed-layout";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		precal_factory_1000: precal@1000 {
+			reg = <0x1000 0x2f20>;
+		};
+
+		precal_factory_5000: precal@5000 {
+			reg = <0x5000 0x2f20>;
+		};
+
+		cal_factory_9000: cal@9000 {
+			reg = <0x9000 0x844>;
+		};
+	};
+};
+
 &pcie0 {
 	status = "okay";
 	perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
@ -282,8 +307,8 @@
 	wifi@0,0 {
 		compatible = "qcom,ath10k";
 		reg = <0x00010000 0 0 0 0>;
-		nvmem-cells = <&mac_address 1>;
-		nvmem-cell-names = "mac-address";
+		nvmem-cells = <&mac_address 1>, <&cal_factory_9000>;
+		nvmem-cell-names = "mac-address", "calibration";
 	};
 };

@ -385,16 +410,14 @@

 &wifi0 {
 	status = "okay";
-	qcom,ath10k-calibration-variant = "Meraki-MR33";
-	nvmem-cells = <&mac_address 2>;
-	nvmem-cell-names = "mac-address";
+	nvmem-cells = <&mac_address 2>, <&precal_factory_1000>;
+	nvmem-cell-names = "mac-address", "pre-calibration";
 };

 &wifi1 {
 	status = "okay";
-	qcom,ath10k-calibration-variant = "Meraki-MR33";
-	nvmem-cells = <&mac_address 3>;
-	nvmem-cell-names = "mac-address";
+	nvmem-cells = <&mac_address 3>, <&precal_factory_5000>;
+	nvmem-cell-names = "mac-address", "pre-calibration";
 };

 &mdio {
--- a/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4029-mr33.dts
+++ b/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4029-mr33.dts
@ -11,3 +11,11 @@
 &tricolor {
 	enable-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
 };
+
+&wifi0 {
+	qcom,ath10k-calibration-variant = "Meraki-MR33";
+};
+
+&wifi1 {
+	qcom,ath10k-calibration-variant = "Meraki-MR33";
+};
--- a/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4029-mr74.dts
+++ b/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4029-mr74.dts
@ -11,3 +11,11 @@
 &tricolor {
 	enable-gpios = <&tlmm 14 GPIO_ACTIVE_LOW>;
 };
+
+&wifi0 {
+	qcom,ath10k-calibration-variant = "Meraki-MR33";
+};
+
+&wifi1 {
+	qcom,ath10k-calibration-variant = "Meraki-MR33";
+};
--- a/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c
+++ b/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c
@ -23,12 +23,6 @@ extern struct rtl83xx_soc_info soc_info;
 extern int rtmdio_930x_read_sds_phy(int sds, int page, int regnum);
 extern int rtmdio_930x_write_sds_phy(int sds, int page, int regnum, u16 val);

-extern int rtsds_931x_read(int sds, int page, int regnum);
-extern int rtsds_931x_read_field(int sds, int page, int regnum, int end_bit, int start_bit);
-
-extern int rtsds_931x_write(int sds, int page, int regnum, u16 val);
-extern int rtsds_931x_write_field(int sds, int page, int regnum, int end_bit, int start_bit, u16 val);
-
 #define PHY_PAGE_2	2
 #define PHY_PAGE_4	4

@ -2637,545 +2631,6 @@ int rtl9300_sds_cmu_band_get(int sds)
 	return cmu_band;
 }

-static void rtl931x_sds_rst(u32 sds)
-{
-	u32 o, v, o_mode;
-	int shift = ((sds & 0x3) << 3);
-
-	/* TODO: We need to lock this! */
-
-	o = sw_r32(RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR);
-	v = o | BIT(sds);
-	sw_w32(v, RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR);
-
-	o_mode = sw_r32(RTL931X_SERDES_MODE_CTRL + 4 * (sds >> 2));
-	v = BIT(7) | 0x1F;
-	sw_w32_mask(0xff << shift, v << shift, RTL931X_SERDES_MODE_CTRL + 4 * (sds >> 2));
-	sw_w32(o_mode, RTL931X_SERDES_MODE_CTRL + 4 * (sds >> 2));
-
-	sw_w32(o, RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR);
-}
-
-static void rtl931x_symerr_clear(u32 sds, phy_interface_t mode)
-{
-
-	switch (mode) {
-	case PHY_INTERFACE_MODE_NA:
-		break;
-	case PHY_INTERFACE_MODE_XGMII:
-		for (int i = 0; i < 4; ++i) {
-			rtsds_931x_write_field(sds, 0x101, 24,  2, 0, i);
-			rtsds_931x_write_field(sds, 0x101,  3, 15, 8, 0x0);
-			rtsds_931x_write_field(sds, 0x101,  2, 15, 0, 0x0);
-		}
-
-		for (int i = 0; i < 4; ++i) {
-			rtsds_931x_write_field(sds, 0x201, 24,  2, 0, i);
-			rtsds_931x_write_field(sds, 0x201,  3, 15, 8, 0x0);
-			rtsds_931x_write_field(sds, 0x201,  2, 15, 0, 0x0);
-		}
-
-		rtsds_931x_write_field(sds, 0x101, 0, 15, 0, 0x0);
-		rtsds_931x_write_field(sds, 0x101, 1, 15, 8, 0x0);
-		rtsds_931x_write_field(sds, 0x201, 0, 15, 0, 0x0);
-		rtsds_931x_write_field(sds, 0x201, 1, 15, 8, 0x0);
-		break;
-	default:
-		break;
-	}
-
-	return;
-}
-
-void rtl931x_sds_fiber_disable(u32 sds)
-{
-	u32 v = 0x3F;
-
-	rtsds_931x_write_field(sds, 0x1F, 0x9, 11, 6, v);
-}
-
-static void rtl931x_sds_fiber_mode_set(u32 sds, phy_interface_t mode)
-{
-	u32 val;
-
-	/* clear symbol error count before changing mode */
-	rtl931x_symerr_clear(sds, mode);
-
-	val = 0x9F;
-	sw_w32(val, RTL931X_SERDES_MODE_CTRL + 4 * (sds >> 2));
-
-	switch (mode) {
-	case PHY_INTERFACE_MODE_SGMII:
-		val = 0x5;
-		break;
-
-	case PHY_INTERFACE_MODE_1000BASEX:
-		/* serdes mode FIBER1G */
-		val = 0x9;
-		break;
-
-	case PHY_INTERFACE_MODE_10GBASER:
-	case PHY_INTERFACE_MODE_10GKR:
-		val = 0x35;
-		break;
-/*	case MII_10GR1000BX_AUTO:
-		val = 0x39;
-		break; */
-
-
-	case PHY_INTERFACE_MODE_USXGMII:
-		val = 0x1B;
-		break;
-	default:
-		val = 0x25;
-	}
-
-	pr_info("%s writing analog SerDes Mode value %02x\n", __func__, val);
-	rtsds_931x_write_field(sds, 0x1F, 0x9, 11, 6, val);
-
-	return;
-}
-
-static int rtl931x_sds_cmu_page_get(phy_interface_t mode)
-{
-	switch (mode) {
-	case PHY_INTERFACE_MODE_SGMII:
-	case PHY_INTERFACE_MODE_1000BASEX:	/* MII_1000BX_FIBER / 100BX_FIBER / 1000BX100BX_AUTO */
-		return 0x24;
-	case PHY_INTERFACE_MODE_2500BASEX:	/* MII_2500Base_X: */
-		return 0x28;
-/*	case MII_HISGMII_5G: */
-/*		return 0x2a; */
-	case PHY_INTERFACE_MODE_QSGMII:
-		return 0x2a;			/* Code also has 0x34 */
-	case PHY_INTERFACE_MODE_XAUI:		/* MII_RXAUI_LITE: */
-		return 0x2c;
-	case PHY_INTERFACE_MODE_XGMII:		/* MII_XSGMII */
-	case PHY_INTERFACE_MODE_10GKR:
-	case PHY_INTERFACE_MODE_10GBASER:	/* MII_10GR */
-		return 0x2e;
-	default:
-		return -1;
-	}
-
-	return -1;
-}
-
-static void rtl931x_cmu_type_set(u32 sds, phy_interface_t mode, int chiptype)
-{
-	int cmu_type = 0; /* Clock Management Unit */
-	u32 cmu_page = 0;
-	u32 frc_cmu_spd;
-	u32 evenSds;
-	u32 lane, frc_lc_mode_bitnum, frc_lc_mode_val_bitnum;
-
-	switch (mode) {
-	case PHY_INTERFACE_MODE_NA:
-	case PHY_INTERFACE_MODE_10GKR:
-	case PHY_INTERFACE_MODE_XGMII:
-	case PHY_INTERFACE_MODE_10GBASER:
-	case PHY_INTERFACE_MODE_USXGMII:
-		return;
-
-/*	case MII_10GR1000BX_AUTO:
-		if (chiptype)
-			rtsds_931x_write_field(sds, 0x24, 0xd, 14, 14, 0);
-		return; */
-
-	case PHY_INTERFACE_MODE_QSGMII:
-		cmu_type = 1;
-		frc_cmu_spd = 0;
-		break;
-
-	case PHY_INTERFACE_MODE_1000BASEX:
-		cmu_type = 1;
-		frc_cmu_spd = 0;
-		break;
-
-/*	case MII_1000BX100BX_AUTO:
-		cmu_type = 1;
-		frc_cmu_spd = 0;
-		break; */
-
-	case PHY_INTERFACE_MODE_SGMII:
-		cmu_type = 1;
-		frc_cmu_spd = 0;
-		break;
-
-	case PHY_INTERFACE_MODE_2500BASEX:
-		cmu_type = 1;
-		frc_cmu_spd = 1;
-		break;
-
-	default:
-		pr_info("SerDes %d mode is invalid\n", sds);
-		return;
-	}
-
-	if (cmu_type == 1)
-		cmu_page = rtl931x_sds_cmu_page_get(mode);
-
-	lane = sds % 2;
-
-	if (!lane) {
-		frc_lc_mode_bitnum = 4;
-		frc_lc_mode_val_bitnum = 5;
-	} else {
-		frc_lc_mode_bitnum = 6;
-		frc_lc_mode_val_bitnum = 7;
-	}
-
-	evenSds = sds - lane;
-
-	pr_info("%s: cmu_type %0d cmu_page %x frc_cmu_spd %d lane %d sds %d\n",
-	        __func__, cmu_type, cmu_page, frc_cmu_spd, lane, sds);
-
-	if (cmu_type == 1) {
-		pr_info("%s A CMU page 0x28 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x28, 0x7));
-		rtsds_931x_write_field(sds, cmu_page, 0x7, 15, 15, 0);
-		pr_info("%s B CMU page 0x28 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x28, 0x7));
-		if (chiptype) {
-			rtsds_931x_write_field(sds, cmu_page, 0xd, 14, 14, 0);
-		}
-
-		rtsds_931x_write_field(evenSds, 0x20, 0x12, 3, 2, 0x3);
-		rtsds_931x_write_field(evenSds, 0x20, 0x12, frc_lc_mode_bitnum, frc_lc_mode_bitnum, 1);
-		rtsds_931x_write_field(evenSds, 0x20, 0x12, frc_lc_mode_val_bitnum, frc_lc_mode_val_bitnum, 0);
-		rtsds_931x_write_field(evenSds, 0x20, 0x12, 12, 12, 1);
-		rtsds_931x_write_field(evenSds, 0x20, 0x12, 15, 13, frc_cmu_spd);
-	}
-
-	pr_info("%s CMU page 0x28 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x28, 0x7));
-	return;
-}
-
-static void rtl931x_sds_rx_rst(u32 sds)
-{
-	if (sds < 2)
-		return;
-
-	rtsds_931x_write(sds, 0x2e, 0x12, 0x2740);
-	rtsds_931x_write(sds, 0x2f, 0x0, 0x0);
-	rtsds_931x_write(sds, 0x2f, 0x2, 0x2010);
-	rtsds_931x_write(sds, 0x20, 0x0, 0xc10);
-
-	rtsds_931x_write(sds, 0x2e, 0x12, 0x27c0);
-	rtsds_931x_write(sds, 0x2f, 0x0, 0xc000);
-	rtsds_931x_write(sds, 0x2f, 0x2, 0x6010);
-	rtsds_931x_write(sds, 0x20, 0x0, 0xc30);
-
-	mdelay(50);
-}
-
-// Currently not used
-// static void rtl931x_sds_disable(u32 sds)
-// {
-// 	u32 v = 0x1f;
-
-// 	v |= BIT(7);
-// 	sw_w32(v, RTL931X_SERDES_MODE_CTRL + (sds >> 2) * 4);
-// }
-
-static void rtl931x_sds_mii_mode_set(u32 sds, phy_interface_t mode)
-{
-	u32 val;
-
-	switch (mode) {
-	case PHY_INTERFACE_MODE_QSGMII:
-		val = 0x6;
-		break;
-	case PHY_INTERFACE_MODE_XGMII:
-		val = 0x10; /* serdes mode XSGMII */
-		break;
-	case PHY_INTERFACE_MODE_USXGMII:
-	case PHY_INTERFACE_MODE_2500BASEX:
-		val = 0xD;
-		break;
-	case PHY_INTERFACE_MODE_SGMII:
-		val = 0x2;
-		break;
-	default:
-		return;
-	}
-
-	val |= (1 << 7);
-
-	sw_w32(val, RTL931X_SERDES_MODE_CTRL + 4 * (sds >> 2));
-}
-
-static sds_config sds_config_10p3125g_type1[] = {
-	{ 0x2E, 0x00, 0x0107 }, { 0x2E, 0x01, 0x01A3 }, { 0x2E, 0x02, 0x6A24 },
-	{ 0x2E, 0x03, 0xD10D }, { 0x2E, 0x04, 0x8000 }, { 0x2E, 0x05, 0xA17E },
-	{ 0x2E, 0x06, 0xE31D }, { 0x2E, 0x07, 0x800E }, { 0x2E, 0x08, 0x0294 },
-	{ 0x2E, 0x09, 0x0CE4 }, { 0x2E, 0x0A, 0x7FC8 }, { 0x2E, 0x0B, 0xE0E7 },
-	{ 0x2E, 0x0C, 0x0200 }, { 0x2E, 0x0D, 0xDF80 }, { 0x2E, 0x0E, 0x0000 },
-	{ 0x2E, 0x0F, 0x1FC2 }, { 0x2E, 0x10, 0x0C3F }, { 0x2E, 0x11, 0x0000 },
-	{ 0x2E, 0x12, 0x27C0 }, { 0x2E, 0x13, 0x7E1D }, { 0x2E, 0x14, 0x1300 },
-	{ 0x2E, 0x15, 0x003F }, { 0x2E, 0x16, 0xBE7F }, { 0x2E, 0x17, 0x0090 },
-	{ 0x2E, 0x18, 0x0000 }, { 0x2E, 0x19, 0x4000 }, { 0x2E, 0x1A, 0x0000 },
-	{ 0x2E, 0x1B, 0x8000 }, { 0x2E, 0x1C, 0x011F }, { 0x2E, 0x1D, 0x0000 },
-	{ 0x2E, 0x1E, 0xC8FF }, { 0x2E, 0x1F, 0x0000 }, { 0x2F, 0x00, 0xC000 },
-	{ 0x2F, 0x01, 0xF000 }, { 0x2F, 0x02, 0x6010 }, { 0x2F, 0x12, 0x0EE7 },
-	{ 0x2F, 0x13, 0x0000 }
-};
-
-static sds_config sds_config_10p3125g_cmu_type1[] = {
-	{ 0x2F, 0x03, 0x4210 }, { 0x2F, 0x04, 0x0000 }, { 0x2F, 0x05, 0x0019 },
-	{ 0x2F, 0x06, 0x18A6 }, { 0x2F, 0x07, 0x2990 }, { 0x2F, 0x08, 0xFFF4 },
-	{ 0x2F, 0x09, 0x1F08 }, { 0x2F, 0x0A, 0x0000 }, { 0x2F, 0x0B, 0x8000 },
-	{ 0x2F, 0x0C, 0x4224 }, { 0x2F, 0x0D, 0x0000 }, { 0x2F, 0x0E, 0x0000 },
-	{ 0x2F, 0x0F, 0xA470 }, { 0x2F, 0x10, 0x8000 }, { 0x2F, 0x11, 0x037B }
-};
-
-void rtl931x_sds_init(u32 sds, phy_interface_t mode)
-{
-	u32 board_sds_tx_type1[] = {
-		0x01c3, 0x01c3, 0x01c3, 0x01a3, 0x01a3, 0x01a3,
-		0x0143, 0x0143, 0x0143, 0x0143, 0x0163, 0x0163,
-	};
-	u32 board_sds_tx[] = {
-		0x1a00, 0x1a00, 0x0200, 0x0200, 0x0200, 0x0200,
-		0x01a3, 0x01a3, 0x01a3, 0x01a3, 0x01e3, 0x01e3
-	};
-	u32 board_sds_tx2[] = {
-		0x0dc0, 0x01c0, 0x0200, 0x0180, 0x0160, 0x0123,
-		0x0123, 0x0163, 0x01a3, 0x01a0, 0x01c3, 0x09c3,
-	};
-	u32 ori, model_info, val;
-	int chiptype = 0;
-
-	if (sds > 13)
-		return;
-
-	pr_info("%s: set sds %d to mode %d\n", __func__, sds, mode);
-	val = rtsds_931x_read_field(sds, 0x1F, 0x9, 11, 6);
-
-	pr_info("%s: fibermode %08X stored mode 0x%x", __func__,
-			rtsds_931x_read(sds, 0x1f, 0x9), val);
-	pr_info("%s: SGMII mode %08X in 0x24 0x9", __func__,
-			rtsds_931x_read(sds, 0x24, 0x9));
-	pr_info("%s: CMU mode %08X stored even SDS %d", __func__,
-			rtsds_931x_read(sds & ~1, 0x20, 0x12), sds & ~1);
-	pr_info("%s: serdes_mode_ctrl %08X", __func__,  RTL931X_SERDES_MODE_CTRL + 4 * (sds >> 2));
-	pr_info("%s CMU page 0x24 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x24, 0x7));
-	pr_info("%s CMU page 0x26 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x26, 0x7));
-	pr_info("%s CMU page 0x28 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x28, 0x7));
-	pr_info("%s XSG page 0x0 0xe %08x\n", __func__, rtsds_931x_read(sds, 0x100, 0xe));
-	pr_info("%s XSG2 page 0x0 0xe %08x\n", __func__, rtsds_931x_read(sds, 0x200, 0xe));
-
-	model_info = sw_r32(RTL93XX_MODEL_NAME_INFO);
-	if ((model_info >> 4) & 0x1) {
-		pr_info("detected chiptype 1\n");
-		chiptype = 1;
-	} else {
-		pr_info("detected chiptype 0\n");
-	}
-
-	pr_info("%s: 2.5gbit %08X", __func__,
-	        rtsds_931x_read(sds, 0x101, 0x14));
-
-	pr_info("%s: RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR 0x%08X\n", __func__, sw_r32(RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR));
-	ori = sw_r32(RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR);
-	val = ori | (1 << sds);
-	sw_w32(val, RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR);
-
-	switch (mode) {
-	case PHY_INTERFACE_MODE_NA:
-		break;
-
-	case PHY_INTERFACE_MODE_XGMII: /* MII_XSGMII */
-
-		if (chiptype) {
-			/* fifo inv clk */
-			rtsds_931x_write_field(sds, 0x101, 0x1, 7, 4, 0xf);
-			rtsds_931x_write_field(sds, 0x101, 0x1, 3, 0, 0xf);
-
-			rtsds_931x_write_field(sds, 0x201, 0x1, 7, 4, 0xf);
-			rtsds_931x_write_field(sds, 0x201, 0x1, 3, 0, 0xf);
-
-		}
-
-		rtsds_931x_write_field(sds, 0x100, 0xE, 12, 12, 1);
-		rtsds_931x_write_field(sds, 0x200, 0xE, 12, 12, 1);
-		break;
-
-	case PHY_INTERFACE_MODE_USXGMII: /* MII_USXGMII_10GSXGMII/10GDXGMII/10GQXGMII: */
-		u32 op_code = 0x6003;
-		u32 evenSds;
-
-		if (chiptype) {
-			rtsds_931x_write_field(sds, 0x6, 0x2, 12, 12, 1);
-
-			for (int i = 0; i < sizeof(sds_config_10p3125g_type1) / sizeof(sds_config); ++i) {
-				rtsds_931x_write(sds, sds_config_10p3125g_type1[i].page - 0x4, sds_config_10p3125g_type1[i].reg, sds_config_10p3125g_type1[i].data);
-			}
-
-			evenSds = sds & ~1;
-
-			for (int i = 0; i < sizeof(sds_config_10p3125g_cmu_type1) / sizeof(sds_config); ++i) {
-				rtsds_931x_write(evenSds,
-				                      sds_config_10p3125g_cmu_type1[i].page - 0x4, sds_config_10p3125g_cmu_type1[i].reg, sds_config_10p3125g_cmu_type1[i].data);
-			}
-
-			rtsds_931x_write_field(sds, 0x6, 0x2, 12, 12, 0);
-		} else {
-
-			rtsds_931x_write_field(sds, 0x2e, 0xd, 6, 0, 0x0);
-			rtsds_931x_write_field(sds, 0x2e, 0xd, 7, 7, 0x1);
-
-			rtsds_931x_write_field(sds, 0x2e, 0x1c, 5, 0, 0x1E);
-			rtsds_931x_write_field(sds, 0x2e, 0x1d, 11, 0, 0x00);
-			rtsds_931x_write_field(sds, 0x2e, 0x1f, 11, 0, 0x00);
-			rtsds_931x_write_field(sds, 0x2f, 0x0, 11, 0, 0x00);
-			rtsds_931x_write_field(sds, 0x2f, 0x1, 11, 0, 0x00);
-
-			rtsds_931x_write_field(sds, 0x2e, 0xf, 12, 6, 0x7F);
-			rtsds_931x_write(sds, 0x2f, 0x12, 0xaaa);
-
-			rtl931x_sds_rx_rst(sds);
-
-			rtsds_931x_write(sds, 0x7, 0x10, op_code);
-			rtsds_931x_write(sds, 0x6, 0x1d, 0x0480);
-			rtsds_931x_write(sds, 0x6, 0xe, 0x0400);
-		}
-		break;
-
-	case PHY_INTERFACE_MODE_10GBASER: /* MII_10GR / MII_10GR1000BX_AUTO: */
-	                                  /* configure 10GR fiber mode=1 */
-		rtsds_931x_write_field(sds, 0x1f, 0xb, 1, 1, 1);
-
-		/* init fiber_1g */
-		rtsds_931x_write_field(sds, 0x103, 0x13, 15, 14, 0);
-
-		rtsds_931x_write_field(sds, 0x102, 0x0, 12, 12, 1);
-		rtsds_931x_write_field(sds, 0x102, 0x0, 6, 6, 1);
-		rtsds_931x_write_field(sds, 0x102, 0x0, 13, 13, 0);
-
-		/* init auto */
-		rtsds_931x_write_field(sds, 0x1f, 13, 15, 0, 0x109e);
-		rtsds_931x_write_field(sds, 0x1f, 0x6, 14, 10, 0x8);
-		rtsds_931x_write_field(sds, 0x1f, 0x7, 10, 4, 0x7f);
-		break;
-
-	case PHY_INTERFACE_MODE_1000BASEX: /* MII_1000BX_FIBER */
-		rtsds_931x_write_field(sds, 0x103, 0x13, 15, 14, 0);
-
-		rtsds_931x_write_field(sds, 0x102, 0x0, 12, 12, 1);
-		rtsds_931x_write_field(sds, 0x102, 0x0, 6, 6, 1);
-		rtsds_931x_write_field(sds, 0x102, 0x0, 13, 13, 0);
-		break;
-
-	case PHY_INTERFACE_MODE_SGMII:
-		rtsds_931x_write_field(sds, 0x24, 0x9, 15, 15, 0);
-		break;
-
-	case PHY_INTERFACE_MODE_2500BASEX:
-		rtsds_931x_write_field(sds, 0x101, 0x14, 8, 8, 1);
-		break;
-
-	case PHY_INTERFACE_MODE_QSGMII:
-	default:
-		pr_info("%s: PHY mode %s not supported by SerDes %d\n",
-		        __func__, phy_modes(mode), sds);
-		return;
-	}
-
-	rtl931x_cmu_type_set(sds, mode, chiptype);
-
-	if (sds >= 2 && sds <= 13) {
-		if (chiptype)
-			rtsds_931x_write(sds, 0x2E, 0x1, board_sds_tx_type1[sds - 2]);
-		else {
-			val = 0xa0000;
-			sw_w32(val, RTL93XX_CHIP_INFO);
-			val = sw_r32(RTL93XX_CHIP_INFO);
-			if (val & BIT(28)) /* consider 9311 etc. RTL9313_CHIP_ID == HWP_CHIP_ID(unit)) */
-			{
-				rtsds_931x_write(sds, 0x2E, 0x1, board_sds_tx2[sds - 2]);
-			} else {
-				rtsds_931x_write(sds, 0x2E, 0x1, board_sds_tx[sds - 2]);
-			}
-			val = 0;
-			sw_w32(val, RTL93XX_CHIP_INFO);
-		}
-	}
-
-	val = ori & ~BIT(sds);
-	sw_w32(val, RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR);
-	pr_debug("%s: RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR 0x%08X\n", __func__, sw_r32(RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR));
-
-	if (mode == PHY_INTERFACE_MODE_XGMII ||
-	    mode == PHY_INTERFACE_MODE_QSGMII ||
-	    mode == PHY_INTERFACE_MODE_SGMII ||
-	    mode == PHY_INTERFACE_MODE_USXGMII) {
-		if (mode == PHY_INTERFACE_MODE_XGMII)
-			rtl931x_sds_mii_mode_set(sds, mode);
-		else
-			rtl931x_sds_fiber_mode_set(sds, mode);
-	}
-}
-
-int rtl931x_sds_cmu_band_set(int sds, bool enable, u32 band, phy_interface_t mode)
-{
-	int page = rtl931x_sds_cmu_page_get(mode);
-
-	sds -= (sds % 2);
-	sds = sds & ~1;
-	page += 1;
-
-	if (enable) {
-		rtsds_931x_write_field(sds, page, 0x7, 13, 13, 0);
-		rtsds_931x_write_field(sds, page, 0x7, 11, 11, 0);
-	} else {
-		rtsds_931x_write_field(sds, page, 0x7, 13, 13, 0);
-		rtsds_931x_write_field(sds, page, 0x7, 11, 11, 0);
-	}
-
-	rtsds_931x_write_field(sds, page, 0x7, 4, 0, band);
-
-	rtl931x_sds_rst(sds);
-
-	return 0;
-}
-
-int rtl931x_sds_cmu_band_get(int sds, phy_interface_t mode)
-{
-	int page = rtl931x_sds_cmu_page_get(mode);
-	u32 band;
-
-	sds -= (sds % 2);
-	page += 1;
-	rtsds_931x_write(sds, 0x1f, 0x02, 73);
-
-	rtsds_931x_write_field(sds, page, 0x5, 15, 15, 1);
-	band = rtsds_931x_read_field(sds, 0x1f, 0x15, 8, 3);
-	pr_info("%s band is: %d\n", __func__, band);
-
-	return band;
-}
-
-
-int rtl931x_link_sts_get(u32 sds)
-{
-	u32 sts, sts1, latch_sts, latch_sts1;
-	if (0){
-		sts = rtsds_931x_read_field(sds, 0x101, 29, 8, 0);
-		sts1 = rtsds_931x_read_field(sds, 0x201, 29, 8, 0);
-		latch_sts = rtsds_931x_read_field(sds, 0x101, 30, 8, 0);
-		latch_sts1 = rtsds_931x_read_field(sds, 0x201, 30, 8, 0);
-	} else {
-		sts = rtsds_931x_read_field(sds, 0x5, 0, 12, 12);
-		latch_sts = rtsds_931x_read_field(sds, 0x4, 1, 2, 2);
-		latch_sts1 = rtsds_931x_read_field(sds, 0x102, 1, 2, 2);
-		sts1 = rtsds_931x_read_field(sds, 0x102, 1, 2, 2);
-	}
-
-	pr_info("%s: serdes %d sts %d, sts1 %d, latch_sts %d, latch_sts1 %d\n", __func__,
-		sds, sts, sts1, latch_sts, latch_sts1);
-
-	return sts1;
-}
-
 static int rtl8214fc_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
 {
 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
--- a/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.h
+++ b/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.h
@ -54,16 +54,8 @@ struct __attribute__ ((__packed__)) fw_header {
 /* Registers of the internal Serdes of the 9300 */
 #define RTL930X_MAC_FORCE_MODE_CTRL		(0xCA1C)

-/* Registers of the internal SerDes of the 9310 */
-#define RTL931X_SERDES_MODE_CTRL		(0x13cc)
-#define RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR	(0x13F4)
-#define RTL931X_MAC_SERDES_MODE_CTRL(sds)	(0x136C + (((sds) << 2)))
-
 int rtl9300_serdes_setup(int port, int sds_num, phy_interface_t phy_mode);

-int rtl931x_sds_cmu_band_get(int sds, phy_interface_t mode);
-void rtl931x_sds_init(u32 sds, phy_interface_t mode);
-
 /*
 * TODO: The following functions are currently not in use. So compiler will complain if
 * they are static and not made available externally. Collect them in this section to
@ -77,6 +69,3 @@ void rtl9300_sds_rxcal_dcvs_get(u32 sds_num, u32 dcvs_id, u32 dcvs_list[]);
 void rtl9300_sds_rxcal_dcvs_manual(u32 sds_num, u32 dcvs_id, bool manual, u32 dvcs_list[]);
 void rtl9300_sds_set(int sds_num, u32 mode);

-int rtl931x_link_sts_get(u32 sds);
-void rtl931x_sds_fiber_disable(u32 sds);
-int rtl931x_sds_cmu_band_set(int sds, bool enable, u32 band, phy_interface_t mode);