* Disable Mips_FeatureUseIndirectJumpsHazard
Mips_FeatureUseIndirectJumpsHazard is only used for jalr when used in
mips32 configs.
* DDIV test
* Fix details on instructions that contains ghost registers.
* Add missing MIPS tables & Fix mips16 and JrcRa16/AddiuSpImmX16 decoding.
Mips16 decoding of JrcRa16 & AddiuSpImmX16 was expecting the wrong bits.
Implement DecodeCPU16RegsRegisterClass for Mips16
Adds missing mips decoding tables:
- DecoderTableNanoMips_Conflict_Space16
- DecoderTableMicroMipsR6_Ambiguous32
- DecoderTableMicroMipsDSP32
- DecoderTable16
- DecoderTable32
- DecoderTableMips32r6_64r6_Ambiguous32
- DecoderTableMips32r6_64r6_BranchZero32
- DecoderTableMipsDSP32
* Patch details only when details are request.
* Fix wrong tests
* Address comments
* Add mips DSP test
* microMips32r3 DSP
* Test Conflict_Space16
* Test Conflict_Space16
* Enhance shift value and types of shift instructions.
Shifts via registers now save the register id in cs_arch64_op.shift.value
and set the shift type accordingly.
* Sort table
* cstest: use DOWNLOAD_EXTRACT_TIMESTAMP conditionally
This feature was added in CMake 3.24.0, so this allows older CMakes to
still build the tests.
* Fix comparison
* Use POLICY CMP0135
* Fix: Set writeback for AddrMode5 operands with W=1
* Fix memory acccess of vector load instructions.
* Remove unused files.
* Fix operands of RFED instructions
They have now memory operand and
the writeback flag is set accordingly.
* Fix: Remove invalid mnemonic enum adr_
* Add missing NULL check
* Update PPC module to LLVM 18.
**New**
(According to LLVM changelog)
- Added DFP instruction.
- Added the SCV instruction.
**Changes**
- Memory decoder were simplified by decoding disponent and base reg separately.
- `DFORM` -> `DFORM_BASE`
- Use inverted `MCInstDesc` table.
- Replace the many declared printer in PPCInstPrinter with `static inlines`.
- Renamed groups to upper case.
- Switched to `ARCH_add_cs_detail_X()` function names.
- Remove `PPCInstPrinter.h` because it is no longer used.
* Fix: Use correct directory name.
* Fix segfaults and add asserts for these NULL cases.
* Allow to map a single LLVM option to multiple CS options
* Add default endian option to the MCUpdater
* Fix setter for Little endian
* Add SPE option to cstool
* Fix QPX instructions.
Due to 4b43ef3e5c
the names of the operands were matched.
Because FRT dosn't exist in the XForm_1 class,
the generated tables didn't decoded them.
* Fix: AbsAddr should be printed as unsigned.
* Fix S12 immediate printing for PC memory operands
* Fix MCUpdater tests
* Update PPCRegisterInfo_stripRegisterPrefix
* Add support for selection of Power versions
* Run clang-format
* Fix feature check
* Allow to overwrite in multi-mode
* Add some more flags
* Fix order and map name
* Add new test files.
* Fix checks for features.
Only enables PowerX feature checks of a Power architecture is enabled
and the feature is in the list of it.
* Print byte sequence with space between comma.
This helps with copy and search of the byte string in the test files.
* Fix tests broken due to feature toggles
* Shorten generated names.
* Update bindings
* - Refactored setup.py to remove hacks regarding packaging of wheels for different platforms, improve and cleanup the code
- Updated README.txt
- Removed old Makefile and build_wheel.sh scripts
- Created a new workflow that takes care of building and testing python packages for different platforms/architectures/python versions
* Added SPDX headers to the setup.py
* - cstest_py: Fixed positional argument since it doesn't accept a `required` flag. It turns to have a mandatory tests folder path
- integration_tests.py: Use pathlib to determine the required path
- GitHub action: Simplified the tests execution command
* GitHub Actions: Run python 3.8 (lowest) and 3.13 (current highest) for native runners only during testings and the rest during tag release
* GitHub Action:
- Fixed the cibw_build matrix element
- Added a step to prepare artifact name
* GitHub Action: Added run_tests.py script to run all tests during CI workflow
* - Added SPDX headers to the run_tests.py script and to the build-wheels-publish.yml workflow file
- Minor fixes to the workflow as pointed out in the PR review
- Updated MANIFEST.in to reflect the actual libraries built during python wheel creation process
- Use subprocess.run in place of os.system in run_tests.py script
* GitHub Action:
- Run qemu step only if non-native Linux runner
- Added arch:universal2 matrix element for macos-latest runner
* Python bindings: Refreshed the list of files needed to be copied for sdist archive
* GitHub Action: Commented out arch:x86 matrix elements
* GitHub Action: Run qemu step only if non-native Linux runner
* GitHub Action: Minor fixes
* Python bindings: Added missing .in pattern when collecting src files for sdist archive
Fixes UB caused by various mismatches on how these arguments are passed
and read. This became visible when running on PowerPC hosts with e.g.
`cstool -d aarch64 204862f8`.
Apart from the UB fix, this is meant to be a pure refactor.
Partially addresses #2458
* Remove internal code from API
* Fix compatibility headers and test the generation of them
* Cancel all previous test workflows on new push.
* Add valgrind test
* Replace asserts with macros for AArch64, Alpha, LoongArch, Mips, SystemZ inc files.
* Add missing clearing of MCInst
* Ensure correct dir name is used.
* Replace asserts in inc files for PPC, ARM, TriCore
* Replace all asserts in modules with CS_ASSERT.
Also enable the CS_ASSERTs if CMAKE_BUILD_TYPE=Debug
* Formatting
* Fix Pn was printed as register, not predicate.
* Fix: is_alias must be an int to allow for -1 as false.
* Fix, shift immediate was casted to incorrect width.
* Store theexact float also in fp field for convenience.
* Fix: MRS has no implicit write of NCVZ
* Fix signs of Imm8 shifted operands.
* Fix another MRS test
* Fix: Src operand of CASAL had write flag set.
* Fix sysop access in Python data structures.
* Fix#2381
* Fix#2382
* Fix post-index correction only for pop with single register
* Fix missing memory index register scale
* Remove faulty and duplicated lshift field.
* Add shift information to shift alias instructions and add several tests.
* Fix scale tests
---------
Co-authored-by: Wu ChenXu <kabeor00@gmail.com>
* Remove Windows msvc project files and move build instructions to single BUILDING.md file.
* Move HACK.txt to Contributing and update it.
* Add refactoring guide.
* Add known bugs
* Remove compatibility headers.
* Fix smaller issues.
* Remove 'possible revert' column. People always can do manual changes.
* Move instruction alias description to the top
* Add table to general breaking changes.
* Update general release guide with the newest information.
* Highlight NanoMips and be more precise in writing.
* Add note about archs without alias.
* Add sentence about what is planned.
* Small corrections for Windows build instructions and debug macros.
* Fix rebase issues.
* Bring back make.sh for the CI
* Fix CID 508418 - Uninitialized struct
* Fix CID 509089 - Fix OOB read and write
* Fix CID 509088 - OOB.
Also adds tests and to ensure no OOB access.
* Fix CID 509085 - Resource leak.
* Fix CID 508414 and companions - Using undefined values.
* Fix CID 508405 - Use of uninitialized value
* Remove unnecessary and badly implemented dev fuzz code.
* Fix CID 508396 - Uninitialzied variable.
* Fix CID 508393, 508365 -- OOB read.
* Fix CID 432207 - OVerlapping memory access.
* Remove unused functions
* Fix CID 432170 - Overlapping memory access.
* Fix CID 166022 - Check for negative index
* Let strncat not depend n src operand.
* Fix 509083 and 509084 - NULL dereference
* Remove duplicated code.
* Initialize sysop
* Fix resource leak
* Remove unreachable code.
* Remove duplicate code.
* Add assert to check return value of cmoack
* Fixed: d should be a signed value, since it is checked against < 0
* Add missing break.
* Add NULL check
* Fix signs of binary search comparisons.
* Add explicit cast of or result
* Fix correct scope of case.
* Handle invalid integer type.
* Return UINT_MAX instead of implicitly casted -1
* Remove dead code
* Fix type of im
* Fix type of d
* Remove duplicated code.
* Add returns after CS_ASSERTS
* Check for len == 0 case.
* Ensure shift operates on uint64
* Replace strcpy with strncpy.
* Handle edge cases for 32bit rotate
* Fix some out of enum warnings
* Replace a strcpy with strncpy.
* Fix increment of address
* Skip some linting
* Fix: set instruction id
* Remove unused enum
* Replace the last usages of strcpy with SStream functions.
* Increase number of allowed AArch64 operands.
* Check safety of incrementing t the next operand.
* Fix naming of operand
* Update python constants
* Fix option setup of CS_OPT_DETAIL_REAL
* Document DETAIL_REAL has to be used with CS_OPT_ON.
* Run Coverity scan every Monday.
* Remove dead code
* Fix OOB read
* Rename macro to reflect it is only used with sstreams
* Fix rebase issues
* Add AArch64 linux build again.
* Enable package build also for PRs and pushes.
* Fix: don't append python version to injected platform name.
* Add musllinux build to wheel checking script
* Trigger wheel upload only on published full-releases.
* Remove duplicate workflow file
* Ensure all artifacts are moved to the same directory 'dist'
* Enable verbose twine upload.
* Add step to show downloaded artifacts for debugging.
* resolve conflict for loongarch and RISCV in Mapping.c and Mapping.h
* Use RISCV_get_detail for simplicity
Co-authored-by: Rot127 <45763064+Rot127@users.noreply.github.com>
* Use detail_is_set for simplicity
Co-authored-by: Rot127 <45763064+Rot127@users.noreply.github.com>
* Change comment style
Co-authored-by: Rot127 <45763064+Rot127@users.noreply.github.com>
* remove redundant add_str
* fix bug for RISCV_add_detail
* fix operands for csr instructions
* add python binding and tester for RISC-V
* add more test cases for RISC-V (M,A,F,D,C instructions)
* fix incorrect operand and access for sc.w and sc.d
* fix incorrect operand for fence and sfence.vma
* assert -> CS_ASSERT
* some instructions in test_riscv.c should be RISCV64
* add cs details test
* update python testers
---------
Co-authored-by: Rot127 <45763064+Rot127@users.noreply.github.com>
* Run clang-format
* Remove arm.h header from AArch64 files
* Update all AArch64 module files to LLVM-18.
* Add check if the differs save file is up-to-date with the current files.
* Add new generator for MC test trnaslation.
* Fix warnings
* Update generated AsmWriter files
* Remove unused variable
* Change MCPhysReg type to int16_t as LLVM 18 dictates.
With LLVM 18 the MCPhysReg value's type is changed to int16_t.
If we update modules to LLVM 18, they will generate
compiler warnings that uint16_t* should not be casted to int16_t*.
This makes changing the all tables to int16_t necessary, because the alternative is
to duplicate all MCPhysReg related code. Which is even worse.
* Assign enum values to raw_struct member
* Add printAdrAdrpLabel def
* Add header to regression test files.
* Write files to build dir and ignore more parsing errors.
* Fix parsing of MC test files.
* Reset parser after every block
* Add write and patch header step.
* Add and update MC tests for AArch64
* Fix clang-tidy warnings
* Don't warn about padding issues.
They break automatically initialized structs we can not change easily.
* Fix: Incorrect access of LLVM instruction descriptions.
* Initialize DecoderComplete flag
* Add more mapping and flag details
* Add function to get MCInstDesc from table
* Fix incorrect memory operand access types.
* Fix test where memory was not written, ut only read.
* Attempt to fix Windows build
* Fix 2268
The enum values were different and hence lead to different decoding.
* Refactor SME operands.
- Splits SME operands in Matrix and Predicate operands.
- Fixes general problems of incorrect detections with
the vector select/index operands of predicate registers.
- Simplifies code.
* Fix up typo in WRITE
* Print actual path to struct fields
* Add Registers of SME operands to the reg-read list
* Add tests for SME operands.
* Use Capstone reg enum for comparison
* Fix tests: 'Vector arra...' to 'operands[x].vas'
* Add the developer fuzz option.
* Fix Python bindings for SME operands
* Fix variable shadowing.
* Fix clang-tidy warnings
* Add missing break.
* Fix varg usage
* Brackets for case
* Handle AArch64_OP_GROUP_AdrAdrpLabel
* Fix endian issue with fuzzing start bytes
* Move previous sme.pred to it's own operand type.
* Fix calculation for imm ranges
* Print list member flag
* Fix up operand strings for cstest
* Do only a shallow clone of the cmocka stable branch
* Fix: Don't categorize ZT0 as a SME matrix operand.
* Remove unused code.
* Add flag to distinguish Vn and Qn registers.
* Add all registers to detail struct, even if emitted in the asm text
* Fix: Increment op count after each list member is added.
* Remove implicit write to NZCV for MSR Imm instructions.
* Handle several alias operands.
* Add details for zero alias with za0.h
* Add SME tile to write list if written
* Add write access flags to operands which are zeroed.
* Add SME tests of #2285
* Fix tests with latest syntax changes.
* Fix segfault if memory operand is only a label without register.
* Fix python bindings
* Attempt to fix clang-tidy warning for some configurations.
* Add missing test file (accidentially blocked by gitignore.)
* Print clang-tidy version before linting.
* Update differ save file
* Formatting
* Use clang-tidy-15 as if possible.
* Remove search patterns for MC tests, since they need to be reworked anyways.
* Enum to upper case change
* Add information to read the OSS fuzz result.
* Fix special case of SVE2 operands.
Apparently ZT0 registers can an index attached,
get which is BOUND to it. We have no "index for reg" field.
So it is simply saved as an immediate.
* Handle LLVM expressions without asserts.
* Ensure choices are always saved.
* OP_GROUP enums can't be all upper case because they contain type information.
* Fix compatibility header patching
* Update saved_choices.json
* Allow mode == None in test_corpus
* Initial auto-sync LoongArch support
- Accompanied llvm changes: https://github.com/capstone-engine/llvm-capstone/pull/45
- MC Tests are generated from llvm
- Instruction groups are implemented
- Register accesses are implemented
- Memory operands are handled for memory instructions
- Code are formatted using clang-format of LLVM 17
- Import tests from LLVM MC
- Collect operand type and access
- Collect registers read/modified
---------
Co-authored-by: CoA <1109673069@qq.com>
* Ensure same indent for all patched lines.
* Emit upper case OP_GROUP enum
* Spell all enum values in capital letters.
* Capticalize enums in loongarch_detail.c
* Add test which contains now a tab.
* Run clang-format on test_loongarch.c
---------
Co-authored-by: CoA <1109673069@qq.com>
Co-authored-by: Rot127 <unisono@quyllur.org>
Rot127