Virtualization
/
capstone
mirror of https://gitlab.com/qemu-project/capstone.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
4,825 Commits 18 Branches 46 Tags 73 MiB
Commit Graph

4825 Commits

Author SHA1 Message Date
billow 2785d31399 Format all .(c|h) code 2023-04-20 21:55:37 +08:00
billow 2919f94530 fix all tricore compile warnings 2023-04-20 09:22:25 +08:00
billow 26cb58dabc fix: support for TriCore call group mapping 2023-04-20 08:35:13 +08:00
billow c264240e48 fix tricore endian 2023-04-17 10:04:06 +08:00
billow 24573ade1d add TriCore in README 2023-04-14 11:25:34 +08:00
billow a4118c4ec9 update TriCoreGenAsmWriter.inc 2023-04-14 00:36:16 +08:00
billow 2fc16dbccb fix fuzz 2023-04-14 00:36:15 +08:00
billow 18b6b9138d fix fuzz 2023-04-14 00:36:14 +08:00
billow e3c2a06292 fix `test_corpus.py` 2023-04-14 00:36:13 +08:00
billow 008ef096d3 Update tricore `.inc` 2023-04-14 00:36:12 +08:00
billow b412f528c8 fix `TriCoreGenCSMappingInsnName.inc` 2023-04-14 00:36:11 +08:00
billow 36a975d8a2 fix `TRICORE_OP_MEM` 2023-04-14 00:36:11 +08:00
billow 2254e61515 cleanup 2023-04-14 00:36:10 +08:00
billow cf36371e5e fix `TriCore_getRegisterName` 2023-04-14 00:36:09 +08:00
billow 230ff6db56 fix tests 2023-04-14 00:36:08 +08:00
billow c78a086a55 fix `TRICORE_GENERIC` inst 2023-04-14 00:36:07 +08:00
billow d56c37ac07 fix tests 2023-04-14 00:36:06 +08:00
billow 2a7684d272 fix tests 2023-04-14 00:36:05 +08:00
billow e843a8df56 fix tests 2023-04-14 00:36:04 +08:00
billow dd04f4d98b Update TriCore instructions in TriCoreInstrInfo.td 2023-04-14 00:36:04 +08:00
billow 014c73de2e add tests 2023-04-14 00:36:03 +08:00
billow 3d2a56c2cd fix tc1.6.2 tests 2023-04-14 00:36:02 +08:00
billow 303fa9a7d8 fix tc1.6.2 tests 2023-04-14 00:36:01 +08:00
billow 68e448d500 fix tc1.1 tests 2023-04-14 00:36:00 +08:00
billow 4e75d75e91 fix 2023-04-14 00:35:59 +08:00
billow 67ec2089f1 fix 2023-04-14 00:35:58 +08:00
billow 54a579f06d fix 2023-04-14 00:35:57 +08:00
billow 26e507febe fix `RCR` printer 2023-04-14 00:35:56 +08:00
billow cf921632cf fix tc110 test and fix decode 2023-04-14 00:35:55 +08:00
billow 3bc09883bd fix `CADD` `CSUB` 2023-04-14 00:35:54 +08:00
billow f3f62b05dc add tc110 tests and fix tricore decode 2023-04-14 00:35:54 +08:00
billow 125d8bc115 feat: Update Tricore assembly code and disassembler logic. 
- Add new Tricore test `tc110.s.cs`
 2023-04-14 00:35:53 +08:00
billow d1404e8e79 fix tricore tests 2023-04-14 00:35:52 +08:00
billow d31b9cf0b9 fix TriCoreDisassembler.c from tests 2023-04-14 00:35:51 +08:00
billow 2638feac3f add some tc162 tests 2023-04-14 00:35:50 +08:00
billow 8e19b13abd fix 2023-04-14 00:35:49 +08:00
billow 554133e5c4 feat: Update TriCore processor support and architecture modes 
- Add support for TRICORE architecture modes 110, 120, 130, 131, 160, 161, and 162 in test_corpus.py
- Change the TriCore mode from `CS_MODE_TRICORE` to `CS_MODE_TRICORE_162` in `Tricore/*.s.cs`
 2023-04-14 00:35:48 +08:00
billow 48f0317c73 feat: Refactor and improve triCore platform support 2023-04-14 00:35:47 +08:00
billow 6d26813d56 feat: Add support for TriCore feature bits and new architectures 
- Add support for new Tricore architectures
- Clean up redundant instructions definitions
- Modify architecture options for the TRICORE mode
- Update disallowed modes for Tricore architecture
 2023-04-14 00:35:47 +08:00
billow 5ebe09366b fix 2023-04-14 00:35:46 +08:00
billow adebfda12c refactor: Optimize TriCore instructions in arch/TriCore/TriCoreInstrInfo.td 
- Add missing instructions and update existing ones
 2023-04-14 00:35:45 +08:00
billow 15a49dee30 refactor: Improve TriCore floating-point operations in instruction set 2023-04-14 00:35:44 +08:00
billow 8603d7ccb4 Refactor: Optimize TriCore instruction information. 
- Refactor TriCore instruction info
- Improve code organization
- Optimize instruction handling
- Eliminate unnecessary code duplication
 2023-04-14 00:35:43 +08:00
billow 07d3238d9f Add support for TriCore V162 and new instructions/operands. 
- Add new instruction `MOVZ_A`, remove instruction `NOT`, and add several new multiply and multiply-subtract instructions
- Move `multiclass mISR_1` and `multiclass mISYS_0` to separate file and fix typo in `rfe` instruction in `mISYS_0`
- Add support for new CPU feature `TriCore_FEATURE_HasV162` and update relevant inc files.
 2023-04-14 00:35:42 +08:00
billow d75ff4d9ed refactor: Improve instruction handling for TriCore architecture 2023-04-14 00:35:41 +08:00
billow 0b4546820e refactor: Improve TriCore instruction definitions in architecture file 
- Refactor architecture specific code for TriCore
- Update TriCore instruction information in [arch/TriCore/TriCoreInstrInfo.td]
- Improve performance and readability of relevant functions
 2023-04-14 00:35:40 +08:00
billow 07065c525b Optimize TriCore instruction information. 
- Refactor and optimize instruction encoding for TriCore architecture
- Improve performance and reduce code size by simplifying opcodes and encoding logic
- Update instruction definitions in TriCoreInstrInfo.td file
- Omit some large but non-essential changes in diff summary for readability
 2023-04-14 00:35:39 +08:00
billow 676477d465 Optimize TriCore instruction information. 
- Refactor TriCore instructions
- Simplify operand encoding for better readability
 2023-04-14 00:35:39 +08:00
billow 8853900171 refactor: Refactor TriCore instruction classes and operands 2023-04-14 00:35:38 +08:00
billow c5239815a5 refactor: Improve Architecture Instruction Information. 
- Refactor TriCore instruction information file
- Simplify and optimize certain instructions
 2023-04-14 00:35:37 +08:00