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capstone
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80 Commits

Author SHA1 Message Date
Nguyen Anh Quynh 6a4d27706a x86: fix the pause instruction reported by @maijin in issue #298 2015-04-02 12:32:33 +08:00
Nguyen Anh Quynh 09218a2dfd x86: remove unsed field @prefixLocations of InternalInstruction struct 2015-03-11 11:29:33 +08:00
Nguyen Anh Quynh bcb75a2194 x86: F2 can be a part of instruction encoding, but not a prefix 2015-03-11 11:15:27 +08:00
Nguyen Anh Quynh 54d5071288 x86: update core. also update all the bindings Java, Ocaml & Python 2015-03-06 00:52:49 +08:00
Nguyen Anh Quynh bfcaba5851 2015 2015-03-04 17:45:23 +08:00
Félix Cloutier 6d2c6a7a97 Silencing Clang warning about losing precision 2015-03-04 11:26:49 +08:00
Nguyen Anh Quynh e84d2cd523 x86: allow prefixes to be positioned anywhere. this should fix the bug reported by Gabriel Quadros 2015-02-25 17:04:23 +08:00
Nguyen Anh Quynh dfa396e6ff x86: add the missing X86 instructions in X86_REDUCE mode in X86DisassemblerDecoder.c. bug reported by Julian Stecklina 2015-02-12 09:02:42 +08:00
Michael Cohen f601fddc53 Merge branch 'next' of https://github.com/aquynh/capstone into python 2015-01-26 17:33:21 +01:00
Nguyen Anh Quynh e95a76611c x86: remove some instructions unsupported in 3.x version 2015-01-13 14:35:43 +08:00
Nguyen Anh Quynh 25525fb20c x86: remove some instructions irrelevant for LOCK prefix in invalidPrefix() 2015-01-13 12:14:46 +08:00
Nguyen Anh Quynh 08482e106d x86: remove some instructions irrelevant for LOCK prefix in invalidPrefix() 2015-01-13 12:14:19 +08:00
Andrew Wesie 29f41da4c2 x86: add more valid instructions for LOCK prefix 2015-01-13 12:04:12 +08:00
Nguyen Anh Quynh 5323128ed2 x86: check for invalid instructions with LOCK prefix 2015-01-13 12:04:02 +08:00
Andrew Wesie 5de09479a6 x86: add more valid instructions for LOCK prefix 2015-01-05 18:26:41 -06:00
Nguyen Anh Quynh beb3248c26 x86: check for invalid instructions with LOCK prefix 2015-01-05 22:18:00 +07:00
Nguyen Anh Quynh 599b559455 x86: fix some compilation issues about missing instructions on CAPSTONE_X86_REDUCE setup 2014-12-31 10:42:16 +08:00
Nguyen Anh Quynh 3c27827a25 x86: handle 0x82 opcode for CAPSTONE_X86_REDUCE setup 2014-12-30 15:43:19 +08:00
Nguyen Anh Quynh 3410b63a4e x86: handle 0x82 opcode. bug reported by Anton Kochkov 2014-12-30 13:16:44 +08:00
Nguyen Anh Quynh c51e04fa97 x86: support CR9-CR15 registers 2014-12-27 23:56:14 +08:00
Nguyen Anh Quynh 08390775b5 x86: support CR9-CR15 registers 2014-12-27 23:55:08 +08:00
Nguyen Anh Quynh 1038fdb038 x86: add new registers DR8-DR15 2014-12-27 15:33:12 +08:00
Nguyen Anh Quynh 9f694cc934 x86: handle undocumented immediates for (v)cmpps/pd/ss/sd instructions 2014-12-26 17:54:11 +08:00
Nguyen Anh Quynh 2ac7941227 x86: handle REX properly for segment related instructions by ignoring REX.r entirely 2014-12-24 16:16:51 +08:00
Nguyen Anh Quynh 80959c9a25 code style 2014-12-24 16:03:10 +08:00
Nguyen Anh Quynh 094811415c x86: handle REX properly for x64 MMX related instructions by ignoring REX.b & REX.w entirely 2014-12-24 16:02:44 +08:00
Nguyen Anh Quynh 51754231b9 x86: check instruction size <=15 as soon as possible 2014-12-18 00:20:07 +08:00
Nguyen Anh Quynh 3539595183 x86: instruction length must be <= 15 2014-12-17 23:53:32 +08:00
Nguyen Anh Quynh a3d689de51 x86: allow to mix REX & legacy prefix repeatedly in any order 2014-12-16 22:36:16 +08:00
Nguyen Anh Quynh 1016d3214d x86: only eliminate REX prefixes if next byte is not a legacy prefix 2014-12-13 10:27:56 +08:00
Nguyen Anh Quynh 1cbc222626 x86: eliminate redundant REX prefixes in front of x86_64 instruction. bug reported by Aurélien Wailly 2014-12-13 01:41:49 +08:00
Nguyen Anh Quynh c2925e9034 x86: accept more than one REX prefix for x86_64. bug reported by Aurélien Wailly. thanks Ange Albertini for help 2014-12-12 18:31:31 +08:00
Nguyen Anh Quynh 4e20e8e24d x86: 0x66 & 0x67 cannot be anywhere. this fixes CRC32 instruction 2014-11-10 07:43:49 +08:00
Nguyen Anh Quynh 19c63bcf1f x86: hacky temporarily fix for FEMMS instruction (3DNow). bug reported by Ben Nagy 2014-11-07 12:29:50 +08:00
Nguyen Anh Quynh c96f1b06b2 x86: fix Out-of-bounds read error in is16BitEquivalent(). issue reported by Coverity 2014-10-01 14:35:29 +08:00
Nguyen Anh Quynh 72bbcacb88 x86: temporarily solve conflicts caused by the last merge 2014-09-15 14:17:49 +08:00
Nguyen Anh Quynh c44acedc79 x86: properly zero-out x86.operands[] 2014-08-27 10:38:40 +08:00
obs 2725a3fea8 X86GenInstrInfo size reduction 2014-08-19 20:12:39 +02:00
Nguyen Anh Quynh 0b690387b3 x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change 2014-08-13 13:01:50 +08:00
Nguyen Anh Quynh af6db2afe8 x86: handle RIP relative addressing in 64bit mode properly. bug reported by @hlide 2014-06-30 02:01:04 +08:00
Nguyen Anh Quynh f1ec52628e x86: provide size for X86_OP_IMM operand. thank Gabriel Quadros for some suggestions 2014-06-25 22:03:18 +08:00
Nguyen Anh Quynh eb2f3fb85a x86: properly reset prefixPresent for prefix0/1 group 2014-06-20 11:15:58 +08:00
Nguyen Anh Quynh 9cf88119fb x86: InternalInstruction@xAcquireRelease should be initialized to 0 (FALSE) 2014-06-16 18:32:34 +08:00
Nguyen Anh Quynh 22a5a761d8 x86: simplify byteReader_t 2014-06-07 23:41:20 +08:00
Nguyen Anh Quynh 5474d877b0 x86: optimize struct InternalInstruction for memset(). this improve performance by around 4% 2014-06-07 12:56:44 +08:00
Nguyen Anh Quynh e70a043a04 x86: more simplification for better performance 2014-06-05 10:52:43 +08:00
Nguyen Anh Quynh 46b6693d36 x86: save prefixes to avoid expensive copying loop. based on idea of Dang Hoang Vu 2014-06-04 19:04:46 +08:00
Nguyen Anh Quynh 8598a219f3 enable arch code from source with CAPSTONE_HAS_* for MSVC to pick up 2014-05-14 11:26:41 +08:00
Nguyen Anh Quynh 638835a1d5 fix some warnings reported by MSVC 2014-05-12 15:15:32 +08:00
Nguyen Anh Quynh e68ee701c4 x86: simplify code handling LOCK/REP by remembering this prefix status when decoding it 2014-05-07 13:57:09 +08:00