Nguyen Anh Quynh
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8c212fd25e
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ppc: add the missing Q0 register to reg_name_maps[]. bug reported by Coverity
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2015-03-11 10:29:08 +08:00 |
Nguyen Anh Quynh
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fcde1e190a
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Merge branch 'next' of https://github.com/aquynh/capstone into next
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2015-03-11 10:28:49 +08:00 |
Nguyen Anh Quynh
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956c24d760
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Merge pull request #281 from radare/indent
Fix indent issue
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2015-03-11 08:54:18 +08:00 |
pancake
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21b0bdd0e1
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Fix indent issue
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2015-03-11 00:40:14 +01:00 |
pancake
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dae7c3ee9f
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add ARM64_GRP_PRIVILEGE group and tag some instructions
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2015-03-11 00:23:22 +01:00 |
pancake
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cf74a14b43
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add ARM_GRP_PRIVILEGE group and tag some instructions
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2015-03-11 00:13:53 +01:00 |
Nguyen Anh Quynh
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6791b268c4
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arm: revert the last change on OperandInfo* in ARMGenInstrInfo.inc
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2015-03-10 16:52:22 +08:00 |
Nguyen Anh Quynh
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dfd1c0b44e
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arm: get rid of some useless variables in ARMGenInstrInfo.inc. this saves at lease 50KB
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2015-03-10 15:21:22 +08:00 |
Nguyen Anh Quynh
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a7837a4ae3
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sparc, systemz, xcore: getInstruction() should return boolean instead of DecodeStatus
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2015-03-10 15:20:20 +08:00 |
Nguyen Anh Quynh
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037e01f942
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core: remove unused Subregister indices for Sparc, PPC, SystemZ & Mips
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2015-03-09 21:36:02 +08:00 |
Nguyen Anh Quynh
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bf97e21bb5
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core: add CS_NEXT_VERSION to version the latest code in the 'next' branch
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2015-03-09 10:11:06 +08:00 |
Nguyen Anh Quynh
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914066be07
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x86: CLI & STI are privileged instructions. issue reported by @pancake
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2015-03-09 10:01:58 +08:00 |
Nguyen Anh Quynh
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0423562c42
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x86: RDTSC is not a privilege instructions, but all VM instructions are
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2015-03-09 09:57:51 +08:00 |
Nguyen Anh Quynh
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4dd0dcb9d4
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add CS_GRP_PRIVILEGE group, and also add X86_GRP_PRIVILEGE group for bunch of X86 privileged instructions
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2015-03-09 00:04:45 +08:00 |
Nguyen Anh Quynh
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bb5dccedfa
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core: put insns[] into separate .inc files to make it easier to manage
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2015-03-08 10:54:32 +08:00 |
Nguyen Anh Quynh
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d3d574ed05
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x86: XCHG* do not implicitly access *AX registers (reduce mode)
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2015-03-08 05:00:17 +08:00 |
Nguyen Anh Quynh
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8b8d762580
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x86: XCHG* do not implicitly access *AX registers
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2015-03-08 04:58:18 +08:00 |
Nguyen Anh Quynh
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e0329ddde3
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arm: printModImmOperand() should print Imm as unsigned number in some special cases
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2015-03-08 00:29:20 +08:00 |
radare
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796f1d4022
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Fix make -j warning
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2015-03-07 11:40:19 +01:00 |
Nguyen Anh Quynh
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8e343885be
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arm: update insn_ops[]
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2015-03-07 16:38:35 +08:00 |
Nguyen Anh Quynh
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78699e0ff8
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x86: update insn_ops[]
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2015-03-07 16:33:49 +08:00 |
Nguyen Anh Quynh
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e4ca35d561
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x86: delete the fiction instruction X86_INS_VPCOM
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2015-03-07 16:05:06 +08:00 |
Nguyen Anh Quynh
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7a94483452
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x86: remove another fiction instruction VCMP
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2015-03-07 14:37:59 +08:00 |
Nguyen Anh Quynh
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e402e021b8
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x86: remove unreal instruction VPCMP
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2015-03-07 14:33:40 +08:00 |
Nguyen Anh Quynh
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3c626fbb98
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mips: add register operands when detail = ON in the newly added function printRegisterList()
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2015-03-07 13:56:41 +08:00 |
Nguyen Anh Quynh
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825a228a0f
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python: make Cython binding support X86's @xop_cc
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2015-03-07 13:49:14 +08:00 |
Nguyen Anh Quynh
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debaa2eefc
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bindings: support newly added field @xop_cc in the last commit (Java, Ocaml, Python)
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2015-03-07 13:46:21 +08:00 |
Nguyen Anh Quynh
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a81bf4247c
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x86: add new field @xop_cc to struct @cs_x86
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2015-03-07 13:37:32 +08:00 |
Nguyen Anh Quynh
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6bb255bb12
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mips: remove mode CS_MODE_MIPSGP64
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2015-03-07 09:47:11 +08:00 |
Nguyen Anh Quynh
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522a6f4125
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Merge branch 'upgrade-core' into next
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2015-03-07 01:04:39 +08:00 |
Nguyen Anh Quynh
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ad42f16b14
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mips: remove the confusing mode CS_MODE_MIPSGP64
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2015-03-07 00:48:06 +08:00 |
Nguyen Anh Quynh
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b8b83482b7
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arm: print immediate in hex format when suitable for printModImmOperand()
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2015-03-07 00:26:24 +08:00 |
Nguyen Anh Quynh
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16f703efd8
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x86: remove more abundant space at the end of instructions (ATT syntax)
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2015-03-06 23:26:27 +08:00 |
Nguyen Anh Quynh
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a3c8505a13
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x86: remove one extra space in ATT syntax
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2015-03-06 23:18:34 +08:00 |
Nguyen Anh Quynh
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ca792b2bcb
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x86: fix some groups X86_GRP* in insns[] in X86Mapping.c
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2015-03-06 23:13:34 +08:00 |
Nguyen Anh Quynh
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dcbfc394ba
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x86: fix ATT syntax
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2015-03-06 22:48:00 +08:00 |
Nguyen Anh Quynh
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5a36377c7c
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x86: add GRP_VM for some VMX instructions
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2015-03-06 12:28:31 +08:00 |
Nguyen Anh Quynh
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3a1a77fa64
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x86: reduce mode support for the upgraded core
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2015-03-06 12:21:50 +08:00 |
Nguyen Anh Quynh
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cdc9e20a45
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x86: add missing GRP_VM for some virtualization instructions
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2015-03-06 11:24:25 +08:00 |
Nguyen Anh Quynh
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02a7675f7e
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x86: cleanup
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2015-03-06 09:12:26 +08:00 |
Nguyen Anh Quynh
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4c1d0970ca
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x86: test [mem], reg
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2015-03-06 09:11:25 +08:00 |
Nguyen Anh Quynh
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54d5071288
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x86: update core. also update all the bindings Java, Ocaml & Python
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2015-03-06 00:52:49 +08:00 |
Nguyen Anh Quynh
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f4a2da5a94
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ppc: fix PPC_init()
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2015-03-05 00:33:29 +08:00 |
Nguyen Anh Quynh
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bfcaba5851
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2015
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2015-03-04 17:45:23 +08:00 |
Nguyen Anh Quynh
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0be9eab6ba
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ppc: update core
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2015-03-04 17:06:48 +08:00 |
Nguyen Anh Quynh
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338f2eae4c
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xcore: update core
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2015-03-04 14:10:41 +08:00 |
Nguyen Anh Quynh
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603a32e968
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systemz: upgrade core
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2015-03-04 13:58:07 +08:00 |
Nguyen Anh Quynh
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2f2e8e2f0b
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sparc: upgrade core
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2015-03-04 12:13:25 +08:00 |
Félix Cloutier
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c488de3926
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Merge branch 'next' of github.com:zneak/capstone into next
Conflicts were resolved by accepting every change from aquynh's repository.
Conflicts:
bindings/java/capstone/Arm64_const.java
bindings/java/capstone/Arm_const.java
bindings/java/capstone/Mips_const.java
bindings/java/capstone/Ppc_const.java
bindings/java/capstone/Sparc_const.java
bindings/java/capstone/Sysz_const.java
bindings/java/capstone/X86_const.java
bindings/java/capstone/Xcore_const.java
bindings/ocaml/arm64_const.ml
bindings/ocaml/arm_const.ml
bindings/ocaml/mips_const.ml
bindings/ocaml/ppc_const.ml
bindings/ocaml/sparc_const.ml
bindings/ocaml/sysz_const.ml
bindings/ocaml/x86_const.ml
bindings/ocaml/xcore_const.ml
bindings/python/capstone/arm64_const.py
bindings/python/capstone/arm_const.py
bindings/python/capstone/mips_const.py
bindings/python/capstone/ppc_const.py
bindings/python/capstone/sparc_const.py
bindings/python/capstone/sysz_const.py
bindings/python/capstone/x86_const.py
bindings/python/capstone/xcore_const.py
include/capstone/arm.h
include/capstone/arm64.h
include/capstone/mips.h
include/capstone/ppc.h
include/capstone/sparc.h
include/capstone/systemz.h
include/capstone/x86.h
include/capstone/xcore.h
xcode/Capstone.xcodeproj/project.pbxproj
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2015-03-03 23:07:46 -05:00 |
Félix Cloutier
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dffa0bcbf3
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Updated header files location in Xcode project
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2015-03-03 23:02:38 -05:00 |